1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-w90x900/irq.c
5 * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks
7 * Copyright (c) 2008 Nuvoton technology corporation
10 * Wan ZongShun <mcuos.com@gmail.com>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/ptrace.h>
18 #include <linux/device.h>
22 #include <asm/mach/irq.h>
24 #include <mach/hardware.h>
25 #include <mach/regs-irq.h>
32 void (*enable
)(struct group_irq
*, int enable
);
35 static DEFINE_SPINLOCK(groupirq_lock
);
37 #define DEFINE_GROUP(_name, _ctrlbit, _num) \
38 struct group_irq group_##_name = { \
39 .enable = nuc900_group_enable, \
40 .gpen = ((1 << _num) - 1) << _ctrlbit, \
43 static void nuc900_group_enable(struct group_irq
*gpirq
, int enable
);
45 static DEFINE_GROUP(nirq0
, 0, 4);
46 static DEFINE_GROUP(nirq1
, 4, 4);
47 static DEFINE_GROUP(usbh
, 8, 2);
48 static DEFINE_GROUP(ottimer
, 16, 3);
49 static DEFINE_GROUP(gdma
, 20, 2);
50 static DEFINE_GROUP(sc
, 24, 2);
51 static DEFINE_GROUP(i2c
, 26, 2);
52 static DEFINE_GROUP(ps2
, 28, 2);
54 static int group_irq_enable(struct group_irq
*group_irq
)
58 spin_lock_irqsave(&groupirq_lock
, flags
);
59 if (group_irq
->enabled
++ == 0)
60 (group_irq
->enable
)(group_irq
, 1);
61 spin_unlock_irqrestore(&groupirq_lock
, flags
);
66 static void group_irq_disable(struct group_irq
*group_irq
)
70 WARN_ON(group_irq
->enabled
== 0);
72 spin_lock_irqsave(&groupirq_lock
, flags
);
73 if (--group_irq
->enabled
== 0)
74 (group_irq
->enable
)(group_irq
, 0);
75 spin_unlock_irqrestore(&groupirq_lock
, flags
);
78 static void nuc900_group_enable(struct group_irq
*gpirq
, int enable
)
80 unsigned int groupen
= gpirq
->gpen
;
83 regval
= __raw_readl(REG_AIC_GEN
);
90 __raw_writel(regval
, REG_AIC_GEN
);
93 static void nuc900_irq_mask(struct irq_data
*d
)
95 struct group_irq
*group_irq
;
99 __raw_writel(1 << d
->irq
, REG_AIC_MDCR
);
103 group_irq
= &group_nirq0
;
107 group_irq
= &group_nirq1
;
111 group_irq
= &group_usbh
;
114 case IRQ_T_INT_GROUP
:
115 group_irq
= &group_ottimer
;
119 group_irq
= &group_gdma
;
123 group_irq
= &group_sc
;
127 group_irq
= &group_i2c
;
131 group_irq
= &group_ps2
;
136 group_irq_disable(group_irq
);
140 * By the w90p910 spec,any irq,only write 1
141 * to REG_AIC_EOSCR for ACK
144 static void nuc900_irq_ack(struct irq_data
*d
)
146 __raw_writel(0x01, REG_AIC_EOSCR
);
149 static void nuc900_irq_unmask(struct irq_data
*d
)
151 struct group_irq
*group_irq
;
155 __raw_writel(1 << d
->irq
, REG_AIC_MECR
);
159 group_irq
= &group_nirq0
;
163 group_irq
= &group_nirq1
;
167 group_irq
= &group_usbh
;
170 case IRQ_T_INT_GROUP
:
171 group_irq
= &group_ottimer
;
175 group_irq
= &group_gdma
;
179 group_irq
= &group_sc
;
183 group_irq
= &group_i2c
;
187 group_irq
= &group_ps2
;
192 group_irq_enable(group_irq
);
195 static struct irq_chip nuc900_irq_chip
= {
196 .irq_ack
= nuc900_irq_ack
,
197 .irq_mask
= nuc900_irq_mask
,
198 .irq_unmask
= nuc900_irq_unmask
,
201 void __init
nuc900_init_irq(void)
205 __raw_writel(0xFFFFFFFE, REG_AIC_MDCR
);
207 for (irqno
= IRQ_WDT
; irqno
<= IRQ_ADC
; irqno
++) {
208 irq_set_chip_and_handler(irqno
, &nuc900_irq_chip
,
210 irq_clear_status_flags(irqno
, IRQ_NOREQUEST
);