arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * DTS File for HiSilicon Poplar Development Board
   4  *
   5  * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
   6  */
   7
   8 /dts-v1/;
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include "hi3798cv200.dtsi"
  12 #include "poplar-pinctrl.dtsi"
  13
  14 / {
  15         model = "HiSilicon Poplar Development Board";
  16         compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
  17
  18         aliases {
  19                 serial0 = &uart0;
  20                 serial2 = &uart2;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         memory@0 {
  28                 device_type = "memory";
  29                 reg = <0x0 0x0 0x0 0x80000000>;
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 user-led0 {
  36                         label = "green:user1";
  37                         gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
  38                         linux,default-trigger = "heartbeat";
  39                         default-state = "off";
  40                 };
  41
  42                 user-led1 {
  43                         label = "green:user2";
  44                         gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
  45                         linux,default-trigger = "mmc0";
  46                         default-state = "off";
  47                 };
  48
  49                 user-led2 {
  50                         label = "green:user3";
  51                         gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
  52                         linux,default-trigger = "mmc1";
  53                         default-state = "off";
  54                 };
  55
  56                 user-led3 {
  57                         label = "green:user4";
  58                         gpios = <&gpio10 6 GPIO_ACTIVE_LOW>;
  59                         linux,default-trigger = "none";
  60                         panic-indicator;
  61                         default-state = "off";
  62                 };
  63         };
  64
  65         reg_pcie: regulator-pcie {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "3V3_PCIE0";
  68                 regulator-min-microvolt = <3300000>;
  69                 regulator-max-microvolt = <3300000>;
  70                 gpio = <&gpio6 7 0>;
  71                 enable-active-high;
  72         };
  73 };
  74
  75 &ehci {
  76         status = "okay";
  77 };
  78
  79 &emmc {
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&emmc_pins_1 &emmc_pins_2
  82                      &emmc_pins_3 &emmc_pins_4>;
  83         fifo-depth = <256>;
  84         clock-frequency = <200000000>;
  85         cap-mmc-highspeed;
  86         mmc-ddr-1_8v;
  87         mmc-hs200-1_8v;
  88         non-removable;
  89         bus-width = <8>;
  90         status = "okay";
  91 };
  92
  93 &gmac1 {
  94         status = "okay";
  95         #address-cells = <1>;
  96         #size-cells = <0>;
  97         phy-handle = <&eth_phy1>;
  98         phy-mode = "rgmii";
  99         hisilicon,phy-reset-delays-us = <10000 10000 30000>;
 100
 101         eth_phy1: phy@3 {
 102                 reg = <3>;
 103         };
 104 };
 105
 106 &gpio1 {
 107         status = "okay";
 108         gpio-line-names = "GPIO-E",     "",
 109                           "",           "",
 110                           "",           "GPIO-F",
 111                           "",           "GPIO-J";
 112 };
 113
 114 &gpio2 {
 115         status = "okay";
 116         gpio-line-names = "GPIO-H",     "GPIO-I",
 117                           "GPIO-L",     "GPIO-G",
 118                           "GPIO-K",     "",
 119                           "",           "";
 120 };
 121
 122 &gpio3 {
 123         status = "okay";
 124         gpio-line-names = "",           "",
 125                           "",           "",
 126                           "GPIO-C",     "",
 127                           "",           "GPIO-B";
 128 };
 129
 130 &gpio4 {
 131         status = "okay";
 132         gpio-line-names = "",           "",
 133                           "",           "",
 134                           "",           "GPIO-D",
 135                           "",           "";
 136 };
 137
 138 &gpio5 {
 139         status = "okay";
 140         gpio-line-names = "",           "USER-LED-1",
 141                           "USER-LED-2", "",
 142                           "",           "GPIO-A",
 143                           "",           "";
 144 };
 145
 146 &gpio6 {
 147         status = "okay";
 148         gpio-line-names = "",           "",
 149                           "",           "USER-LED-0",
 150                           "",           "",
 151                           "",           "";
 152 };
 153
 154 &gpio10 {
 155         status = "okay";
 156         gpio-line-names = "",           "",
 157                           "",           "",
 158                           "",           "",
 159                           "USER-LED-3", "";
 160 };
 161
 162 &i2c0 {
 163         status = "okay";
 164         label = "LS-I2C0";
 165 };
 166
 167 &i2c2 {
 168         status = "okay";
 169         label = "LS-I2C1";
 170 };
 171
 172 &ir {
 173         status = "okay";
 174 };
 175
 176 &ohci {
 177         status = "okay";
 178 };
 179
 180 &pcie {
 181         reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
 182         vpcie-supply = <&reg_pcie>;
 183         status = "okay";
 184 };
 185
 186 &sd0 {
 187         bus-width = <4>;
 188         cap-sd-highspeed;
 189         status = "okay";
 190 };
 191
 192 &spi0 {
 193         status = "okay";
 194         label = "LS-SPI0";
 195 };
 196
 197 &uart0 {
 198         status = "okay";
 199 };
 200
 201 &uart2 {
 202         status = "okay";
 203         label = "LS-UART0";
 204 };
 205 /* No optional LS-UART1 on Low Speed Expansion Connector. */