arch/arm64/boot/dts/renesas/r8a77995-draak.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Draak board
   4  *
   5  * Copyright (C) 2016-2018 Renesas Electronics Corp.
   6  * Copyright (C) 2017 Glider bvba
   7  */
   8
   9 /dts-v1/;
  10 #include "r8a77995.dtsi"
  11 #include <dt-bindings/gpio/gpio.h>
  12
  13 / {
  14         model = "Renesas Draak board based on r8a77995";
  15         compatible = "renesas,draak", "renesas,r8a77995";
  16
  17         aliases {
  18                 serial0 = &scif2;
  19                 ethernet0 = &avb;
  20         };
  21
  22         chosen {
  23                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         backlight: backlight {
  28                 compatible = "pwm-backlight";
  29                 pwms = <&pwm1 0 50000>;
  30
  31                 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
  32                 default-brightness-level = <10>;
  33
  34                 power-supply = <&reg_12p0v>;
  35                 enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
  36         };
  37
  38         composite-in {
  39                 compatible = "composite-video-connector";
  40
  41                 port {
  42                         composite_con_in: endpoint {
  43                                 remote-endpoint = <&adv7180_in>;
  44                         };
  45                 };
  46         };
  47
  48         hdmi-in {
  49                 compatible = "hdmi-connector";
  50                 type = "a";
  51
  52                 port {
  53                         hdmi_con_in: endpoint {
  54                                 remote-endpoint = <&adv7612_in>;
  55                         };
  56                 };
  57         };
  58
  59         hdmi-out {
  60                 compatible = "hdmi-connector";
  61                 type = "a";
  62
  63                 port {
  64                         hdmi_con_out: endpoint {
  65                                 remote-endpoint = <&adv7511_out>;
  66                         };
  67                 };
  68         };
  69
  70         lvds-decoder {
  71                 compatible = "thine,thc63lvd1024";
  72                 vcc-supply = <&reg_3p3v>;
  73
  74                 ports {
  75                         #address-cells = <1>;
  76                         #size-cells = <0>;
  77
  78                         port@0 {
  79                                 reg = <0>;
  80                                 thc63lvd1024_in: endpoint {
  81                                         remote-endpoint = <&lvds0_out>;
  82                                 };
  83                         };
  84
  85                         port@2 {
  86                                 reg = <2>;
  87                                 thc63lvd1024_out: endpoint {
  88                                         remote-endpoint = <&adv7511_in>;
  89                                 };
  90                         };
  91                 };
  92         };
  93
  94         memory@48000000 {
  95                 device_type = "memory";
  96                 /* first 128MB is reserved for secure area. */
  97                 reg = <0x0 0x48000000 0x0 0x18000000>;
  98         };
  99
 100         reg_1p8v: regulator0 {
 101                 compatible = "regulator-fixed";
 102                 regulator-name = "fixed-1.8V";
 103                 regulator-min-microvolt = <1800000>;
 104                 regulator-max-microvolt = <1800000>;
 105                 regulator-boot-on;
 106                 regulator-always-on;
 107         };
 108
 109         reg_3p3v: regulator1 {
 110                 compatible = "regulator-fixed";
 111                 regulator-name = "fixed-3.3V";
 112                 regulator-min-microvolt = <3300000>;
 113                 regulator-max-microvolt = <3300000>;
 114                 regulator-boot-on;
 115                 regulator-always-on;
 116         };
 117
 118         reg_12p0v: regulator1 {
 119                 compatible = "regulator-fixed";
 120                 regulator-name = "D12.0V";
 121                 regulator-min-microvolt = <12000000>;
 122                 regulator-max-microvolt = <12000000>;
 123                 regulator-boot-on;
 124                 regulator-always-on;
 125         };
 126
 127         vga {
 128                 compatible = "vga-connector";
 129
 130                 port {
 131                         vga_in: endpoint {
 132                                 remote-endpoint = <&adv7123_out>;
 133                         };
 134                 };
 135         };
 136
 137         vga-encoder {
 138                 compatible = "adi,adv7123";
 139
 140                 ports {
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143
 144                         port@0 {
 145                                 reg = <0>;
 146                                 adv7123_in: endpoint {
 147                                         remote-endpoint = <&du_out_rgb>;
 148                                 };
 149                         };
 150                         port@1 {
 151                                 reg = <1>;
 152                                 adv7123_out: endpoint {
 153                                         remote-endpoint = <&vga_in>;
 154                                 };
 155                         };
 156                 };
 157         };
 158
 159         x12_clk: x12 {
 160                 compatible = "fixed-clock";
 161                 #clock-cells = <0>;
 162                 clock-frequency = <74250000>;
 163         };
 164 };
 165
 166 &avb {
 167         pinctrl-0 = <&avb0_pins>;
 168         pinctrl-names = "default";
 169         renesas,no-ether-link;
 170         phy-handle = <&phy0>;
 171         status = "okay";
 172
 173         phy0: ethernet-phy@0 {
 174                 rxc-skew-ps = <1500>;
 175                 reg = <0>;
 176                 interrupt-parent = <&gpio5>;
 177                 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
 178         };
 179 };
 180
 181 &can0 {
 182         pinctrl-0 = <&can0_pins>;
 183         pinctrl-names = "default";
 184         status = "okay";
 185 };
 186
 187 &can1 {
 188         pinctrl-0 = <&can1_pins>;
 189         pinctrl-names = "default";
 190         status = "okay";
 191 };
 192
 193 &du {
 194         pinctrl-0 = <&du_pins>;
 195         pinctrl-names = "default";
 196         status = "okay";
 197
 198         clocks = <&cpg CPG_MOD 724>,
 199                  <&cpg CPG_MOD 723>,
 200                  <&x12_clk>;
 201         clock-names = "du.0", "du.1", "dclkin.0";
 202
 203         ports {
 204                 port@0 {
 205                         endpoint {
 206                                 remote-endpoint = <&adv7123_in>;
 207                         };
 208                 };
 209         };
 210 };
 211
 212 &ehci0 {
 213         dr_mode = "host";
 214         status = "okay";
 215 };
 216
 217 &extal_clk {
 218         clock-frequency = <48000000>;
 219 };
 220
 221 &hsusb {
 222         dr_mode = "host";
 223         status = "okay";
 224 };
 225
 226 &i2c0 {
 227         pinctrl-0 = <&i2c0_pins>;
 228         pinctrl-names = "default";
 229         status = "okay";
 230
 231         composite-in@20 {
 232                 compatible = "adi,adv7180cp";
 233                 reg = <0x20>;
 234
 235                 ports {
 236                         #address-cells = <1>;
 237                         #size-cells = <0>;
 238
 239                         port@0 {
 240                                 reg = <0>;
 241                                 adv7180_in: endpoint {
 242                                         remote-endpoint = <&composite_con_in>;
 243                                 };
 244                         };
 245
 246                         port@3 {
 247                                 reg = <3>;
 248
 249                                 /*
 250                                  * The VIN4 video input path is shared between
 251                                  * CVBS and HDMI inputs through SW[49-53]
 252                                  * switches.
 253                                  *
 254                                  * CVBS is the default selection, link it to
 255                                  * VIN4 here.
 256                                  */
 257                                 adv7180_out: endpoint {
 258                                         remote-endpoint = <&vin4_in>;
 259                                 };
 260                         };
 261                 };
 262
 263         };
 264
 265         hdmi-encoder@39 {
 266                 compatible = "adi,adv7511w";
 267                 reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
 268                 reg-names = "main", "edid", "packet", "cec";
 269                 interrupt-parent = <&gpio1>;
 270                 interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
 271
 272                 /* Depends on LVDS */
 273                 max-clock = <135000000>;
 274                 min-vrefresh = <50>;
 275
 276                 adi,input-depth = <8>;
 277                 adi,input-colorspace = "rgb";
 278                 adi,input-clock = "1x";
 279                 adi,input-style = <1>;
 280                 adi,input-justification = "evenly";
 281
 282                 ports {
 283                         #address-cells = <1>;
 284                         #size-cells = <0>;
 285
 286                         port@0 {
 287                                 reg = <0>;
 288                                 adv7511_in: endpoint {
 289                                         remote-endpoint = <&thc63lvd1024_out>;
 290                                 };
 291                         };
 292
 293                         port@1 {
 294                                 reg = <1>;
 295                                 adv7511_out: endpoint {
 296                                         remote-endpoint = <&hdmi_con_out>;
 297                                 };
 298                         };
 299                 };
 300         };
 301
 302         hdmi-decoder@4c {
 303                 compatible = "adi,adv7612";
 304                 reg = <0x4c>;
 305                 default-input = <0>;
 306
 307                 ports {
 308                         #address-cells = <1>;
 309                         #size-cells = <0>;
 310
 311                         port@0 {
 312                                 reg = <0>;
 313
 314                                 adv7612_in: endpoint {
 315                                         remote-endpoint = <&hdmi_con_in>;
 316                                 };
 317                         };
 318
 319                         port@2 {
 320                                 reg = <2>;
 321
 322                                 /*
 323                                  * The VIN4 video input path is shared between
 324                                  * CVBS and HDMI inputs through SW[49-53]
 325                                  * switches.
 326                                  *
 327                                  * CVBS is the default selection, leave HDMI
 328                                  * not connected here.
 329                                  */
 330                                 adv7612_out: endpoint {
 331                                         pclk-sample = <0>;
 332                                         hsync-active = <0>;
 333                                         vsync-active = <0>;
 334                                 };
 335                         };
 336                 };
 337         };
 338
 339         eeprom@50 {
 340                 compatible = "rohm,br24t01", "atmel,24c01";
 341                 reg = <0x50>;
 342                 pagesize = <8>;
 343         };
 344 };
 345
 346 &i2c1 {
 347         pinctrl-0 = <&i2c1_pins>;
 348         pinctrl-names = "default";
 349         status = "okay";
 350 };
 351
 352 &lvds0 {
 353         status = "okay";
 354
 355         clocks = <&cpg CPG_MOD 727>,
 356                  <&x12_clk>,
 357                  <&extal_clk>;
 358         clock-names = "fck", "dclkin.0", "extal";
 359
 360         ports {
 361                 port@1 {
 362                         lvds0_out: endpoint {
 363                                 remote-endpoint = <&thc63lvd1024_in>;
 364                         };
 365                 };
 366         };
 367 };
 368
 369 &lvds1 {
 370         /*
 371          * Even though the LVDS1 output is not connected, the encoder must be
 372          * enabled to supply a pixel clock to the DU for the DPAD output when
 373          * LVDS0 is in use.
 374          */
 375         status = "okay";
 376
 377         clocks = <&cpg CPG_MOD 727>,
 378                  <&x12_clk>,
 379                  <&extal_clk>;
 380         clock-names = "fck", "dclkin.0", "extal";
 381 };
 382
 383 &ohci0 {
 384         dr_mode = "host";
 385         status = "okay";
 386 };
 387
 388 &pfc {
 389         avb0_pins: avb {
 390                 mux {
 391                         groups = "avb0_link", "avb0_mdio", "avb0_mii";
 392                         function = "avb0";
 393                 };
 394         };
 395
 396         can0_pins: can0 {
 397                 groups = "can0_data_a";
 398                 function = "can0";
 399         };
 400
 401         can1_pins: can1 {
 402                 groups = "can1_data_a";
 403                 function = "can1";
 404         };
 405
 406         du_pins: du {
 407                 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 408                 function = "du";
 409         };
 410
 411         i2c0_pins: i2c0 {
 412                 groups = "i2c0";
 413                 function = "i2c0";
 414         };
 415
 416         i2c1_pins: i2c1 {
 417                 groups = "i2c1";
 418                 function = "i2c1";
 419         };
 420
 421         pwm0_pins: pwm0 {
 422                 groups = "pwm0_c";
 423                 function = "pwm0";
 424         };
 425
 426         pwm1_pins: pwm1 {
 427                 groups = "pwm1_c";
 428                 function = "pwm1";
 429         };
 430
 431         scif2_pins: scif2 {
 432                 groups = "scif2_data";
 433                 function = "scif2";
 434         };
 435
 436         sdhi2_pins: sd2 {
 437                 groups = "mmc_data8", "mmc_ctrl";
 438                 function = "mmc";
 439                 power-source = <1800>;
 440         };
 441
 442         sdhi2_pins_uhs: sd2_uhs {
 443                 groups = "mmc_data8", "mmc_ctrl";
 444                 function = "mmc";
 445                 power-source = <1800>;
 446         };
 447
 448         usb0_pins: usb0 {
 449                 groups = "usb0";
 450                 function = "usb0";
 451         };
 452
 453         vin4_pins_cvbs: vin4 {
 454                 groups = "vin4_data8", "vin4_sync", "vin4_clk";
 455                 function = "vin4";
 456         };
 457 };
 458
 459 &pwm0 {
 460         pinctrl-0 = <&pwm0_pins>;
 461         pinctrl-names = "default";
 462
 463         status = "okay";
 464 };
 465
 466 &pwm1 {
 467         pinctrl-0 = <&pwm1_pins>;
 468         pinctrl-names = "default";
 469
 470         status = "okay";
 471 };
 472
 473 &rwdt {
 474         timeout-sec = <60>;
 475         status = "okay";
 476 };
 477
 478 &scif2 {
 479         pinctrl-0 = <&scif2_pins>;
 480         pinctrl-names = "default";
 481
 482         status = "okay";
 483 };
 484
 485 &sdhi2 {
 486         /* used for on-board eMMC */
 487         pinctrl-0 = <&sdhi2_pins>;
 488         pinctrl-1 = <&sdhi2_pins_uhs>;
 489         pinctrl-names = "default", "state_uhs";
 490
 491         vmmc-supply = <&reg_3p3v>;
 492         vqmmc-supply = <&reg_1p8v>;
 493         bus-width = <8>;
 494         mmc-hs200-1_8v;
 495         non-removable;
 496         status = "okay";
 497 };
 498
 499 &usb2_phy0 {
 500         pinctrl-0 = <&usb0_pins>;
 501         pinctrl-names = "default";
 502
 503         renesas,no-otg-pins;
 504         status = "okay";
 505 };
 506
 507 &vin4 {
 508         pinctrl-0 = <&vin4_pins_cvbs>;
 509         pinctrl-names = "default";
 510
 511         status = "okay";
 512
 513         ports {
 514                 port {
 515                         vin4_in: endpoint {
 516                                 remote-endpoint = <&adv7180_out>;
 517                         };
 518                 };
 519         };
 520 };