1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
14 model = "Radxa ROCK Pi 4";
15 compatible = "radxa,rockpi4", "rockchip,rk3399";
18 stdout-path = "serial2:1500000n8";
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
24 clock-output-names = "clkin_gmac";
28 sdio_pwrseq: sdio-pwrseq {
29 compatible = "mmc-pwrseq-simple";
31 clock-names = "ext_clock";
32 pinctrl-names = "default";
33 pinctrl-0 = <&wifi_enable_h>;
34 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
38 compatible = "regulator-fixed";
39 regulator-name = "vcc12v_dcin";
42 regulator-min-microvolt = <12000000>;
43 regulator-max-microvolt = <12000000>;
47 compatible = "regulator-fixed";
48 regulator-name = "vcc5v0_sys";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 vin-supply = <&vcc12v_dcin>;
56 vcc3v3_pcie: vcc3v3-pcie-regulator {
57 compatible = "regulator-fixed";
59 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pcie_pwr_en>;
62 regulator-name = "vcc3v3_pcie";
65 vin-supply = <&vcc5v0_sys>;
68 vcc3v3_sys: vcc3v3-sys {
69 compatible = "regulator-fixed";
70 regulator-name = "vcc3v3_sys";
73 regulator-min-microvolt = <3300000>;
74 regulator-max-microvolt = <3300000>;
75 vin-supply = <&vcc5v0_sys>;
78 vcc5v0_host: vcc5v0-host-regulator {
79 compatible = "regulator-fixed";
81 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&vcc5v0_host_en>;
84 regulator-name = "vcc5v0_host";
86 vin-supply = <&vcc5v0_sys>;
89 vcc5v0_typec: vcc5v0-typec-regulator {
90 compatible = "regulator-fixed";
92 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&vcc5v0_typec_en>;
95 regulator-name = "vcc5v0_typec";
97 vin-supply = <&vcc5v0_sys>;
100 vcc_lan: vcc3v3-phy-regulator {
101 compatible = "regulator-fixed";
102 regulator-name = "vcc_lan";
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
108 regulator-state-mem {
109 regulator-off-in-suspend;
114 compatible = "pwm-regulator";
115 pwms = <&pwm2 0 25000 1>;
116 regulator-name = "vdd_log";
119 regulator-min-microvolt = <800000>;
120 regulator-max-microvolt = <1400000>;
121 vin-supply = <&vcc5v0_sys>;
126 cpu-supply = <&vdd_cpu_l>;
130 cpu-supply = <&vdd_cpu_l>;
134 cpu-supply = <&vdd_cpu_l>;
138 cpu-supply = <&vdd_cpu_l>;
142 cpu-supply = <&vdd_cpu_b>;
146 cpu-supply = <&vdd_cpu_b>;
154 assigned-clocks = <&cru SCLK_RMII_SRC>;
155 assigned-clock-parents = <&clkin_gmac>;
156 clock_in_out = "input";
157 phy-supply = <&vcc_lan>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&rgmii_pins>;
161 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
162 snps,reset-active-low;
163 snps,reset-delays-us = <0 10000 50000>;
170 mali-supply = <&vdd_gpu>;
175 ddc-i2c-bus = <&i2c3>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&hdmi_cec>;
186 clock-frequency = <400000>;
187 i2c-scl-rising-time-ns = <168>;
188 i2c-scl-falling-time-ns = <4>;
192 compatible = "rockchip,rk808";
194 interrupt-parent = <&gpio1>;
195 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
197 clock-output-names = "xin32k", "rk808-clkout2";
198 pinctrl-names = "default";
199 pinctrl-0 = <&pmic_int_l>;
200 rockchip,system-power-controller;
203 vcc1-supply = <&vcc5v0_sys>;
204 vcc2-supply = <&vcc5v0_sys>;
205 vcc3-supply = <&vcc5v0_sys>;
206 vcc4-supply = <&vcc5v0_sys>;
207 vcc6-supply = <&vcc5v0_sys>;
208 vcc7-supply = <&vcc5v0_sys>;
209 vcc8-supply = <&vcc3v3_sys>;
210 vcc9-supply = <&vcc5v0_sys>;
211 vcc10-supply = <&vcc5v0_sys>;
212 vcc11-supply = <&vcc5v0_sys>;
213 vcc12-supply = <&vcc3v3_sys>;
214 vddio-supply = <&vcc_1v8>;
217 vdd_center: DCDC_REG1 {
218 regulator-name = "vdd_center";
221 regulator-min-microvolt = <750000>;
222 regulator-max-microvolt = <1350000>;
223 regulator-ramp-delay = <6001>;
224 regulator-state-mem {
225 regulator-off-in-suspend;
229 vdd_cpu_l: DCDC_REG2 {
230 regulator-name = "vdd_cpu_l";
233 regulator-min-microvolt = <750000>;
234 regulator-max-microvolt = <1350000>;
235 regulator-ramp-delay = <6001>;
236 regulator-state-mem {
237 regulator-off-in-suspend;
242 regulator-name = "vcc_ddr";
245 regulator-state-mem {
246 regulator-on-in-suspend;
251 regulator-name = "vcc_1v8";
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-state-mem {
257 regulator-on-in-suspend;
258 regulator-suspend-microvolt = <1800000>;
262 vcc1v8_codec: LDO_REG1 {
263 regulator-name = "vcc1v8_codec";
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
268 regulator-state-mem {
269 regulator-off-in-suspend;
273 vcc1v8_hdmi: LDO_REG2 {
274 regulator-name = "vcc1v8_hdmi";
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279 regulator-state-mem {
280 regulator-off-in-suspend;
285 regulator-name = "vcca_1v8";
288 regulator-min-microvolt = <1800000>;
289 regulator-max-microvolt = <1800000>;
290 regulator-state-mem {
291 regulator-on-in-suspend;
292 regulator-suspend-microvolt = <1800000>;
297 regulator-name = "vcc_sdio";
300 regulator-min-microvolt = <3000000>;
301 regulator-max-microvolt = <3000000>;
302 regulator-state-mem {
303 regulator-on-in-suspend;
304 regulator-suspend-microvolt = <3000000>;
308 vcca3v0_codec: LDO_REG5 {
309 regulator-name = "vcca3v0_codec";
312 regulator-min-microvolt = <3000000>;
313 regulator-max-microvolt = <3000000>;
314 regulator-state-mem {
315 regulator-off-in-suspend;
320 regulator-name = "vcc_1v5";
323 regulator-min-microvolt = <1500000>;
324 regulator-max-microvolt = <1500000>;
325 regulator-state-mem {
326 regulator-on-in-suspend;
327 regulator-suspend-microvolt = <1500000>;
331 vcc0v9_hdmi: LDO_REG7 {
332 regulator-name = "vcc0v9_hdmi";
335 regulator-min-microvolt = <900000>;
336 regulator-max-microvolt = <900000>;
337 regulator-state-mem {
338 regulator-off-in-suspend;
343 regulator-name = "vcc_3v0";
346 regulator-min-microvolt = <3000000>;
347 regulator-max-microvolt = <3000000>;
348 regulator-state-mem {
349 regulator-on-in-suspend;
350 regulator-suspend-microvolt = <3000000>;
354 vcc_cam: SWITCH_REG1 {
355 regulator-name = "vcc_cam";
358 regulator-min-microvolt = <3300000>;
359 regulator-max-microvolt = <3300000>;
360 regulator-state-mem {
361 regulator-off-in-suspend;
365 vcc_mipi: SWITCH_REG2 {
366 regulator-name = "vcc_mipi";
369 regulator-min-microvolt = <3300000>;
370 regulator-max-microvolt = <3300000>;
371 regulator-state-mem {
372 regulator-off-in-suspend;
378 vdd_cpu_b: regulator@40 {
379 compatible = "silergy,syr827";
381 fcs,suspend-voltage-selector = <1>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&vsel1_gpio>;
384 regulator-name = "vdd_cpu_b";
385 regulator-min-microvolt = <712500>;
386 regulator-max-microvolt = <1500000>;
387 regulator-ramp-delay = <1000>;
390 vin-supply = <&vcc5v0_sys>;
392 regulator-state-mem {
393 regulator-off-in-suspend;
397 vdd_gpu: regulator@41 {
398 compatible = "silergy,syr828";
400 fcs,suspend-voltage-selector = <1>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&vsel2_gpio>;
403 regulator-name = "vdd_gpu";
404 regulator-min-microvolt = <712500>;
405 regulator-max-microvolt = <1500000>;
406 regulator-ramp-delay = <1000>;
409 vin-supply = <&vcc5v0_sys>;
411 regulator-state-mem {
412 regulator-off-in-suspend;
418 i2c-scl-rising-time-ns = <300>;
419 i2c-scl-falling-time-ns = <15>;
424 i2c-scl-rising-time-ns = <450>;
425 i2c-scl-falling-time-ns = <15>;
430 i2c-scl-rising-time-ns = <600>;
431 i2c-scl-falling-time-ns = <20>;
436 rockchip,playback-channels = <8>;
437 rockchip,capture-channels = <8>;
442 rockchip,playback-channels = <2>;
443 rockchip,capture-channels = <2>;
454 bt656-supply = <&vcc_3v0>;
455 audio-supply = <&vcc_3v0>;
456 sdmmc-supply = <&vcc_sdio>;
457 gpio1830-supply = <&vcc_3v0>;
463 pmu1830-supply = <&vcc_3v0>;
468 bt_enable_h: bt-enable-h {
469 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
472 bt_host_wake_l: bt-host-wake-l {
473 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
476 bt_wake_l: bt-wake-l {
477 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
482 pcie_pwr_en: pcie-pwr-en {
483 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
488 sdio0_bus4: sdio0-bus4 {
490 <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
491 <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
492 <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
493 <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
496 sdio0_cmd: sdio0-cmd {
498 <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
501 sdio0_clk: sdio0-clk {
503 <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
508 pmic_int_l: pmic-int-l {
509 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
512 vsel1_gpio: vsel1-gpio {
513 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
516 vsel2_gpio: vsel2-gpio {
517 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
522 vcc5v0_typec_en: vcc5v0-typec-en {
523 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
528 vcc5v0_host_en: vcc5v0-host-en {
529 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
534 wifi_enable_h: wifi-enable-h {
536 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
539 wifi_host_wake_l: wifi-host-wake-l {
540 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
552 vref-supply = <&vcc_1v8>;
556 #address-cells = <1>;
559 clock-frequency = <50000000>;
562 keep-power-in-suspend;
563 mmc-pwrseq = <&sdio_pwrseq>;
565 pinctrl-names = "default";
566 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
571 compatible = "brcm,bcm4329-fmac";
573 interrupt-parent = <&gpio0>;
574 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
575 interrupt-names = "host-wake";
576 pinctrl-names = "default";
577 pinctrl-0 = <&wifi_host_wake_l>;
585 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
587 max-frequency = <150000000>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
596 mmc-hs400-enhanced-strobe;
612 /* tshut mode 0:CRU 1:GPIO */
613 rockchip,hw-tshut-mode = <1>;
614 /* tshut polarity 0:LOW 1:HIGH */
615 rockchip,hw-tshut-polarity = <1>;
621 u2phy0_otg: otg-port {
625 u2phy0_host: host-port {
626 phy-supply = <&vcc5v0_host>;
634 u2phy1_otg: otg-port {
638 u2phy1_host: host-port {
639 phy-supply = <&vcc5v0_host>;
645 pinctrl-names = "default";
646 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
650 compatible = "brcm,bcm43438-bt";
652 clock-names = "ext_clock";
653 device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
654 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
655 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
656 pinctrl-names = "default";
657 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;