1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Collabora Ltd.
4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
5 * Copyright (c) 2018 Linaro Ltd.
9 #include "rk3399-opp.dtsi"
12 sdio_pwrseq: sdio-pwrseq {
13 compatible = "mmc-pwrseq-simple";
15 clock-names = "ext_clock";
16 pinctrl-names = "default";
17 pinctrl-0 = <&wifi_enable_h>;
18 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
21 vcc12v_dcin: vcc12v-dcin {
22 compatible = "regulator-fixed";
23 regulator-name = "vcc12v_dcin";
24 regulator-min-microvolt = <12000000>;
25 regulator-max-microvolt = <12000000>;
30 vcc1v8_s0: vcc1v8-s0 {
31 compatible = "regulator-fixed";
32 regulator-name = "vcc1v8_s0";
33 regulator-min-microvolt = <1800000>;
34 regulator-max-microvolt = <1800000>;
38 vcc5v0_sys: vcc5v0-sys {
39 compatible = "regulator-fixed";
40 regulator-name = "vcc5v0_sys";
41 regulator-min-microvolt = <5000000>;
42 regulator-max-microvolt = <5000000>;
44 vin-supply = <&vcc12v_dcin>;
47 vcc3v3_sys: vcc3v3-sys {
48 compatible = "regulator-fixed";
49 regulator-name = "vcc3v3_sys";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
53 vin-supply = <&vcc5v0_sys>;
56 vcc3v3_pcie: vcc3v3-pcie-regulator {
57 compatible = "regulator-fixed";
59 pinctrl-names = "default";
60 pinctrl-0 = <&pcie_drv>;
62 regulator-name = "vcc3v3_pcie";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 vin-supply = <&vcc3v3_sys>;
68 vcc5v0_host: vcc5v0-host-regulator {
69 compatible = "regulator-fixed";
71 pinctrl-names = "default";
72 pinctrl-0 = <&host_vbus_drv>;
73 regulator-name = "vcc5v0_host";
74 regulator-min-microvolt = <5000000>;
75 regulator-max-microvolt = <5000000>;
77 vin-supply = <&vcc5v0_sys>;
82 cpu-supply = <&vdd_cpu_l>;
86 cpu-supply = <&vdd_cpu_l>;
90 cpu-supply = <&vdd_cpu_l>;
94 cpu-supply = <&vdd_cpu_l>;
98 cpu-supply = <&vdd_cpu_b>;
102 cpu-supply = <&vdd_cpu_b>;
110 mali-supply = <&vdd_gpu>;
115 ddc-i2c-bus = <&i2c3>;
116 pinctrl-names = "default";
117 pinctrl-0 = <&hdmi_cec>;
126 clock-frequency = <400000>;
127 i2c-scl-rising-time-ns = <168>;
128 i2c-scl-falling-time-ns = <4>;
131 vdd_cpu_b: regulator@40 {
132 compatible = "silergy,syr827";
134 fcs,suspend-voltage-selector = <1>;
135 regulator-name = "vdd_cpu_b";
136 regulator-min-microvolt = <712500>;
137 regulator-max-microvolt = <1500000>;
138 regulator-ramp-delay = <1000>;
141 vin-supply = <&vcc5v0_sys>;
144 regulator-state-mem {
145 regulator-off-in-suspend;
149 vdd_gpu: regulator@41 {
150 compatible = "silergy,syr828";
152 fcs,suspend-voltage-selector = <1>;
153 regulator-name = "vdd_gpu";
154 regulator-min-microvolt = <712500>;
155 regulator-max-microvolt = <1500000>;
156 regulator-ramp-delay = <1000>;
159 vin-supply = <&vcc5v0_sys>;
160 regulator-state-mem {
161 regulator-off-in-suspend;
166 compatible = "rockchip,rk808";
168 interrupt-parent = <&gpio1>;
169 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pmic_int_l>;
172 rockchip,system-power-controller;
175 clock-output-names = "xin32k", "rk808-clkout2";
177 vcc1-supply = <&vcc5v0_sys>;
178 vcc2-supply = <&vcc5v0_sys>;
179 vcc3-supply = <&vcc5v0_sys>;
180 vcc4-supply = <&vcc5v0_sys>;
181 vcc6-supply = <&vcc5v0_sys>;
182 vcc7-supply = <&vcc5v0_sys>;
183 vcc8-supply = <&vcc3v3_sys>;
184 vcc9-supply = <&vcc5v0_sys>;
185 vcc10-supply = <&vcc5v0_sys>;
186 vcc11-supply = <&vcc5v0_sys>;
187 vcc12-supply = <&vcc3v3_sys>;
188 vddio-supply = <&vcc_1v8>;
191 vdd_center: DCDC_REG1 {
192 regulator-name = "vdd_center";
193 regulator-min-microvolt = <750000>;
194 regulator-max-microvolt = <1350000>;
197 regulator-state-mem {
198 regulator-off-in-suspend;
202 vdd_cpu_l: DCDC_REG2 {
203 regulator-name = "vdd_cpu_l";
204 regulator-min-microvolt = <750000>;
205 regulator-max-microvolt = <1350000>;
208 regulator-state-mem {
209 regulator-off-in-suspend;
214 regulator-name = "vcc_ddr";
217 regulator-state-mem {
218 regulator-on-in-suspend;
223 regulator-name = "vcc_1v8";
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <1800000>;
228 regulator-state-mem {
229 regulator-on-in-suspend;
230 regulator-suspend-microvolt = <1800000>;
234 vcc1v8_dvp: LDO_REG1 {
235 regulator-name = "vcc1v8_dvp";
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <1800000>;
240 regulator-state-mem {
241 regulator-on-in-suspend;
242 regulator-suspend-microvolt = <1800000>;
246 vcca1v8_hdmi: LDO_REG2 {
247 regulator-name = "vcca1v8_hdmi";
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <1800000>;
252 regulator-state-mem {
253 regulator-on-in-suspend;
254 regulator-suspend-microvolt = <1800000>;
259 regulator-name = "vcca_1v8";
260 regulator-min-microvolt = <1800000>;
261 regulator-max-microvolt = <1800000>;
264 regulator-state-mem {
265 regulator-on-in-suspend;
266 regulator-suspend-microvolt = <1800000>;
271 regulator-name = "vcc_sd";
272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvolt = <3300000>;
276 regulator-state-mem {
277 regulator-on-in-suspend;
278 regulator-suspend-microvolt = <3300000>;
282 vcc3v0_sd: LDO_REG5 {
283 regulator-name = "vcc3v0_sd";
284 regulator-min-microvolt = <3000000>;
285 regulator-max-microvolt = <3000000>;
288 regulator-state-mem {
289 regulator-on-in-suspend;
290 regulator-suspend-microvolt = <3000000>;
295 regulator-name = "vcc_1v5";
296 regulator-min-microvolt = <1500000>;
297 regulator-max-microvolt = <1500000>;
300 regulator-state-mem {
301 regulator-on-in-suspend;
302 regulator-suspend-microvolt = <1500000>;
306 vcca0v9_hdmi: LDO_REG7 {
307 regulator-name = "vcca0v9_hdmi";
308 regulator-min-microvolt = <900000>;
309 regulator-max-microvolt = <900000>;
312 regulator-state-mem {
313 regulator-on-in-suspend;
314 regulator-suspend-microvolt = <900000>;
319 regulator-name = "vcc_3v0";
320 regulator-min-microvolt = <3000000>;
321 regulator-max-microvolt = <3000000>;
324 regulator-state-mem {
325 regulator-on-in-suspend;
326 regulator-suspend-microvolt = <3000000>;
330 vcc3v3_s3: SWITCH_REG1 {
331 regulator-name = "vcc3v3_s3";
334 regulator-state-mem {
335 regulator-on-in-suspend;
339 vcc3v3_s0: SWITCH_REG2 {
340 regulator-name = "vcc3v3_s0";
343 regulator-state-mem {
344 regulator-on-in-suspend;
372 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
373 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
374 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
375 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
385 pinctrl-names = "default";
386 pinctrl-0 = <&pcie_clkreqn_cpm>;
387 vpcie3v3-supply = <&vcc3v3_pcie>;
392 pmu1830-supply = <&vcc_1v8>;
398 bt_enable_h: bt-enable-h {
399 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
402 bt_host_wake_l: bt-host-wake-l {
403 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
406 bt_wake_l: bt-wake-l {
407 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
412 sdmmc_bus1: sdmmc-bus1 {
414 <4 RK_PB0 1 &pcfg_pull_up_8ma>;
417 sdmmc_bus4: sdmmc-bus4 {
419 <4 RK_PB0 1 &pcfg_pull_up_8ma>,
420 <4 RK_PB1 1 &pcfg_pull_up_8ma>,
421 <4 RK_PB2 1 &pcfg_pull_up_8ma>,
422 <4 RK_PB3 1 &pcfg_pull_up_8ma>;
425 sdmmc_clk: sdmmc-clk {
427 <4 RK_PB4 1 &pcfg_pull_none_18ma>;
430 sdmmc_cmd: sdmmc-cmd {
432 <4 RK_PB5 1 &pcfg_pull_up_8ma>;
437 sdio0_bus4: sdio0-bus4 {
439 <2 RK_PC4 1 &pcfg_pull_up_20ma>,
440 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
441 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
442 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
445 sdio0_cmd: sdio0-cmd {
447 <2 RK_PD0 1 &pcfg_pull_up_20ma>;
450 sdio0_clk: sdio0-clk {
452 <2 RK_PD1 1 &pcfg_pull_none_20ma>;
457 pmic_int_l: pmic-int-l {
459 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
462 vsel1_gpio: vsel1-gpio {
464 <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
467 vsel2_gpio: vsel2-gpio {
469 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
474 wifi_enable_h: wifi-enable-h {
476 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
481 wifi_host_wake_l: wifi-host-wake-l {
482 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
497 clock-frequency = <50000000>;
500 keep-power-in-suspend;
501 mmc-pwrseq = <&sdio_pwrseq>;
503 pinctrl-names = "default";
504 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
506 #address-cells = <1>;
511 compatible = "brcm,bcm4329-fmac";
513 interrupt-parent = <&gpio0>;
514 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
515 interrupt-names = "host-wake";
516 pinctrl-names = "default";
517 pinctrl-0 = <&wifi_host_wake_l>;
524 mmc-hs400-enhanced-strobe;
533 clock-frequency = <100000000>;
534 clock-freq-min-max = <100000 100000000>;
535 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
538 vqmmc-supply = <&vcc_sd>;
539 card-detect-delay = <800>;
540 pinctrl-names = "default";
541 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
546 rockchip,hw-tshut-mode = <1>;
547 rockchip,hw-tshut-polarity = <1>;
548 rockchip,hw-tshut-temp = <110000>;
553 pinctrl-names = "default";
554 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
558 compatible = "brcm,bcm43438-bt";
560 clock-names = "ext_clock";
561 device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
562 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
563 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
564 pinctrl-names = "default";
565 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
590 phy-supply = <&vcc5v0_host>;
595 phy-supply = <&vcc5v0_host>;