arch/arm64/boot/dts/zte/zx296718-pcbox.dts

   1 /*
   2  * Copyright (C) 2017 Sanechips Technology Co., Ltd.
   3  * Copyright 2017 Linaro Ltd.
   4  *
   5  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   6  */
   7
   8 /dts-v1/;
   9 #include "zx296718.dtsi"
  10 #include <dt-bindings/pwm/pwm.h>
  11
  12 / {
  13         model = "ZTE ZX296718 PCBOX Board";
  14         compatible = "zte,zx296718-pcbox", "zte,zx296718";
  15
  16         chosen {
  17                 stdout-path = "serial0:115200n8";
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x80000000>;
  23         };
  24
  25         a53_vdd0v9: regulator-a53 {
  26                 compatible = "pwm-regulator";
  27                 pwms = <&pwm 3 1250 PWM_POLARITY_INVERTED>;
  28                 regulator-name = "A53_VDD0V9";
  29                 regulator-min-microvolt = <855000>;
  30                 regulator-max-microvolt = <1183000>;
  31                 pwm-dutycycle-unit = <100>;
  32                 pwm-dutycycle-range = <0 100>;
  33                 regulator-always-on;
  34                 regulator-boot-on;
  35         };
  36
  37         sound-spdif0 {
  38                 compatible = "audio-graph-card";
  39                 dais = <&spdif0_port>;
  40         };
  41
  42         sound-i2s0 {
  43                 compatible = "audio-graph-card";
  44                 dais = <&i2s0_port>;
  45         };
  46 };
  47
  48 &aud96p22 {
  49         port {
  50                 aud96p22_endpoint: endpoint {
  51                         remote-endpoint = <&i2s0_endpoint>;
  52                 };
  53         };
  54 };
  55
  56 &cpu0 {
  57         cpu-supply = <&a53_vdd0v9>;
  58 };
  59
  60 &emmc {
  61         status = "okay";
  62 };
  63
  64 &hdmi {
  65         status = "disabled";
  66
  67         port {
  68                 hdmi_endpoint: endpoint {
  69                         remote-endpoint = <&spdif0_endpoint>;
  70                 };
  71         };
  72 };
  73
  74 &i2c0 {
  75         status = "okay";
  76 };
  77
  78 &i2s0 {
  79         status = "okay";
  80
  81         i2s0_port: port {
  82                 i2s0_endpoint: endpoint {
  83                         remote-endpoint = <&aud96p22_endpoint>;
  84                         dai-format = "i2s";
  85                         frame-master;
  86                         bitclock-master;
  87                 };
  88         };
  89 };
  90
  91 &irdec {
  92         status = "okay";
  93 };
  94
  95 &pmm {
  96         pwm3_pins: pwm3 {
  97                 pins = "KEY_ROW2";
  98                 function = "PWM";
  99         };
 100
 101         vga_pins: vga {
 102                 pins = "KEY_COL1", "KEY_COL2", "VGA_HS", "VGA_VS";
 103                 function = "VGA";
 104         };
 105 };
 106
 107 &pwm {
 108         pinctrl-names = "default";
 109         pinctrl-0 = <&pwm3_pins>;
 110         status = "okay";
 111 };
 112
 113 &sd0 {
 114         status = "okay";
 115 };
 116
 117 &sd1 {
 118         status = "okay";
 119 };
 120
 121 &spdif0 {
 122         status = "okay";
 123
 124         spdif0_port: port {
 125                 spdif0_endpoint: endpoint {
 126                         remote-endpoint = <&hdmi_endpoint>;
 127                 };
 128         };
 129 };
 130
 131 &tvenc {
 132         status = "disabled";
 133 };
 134
 135 &uart0 {
 136         status = "okay";
 137 };
 138
 139 &vga {
 140         pinctrl-names = "default";
 141         pinctrl-0 = <&vga_pins>;
 142         status = "okay";
 143 };