1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_ALTERNATIVE_H
3 #define __ASM_ALTERNATIVE_H
5 #include <asm/cpucaps.h>
8 #define ARM64_CB_PATCH ARM64_NCAPS
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/stddef.h>
15 #include <linux/stringify.h>
18 s32 orig_offset
; /* offset to original instruction */
19 s32 alt_offset
; /* offset to replacement instruction */
20 u16 cpufeature
; /* cpufeature bit set for replacement */
21 u8 orig_len
; /* size of original instruction(s) */
22 u8 alt_len
; /* size of new instruction(s), <= orig_len */
25 typedef void (*alternative_cb_t
)(struct alt_instr
*alt
,
26 __le32
*origptr
, __le32
*updptr
, int nr_inst
);
28 void __init
apply_boot_alternatives(void);
29 void __init
apply_alternatives_all(void);
30 bool alternative_is_applied(u16 cpufeature
);
33 void apply_alternatives_module(void *start
, size_t length
);
35 static inline void apply_alternatives_module(void *start
, size_t length
) { }
38 #define ALTINSTR_ENTRY(feature,cb) \
39 " .word 661b - .\n" /* label */ \
40 " .if " __stringify(cb) " == 0\n" \
41 " .word 663f - .\n" /* new instruction */ \
43 " .word " __stringify(cb) "- .\n" /* callback */ \
45 " .hword " __stringify(feature) "\n" /* feature bit */ \
46 " .byte 662b-661b\n" /* source len */ \
47 " .byte 664f-663f\n" /* replacement len */
50 * alternative assembly primitive:
52 * If any of these .org directive fail, it means that insn1 and insn2
53 * don't have the same length. This used to be written as
55 * .if ((664b-663b) != (662b-661b))
56 * .error "Alternatives instruction length mismatch"
59 * but most assemblers die if insn1 or insn2 have a .inst. This should
60 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
61 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
63 * Alternatives with callbacks do not generate replacement instructions.
65 #define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled, cb) \
66 ".if "__stringify(cfg_enabled)" == 1\n" \
70 ".pushsection .altinstructions,\"a\"\n" \
71 ALTINSTR_ENTRY(feature,cb) \
73 " .if " __stringify(cb) " == 0\n" \
74 ".pushsection .altinstr_replacement, \"a\"\n" \
79 ".org . - (664b-663b) + (662b-661b)\n\t" \
80 ".org . - (662b-661b) + (664b-663b)\n" \
87 #define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
88 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
90 #define ALTERNATIVE_CB(oldinstr, cb) \
91 __ALTERNATIVE_CFG(oldinstr, "NOT_AN_INSTRUCTION", ARM64_CB_PATCH, 1, cb)
94 #include <asm/assembler.h>
96 .macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
97 .word \orig_offset
- .
104 .macro alternative_insn insn1
, insn2
, cap
, enable
= 1
107 662: .pushsection
.altinstructions
, "a"
108 altinstruction_entry
661b
, 663f
, \cap
, 662b
-661b
, 664f
-663f
110 .pushsection
.altinstr_replacement
, "ax"
113 .org
. - (664b
-663b
) + (662b
-661b
)
114 .org
. - (662b
-661b
) + (664b
-663b
)
119 * Alternative sequences
121 * The code for the case where the capability is not present will be
122 * assembled and linked as normal. There are no restrictions on this
125 * The code for the case where the capability is present will be
126 * assembled into a special section to be used for dynamic patching.
127 * Code for that case must:
129 * 1. Be exactly the same length (in bytes) as the default code
132 * 2. Not contain a branch target that is used outside of the
133 * alternative sequence it is defined in (branches into an
134 * alternative sequence are not fixed up).
138 * Begin an alternative code sequence.
140 .macro alternative_if_not cap
141 .set
.Lasm_alt_mode
, 0
142 .pushsection
.altinstructions
, "a"
143 altinstruction_entry
661f
, 663f
, \cap
, 662f
-661f
, 664f
-663f
148 .macro alternative_if cap
149 .set
.Lasm_alt_mode
, 1
150 .pushsection
.altinstructions
, "a"
151 altinstruction_entry
663f
, 661f
, \cap
, 664f
-663f
, 662f
-661f
153 .pushsection
.altinstr_replacement
, "ax"
154 .align
2 /* So GAS knows label 661 is suitably aligned */
158 .macro alternative_cb cb
159 .set
.Lasm_alt_mode
, 0
160 .pushsection
.altinstructions
, "a"
161 altinstruction_entry
661f
, \cb
, ARM64_CB_PATCH
, 662f
-661f
, 0
167 * Provide the other half of the alternative code sequence.
169 .macro alternative_else
171 .if .Lasm_alt_mode
==0
172 .pushsection
.altinstr_replacement
, "ax"
180 * Complete an alternative code sequence.
182 .macro alternative_endif
184 .if .Lasm_alt_mode
==0
187 .org
. - (664b
-663b
) + (662b
-661b
)
188 .org
. - (662b
-661b
) + (664b
-663b
)
192 * Callback-based alternative epilogue
194 .macro alternative_cb_end
199 * Provides a trivial alternative or default sequence consisting solely
200 * of NOPs. The number of NOPs is chosen automatically to match the
203 .macro alternative_else_nop_endif
205 nops (662b
-661b
) / AARCH64_INSN_SIZE
209 #define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
210 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
212 .macro user_alt
, label
, oldinstr
, newinstr
, cond
213 9999: alternative_insn
"\oldinstr", "\newinstr", \cond
214 _ASM_EXTABLE
9999b
, \label
218 * Generate the assembly for UAO alternatives with exception table entries.
219 * This is complicated as there is no post-increment or pair versions of the
220 * unprivileged instructions, and USER() only works for single instructions.
222 #ifdef CONFIG_ARM64_UAO
223 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
224 alternative_if_not ARM64_HAS_UAO
225 8888: ldp
\reg
1, \reg
2, [\addr
], \post_inc
;
230 ldtr
\reg
2, [\addr
, #8];
231 add
\addr
, \addr
, \post_inc
;
234 _asm_extable
8888b
,\l
;
235 _asm_extable
8889b
,\l
;
238 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
239 alternative_if_not ARM64_HAS_UAO
240 8888: stp
\reg
1, \reg
2, [\addr
], \post_inc
;
245 sttr
\reg
2, [\addr
, #8];
246 add
\addr
, \addr
, \post_inc
;
249 _asm_extable
8888b
,\l
;
250 _asm_extable
8889b
,\l
;
253 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
254 alternative_if_not ARM64_HAS_UAO
255 8888: \inst
\reg
, [\addr
], \post_inc
;
258 \alt_inst
\reg
, [\addr
];
259 add
\addr
, \addr
, \post_inc
;
262 _asm_extable
8888b
,\l
;
265 .macro uao_ldp l
, reg1
, reg2
, addr
, post_inc
266 USER(\l
, ldp
\reg
1, \reg
2, [\addr
], \post_inc
)
268 .macro uao_stp l
, reg1
, reg2
, addr
, post_inc
269 USER(\l
, stp
\reg
1, \reg
2, [\addr
], \post_inc
)
271 .macro uao_user_alternative l
, inst
, alt_inst
, reg
, addr
, post_inc
272 USER(\l
, \inst
\reg
, [\addr
], \post_inc
)
276 #endif /* __ASSEMBLY__ */
279 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
281 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
282 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
283 * will be omitted, including oldinstr.
285 #define ALTERNATIVE(oldinstr, newinstr, ...) \
286 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
288 #endif /* __ASM_ALTERNATIVE_H */