1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Based on arch/arm/include/asm/barrier.h
5 * Copyright (C) 2012 ARM Ltd.
7 #ifndef __ASM_BARRIER_H
8 #define __ASM_BARRIER_H
12 #include <linux/kasan-checks.h>
14 #define __nops(n) ".rept " #n "\nnop\n.endr\n"
15 #define nops(n) asm volatile(__nops(n))
17 #define sev() asm volatile("sev" : : : "memory")
18 #define wfe() asm volatile("wfe" : : : "memory")
19 #define wfi() asm volatile("wfi" : : : "memory")
21 #define isb() asm volatile("isb" : : : "memory")
22 #define dmb(opt) asm volatile("dmb " #opt : : : "memory")
23 #define dsb(opt) asm volatile("dsb " #opt : : : "memory")
25 #define psb_csync() asm volatile("hint #17" : : : "memory")
26 #define csdb() asm volatile("hint #20" : : : "memory")
28 #define spec_bar() asm volatile(ALTERNATIVE("dsb nsh\nisb\n", \
29 SB_BARRIER_INSN"nop\n", \
36 #define dma_rmb() dmb(oshld)
37 #define dma_wmb() dmb(oshst)
40 * Generate a mask for array_index__nospec() that is ~0UL when 0 <= idx < sz
43 #define array_index_mask_nospec array_index_mask_nospec
44 static inline unsigned long array_index_mask_nospec(unsigned long idx
,
53 : "r" (idx
), "Ir" (sz
)
60 #define __smp_mb() dmb(ish)
61 #define __smp_rmb() dmb(ishld)
62 #define __smp_wmb() dmb(ishst)
64 #define __smp_store_release(p, v) \
66 typeof(p) __p = (p); \
67 union { typeof(*p) __val; char __c[1]; } __u = \
68 { .__val = (__force typeof(*p)) (v) }; \
69 compiletime_assert_atomic_type(*p); \
70 kasan_check_write(__p, sizeof(*p)); \
71 switch (sizeof(*p)) { \
73 asm volatile ("stlrb %w1, %0" \
75 : "r" (*(__u8 *)__u.__c) \
79 asm volatile ("stlrh %w1, %0" \
81 : "r" (*(__u16 *)__u.__c) \
85 asm volatile ("stlr %w1, %0" \
87 : "r" (*(__u32 *)__u.__c) \
91 asm volatile ("stlr %1, %0" \
93 : "r" (*(__u64 *)__u.__c) \
99 #define __smp_load_acquire(p) \
101 union { typeof(*p) __val; char __c[1]; } __u; \
102 typeof(p) __p = (p); \
103 compiletime_assert_atomic_type(*p); \
104 kasan_check_read(__p, sizeof(*p)); \
105 switch (sizeof(*p)) { \
107 asm volatile ("ldarb %w0, %1" \
108 : "=r" (*(__u8 *)__u.__c) \
109 : "Q" (*__p) : "memory"); \
112 asm volatile ("ldarh %w0, %1" \
113 : "=r" (*(__u16 *)__u.__c) \
114 : "Q" (*__p) : "memory"); \
117 asm volatile ("ldar %w0, %1" \
118 : "=r" (*(__u32 *)__u.__c) \
119 : "Q" (*__p) : "memory"); \
122 asm volatile ("ldar %0, %1" \
123 : "=r" (*(__u64 *)__u.__c) \
124 : "Q" (*__p) : "memory"); \
130 #define smp_cond_load_relaxed(ptr, cond_expr) \
132 typeof(ptr) __PTR = (ptr); \
135 VAL = READ_ONCE(*__PTR); \
138 __cmpwait_relaxed(__PTR, VAL); \
143 #define smp_cond_load_acquire(ptr, cond_expr) \
145 typeof(ptr) __PTR = (ptr); \
148 VAL = smp_load_acquire(__PTR); \
151 __cmpwait_relaxed(__PTR, VAL); \
156 #include <asm-generic/barrier.h>
158 #endif /* __ASSEMBLY__ */
160 #endif /* __ASM_BARRIER_H */