arch/arm64/include/asm/ptrace.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Based on arch/arm/include/asm/ptrace.h
   4  *
   5  * Copyright (C) 1996-2003 Russell King
   6  * Copyright (C) 2012 ARM Ltd.
   7  */
   8 #ifndef __ASM_PTRACE_H
   9 #define __ASM_PTRACE_H
  10
  11 #include <asm/cpufeature.h>
  12
  13 #include <uapi/asm/ptrace.h>
  14
  15 /* Current Exception Level values, as contained in CurrentEL */
  16 #define CurrentEL_EL1           (1 << 2)
  17 #define CurrentEL_EL2           (2 << 2)
  18
  19 /*
  20  * PMR values used to mask/unmask interrupts.
  21  *
  22  * GIC priority masking works as follows: if an IRQ's priority is a higher value
  23  * than the value held in PMR, that IRQ is masked. Lowering the value of PMR
  24  * means masking more IRQs (or at least that the same IRQs remain masked).
  25  *
  26  * To mask interrupts, we clear the most significant bit of PMR.
  27  *
  28  * Some code sections either automatically switch back to PSR.I or explicitly
  29  * require to not use priority masking. If bit GIC_PRIO_PSR_I_SET is included
  30  * in the  the priority mask, it indicates that PSR.I should be set and
  31  * interrupt disabling temporarily does not rely on IRQ priorities.
  32  */
  33 #define GIC_PRIO_IRQON                  0xe0
  34 #define GIC_PRIO_IRQOFF                 (GIC_PRIO_IRQON & ~0x80)
  35 #define GIC_PRIO_PSR_I_SET              (1 << 4)
  36
  37 /* Additional SPSR bits not exposed in the UABI */
  38 #define PSR_IL_BIT              (1 << 20)
  39
  40 /* AArch32-specific ptrace requests */
  41 #define COMPAT_PTRACE_GETREGS           12
  42 #define COMPAT_PTRACE_SETREGS           13
  43 #define COMPAT_PTRACE_GET_THREAD_AREA   22
  44 #define COMPAT_PTRACE_SET_SYSCALL       23
  45 #define COMPAT_PTRACE_GETVFPREGS        27
  46 #define COMPAT_PTRACE_SETVFPREGS        28
  47 #define COMPAT_PTRACE_GETHBPREGS        29
  48 #define COMPAT_PTRACE_SETHBPREGS        30
  49
  50 /* SPSR_ELx bits for exceptions taken from AArch32 */
  51 #define PSR_AA32_MODE_MASK      0x0000001f
  52 #define PSR_AA32_MODE_USR       0x00000010
  53 #define PSR_AA32_MODE_FIQ       0x00000011
  54 #define PSR_AA32_MODE_IRQ       0x00000012
  55 #define PSR_AA32_MODE_SVC       0x00000013
  56 #define PSR_AA32_MODE_ABT       0x00000017
  57 #define PSR_AA32_MODE_HYP       0x0000001a
  58 #define PSR_AA32_MODE_UND       0x0000001b
  59 #define PSR_AA32_MODE_SYS       0x0000001f
  60 #define PSR_AA32_T_BIT          0x00000020
  61 #define PSR_AA32_F_BIT          0x00000040
  62 #define PSR_AA32_I_BIT          0x00000080
  63 #define PSR_AA32_A_BIT          0x00000100
  64 #define PSR_AA32_E_BIT          0x00000200
  65 #define PSR_AA32_SSBS_BIT       0x00800000
  66 #define PSR_AA32_DIT_BIT        0x01000000
  67 #define PSR_AA32_Q_BIT          0x08000000
  68 #define PSR_AA32_V_BIT          0x10000000
  69 #define PSR_AA32_C_BIT          0x20000000
  70 #define PSR_AA32_Z_BIT          0x40000000
  71 #define PSR_AA32_N_BIT          0x80000000
  72 #define PSR_AA32_IT_MASK        0x0600fc00      /* If-Then execution state mask */
  73 #define PSR_AA32_GE_MASK        0x000f0000
  74
  75 #ifdef CONFIG_CPU_BIG_ENDIAN
  76 #define PSR_AA32_ENDSTATE       PSR_AA32_E_BIT
  77 #else
  78 #define PSR_AA32_ENDSTATE       0
  79 #endif
  80
  81 /* AArch32 CPSR bits, as seen in AArch32 */
  82 #define COMPAT_PSR_DIT_BIT      0x00200000
  83
  84 /*
  85  * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
  86  * process is located in memory.
  87  */
  88 #define COMPAT_PT_TEXT_ADDR             0x10000
  89 #define COMPAT_PT_DATA_ADDR             0x10004
  90 #define COMPAT_PT_TEXT_END_ADDR         0x10008
  91
  92 /*
  93  * If pt_regs.syscallno == NO_SYSCALL, then the thread is not executing
  94  * a syscall -- i.e., its most recent entry into the kernel from
  95  * userspace was not via SVC, or otherwise a tracer cancelled the syscall.
  96  *
  97  * This must have the value -1, for ABI compatibility with ptrace etc.
  98  */
  99 #define NO_SYSCALL (-1)
 100
 101 #ifndef __ASSEMBLY__
 102 #include <linux/bug.h>
 103 #include <linux/types.h>
 104
 105 /* sizeof(struct user) for AArch32 */
 106 #define COMPAT_USER_SZ  296
 107
 108 /* Architecturally defined mapping between AArch32 and AArch64 registers */
 109 #define compat_usr(x)   regs[(x)]
 110 #define compat_fp       regs[11]
 111 #define compat_sp       regs[13]
 112 #define compat_lr       regs[14]
 113 #define compat_sp_hyp   regs[15]
 114 #define compat_lr_irq   regs[16]
 115 #define compat_sp_irq   regs[17]
 116 #define compat_lr_svc   regs[18]
 117 #define compat_sp_svc   regs[19]
 118 #define compat_lr_abt   regs[20]
 119 #define compat_sp_abt   regs[21]
 120 #define compat_lr_und   regs[22]
 121 #define compat_sp_und   regs[23]
 122 #define compat_r8_fiq   regs[24]
 123 #define compat_r9_fiq   regs[25]
 124 #define compat_r10_fiq  regs[26]
 125 #define compat_r11_fiq  regs[27]
 126 #define compat_r12_fiq  regs[28]
 127 #define compat_sp_fiq   regs[29]
 128 #define compat_lr_fiq   regs[30]
 129
 130 static inline unsigned long compat_psr_to_pstate(const unsigned long psr)
 131 {
 132         unsigned long pstate;
 133
 134         pstate = psr & ~COMPAT_PSR_DIT_BIT;
 135
 136         if (psr & COMPAT_PSR_DIT_BIT)
 137                 pstate |= PSR_AA32_DIT_BIT;
 138
 139         return pstate;
 140 }
 141
 142 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate)
 143 {
 144         unsigned long psr;
 145
 146         psr = pstate & ~PSR_AA32_DIT_BIT;
 147
 148         if (pstate & PSR_AA32_DIT_BIT)
 149                 psr |= COMPAT_PSR_DIT_BIT;
 150
 151         return psr;
 152 }
 153
 154 /*
 155  * This struct defines the way the registers are stored on the stack during an
 156  * exception. Note that sizeof(struct pt_regs) has to be a multiple of 16 (for
 157  * stack alignment). struct user_pt_regs must form a prefix of struct pt_regs.
 158  */
 159 struct pt_regs {
 160         union {
 161                 struct user_pt_regs user_regs;
 162                 struct {
 163                         u64 regs[31];
 164                         u64 sp;
 165                         u64 pc;
 166                         u64 pstate;
 167                 };
 168         };
 169         u64 orig_x0;
 170 #ifdef __AARCH64EB__
 171         u32 unused2;
 172         s32 syscallno;
 173 #else
 174         s32 syscallno;
 175         u32 unused2;
 176 #endif
 177
 178         u64 orig_addr_limit;
 179         /* Only valid when ARM64_HAS_IRQ_PRIO_MASKING is enabled. */
 180         u64 pmr_save;
 181         u64 stackframe[2];
 182 };
 183
 184 static inline bool in_syscall(struct pt_regs const *regs)
 185 {
 186         return regs->syscallno != NO_SYSCALL;
 187 }
 188
 189 static inline void forget_syscall(struct pt_regs *regs)
 190 {
 191         regs->syscallno = NO_SYSCALL;
 192 }
 193
 194 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate)
 195
 196 #define arch_has_single_step()  (1)
 197
 198 #ifdef CONFIG_COMPAT
 199 #define compat_thumb_mode(regs) \
 200         (((regs)->pstate & PSR_AA32_T_BIT))
 201 #else
 202 #define compat_thumb_mode(regs) (0)
 203 #endif
 204
 205 #define user_mode(regs) \
 206         (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
 207
 208 #define compat_user_mode(regs)  \
 209         (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
 210          (PSR_MODE32_BIT | PSR_MODE_EL0t))
 211
 212 #define processor_mode(regs) \
 213         ((regs)->pstate & PSR_MODE_MASK)
 214
 215 #define irqs_priority_unmasked(regs)                                    \
 216         (system_uses_irq_prio_masking() ?                               \
 217                 (regs)->pmr_save == GIC_PRIO_IRQON :                    \
 218                 true)
 219
 220 #define interrupts_enabled(regs)                        \
 221         (!((regs)->pstate & PSR_I_BIT) && irqs_priority_unmasked(regs))
 222
 223 #define fast_interrupts_enabled(regs) \
 224         (!((regs)->pstate & PSR_F_BIT))
 225
 226 static inline unsigned long user_stack_pointer(struct pt_regs *regs)
 227 {
 228         if (compat_user_mode(regs))
 229                 return regs->compat_sp;
 230         return regs->sp;
 231 }
 232
 233 extern int regs_query_register_offset(const char *name);
 234 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
 235                                                unsigned int n);
 236
 237 /**
 238  * regs_get_register() - get register value from its offset
 239  * @regs:       pt_regs from which register value is gotten
 240  * @offset:     offset of the register.
 241  *
 242  * regs_get_register returns the value of a register whose offset from @regs.
 243  * The @offset is the offset of the register in struct pt_regs.
 244  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
 245  */
 246 static inline u64 regs_get_register(struct pt_regs *regs, unsigned int offset)
 247 {
 248         u64 val = 0;
 249
 250         WARN_ON(offset & 7);
 251
 252         offset >>= 3;
 253         switch (offset) {
 254         case 0 ... 30:
 255                 val = regs->regs[offset];
 256                 break;
 257         case offsetof(struct pt_regs, sp) >> 3:
 258                 val = regs->sp;
 259                 break;
 260         case offsetof(struct pt_regs, pc) >> 3:
 261                 val = regs->pc;
 262                 break;
 263         case offsetof(struct pt_regs, pstate) >> 3:
 264                 val = regs->pstate;
 265                 break;
 266         default:
 267                 val = 0;
 268         }
 269
 270         return val;
 271 }
 272
 273 /*
 274  * Read a register given an architectural register index r.
 275  * This handles the common case where 31 means XZR, not SP.
 276  */
 277 static inline unsigned long pt_regs_read_reg(const struct pt_regs *regs, int r)
 278 {
 279         return (r == 31) ? 0 : regs->regs[r];
 280 }
 281
 282 /*
 283  * Write a register given an architectural register index r.
 284  * This handles the common case where 31 means XZR, not SP.
 285  */
 286 static inline void pt_regs_write_reg(struct pt_regs *regs, int r,
 287                                      unsigned long val)
 288 {
 289         if (r != 31)
 290                 regs->regs[r] = val;
 291 }
 292
 293 /* Valid only for Kernel mode traps. */
 294 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
 295 {
 296         return regs->sp;
 297 }
 298
 299 static inline unsigned long regs_return_value(struct pt_regs *regs)
 300 {
 301         return regs->regs[0];
 302 }
 303
 304 /**
 305  * regs_get_kernel_argument() - get Nth function argument in kernel
 306  * @regs:       pt_regs of that context
 307  * @n:          function argument number (start from 0)
 308  *
 309  * regs_get_argument() returns @n th argument of the function call.
 310  *
 311  * Note that this chooses the most likely register mapping. In very rare
 312  * cases this may not return correct data, for example, if one of the
 313  * function parameters is 16 bytes or bigger. In such cases, we cannot
 314  * get access the parameter correctly and the register assignment of
 315  * subsequent parameters will be shifted.
 316  */
 317 static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,
 318                                                      unsigned int n)
 319 {
 320 #define NR_REG_ARGUMENTS 8
 321         if (n < NR_REG_ARGUMENTS)
 322                 return pt_regs_read_reg(regs, n);
 323         return 0;
 324 }
 325
 326 /* We must avoid circular header include via sched.h */
 327 struct task_struct;
 328 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
 329
 330 static inline unsigned long instruction_pointer(struct pt_regs *regs)
 331 {
 332         return regs->pc;
 333 }
 334 static inline void instruction_pointer_set(struct pt_regs *regs,
 335                 unsigned long val)
 336 {
 337         regs->pc = val;
 338 }
 339
 340 static inline unsigned long frame_pointer(struct pt_regs *regs)
 341 {
 342         return regs->regs[29];
 343 }
 344
 345 #define procedure_link_pointer(regs)    ((regs)->regs[30])
 346
 347 static inline void procedure_link_pointer_set(struct pt_regs *regs,
 348                                            unsigned long val)
 349 {
 350         procedure_link_pointer(regs) = val;
 351 }
 352
 353 extern unsigned long profile_pc(struct pt_regs *regs);
 354
 355 #endif /* __ASSEMBLY__ */
 356 #endif