Merge tag 'for-5.8/dm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device...
[linux/fpc-iii.git] / arch / c6x / kernel / irq.c
blobe4c53d185b622f75b07c4bd1ef9198a99ac37076
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2011-2012 Texas Instruments Incorporated
5 * This borrows heavily from powerpc version, which is:
7 * Derived from arch/i386/kernel/irq.c
8 * Copyright (C) 1992 Linus Torvalds
9 * Adapted from arch/i386 by Gary Thomas
10 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
12 * Copyright (C) 1996-2001 Cort Dougan
13 * Adapted for Power Macintosh by Paul Mackerras
14 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
16 #include <linux/slab.h>
17 #include <linux/seq_file.h>
18 #include <linux/radix-tree.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_irq.h>
22 #include <linux/interrupt.h>
23 #include <linux/kernel_stat.h>
25 #include <asm/megamod-pic.h>
26 #include <asm/special_insns.h>
28 unsigned long irq_err_count;
30 static DEFINE_RAW_SPINLOCK(core_irq_lock);
32 static void mask_core_irq(struct irq_data *data)
34 unsigned int prio = data->hwirq;
36 raw_spin_lock(&core_irq_lock);
37 and_creg(IER, ~(1 << prio));
38 raw_spin_unlock(&core_irq_lock);
41 static void unmask_core_irq(struct irq_data *data)
43 unsigned int prio = data->hwirq;
45 raw_spin_lock(&core_irq_lock);
46 or_creg(IER, 1 << prio);
47 raw_spin_unlock(&core_irq_lock);
50 static struct irq_chip core_chip = {
51 .name = "core",
52 .irq_mask = mask_core_irq,
53 .irq_unmask = unmask_core_irq,
56 static int prio_to_virq[NR_PRIORITY_IRQS];
58 asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs)
60 struct pt_regs *old_regs = set_irq_regs(regs);
62 irq_enter();
64 generic_handle_irq(prio_to_virq[prio]);
66 irq_exit();
68 set_irq_regs(old_regs);
71 static struct irq_domain *core_domain;
73 static int core_domain_map(struct irq_domain *h, unsigned int virq,
74 irq_hw_number_t hw)
76 if (hw < 4 || hw >= NR_PRIORITY_IRQS)
77 return -EINVAL;
79 prio_to_virq[hw] = virq;
81 irq_set_status_flags(virq, IRQ_LEVEL);
82 irq_set_chip_and_handler(virq, &core_chip, handle_level_irq);
83 return 0;
86 static const struct irq_domain_ops core_domain_ops = {
87 .map = core_domain_map,
88 .xlate = irq_domain_xlate_onecell,
91 void __init init_IRQ(void)
93 struct device_node *np;
95 /* Mask all priority IRQs */
96 and_creg(IER, ~0xfff0);
98 np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic");
99 if (np != NULL) {
100 /* create the core host */
101 core_domain = irq_domain_add_linear(np, NR_PRIORITY_IRQS,
102 &core_domain_ops, NULL);
103 if (core_domain)
104 irq_set_default_host(core_domain);
105 of_node_put(np);
108 printk(KERN_INFO "Core interrupt controller initialized\n");
110 /* now we're ready for other SoC controllers */
111 megamod_pic_init();
113 /* Clear all general IRQ flags */
114 set_creg(ICR, 0xfff0);
117 void ack_bad_irq(int irq)
119 printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
120 irq_err_count++;
123 int arch_show_interrupts(struct seq_file *p, int prec)
125 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
126 return 0;