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powerpc/powernv: Rename alloc_m64_pe() to reserve_m64_pe()
[linux/fpc-iii.git] / drivers / staging / slicoss / slicoss.c
blob56ca3b6c144459b43ed5560b89185eb67bca1b3e
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
66
67 #include <linux/kernel.h>
68 #include <linux/string.h>
69 #include <linux/errno.h>
70 #include <linux/ioport.h>
71 #include <linux/slab.h>
72 #include <linux/interrupt.h>
73 #include <linux/timer.h>
74 #include <linux/pci.h>
75 #include <linux/spinlock.h>
76 #include <linux/init.h>
77 #include <linux/bitops.h>
78 #include <linux/io.h>
79 #include <linux/netdevice.h>
80 #include <linux/crc32.h>
81 #include <linux/etherdevice.h>
82 #include <linux/skbuff.h>
83 #include <linux/delay.h>
84 #include <linux/seq_file.h>
85 #include <linux/kthread.h>
86 #include <linux/module.h>
87 #include <linux/moduleparam.h>
88
89 #include <linux/firmware.h>
90 #include <linux/types.h>
91 #include <linux/dma-mapping.h>
92 #include <linux/mii.h>
93 #include <linux/if_vlan.h>
94 #include <asm/unaligned.h>
95
96 #include <linux/ethtool.h>
97 #include <linux/uaccess.h>
98 #include "slichw.h"
99 #include "slic.h"
100
101 static uint slic_first_init = 1;
102 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "
103 "and Storage Accelerator (Non-Accelerated)";
104
105 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
106
107 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
108 static int intagg_delay = 100;
109 static u32 dynamic_intagg;
110 static unsigned int rcv_count;
111
112 #define DRV_NAME "slicoss"
113 #define DRV_VERSION "2.0.1"
114 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
115 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
116 "Non-Accelerated Driver"
117 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
118 "All rights reserved."
119 #define PFX DRV_NAME " "
120
121 MODULE_AUTHOR(DRV_AUTHOR);
122 MODULE_DESCRIPTION(DRV_DESCRIPTION);
123 MODULE_LICENSE("Dual BSD/GPL");
124
125 module_param(dynamic_intagg, int, 0);
126 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
127 module_param(intagg_delay, int, 0);
128 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
129
130 static const struct pci_device_id slic_pci_tbl[] = {
131 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
132 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
133 { 0 }
134 };
135
136 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
137
138 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
139 {
140 writel(value, reg);
141 if (flush)
142 mb();
143 }
144
145 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
146 u32 value, void __iomem *regh, u32 paddrh,
147 bool flush)
148 {
149 spin_lock_irqsave(&adapter->bit64reglock.lock,
150 adapter->bit64reglock.flags);
151 if (paddrh != adapter->curaddrupper) {
152 adapter->curaddrupper = paddrh;
153 writel(paddrh, regh);
154 }
155 writel(value, reg);
156 if (flush)
157 mb();
158 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
159 adapter->bit64reglock.flags);
160 }
161
162 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
163 {
164 unsigned char crcpoly;
165
166 /* Get the CRC polynomial for the mac address */
167 /* we use bits 1-8 (lsb), bitwise reversed,
168 * msb (= lsb bit 0 before bitrev) is automatically discarded */
169 crcpoly = (ether_crc(ETH_ALEN, address)>>23);
170
171 /* We only have space on the SLIC for 64 entries. Lop
172 * off the top two bits. (2^6 = 64)
173 */
174 crcpoly &= 0x3F;
175
176 /* OR in the new bit into our 64 bit mask. */
177 adapter->mcastmask |= (u64) 1 << crcpoly;
178 }
179
180 static void slic_mcast_set_mask(struct adapter *adapter)
181 {
182 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
183
184 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
185 /* Turn on all multicast addresses. We have to do this for
186 * promiscuous mode as well as ALLMCAST mode. It saves the
187 * Microcode from having to keep state about the MAC
188 * configuration.
189 */
190 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
191 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
192 FLUSH);
193 } else {
194 /* Commit our multicast mast to the SLIC by writing to the
195 * multicast address mask registers
196 */
197 slic_reg32_write(&slic_regs->slic_mcastlow,
198 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
199 slic_reg32_write(&slic_regs->slic_mcasthigh,
200 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
201 }
202 }
203
204 static void slic_timer_ping(ulong dev)
205 {
206 struct adapter *adapter;
207 struct sliccard *card;
208
209 adapter = netdev_priv((struct net_device *)dev);
210 card = adapter->card;
211
212 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
213 add_timer(&adapter->pingtimer);
214 }
215
216 static void slic_unmap_mmio_space(struct adapter *adapter)
217 {
218 if (adapter->slic_regs)
219 iounmap(adapter->slic_regs);
220 adapter->slic_regs = NULL;
221 }
222
223 /*
224 * slic_link_config
225 *
226 * Write phy control to configure link duplex/speed
227 *
228 */
229 static void slic_link_config(struct adapter *adapter,
230 u32 linkspeed, u32 linkduplex)
231 {
232 u32 __iomem *wphy;
233 u32 speed;
234 u32 duplex;
235 u32 phy_config;
236 u32 phy_advreg;
237 u32 phy_gctlreg;
238
239 if (adapter->state != ADAPT_UP)
240 return;
241
242 if (linkspeed > LINK_1000MB)
243 linkspeed = LINK_AUTOSPEED;
244 if (linkduplex > LINK_AUTOD)
245 linkduplex = LINK_AUTOD;
246
247 wphy = &adapter->slic_regs->slic_wphy;
248
249 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
250 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
251 /* We've got a fiber gigabit interface, and register
252 * 4 is different in fiber mode than in copper mode
253 */
254
255 /* advertise FD only @1000 Mb */
256 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
257 /* enable PAUSE frames */
258 phy_advreg |= PAR_ASYMPAUSE_FIBER;
259 slic_reg32_write(wphy, phy_advreg, FLUSH);
260
261 if (linkspeed == LINK_AUTOSPEED) {
262 /* reset phy, enable auto-neg */
263 phy_config =
264 (MIICR_REG_PCR |
265 (PCR_RESET | PCR_AUTONEG |
266 PCR_AUTONEG_RST));
267 slic_reg32_write(wphy, phy_config, FLUSH);
268 } else { /* forced 1000 Mb FD*/
269 /* power down phy to break link
270 this may not work) */
271 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
272 slic_reg32_write(wphy, phy_config, FLUSH);
273 /* wait, Marvell says 1 sec,
274 try to get away with 10 ms */
275 mdelay(10);
276
277 /* disable auto-neg, set speed/duplex,
278 soft reset phy, powerup */
279 phy_config =
280 (MIICR_REG_PCR |
281 (PCR_RESET | PCR_SPEED_1000 |
282 PCR_DUPLEX_FULL));
283 slic_reg32_write(wphy, phy_config, FLUSH);
284 }
285 } else { /* copper gigabit */
286
287 /* Auto-Negotiate or 1000 Mb must be auto negotiated
288 * We've got a copper gigabit interface, and
289 * register 4 is different in copper mode than
290 * in fiber mode
291 */
292 if (linkspeed == LINK_AUTOSPEED) {
293 /* advertise 10/100 Mb modes */
294 phy_advreg =
295 (MIICR_REG_4 |
296 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
297 | PAR_ADV10HD));
298 } else {
299 /* linkspeed == LINK_1000MB -
300 don't advertise 10/100 Mb modes */
301 phy_advreg = MIICR_REG_4;
302 }
303 /* enable PAUSE frames */
304 phy_advreg |= PAR_ASYMPAUSE;
305 /* required by the Cicada PHY */
306 phy_advreg |= PAR_802_3;
307 slic_reg32_write(wphy, phy_advreg, FLUSH);
308 /* advertise FD only @1000 Mb */
309 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
310 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
311
312 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
313 /* if a Marvell PHY
314 enable auto crossover */
315 phy_config =
316 (MIICR_REG_16 | (MRV_REG16_XOVERON));
317 slic_reg32_write(wphy, phy_config, FLUSH);
318
319 /* reset phy, enable auto-neg */
320 phy_config =
321 (MIICR_REG_PCR |
322 (PCR_RESET | PCR_AUTONEG |
323 PCR_AUTONEG_RST));
324 slic_reg32_write(wphy, phy_config, FLUSH);
325 } else { /* it's a Cicada PHY */
326 /* enable and restart auto-neg (don't reset) */
327 phy_config =
328 (MIICR_REG_PCR |
329 (PCR_AUTONEG | PCR_AUTONEG_RST));
330 slic_reg32_write(wphy, phy_config, FLUSH);
331 }
332 }
333 } else {
334 /* Forced 10/100 */
335 if (linkspeed == LINK_10MB)
336 speed = 0;
337 else
338 speed = PCR_SPEED_100;
339 if (linkduplex == LINK_HALFD)
340 duplex = 0;
341 else
342 duplex = PCR_DUPLEX_FULL;
343
344 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
345 /* if a Marvell PHY
346 disable auto crossover */
347 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
348 slic_reg32_write(wphy, phy_config, FLUSH);
349 }
350
351 /* power down phy to break link (this may not work) */
352 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
353 slic_reg32_write(wphy, phy_config, FLUSH);
354
355 /* wait, Marvell says 1 sec, try to get away with 10 ms */
356 mdelay(10);
357
358 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
359 /* if a Marvell PHY
360 disable auto-neg, set speed,
361 soft reset phy, powerup */
362 phy_config =
363 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
364 slic_reg32_write(wphy, phy_config, FLUSH);
365 } else { /* it's a Cicada PHY */
366 /* disable auto-neg, set speed, powerup */
367 phy_config = (MIICR_REG_PCR | (speed | duplex));
368 slic_reg32_write(wphy, phy_config, FLUSH);
369 }
370 }
371 }
372
373 static int slic_card_download_gbrcv(struct adapter *adapter)
374 {
375 const struct firmware *fw;
376 const char *file = "";
377 int ret;
378 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
379 u32 codeaddr;
380 u32 instruction;
381 int index = 0;
382 u32 rcvucodelen = 0;
383
384 switch (adapter->devid) {
385 case SLIC_2GB_DEVICE_ID:
386 file = "slicoss/oasisrcvucode.sys";
387 break;
388 case SLIC_1GB_DEVICE_ID:
389 file = "slicoss/gbrcvucode.sys";
390 break;
391 default:
392 return -ENOENT;
393 }
394
395 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
396 if (ret) {
397 dev_err(&adapter->pcidev->dev,
398 "Failed to load firmware %s\n", file);
399 return ret;
400 }
401
402 rcvucodelen = *(u32 *)(fw->data + index);
403 index += 4;
404 switch (adapter->devid) {
405 case SLIC_2GB_DEVICE_ID:
406 if (rcvucodelen != OasisRcvUCodeLen) {
407 release_firmware(fw);
408 return -EINVAL;
409 }
410 break;
411 case SLIC_1GB_DEVICE_ID:
412 if (rcvucodelen != GBRcvUCodeLen) {
413 release_firmware(fw);
414 return -EINVAL;
415 }
416 break;
417 }
418 /* start download */
419 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
420 /* download the rcv sequencer ucode */
421 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
422 /* write out instruction address */
423 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
424
425 instruction = *(u32 *)(fw->data + index);
426 index += 4;
427 /* write out the instruction data low addr */
428 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
429
430 instruction = *(u8 *)(fw->data + index);
431 index++;
432 /* write out the instruction data high addr */
433 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
434 FLUSH);
435 }
436
437 /* download finished */
438 release_firmware(fw);
439 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
440 return 0;
441 }
442
443 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
444 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
445
446 static int slic_card_download(struct adapter *adapter)
447 {
448 const struct firmware *fw;
449 const char *file = "";
450 int ret;
451 u32 section;
452 int thissectionsize;
453 int codeaddr;
454 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
455 u32 instruction;
456 u32 baseaddress;
457 u32 i;
458 u32 numsects = 0;
459 u32 sectsize[3];
460 u32 sectstart[3];
461 int ucode_start, index = 0;
462
463 switch (adapter->devid) {
464 case SLIC_2GB_DEVICE_ID:
465 file = "slicoss/oasisdownload.sys";
466 break;
467 case SLIC_1GB_DEVICE_ID:
468 file = "slicoss/gbdownload.sys";
469 break;
470 default:
471 return -ENOENT;
472 }
473 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
474 if (ret) {
475 dev_err(&adapter->pcidev->dev,
476 "Failed to load firmware %s\n", file);
477 return ret;
478 }
479 numsects = *(u32 *)(fw->data + index);
480 index += 4;
481 for (i = 0; i < numsects; i++) {
482 sectsize[i] = *(u32 *)(fw->data + index);
483 index += 4;
484 }
485 for (i = 0; i < numsects; i++) {
486 sectstart[i] = *(u32 *)(fw->data + index);
487 index += 4;
488 }
489 ucode_start = index;
490 instruction = *(u32 *)(fw->data + index);
491 index += 4;
492 for (section = 0; section < numsects; section++) {
493 baseaddress = sectstart[section];
494 thissectionsize = sectsize[section] >> 3;
495
496 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
497 /* Write out instruction address */
498 slic_reg32_write(&slic_regs->slic_wcs,
499 baseaddress + codeaddr, FLUSH);
500 /* Write out instruction to low addr */
501 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
502 instruction = *(u32 *)(fw->data + index);
503 index += 4;
504
505 /* Write out instruction to high addr */
506 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
507 instruction = *(u32 *)(fw->data + index);
508 index += 4;
509 }
510 }
511 index = ucode_start;
512 for (section = 0; section < numsects; section++) {
513 instruction = *(u32 *)(fw->data + index);
514 baseaddress = sectstart[section];
515 if (baseaddress < 0x8000)
516 continue;
517 thissectionsize = sectsize[section] >> 3;
518
519 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
520 /* Write out instruction address */
521 slic_reg32_write(&slic_regs->slic_wcs,
522 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
523 FLUSH);
524 /* Write out instruction to low addr */
525 slic_reg32_write(&slic_regs->slic_wcs, instruction,
526 FLUSH);
527 instruction = *(u32 *)(fw->data + index);
528 index += 4;
529 /* Write out instruction to high addr */
530 slic_reg32_write(&slic_regs->slic_wcs, instruction,
531 FLUSH);
532 instruction = *(u32 *)(fw->data + index);
533 index += 4;
534
535 /* Check SRAM location zero. If it is non-zero. Abort.*/
536 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
537 if (failure) {
538 release_firmware(fw);
539 return -EIO;
540 }*/
541 }
542 }
543 release_firmware(fw);
544 /* Everything OK, kick off the card */
545 mdelay(10);
546 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
547
548 /* stall for 20 ms, long enough for ucode to init card
549 and reach mainloop */
550 mdelay(20);
551
552 return 0;
553 }
554
555 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
556 MODULE_FIRMWARE("slicoss/gbdownload.sys");
557
558 static void slic_adapter_set_hwaddr(struct adapter *adapter)
559 {
560 struct sliccard *card = adapter->card;
561
562 if ((adapter->card) && (card->config_set)) {
563 memcpy(adapter->macaddr,
564 card->config.MacInfo[adapter->functionnumber].macaddrA,
565 sizeof(struct slic_config_mac));
566 if (is_zero_ether_addr(adapter->currmacaddr))
567 memcpy(adapter->currmacaddr, adapter->macaddr,
568 ETH_ALEN);
569 if (adapter->netdev)
570 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
571 ETH_ALEN);
572 }
573 }
574
575 static void slic_intagg_set(struct adapter *adapter, u32 value)
576 {
577 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
578 adapter->card->loadlevel_current = value;
579 }
580
581 static void slic_soft_reset(struct adapter *adapter)
582 {
583 if (adapter->card->state == CARD_UP) {
584 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
585 mdelay(1);
586 }
587
588 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
589 FLUSH);
590 mdelay(1);
591 }
592
593 static void slic_mac_address_config(struct adapter *adapter)
594 {
595 u32 value;
596 u32 value2;
597 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
598
599 value = *(u32 *) &adapter->currmacaddr[2];
600 value = ntohl(value);
601 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
602 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
603
604 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
605 adapter->currmacaddr[1]) & 0xFFFF);
606
607 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
608 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
609
610 /* Write our multicast mask out to the card. This is done */
611 /* here in addition to the slic_mcast_addr_set routine */
612 /* because ALL_MCAST may have been enabled or disabled */
613 slic_mcast_set_mask(adapter);
614 }
615
616 static void slic_mac_config(struct adapter *adapter)
617 {
618 u32 value;
619 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
620
621 /* Setup GMAC gaps */
622 if (adapter->linkspeed == LINK_1000MB) {
623 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
624 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
625 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
626 } else {
627 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
628 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
629 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
630 }
631
632 /* enable GMII */
633 if (adapter->linkspeed == LINK_1000MB)
634 value |= GMCR_GBIT;
635
636 /* enable fullduplex */
637 if ((adapter->linkduplex == LINK_FULLD)
638 || (adapter->macopts & MAC_LOOPBACK)) {
639 value |= GMCR_FULLD;
640 }
641
642 /* write mac config */
643 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
644
645 /* setup mac addresses */
646 slic_mac_address_config(adapter);
647 }
648
649 static void slic_config_set(struct adapter *adapter, bool linkchange)
650 {
651 u32 value;
652 u32 RcrReset;
653 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
654
655 if (linkchange) {
656 /* Setup MAC */
657 slic_mac_config(adapter);
658 RcrReset = GRCR_RESET;
659 } else {
660 slic_mac_address_config(adapter);
661 RcrReset = 0;
662 }
663
664 if (adapter->linkduplex == LINK_FULLD) {
665 /* setup xmtcfg */
666 value = (GXCR_RESET | /* Always reset */
667 GXCR_XMTEN | /* Enable transmit */
668 GXCR_PAUSEEN); /* Enable pause */
669
670 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
671
672 /* Setup rcvcfg last */
673 value = (RcrReset | /* Reset, if linkchange */
674 GRCR_CTLEN | /* Enable CTL frames */
675 GRCR_ADDRAEN | /* Address A enable */
676 GRCR_RCVBAD | /* Rcv bad frames */
677 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
678 } else {
679 /* setup xmtcfg */
680 value = (GXCR_RESET | /* Always reset */
681 GXCR_XMTEN); /* Enable transmit */
682
683 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
684
685 /* Setup rcvcfg last */
686 value = (RcrReset | /* Reset, if linkchange */
687 GRCR_ADDRAEN | /* Address A enable */
688 GRCR_RCVBAD | /* Rcv bad frames */
689 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
690 }
691
692 if (adapter->state != ADAPT_DOWN) {
693 /* Only enable receive if we are restarting or running */
694 value |= GRCR_RCVEN;
695 }
696
697 if (adapter->macopts & MAC_PROMISC)
698 value |= GRCR_RCVALL;
699
700 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
701 }
702
703 /*
704 * Turn off RCV and XMT, power down PHY
705 */
706 static void slic_config_clear(struct adapter *adapter)
707 {
708 u32 value;
709 u32 phy_config;
710 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
711
712 /* Setup xmtcfg */
713 value = (GXCR_RESET | /* Always reset */
714 GXCR_PAUSEEN); /* Enable pause */
715
716 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
717
718 value = (GRCR_RESET | /* Always reset */
719 GRCR_CTLEN | /* Enable CTL frames */
720 GRCR_ADDRAEN | /* Address A enable */
721 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
722
723 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
724
725 /* power down phy */
726 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
727 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
728 }
729
730 static bool slic_mac_filter(struct adapter *adapter,
731 struct ether_header *ether_frame)
732 {
733 struct net_device *netdev = adapter->netdev;
734 u32 opts = adapter->macopts;
735
736 if (opts & MAC_PROMISC)
737 return true;
738
739 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
740 if (opts & MAC_BCAST) {
741 adapter->rcv_broadcasts++;
742 return true;
743 }
744
745 return false;
746 }
747
748 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
749 if (opts & MAC_ALLMCAST) {
750 adapter->rcv_multicasts++;
751 netdev->stats.multicast++;
752 return true;
753 }
754 if (opts & MAC_MCAST) {
755 struct mcast_address *mcaddr = adapter->mcastaddrs;
756
757 while (mcaddr) {
758 if (ether_addr_equal(mcaddr->address,
759 ether_frame->ether_dhost)) {
760 adapter->rcv_multicasts++;
761 netdev->stats.multicast++;
762 return true;
763 }
764 mcaddr = mcaddr->next;
765 }
766
767 return false;
768 }
769
770 return false;
771 }
772 if (opts & MAC_DIRECTED) {
773 adapter->rcv_unicasts++;
774 return true;
775 }
776 return false;
777
778 }
779
780 static int slic_mac_set_address(struct net_device *dev, void *ptr)
781 {
782 struct adapter *adapter = netdev_priv(dev);
783 struct sockaddr *addr = ptr;
784
785 if (netif_running(dev))
786 return -EBUSY;
787 if (!adapter)
788 return -EBUSY;
789
790 if (!is_valid_ether_addr(addr->sa_data))
791 return -EINVAL;
792
793 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
794 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
795
796 slic_config_set(adapter, true);
797 return 0;
798 }
799
800 static void slic_timer_load_check(ulong cardaddr)
801 {
802 struct sliccard *card = (struct sliccard *)cardaddr;
803 struct adapter *adapter = card->master;
804 u32 __iomem *intagg;
805 u32 load = card->events;
806 u32 level = 0;
807
808 if ((adapter) && (adapter->state == ADAPT_UP) &&
809 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
810 intagg = &adapter->slic_regs->slic_intagg;
811 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
812 if (adapter->linkspeed == LINK_1000MB)
813 level = 100;
814 else {
815 if (load > SLIC_LOAD_5)
816 level = SLIC_INTAGG_5;
817 else if (load > SLIC_LOAD_4)
818 level = SLIC_INTAGG_4;
819 else if (load > SLIC_LOAD_3)
820 level = SLIC_INTAGG_3;
821 else if (load > SLIC_LOAD_2)
822 level = SLIC_INTAGG_2;
823 else if (load > SLIC_LOAD_1)
824 level = SLIC_INTAGG_1;
825 else
826 level = SLIC_INTAGG_0;
827 }
828 if (card->loadlevel_current != level) {
829 card->loadlevel_current = level;
830 slic_reg32_write(intagg, level, FLUSH);
831 }
832 } else {
833 if (load > SLIC_LOAD_5)
834 level = SLIC_INTAGG_5;
835 else if (load > SLIC_LOAD_4)
836 level = SLIC_INTAGG_4;
837 else if (load > SLIC_LOAD_3)
838 level = SLIC_INTAGG_3;
839 else if (load > SLIC_LOAD_2)
840 level = SLIC_INTAGG_2;
841 else if (load > SLIC_LOAD_1)
842 level = SLIC_INTAGG_1;
843 else
844 level = SLIC_INTAGG_0;
845 if (card->loadlevel_current != level) {
846 card->loadlevel_current = level;
847 slic_reg32_write(intagg, level, FLUSH);
848 }
849 }
850 }
851 card->events = 0;
852 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
853 add_timer(&card->loadtimer);
854 }
855
856 static int slic_upr_queue_request(struct adapter *adapter,
857 u32 upr_request,
858 u32 upr_data,
859 u32 upr_data_h,
860 u32 upr_buffer, u32 upr_buffer_h)
861 {
862 struct slic_upr *upr;
863 struct slic_upr *uprqueue;
864
865 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
866 if (!upr)
867 return -ENOMEM;
868
869 upr->adapter = adapter->port;
870 upr->upr_request = upr_request;
871 upr->upr_data = upr_data;
872 upr->upr_buffer = upr_buffer;
873 upr->upr_data_h = upr_data_h;
874 upr->upr_buffer_h = upr_buffer_h;
875 upr->next = NULL;
876 if (adapter->upr_list) {
877 uprqueue = adapter->upr_list;
878
879 while (uprqueue->next)
880 uprqueue = uprqueue->next;
881 uprqueue->next = upr;
882 } else {
883 adapter->upr_list = upr;
884 }
885 return 0;
886 }
887
888 static void slic_upr_start(struct adapter *adapter)
889 {
890 struct slic_upr *upr;
891 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
892 /*
893 char * ptr1;
894 char * ptr2;
895 uint cmdoffset;
896 */
897 upr = adapter->upr_list;
898 if (!upr)
899 return;
900 if (adapter->upr_busy)
901 return;
902 adapter->upr_busy = 1;
903
904 switch (upr->upr_request) {
905 case SLIC_UPR_STATS:
906 if (upr->upr_data_h == 0) {
907 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
908 FLUSH);
909 } else {
910 slic_reg64_write(adapter, &slic_regs->slic_stats64,
911 upr->upr_data,
912 &slic_regs->slic_addr_upper,
913 upr->upr_data_h, FLUSH);
914 }
915 break;
916
917 case SLIC_UPR_RLSR:
918 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
919 &slic_regs->slic_addr_upper, upr->upr_data_h,
920 FLUSH);
921 break;
922
923 case SLIC_UPR_RCONFIG:
924 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
925 upr->upr_data, &slic_regs->slic_addr_upper,
926 upr->upr_data_h, FLUSH);
927 break;
928 case SLIC_UPR_PING:
929 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
930 break;
931 }
932 }
933
934 static int slic_upr_request(struct adapter *adapter,
935 u32 upr_request,
936 u32 upr_data,
937 u32 upr_data_h,
938 u32 upr_buffer, u32 upr_buffer_h)
939 {
940 int rc;
941
942 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
943 rc = slic_upr_queue_request(adapter,
944 upr_request,
945 upr_data,
946 upr_data_h, upr_buffer, upr_buffer_h);
947 if (rc)
948 goto err_unlock_irq;
949
950 slic_upr_start(adapter);
951 err_unlock_irq:
952 spin_unlock_irqrestore(&adapter->upr_lock.lock,
953 adapter->upr_lock.flags);
954 return rc;
955 }
956
957 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
958 {
959 u32 linkstatus = adapter->pshmem->linkstatus;
960 uint linkup;
961 unsigned char linkspeed;
962 unsigned char linkduplex;
963
964 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
965 struct slic_shmem *pshmem;
966
967 pshmem = (struct slic_shmem *)(unsigned long)
968 adapter->phys_shmem;
969 #if BITS_PER_LONG == 64
970 slic_upr_queue_request(adapter,
971 SLIC_UPR_RLSR,
972 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
973 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
974 0, 0);
975 #else
976 slic_upr_queue_request(adapter,
977 SLIC_UPR_RLSR,
978 (u32) &pshmem->linkstatus,
979 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
980 #endif
981 return;
982 }
983 if (adapter->state != ADAPT_UP)
984 return;
985
986 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
987 if (linkstatus & GIG_SPEED_1000)
988 linkspeed = LINK_1000MB;
989 else if (linkstatus & GIG_SPEED_100)
990 linkspeed = LINK_100MB;
991 else
992 linkspeed = LINK_10MB;
993
994 if (linkstatus & GIG_FULLDUPLEX)
995 linkduplex = LINK_FULLD;
996 else
997 linkduplex = LINK_HALFD;
998
999 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1000 return;
1001
1002 /* link up event, but nothing has changed */
1003 if ((adapter->linkstate == LINK_UP) &&
1004 (linkup == LINK_UP) &&
1005 (adapter->linkspeed == linkspeed) &&
1006 (adapter->linkduplex == linkduplex))
1007 return;
1008
1009 /* link has changed at this point */
1010
1011 /* link has gone from up to down */
1012 if (linkup == LINK_DOWN) {
1013 adapter->linkstate = LINK_DOWN;
1014 return;
1015 }
1016
1017 /* link has gone from down to up */
1018 adapter->linkspeed = linkspeed;
1019 adapter->linkduplex = linkduplex;
1020
1021 if (adapter->linkstate != LINK_UP) {
1022 /* setup the mac */
1023 slic_config_set(adapter, true);
1024 adapter->linkstate = LINK_UP;
1025 netif_start_queue(adapter->netdev);
1026 }
1027 }
1028
1029 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1030 {
1031 struct sliccard *card = adapter->card;
1032 struct slic_upr *upr;
1033
1034 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1035 upr = adapter->upr_list;
1036 if (!upr) {
1037 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1038 adapter->upr_lock.flags);
1039 return;
1040 }
1041 adapter->upr_list = upr->next;
1042 upr->next = NULL;
1043 adapter->upr_busy = 0;
1044 switch (upr->upr_request) {
1045 case SLIC_UPR_STATS:
1046 {
1047 struct slic_stats *slicstats =
1048 (struct slic_stats *) &adapter->pshmem->inicstats;
1049 struct slic_stats *newstats = slicstats;
1050 struct slic_stats *old = &adapter->inicstats_prev;
1051 struct slicnet_stats *stst = &adapter->slic_stats;
1052
1053 if (isr & ISR_UPCERR) {
1054 dev_err(&adapter->netdev->dev,
1055 "SLIC_UPR_STATS command failed isr[%x]\n",
1056 isr);
1057
1058 break;
1059 }
1060 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1061 newstats->xmit_tcp_segs_gb,
1062 old->xmit_tcp_segs_gb);
1063
1064 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1065 newstats->xmit_tcp_bytes_gb,
1066 old->xmit_tcp_bytes_gb);
1067
1068 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1069 newstats->rcv_tcp_segs_gb,
1070 old->rcv_tcp_segs_gb);
1071
1072 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1073 newstats->rcv_tcp_bytes_gb,
1074 old->rcv_tcp_bytes_gb);
1075
1076 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1077 newstats->xmit_bytes_gb,
1078 old->xmit_bytes_gb);
1079
1080 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1081 newstats->xmit_unicasts_gb,
1082 old->xmit_unicasts_gb);
1083
1084 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1085 newstats->rcv_bytes_gb,
1086 old->rcv_bytes_gb);
1087
1088 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1089 newstats->rcv_unicasts_gb,
1090 old->rcv_unicasts_gb);
1091
1092 UPDATE_STATS_GB(stst->iface.xmt_errors,
1093 newstats->xmit_collisions_gb,
1094 old->xmit_collisions_gb);
1095
1096 UPDATE_STATS_GB(stst->iface.xmt_errors,
1097 newstats->xmit_excess_collisions_gb,
1098 old->xmit_excess_collisions_gb);
1099
1100 UPDATE_STATS_GB(stst->iface.xmt_errors,
1101 newstats->xmit_other_error_gb,
1102 old->xmit_other_error_gb);
1103
1104 UPDATE_STATS_GB(stst->iface.rcv_errors,
1105 newstats->rcv_other_error_gb,
1106 old->rcv_other_error_gb);
1107
1108 UPDATE_STATS_GB(stst->iface.rcv_discards,
1109 newstats->rcv_drops_gb,
1110 old->rcv_drops_gb);
1111
1112 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1113 adapter->rcv_drops +=
1114 (newstats->rcv_drops_gb -
1115 old->rcv_drops_gb);
1116 }
1117 memcpy(old, newstats, sizeof(struct slic_stats));
1118 break;
1119 }
1120 case SLIC_UPR_RLSR:
1121 slic_link_upr_complete(adapter, isr);
1122 break;
1123 case SLIC_UPR_RCONFIG:
1124 break;
1125 case SLIC_UPR_PING:
1126 card->pingstatus |= (isr & ISR_PINGDSMASK);
1127 break;
1128 }
1129 kfree(upr);
1130 slic_upr_start(adapter);
1131 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1132 adapter->upr_lock.flags);
1133 }
1134
1135 static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1136 {
1137 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1138 0, 0);
1139 }
1140
1141 /*
1142 * Compute a checksum of the EEPROM according to RFC 1071.
1143 */
1144 static u16 slic_eeprom_cksum(void *eeprom, unsigned len)
1145 {
1146 u16 *wp = eeprom;
1147 u32 checksum = 0;
1148
1149 while (len > 1) {
1150 checksum += *(wp++);
1151 len -= 2;
1152 }
1153
1154 if (len > 0)
1155 checksum += *(u8 *) wp;
1156
1157
1158 while (checksum >> 16)
1159 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1160
1161 return ~checksum;
1162 }
1163
1164 static void slic_rspqueue_free(struct adapter *adapter)
1165 {
1166 int i;
1167 struct slic_rspqueue *rspq = &adapter->rspqueue;
1168
1169 for (i = 0; i < rspq->num_pages; i++) {
1170 if (rspq->vaddr[i]) {
1171 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1172 rspq->vaddr[i], rspq->paddr[i]);
1173 }
1174 rspq->vaddr[i] = NULL;
1175 rspq->paddr[i] = 0;
1176 }
1177 rspq->offset = 0;
1178 rspq->pageindex = 0;
1179 rspq->rspbuf = NULL;
1180 }
1181
1182 static int slic_rspqueue_init(struct adapter *adapter)
1183 {
1184 int i;
1185 struct slic_rspqueue *rspq = &adapter->rspqueue;
1186 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1187 u32 paddrh = 0;
1188
1189 memset(rspq, 0, sizeof(struct slic_rspqueue));
1190
1191 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1192
1193 for (i = 0; i < rspq->num_pages; i++) {
1194 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1195 PAGE_SIZE,
1196 &rspq->paddr[i]);
1197 if (!rspq->vaddr[i]) {
1198 dev_err(&adapter->pcidev->dev,
1199 "pci_alloc_consistent failed\n");
1200 slic_rspqueue_free(adapter);
1201 return -ENOMEM;
1202 }
1203
1204 if (paddrh == 0) {
1205 slic_reg32_write(&slic_regs->slic_rbar,
1206 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1207 DONT_FLUSH);
1208 } else {
1209 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1210 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1211 &slic_regs->slic_addr_upper,
1212 paddrh, DONT_FLUSH);
1213 }
1214 }
1215 rspq->offset = 0;
1216 rspq->pageindex = 0;
1217 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1218 return 0;
1219 }
1220
1221 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1222 {
1223 struct slic_rspqueue *rspq = &adapter->rspqueue;
1224 struct slic_rspbuf *buf;
1225
1226 if (!(rspq->rspbuf->status))
1227 return NULL;
1228
1229 buf = rspq->rspbuf;
1230 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1231 rspq->rspbuf++;
1232 } else {
1233 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1234 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1235 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1236 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1237 rspq->offset = 0;
1238 rspq->rspbuf = (struct slic_rspbuf *)
1239 rspq->vaddr[rspq->pageindex];
1240 }
1241
1242 return buf;
1243 }
1244
1245 static void slic_cmdqmem_free(struct adapter *adapter)
1246 {
1247 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1248 int i;
1249
1250 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1251 if (cmdqmem->pages[i]) {
1252 pci_free_consistent(adapter->pcidev,
1253 PAGE_SIZE,
1254 (void *) cmdqmem->pages[i],
1255 cmdqmem->dma_pages[i]);
1256 }
1257 }
1258 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1259 }
1260
1261 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1262 {
1263 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1264 u32 *pageaddr;
1265
1266 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1267 return NULL;
1268 pageaddr = pci_alloc_consistent(adapter->pcidev,
1269 PAGE_SIZE,
1270 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1271 if (!pageaddr)
1272 return NULL;
1273
1274 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1275 cmdqmem->pagecnt++;
1276 return pageaddr;
1277 }
1278
1279 static void slic_cmdq_free(struct adapter *adapter)
1280 {
1281 struct slic_hostcmd *cmd;
1282
1283 cmd = adapter->cmdq_all.head;
1284 while (cmd) {
1285 if (cmd->busy) {
1286 struct sk_buff *tempskb;
1287
1288 tempskb = cmd->skb;
1289 if (tempskb) {
1290 cmd->skb = NULL;
1291 dev_kfree_skb_irq(tempskb);
1292 }
1293 }
1294 cmd = cmd->next_all;
1295 }
1296 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1297 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1298 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1299 slic_cmdqmem_free(adapter);
1300 }
1301
1302 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1303 {
1304 struct slic_hostcmd *cmd;
1305 struct slic_hostcmd *prev;
1306 struct slic_hostcmd *tail;
1307 struct slic_cmdqueue *cmdq;
1308 int cmdcnt;
1309 void *cmdaddr;
1310 ulong phys_addr;
1311 u32 phys_addrl;
1312 u32 phys_addrh;
1313 struct slic_handle *pslic_handle;
1314
1315 cmdaddr = page;
1316 cmd = (struct slic_hostcmd *)cmdaddr;
1317 cmdcnt = 0;
1318
1319 phys_addr = virt_to_bus((void *)page);
1320 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1321 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1322
1323 prev = NULL;
1324 tail = cmd;
1325 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1326 (adapter->slic_handle_ix < 256)) {
1327 /* Allocate and initialize a SLIC_HANDLE for this command */
1328 spin_lock_irqsave(&adapter->handle_lock.lock,
1329 adapter->handle_lock.flags);
1330 pslic_handle = adapter->pfree_slic_handles;
1331 adapter->pfree_slic_handles = pslic_handle->next;
1332 spin_unlock_irqrestore(&adapter->handle_lock.lock,
1333 adapter->handle_lock.flags);
1334 pslic_handle->type = SLIC_HANDLE_CMD;
1335 pslic_handle->address = (void *) cmd;
1336 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1337 pslic_handle->other_handle = NULL;
1338 pslic_handle->next = NULL;
1339
1340 cmd->pslic_handle = pslic_handle;
1341 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1342 cmd->busy = false;
1343 cmd->paddrl = phys_addrl;
1344 cmd->paddrh = phys_addrh;
1345 cmd->next_all = prev;
1346 cmd->next = prev;
1347 prev = cmd;
1348 phys_addrl += SLIC_HOSTCMD_SIZE;
1349 cmdaddr += SLIC_HOSTCMD_SIZE;
1350
1351 cmd = (struct slic_hostcmd *)cmdaddr;
1352 cmdcnt++;
1353 }
1354
1355 cmdq = &adapter->cmdq_all;
1356 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1357 tail->next_all = cmdq->head;
1358 cmdq->head = prev;
1359 cmdq = &adapter->cmdq_free;
1360 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1361 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1362 tail->next = cmdq->head;
1363 cmdq->head = prev;
1364 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1365 }
1366
1367 static int slic_cmdq_init(struct adapter *adapter)
1368 {
1369 int i;
1370 u32 *pageaddr;
1371
1372 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1373 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1374 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1375 spin_lock_init(&adapter->cmdq_all.lock.lock);
1376 spin_lock_init(&adapter->cmdq_free.lock.lock);
1377 spin_lock_init(&adapter->cmdq_done.lock.lock);
1378 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1379 adapter->slic_handle_ix = 1;
1380 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1381 pageaddr = slic_cmdqmem_addpage(adapter);
1382 if (!pageaddr) {
1383 slic_cmdq_free(adapter);
1384 return -ENOMEM;
1385 }
1386 slic_cmdq_addcmdpage(adapter, pageaddr);
1387 }
1388 adapter->slic_handle_ix = 1;
1389
1390 return 0;
1391 }
1392
1393 static void slic_cmdq_reset(struct adapter *adapter)
1394 {
1395 struct slic_hostcmd *hcmd;
1396 struct sk_buff *skb;
1397 u32 outstanding;
1398
1399 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1400 adapter->cmdq_free.lock.flags);
1401 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1402 adapter->cmdq_done.lock.flags);
1403 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1404 outstanding -= adapter->cmdq_free.count;
1405 hcmd = adapter->cmdq_all.head;
1406 while (hcmd) {
1407 if (hcmd->busy) {
1408 skb = hcmd->skb;
1409 hcmd->busy = 0;
1410 hcmd->skb = NULL;
1411 dev_kfree_skb_irq(skb);
1412 }
1413 hcmd = hcmd->next_all;
1414 }
1415 adapter->cmdq_free.count = 0;
1416 adapter->cmdq_free.head = NULL;
1417 adapter->cmdq_free.tail = NULL;
1418 adapter->cmdq_done.count = 0;
1419 adapter->cmdq_done.head = NULL;
1420 adapter->cmdq_done.tail = NULL;
1421 adapter->cmdq_free.head = adapter->cmdq_all.head;
1422 hcmd = adapter->cmdq_all.head;
1423 while (hcmd) {
1424 adapter->cmdq_free.count++;
1425 hcmd->next = hcmd->next_all;
1426 hcmd = hcmd->next_all;
1427 }
1428 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1429 dev_err(&adapter->netdev->dev,
1430 "free_count %d != all count %d\n",
1431 adapter->cmdq_free.count, adapter->cmdq_all.count);
1432 }
1433 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1434 adapter->cmdq_done.lock.flags);
1435 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1436 adapter->cmdq_free.lock.flags);
1437 }
1438
1439 static void slic_cmdq_getdone(struct adapter *adapter)
1440 {
1441 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1442 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1443
1444 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1445
1446 free_cmdq->head = done_cmdq->head;
1447 free_cmdq->count = done_cmdq->count;
1448 done_cmdq->head = NULL;
1449 done_cmdq->tail = NULL;
1450 done_cmdq->count = 0;
1451 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1452 }
1453
1454 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1455 {
1456 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1457 struct slic_hostcmd *cmd = NULL;
1458
1459 lock_and_retry:
1460 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1461 retry:
1462 cmd = cmdq->head;
1463 if (cmd) {
1464 cmdq->head = cmd->next;
1465 cmdq->count--;
1466 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1467 } else {
1468 slic_cmdq_getdone(adapter);
1469 cmd = cmdq->head;
1470 if (cmd) {
1471 goto retry;
1472 } else {
1473 u32 *pageaddr;
1474
1475 spin_unlock_irqrestore(&cmdq->lock.lock,
1476 cmdq->lock.flags);
1477 pageaddr = slic_cmdqmem_addpage(adapter);
1478 if (pageaddr) {
1479 slic_cmdq_addcmdpage(adapter, pageaddr);
1480 goto lock_and_retry;
1481 }
1482 }
1483 }
1484 return cmd;
1485 }
1486
1487 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1488 struct slic_hostcmd *cmd)
1489 {
1490 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1491
1492 spin_lock(&cmdq->lock.lock);
1493 cmd->busy = 0;
1494 cmd->next = cmdq->head;
1495 cmdq->head = cmd;
1496 cmdq->count++;
1497 if ((adapter->xmitq_full) && (cmdq->count > 10))
1498 netif_wake_queue(adapter->netdev);
1499 spin_unlock(&cmdq->lock.lock);
1500 }
1501
1502 static int slic_rcvqueue_fill(struct adapter *adapter)
1503 {
1504 void *paddr;
1505 u32 paddrl;
1506 u32 paddrh;
1507 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1508 int i = 0;
1509 struct device *dev = &adapter->netdev->dev;
1510
1511 while (i < SLIC_RCVQ_FILLENTRIES) {
1512 struct slic_rcvbuf *rcvbuf;
1513 struct sk_buff *skb;
1514 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1515 retry_rcvqfill:
1516 #endif
1517 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1518 if (skb) {
1519 paddr = (void *)(unsigned long)
1520 pci_map_single(adapter->pcidev,
1521 skb->data,
1522 SLIC_RCVQ_RCVBUFSIZE,
1523 PCI_DMA_FROMDEVICE);
1524 paddrl = SLIC_GET_ADDR_LOW(paddr);
1525 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1526
1527 skb->len = SLIC_RCVBUF_HEADSIZE;
1528 rcvbuf = (struct slic_rcvbuf *)skb->head;
1529 rcvbuf->status = 0;
1530 skb->next = NULL;
1531 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1532 if (paddrl == 0) {
1533 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1534 __func__);
1535 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1536 dev_err(dev, " skbdata[%p]\n", skb->data);
1537 dev_err(dev, " skblen[%x]\n", skb->len);
1538 dev_err(dev, " paddr[%p]\n", paddr);
1539 dev_err(dev, " paddrl[%x]\n", paddrl);
1540 dev_err(dev, " paddrh[%x]\n", paddrh);
1541 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1542 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1543 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1544 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1545 goto retry_rcvqfill;
1546 }
1547 #else
1548 if (paddrl == 0) {
1549 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1550 __func__);
1551 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1552 dev_err(dev, " skbdata[%p]\n", skb->data);
1553 dev_err(dev, " skblen[%x]\n", skb->len);
1554 dev_err(dev, " paddr[%p]\n", paddr);
1555 dev_err(dev, " paddrl[%x]\n", paddrl);
1556 dev_err(dev, " paddrh[%x]\n", paddrh);
1557 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1558 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1559 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1560 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1561 }
1562 #endif
1563 if (paddrh == 0) {
1564 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1565 (u32)paddrl, DONT_FLUSH);
1566 } else {
1567 slic_reg64_write(adapter,
1568 &adapter->slic_regs->slic_hbar64,
1569 paddrl,
1570 &adapter->slic_regs->slic_addr_upper,
1571 paddrh, DONT_FLUSH);
1572 }
1573 if (rcvq->head)
1574 rcvq->tail->next = skb;
1575 else
1576 rcvq->head = skb;
1577 rcvq->tail = skb;
1578 rcvq->count++;
1579 i++;
1580 } else {
1581 dev_err(&adapter->netdev->dev,
1582 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1583 i);
1584 break;
1585 }
1586 }
1587 return i;
1588 }
1589
1590 static void slic_rcvqueue_free(struct adapter *adapter)
1591 {
1592 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1593 struct sk_buff *skb;
1594
1595 while (rcvq->head) {
1596 skb = rcvq->head;
1597 rcvq->head = rcvq->head->next;
1598 dev_kfree_skb(skb);
1599 }
1600 rcvq->tail = NULL;
1601 rcvq->head = NULL;
1602 rcvq->count = 0;
1603 }
1604
1605 static int slic_rcvqueue_init(struct adapter *adapter)
1606 {
1607 int i, count;
1608 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1609
1610 rcvq->tail = NULL;
1611 rcvq->head = NULL;
1612 rcvq->size = SLIC_RCVQ_ENTRIES;
1613 rcvq->errors = 0;
1614 rcvq->count = 0;
1615 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1616 count = 0;
1617 while (i) {
1618 count += slic_rcvqueue_fill(adapter);
1619 i--;
1620 }
1621 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1622 slic_rcvqueue_free(adapter);
1623 return -ENOMEM;
1624 }
1625 return 0;
1626 }
1627
1628 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1629 {
1630 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1631 struct sk_buff *skb;
1632 struct slic_rcvbuf *rcvbuf;
1633 int count;
1634
1635 if (rcvq->count) {
1636 skb = rcvq->head;
1637 rcvbuf = (struct slic_rcvbuf *)skb->head;
1638
1639 if (rcvbuf->status & IRHDDR_SVALID) {
1640 rcvq->head = rcvq->head->next;
1641 skb->next = NULL;
1642 rcvq->count--;
1643 } else {
1644 skb = NULL;
1645 }
1646 } else {
1647 dev_err(&adapter->netdev->dev,
1648 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1649 skb = NULL;
1650 }
1651 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1652 count = slic_rcvqueue_fill(adapter);
1653 if (!count)
1654 break;
1655 }
1656 if (skb)
1657 rcvq->errors = 0;
1658 return skb;
1659 }
1660
1661 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1662 {
1663 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1664 void *paddr;
1665 u32 paddrl;
1666 u32 paddrh;
1667 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1668 struct device *dev;
1669
1670 paddr = (void *)(unsigned long)
1671 pci_map_single(adapter->pcidev, skb->head,
1672 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1673 rcvbuf->status = 0;
1674 skb->next = NULL;
1675
1676 paddrl = SLIC_GET_ADDR_LOW(paddr);
1677 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1678
1679 if (paddrl == 0) {
1680 dev = &adapter->netdev->dev;
1681 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1682 __func__);
1683 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1684 dev_err(dev, " skbdata[%p]\n", skb->data);
1685 dev_err(dev, " skblen[%x]\n", skb->len);
1686 dev_err(dev, " paddr[%p]\n", paddr);
1687 dev_err(dev, " paddrl[%x]\n", paddrl);
1688 dev_err(dev, " paddrh[%x]\n", paddrh);
1689 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1690 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1691 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1692 }
1693 if (paddrh == 0) {
1694 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1695 DONT_FLUSH);
1696 } else {
1697 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1698 paddrl, &adapter->slic_regs->slic_addr_upper,
1699 paddrh, DONT_FLUSH);
1700 }
1701 if (rcvq->head)
1702 rcvq->tail->next = skb;
1703 else
1704 rcvq->head = skb;
1705 rcvq->tail = skb;
1706 rcvq->count++;
1707 return rcvq->count;
1708 }
1709
1710 /*
1711 * slic_link_event_handler -
1712 *
1713 * Initiate a link configuration sequence. The link configuration begins
1714 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1715 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1716 * routine will follow it up witha UP configuration write command, which
1717 * will also complete asynchronously.
1718 *
1719 */
1720 static void slic_link_event_handler(struct adapter *adapter)
1721 {
1722 int status;
1723 struct slic_shmem *pshmem;
1724
1725 if (adapter->state != ADAPT_UP) {
1726 /* Adapter is not operational. Ignore. */
1727 return;
1728 }
1729
1730 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
1731
1732 #if BITS_PER_LONG == 64
1733 status = slic_upr_request(adapter,
1734 SLIC_UPR_RLSR,
1735 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1736 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1737 0, 0);
1738 #else
1739 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1740 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1741 0, 0, 0);
1742 #endif
1743 }
1744
1745 static void slic_init_cleanup(struct adapter *adapter)
1746 {
1747 if (adapter->intrregistered) {
1748 adapter->intrregistered = 0;
1749 free_irq(adapter->netdev->irq, adapter->netdev);
1750
1751 }
1752 if (adapter->pshmem) {
1753 pci_free_consistent(adapter->pcidev,
1754 sizeof(struct slic_shmem),
1755 adapter->pshmem, adapter->phys_shmem);
1756 adapter->pshmem = NULL;
1757 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
1758 }
1759
1760 if (adapter->pingtimerset) {
1761 adapter->pingtimerset = 0;
1762 del_timer(&adapter->pingtimer);
1763 }
1764
1765 slic_rspqueue_free(adapter);
1766 slic_cmdq_free(adapter);
1767 slic_rcvqueue_free(adapter);
1768 }
1769
1770 /*
1771 * Allocate a mcast_address structure to hold the multicast address.
1772 * Link it in.
1773 */
1774 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1775 {
1776 struct mcast_address *mcaddr, *mlist;
1777
1778 /* Check to see if it already exists */
1779 mlist = adapter->mcastaddrs;
1780 while (mlist) {
1781 if (ether_addr_equal(mlist->address, address))
1782 return 0;
1783 mlist = mlist->next;
1784 }
1785
1786 /* Doesn't already exist. Allocate a structure to hold it */
1787 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1788 if (mcaddr == NULL)
1789 return 1;
1790
1791 memcpy(mcaddr->address, address, ETH_ALEN);
1792
1793 mcaddr->next = adapter->mcastaddrs;
1794 adapter->mcastaddrs = mcaddr;
1795
1796 return 0;
1797 }
1798
1799 static void slic_mcast_set_list(struct net_device *dev)
1800 {
1801 struct adapter *adapter = netdev_priv(dev);
1802 int status = 0;
1803 char *addresses;
1804 struct netdev_hw_addr *ha;
1805
1806 netdev_for_each_mc_addr(ha, dev) {
1807 addresses = (char *) &ha->addr;
1808 status = slic_mcast_add_list(adapter, addresses);
1809 if (status != 0)
1810 break;
1811 slic_mcast_set_bit(adapter, addresses);
1812 }
1813
1814 if (adapter->devflags_prev != dev->flags) {
1815 adapter->macopts = MAC_DIRECTED;
1816 if (dev->flags) {
1817 if (dev->flags & IFF_BROADCAST)
1818 adapter->macopts |= MAC_BCAST;
1819 if (dev->flags & IFF_PROMISC)
1820 adapter->macopts |= MAC_PROMISC;
1821 if (dev->flags & IFF_ALLMULTI)
1822 adapter->macopts |= MAC_ALLMCAST;
1823 if (dev->flags & IFF_MULTICAST)
1824 adapter->macopts |= MAC_MCAST;
1825 }
1826 adapter->devflags_prev = dev->flags;
1827 slic_config_set(adapter, true);
1828 } else {
1829 if (status == 0)
1830 slic_mcast_set_mask(adapter);
1831 }
1832 }
1833
1834 #define XMIT_FAIL_LINK_STATE 1
1835 #define XMIT_FAIL_ZERO_LENGTH 2
1836 #define XMIT_FAIL_HOSTCMD_FAIL 3
1837
1838 static void slic_xmit_build_request(struct adapter *adapter,
1839 struct slic_hostcmd *hcmd, struct sk_buff *skb)
1840 {
1841 struct slic_host64_cmd *ihcmd;
1842 ulong phys_addr;
1843
1844 ihcmd = &hcmd->cmd64;
1845
1846 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
1847 ihcmd->command = IHCMD_XMT_REQ;
1848 ihcmd->u.slic_buffers.totlen = skb->len;
1849 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1850 PCI_DMA_TODEVICE);
1851 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1852 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1853 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1854 #if BITS_PER_LONG == 64
1855 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1856 (u64) hcmd) + 31) >> 5);
1857 #else
1858 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
1859 (u32) hcmd) + 31) >> 5);
1860 #endif
1861 }
1862
1863 static void slic_xmit_fail(struct adapter *adapter,
1864 struct sk_buff *skb,
1865 void *cmd, u32 skbtype, u32 status)
1866 {
1867 if (adapter->xmitq_full)
1868 netif_stop_queue(adapter->netdev);
1869 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1870 switch (status) {
1871 case XMIT_FAIL_LINK_STATE:
1872 dev_err(&adapter->netdev->dev,
1873 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1874 skb, skb->pkt_type,
1875 SLIC_LINKSTATE(adapter->linkstate),
1876 SLIC_ADAPTER_STATE(adapter->state),
1877 adapter->state,
1878 SLIC_CARD_STATE(adapter->card->state),
1879 adapter->card->state);
1880 break;
1881 case XMIT_FAIL_ZERO_LENGTH:
1882 dev_err(&adapter->netdev->dev,
1883 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1884 skb, skb->pkt_type);
1885 break;
1886 case XMIT_FAIL_HOSTCMD_FAIL:
1887 dev_err(&adapter->netdev->dev,
1888 "xmit_start skb[%p] type[%x] No host commands available\n", skb, skb->pkt_type);
1889 break;
1890 }
1891 }
1892 dev_kfree_skb(skb);
1893 adapter->netdev->stats.tx_dropped++;
1894 }
1895
1896 static void slic_rcv_handle_error(struct adapter *adapter,
1897 struct slic_rcvbuf *rcvbuf)
1898 {
1899 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1900 struct net_device *netdev = adapter->netdev;
1901
1902 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1903 if (hdr->frame_status14 & VRHSTAT_802OE)
1904 adapter->if_events.oflow802++;
1905 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1906 adapter->if_events.Tprtoflow++;
1907 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1908 adapter->if_events.uflow802++;
1909 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1910 adapter->if_events.rcvearly++;
1911 netdev->stats.rx_fifo_errors++;
1912 }
1913 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1914 adapter->if_events.Bufov++;
1915 netdev->stats.rx_over_errors++;
1916 }
1917 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1918 adapter->if_events.Carre++;
1919 netdev->stats.tx_carrier_errors++;
1920 }
1921 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1922 adapter->if_events.Longe++;
1923 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1924 adapter->if_events.Invp++;
1925 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1926 adapter->if_events.Crc++;
1927 netdev->stats.rx_crc_errors++;
1928 }
1929 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1930 adapter->if_events.Drbl++;
1931 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1932 adapter->if_events.Code++;
1933 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1934 adapter->if_events.TpCsum++;
1935 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1936 adapter->if_events.TpHlen++;
1937 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1938 adapter->if_events.IpCsum++;
1939 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1940 adapter->if_events.IpLen++;
1941 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1942 adapter->if_events.IpHlen++;
1943 } else {
1944 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1945 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1946
1947 if (xerr == VGBSTAT_XCSERR)
1948 adapter->if_events.TpCsum++;
1949 if (xerr == VGBSTAT_XUFLOW)
1950 adapter->if_events.Tprtoflow++;
1951 if (xerr == VGBSTAT_XHLEN)
1952 adapter->if_events.TpHlen++;
1953 }
1954 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1955 u32 nerr =
1956 (hdr->
1957 frame_statusGB >> VGBSTAT_NERRSHFT) &
1958 VGBSTAT_NERRMSK;
1959 if (nerr == VGBSTAT_NCSERR)
1960 adapter->if_events.IpCsum++;
1961 if (nerr == VGBSTAT_NUFLOW)
1962 adapter->if_events.IpLen++;
1963 if (nerr == VGBSTAT_NHLEN)
1964 adapter->if_events.IpHlen++;
1965 }
1966 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1967 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1968
1969 if (lerr == VGBSTAT_LDEARLY)
1970 adapter->if_events.rcvearly++;
1971 if (lerr == VGBSTAT_LBOFLO)
1972 adapter->if_events.Bufov++;
1973 if (lerr == VGBSTAT_LCODERR)
1974 adapter->if_events.Code++;
1975 if (lerr == VGBSTAT_LDBLNBL)
1976 adapter->if_events.Drbl++;
1977 if (lerr == VGBSTAT_LCRCERR)
1978 adapter->if_events.Crc++;
1979 if (lerr == VGBSTAT_LOFLO)
1980 adapter->if_events.oflow802++;
1981 if (lerr == VGBSTAT_LUFLO)
1982 adapter->if_events.uflow802++;
1983 }
1984 }
1985 }
1986
1987 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1988 #define M_FAST_PATH 0x0040
1989
1990 static void slic_rcv_handler(struct adapter *adapter)
1991 {
1992 struct net_device *netdev = adapter->netdev;
1993 struct sk_buff *skb;
1994 struct slic_rcvbuf *rcvbuf;
1995 u32 frames = 0;
1996
1997 while ((skb = slic_rcvqueue_getnext(adapter))) {
1998 u32 rx_bytes;
1999
2000 rcvbuf = (struct slic_rcvbuf *)skb->head;
2001 adapter->card->events++;
2002 if (rcvbuf->status & IRHDDR_ERR) {
2003 adapter->rx_errors++;
2004 slic_rcv_handle_error(adapter, rcvbuf);
2005 slic_rcvqueue_reinsert(adapter, skb);
2006 continue;
2007 }
2008
2009 if (!slic_mac_filter(adapter, (struct ether_header *)
2010 rcvbuf->data)) {
2011 slic_rcvqueue_reinsert(adapter, skb);
2012 continue;
2013 }
2014 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2015 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2016 skb_put(skb, rx_bytes);
2017 netdev->stats.rx_packets++;
2018 netdev->stats.rx_bytes += rx_bytes;
2019 #if SLIC_OFFLOAD_IP_CHECKSUM
2020 skb->ip_summed = CHECKSUM_UNNECESSARY;
2021 #endif
2022
2023 skb->dev = adapter->netdev;
2024 skb->protocol = eth_type_trans(skb, skb->dev);
2025 netif_rx(skb);
2026
2027 ++frames;
2028 #if SLIC_INTERRUPT_PROCESS_LIMIT
2029 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2030 adapter->rcv_interrupt_yields++;
2031 break;
2032 }
2033 #endif
2034 }
2035 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2036 }
2037
2038 static void slic_xmit_complete(struct adapter *adapter)
2039 {
2040 struct slic_hostcmd *hcmd;
2041 struct slic_rspbuf *rspbuf;
2042 u32 frames = 0;
2043 struct slic_handle_word slic_handle_word;
2044
2045 do {
2046 rspbuf = slic_rspqueue_getnext(adapter);
2047 if (!rspbuf)
2048 break;
2049 adapter->xmit_completes++;
2050 adapter->card->events++;
2051 /*
2052 Get the complete host command buffer
2053 */
2054 slic_handle_word.handle_token = rspbuf->hosthandle;
2055 hcmd =
2056 (struct slic_hostcmd *)
2057 adapter->slic_handles[slic_handle_word.handle_index].
2058 address;
2059 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2060 if (hcmd->type == SLIC_CMD_DUMB) {
2061 if (hcmd->skb)
2062 dev_kfree_skb_irq(hcmd->skb);
2063 slic_cmdq_putdone_irq(adapter, hcmd);
2064 }
2065 rspbuf->status = 0;
2066 rspbuf->hosthandle = 0;
2067 frames++;
2068 } while (1);
2069 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2070 }
2071
2072 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2073 struct net_device *dev)
2074 {
2075 if (isr & ~ISR_IO) {
2076 if (isr & ISR_ERR) {
2077 adapter->error_interrupts++;
2078 if (isr & ISR_RMISS) {
2079 int count;
2080 int pre_count;
2081 int errors;
2082
2083 struct slic_rcvqueue *rcvq =
2084 &adapter->rcvqueue;
2085
2086 adapter->error_rmiss_interrupts++;
2087
2088 if (!rcvq->errors)
2089 rcv_count = rcvq->count;
2090 pre_count = rcvq->count;
2091 errors = rcvq->errors;
2092
2093 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2094 count = slic_rcvqueue_fill(adapter);
2095 if (!count)
2096 break;
2097 }
2098 } else if (isr & ISR_XDROP) {
2099 dev_err(&dev->dev,
2100 "isr & ISR_ERR [%x] ISR_XDROP\n", isr);
2101 } else {
2102 dev_err(&dev->dev,
2103 "isr & ISR_ERR [%x]\n",
2104 isr);
2105 }
2106 }
2107
2108 if (isr & ISR_LEVENT) {
2109 adapter->linkevent_interrupts++;
2110 slic_link_event_handler(adapter);
2111 }
2112
2113 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2114 (isr & ISR_UPCBSY)) {
2115 adapter->upr_interrupts++;
2116 slic_upr_request_complete(adapter, isr);
2117 }
2118 }
2119
2120 if (isr & ISR_RCV) {
2121 adapter->rcv_interrupts++;
2122 slic_rcv_handler(adapter);
2123 }
2124
2125 if (isr & ISR_CMD) {
2126 adapter->xmit_interrupts++;
2127 slic_xmit_complete(adapter);
2128 }
2129 }
2130
2131
2132 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2133 {
2134 struct net_device *dev = (struct net_device *)dev_id;
2135 struct adapter *adapter = netdev_priv(dev);
2136 u32 isr;
2137
2138 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2139 slic_reg32_write(&adapter->slic_regs->slic_icr,
2140 ICR_INT_MASK, FLUSH);
2141 isr = adapter->isrcopy = adapter->pshmem->isr;
2142 adapter->pshmem->isr = 0;
2143 adapter->num_isrs++;
2144 switch (adapter->card->state) {
2145 case CARD_UP:
2146 slic_interrupt_card_up(isr, adapter, dev);
2147 break;
2148
2149 case CARD_DOWN:
2150 if ((isr & ISR_UPC) ||
2151 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2152 adapter->upr_interrupts++;
2153 slic_upr_request_complete(adapter, isr);
2154 }
2155 break;
2156 }
2157
2158 adapter->isrcopy = 0;
2159 adapter->all_reg_writes += 2;
2160 adapter->isr_reg_writes++;
2161 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2162 } else {
2163 adapter->false_interrupts++;
2164 }
2165 return IRQ_HANDLED;
2166 }
2167
2168 #define NORMAL_ETHFRAME 0
2169
2170 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2171 {
2172 struct sliccard *card;
2173 struct adapter *adapter = netdev_priv(dev);
2174 struct slic_hostcmd *hcmd = NULL;
2175 u32 status = 0;
2176 void *offloadcmd = NULL;
2177
2178 card = adapter->card;
2179 if ((adapter->linkstate != LINK_UP) ||
2180 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2181 status = XMIT_FAIL_LINK_STATE;
2182 goto xmit_fail;
2183
2184 } else if (skb->len == 0) {
2185 status = XMIT_FAIL_ZERO_LENGTH;
2186 goto xmit_fail;
2187 }
2188
2189 hcmd = slic_cmdq_getfree(adapter);
2190 if (!hcmd) {
2191 adapter->xmitq_full = 1;
2192 status = XMIT_FAIL_HOSTCMD_FAIL;
2193 goto xmit_fail;
2194 }
2195 hcmd->skb = skb;
2196 hcmd->busy = 1;
2197 hcmd->type = SLIC_CMD_DUMB;
2198 slic_xmit_build_request(adapter, hcmd, skb);
2199 dev->stats.tx_packets++;
2200 dev->stats.tx_bytes += skb->len;
2201
2202 #ifdef DEBUG_DUMP
2203 if (adapter->kill_card) {
2204 struct slic_host64_cmd ihcmd;
2205
2206 ihcmd = &hcmd->cmd64;
2207
2208 ihcmd->flags |= 0x40;
2209 adapter->kill_card = 0; /* only do this once */
2210 }
2211 #endif
2212 if (hcmd->paddrh == 0) {
2213 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2214 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2215 } else {
2216 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2217 (hcmd->paddrl | hcmd->cmdsize),
2218 &adapter->slic_regs->slic_addr_upper,
2219 hcmd->paddrh, DONT_FLUSH);
2220 }
2221 xmit_done:
2222 return NETDEV_TX_OK;
2223 xmit_fail:
2224 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2225 goto xmit_done;
2226 }
2227
2228
2229 static void slic_adapter_freeresources(struct adapter *adapter)
2230 {
2231 slic_init_cleanup(adapter);
2232 adapter->error_interrupts = 0;
2233 adapter->rcv_interrupts = 0;
2234 adapter->xmit_interrupts = 0;
2235 adapter->linkevent_interrupts = 0;
2236 adapter->upr_interrupts = 0;
2237 adapter->num_isrs = 0;
2238 adapter->xmit_completes = 0;
2239 adapter->rcv_broadcasts = 0;
2240 adapter->rcv_multicasts = 0;
2241 adapter->rcv_unicasts = 0;
2242 }
2243
2244 static int slic_adapter_allocresources(struct adapter *adapter)
2245 {
2246 if (!adapter->intrregistered) {
2247 int retval;
2248
2249 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2250 slic_global.driver_lock.flags);
2251
2252 retval = request_irq(adapter->netdev->irq,
2253 &slic_interrupt,
2254 IRQF_SHARED,
2255 adapter->netdev->name, adapter->netdev);
2256
2257 spin_lock_irqsave(&slic_global.driver_lock.lock,
2258 slic_global.driver_lock.flags);
2259
2260 if (retval) {
2261 dev_err(&adapter->netdev->dev,
2262 "request_irq (%s) FAILED [%x]\n",
2263 adapter->netdev->name, retval);
2264 return retval;
2265 }
2266 adapter->intrregistered = 1;
2267 }
2268 return 0;
2269 }
2270
2271 /*
2272 * slic_if_init
2273 *
2274 * Perform initialization of our slic interface.
2275 *
2276 */
2277 static int slic_if_init(struct adapter *adapter)
2278 {
2279 struct sliccard *card = adapter->card;
2280 struct net_device *dev = adapter->netdev;
2281 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2282 struct slic_shmem *pshmem;
2283 int rc;
2284
2285 /* adapter should be down at this point */
2286 if (adapter->state != ADAPT_DOWN) {
2287 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2288 __func__);
2289 rc = -EIO;
2290 goto err;
2291 }
2292
2293 adapter->devflags_prev = dev->flags;
2294 adapter->macopts = MAC_DIRECTED;
2295 if (dev->flags) {
2296 if (dev->flags & IFF_BROADCAST)
2297 adapter->macopts |= MAC_BCAST;
2298 if (dev->flags & IFF_PROMISC)
2299 adapter->macopts |= MAC_PROMISC;
2300 if (dev->flags & IFF_ALLMULTI)
2301 adapter->macopts |= MAC_ALLMCAST;
2302 if (dev->flags & IFF_MULTICAST)
2303 adapter->macopts |= MAC_MCAST;
2304 }
2305 rc = slic_adapter_allocresources(adapter);
2306 if (rc) {
2307 dev_err(&dev->dev,
2308 "%s: slic_adapter_allocresources FAILED %x\n",
2309 __func__, rc);
2310 slic_adapter_freeresources(adapter);
2311 goto err;
2312 }
2313
2314 if (!adapter->queues_initialized) {
2315 rc = slic_rspqueue_init(adapter);
2316 if (rc)
2317 goto err;
2318 rc = slic_cmdq_init(adapter);
2319 if (rc)
2320 goto err;
2321 rc = slic_rcvqueue_init(adapter);
2322 if (rc)
2323 goto err;
2324 adapter->queues_initialized = 1;
2325 }
2326
2327 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2328 mdelay(1);
2329
2330 if (!adapter->isp_initialized) {
2331 pshmem = (struct slic_shmem *)(unsigned long)
2332 adapter->phys_shmem;
2333
2334 spin_lock_irqsave(&adapter->bit64reglock.lock,
2335 adapter->bit64reglock.flags);
2336
2337 #if BITS_PER_LONG == 64
2338 slic_reg32_write(&slic_regs->slic_addr_upper,
2339 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2340 slic_reg32_write(&slic_regs->slic_isp,
2341 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2342 #else
2343 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2344 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
2345 #endif
2346 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2347 adapter->bit64reglock.flags);
2348 adapter->isp_initialized = 1;
2349 }
2350
2351 adapter->state = ADAPT_UP;
2352 if (!card->loadtimerset) {
2353 init_timer(&card->loadtimer);
2354 card->loadtimer.expires =
2355 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2356 card->loadtimer.data = (ulong) card;
2357 card->loadtimer.function = &slic_timer_load_check;
2358 add_timer(&card->loadtimer);
2359
2360 card->loadtimerset = 1;
2361 }
2362
2363 if (!adapter->pingtimerset) {
2364 init_timer(&adapter->pingtimer);
2365 adapter->pingtimer.expires =
2366 jiffies + (PING_TIMER_INTERVAL * HZ);
2367 adapter->pingtimer.data = (ulong) dev;
2368 adapter->pingtimer.function = &slic_timer_ping;
2369 add_timer(&adapter->pingtimer);
2370 adapter->pingtimerset = 1;
2371 adapter->card->pingstatus = ISR_PINGMASK;
2372 }
2373
2374 /*
2375 * clear any pending events, then enable interrupts
2376 */
2377 adapter->isrcopy = 0;
2378 adapter->pshmem->isr = 0;
2379 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2380 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2381
2382 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2383 slic_link_event_handler(adapter);
2384
2385 err:
2386 return rc;
2387 }
2388
2389 static int slic_entry_open(struct net_device *dev)
2390 {
2391 struct adapter *adapter = netdev_priv(dev);
2392 struct sliccard *card = adapter->card;
2393 int status;
2394
2395 netif_stop_queue(adapter->netdev);
2396
2397 spin_lock_irqsave(&slic_global.driver_lock.lock,
2398 slic_global.driver_lock.flags);
2399 if (!adapter->activated) {
2400 card->adapters_activated++;
2401 slic_global.num_slic_ports_active++;
2402 adapter->activated = 1;
2403 }
2404 status = slic_if_init(adapter);
2405
2406 if (status != 0) {
2407 if (adapter->activated) {
2408 card->adapters_activated--;
2409 slic_global.num_slic_ports_active--;
2410 adapter->activated = 0;
2411 }
2412 goto spin_unlock;
2413 }
2414 if (!card->master)
2415 card->master = adapter;
2416
2417 spin_unlock:
2418 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2419 slic_global.driver_lock.flags);
2420 return status;
2421 }
2422
2423 static void slic_card_cleanup(struct sliccard *card)
2424 {
2425 if (card->loadtimerset) {
2426 card->loadtimerset = 0;
2427 del_timer_sync(&card->loadtimer);
2428 }
2429
2430 kfree(card);
2431 }
2432
2433 static void slic_entry_remove(struct pci_dev *pcidev)
2434 {
2435 struct net_device *dev = pci_get_drvdata(pcidev);
2436 struct adapter *adapter = netdev_priv(dev);
2437 struct sliccard *card;
2438 struct mcast_address *mcaddr, *mlist;
2439
2440 unregister_netdev(dev);
2441
2442 slic_adapter_freeresources(adapter);
2443 slic_unmap_mmio_space(adapter);
2444
2445 /* free multicast addresses */
2446 mlist = adapter->mcastaddrs;
2447 while (mlist) {
2448 mcaddr = mlist;
2449 mlist = mlist->next;
2450 kfree(mcaddr);
2451 }
2452 card = adapter->card;
2453 card->adapters_allocated--;
2454 adapter->allocated = 0;
2455 if (!card->adapters_allocated) {
2456 struct sliccard *curr_card = slic_global.slic_card;
2457
2458 if (curr_card == card) {
2459 slic_global.slic_card = card->next;
2460 } else {
2461 while (curr_card->next != card)
2462 curr_card = curr_card->next;
2463 curr_card->next = card->next;
2464 }
2465 slic_global.num_slic_cards--;
2466 slic_card_cleanup(card);
2467 }
2468 free_netdev(dev);
2469 pci_release_regions(pcidev);
2470 pci_disable_device(pcidev);
2471 }
2472
2473 static int slic_entry_halt(struct net_device *dev)
2474 {
2475 struct adapter *adapter = netdev_priv(dev);
2476 struct sliccard *card = adapter->card;
2477 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2478
2479 spin_lock_irqsave(&slic_global.driver_lock.lock,
2480 slic_global.driver_lock.flags);
2481 netif_stop_queue(adapter->netdev);
2482 adapter->state = ADAPT_DOWN;
2483 adapter->linkstate = LINK_DOWN;
2484 adapter->upr_list = NULL;
2485 adapter->upr_busy = 0;
2486 adapter->devflags_prev = 0;
2487 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2488 adapter->all_reg_writes++;
2489 adapter->icr_reg_writes++;
2490 slic_config_clear(adapter);
2491 if (adapter->activated) {
2492 card->adapters_activated--;
2493 slic_global.num_slic_ports_active--;
2494 adapter->activated = 0;
2495 }
2496 #ifdef AUTOMATIC_RESET
2497 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2498 #endif
2499 /*
2500 * Reset the adapter's cmd queues
2501 */
2502 slic_cmdq_reset(adapter);
2503
2504 #ifdef AUTOMATIC_RESET
2505 if (!card->adapters_activated)
2506 slic_card_init(card, adapter);
2507 #endif
2508
2509 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2510 slic_global.driver_lock.flags);
2511 return 0;
2512 }
2513
2514 static struct net_device_stats *slic_get_stats(struct net_device *dev)
2515 {
2516 struct adapter *adapter = netdev_priv(dev);
2517
2518 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2519 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2520 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2521 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2522 dev->stats.tx_heartbeat_errors = 0;
2523 dev->stats.tx_aborted_errors = 0;
2524 dev->stats.tx_window_errors = 0;
2525 dev->stats.tx_fifo_errors = 0;
2526 dev->stats.rx_frame_errors = 0;
2527 dev->stats.rx_length_errors = 0;
2528
2529 return &dev->stats;
2530 }
2531
2532 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2533 {
2534 struct adapter *adapter = netdev_priv(dev);
2535 struct ethtool_cmd edata;
2536 struct ethtool_cmd ecmd;
2537 u32 data[7];
2538 u32 intagg;
2539
2540 switch (cmd) {
2541 case SIOCSLICSETINTAGG:
2542 if (copy_from_user(data, rq->ifr_data, 28))
2543 return -EFAULT;
2544 intagg = data[0];
2545 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
2546 __func__, intagg);
2547 slic_intagg_set(adapter, intagg);
2548 return 0;
2549
2550 #ifdef SLIC_TRACE_DUMP_ENABLED
2551 case SIOCSLICTRACEDUMP:
2552 {
2553 u32 value;
2554
2555 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
2556
2557 if (copy_from_user(data, rq->ifr_data, 28)) {
2558 PRINT_ERROR
2559 ("slic: copy_from_user FAILED getting initial simba param\n");
2560 return -EFAULT;
2561 }
2562
2563 value = data[0];
2564 if (tracemon_request == SLIC_DUMP_DONE) {
2565 PRINT_ERROR
2566 ("ATK Diagnostic Trace Dump Requested\n");
2567 tracemon_request = SLIC_DUMP_REQUESTED;
2568 tracemon_request_type = value;
2569 tracemon_timestamp = jiffies;
2570 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
2571 (tracemon_request ==
2572 SLIC_DUMP_IN_PROGRESS)) {
2573 PRINT_ERROR
2574 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
2575 } else {
2576 PRINT_ERROR
2577 ("ATK Diagnostic Trace Dump Requested\n");
2578 tracemon_request = SLIC_DUMP_REQUESTED;
2579 tracemon_request_type = value;
2580 tracemon_timestamp = jiffies;
2581 }
2582 return 0;
2583 }
2584 #endif
2585 case SIOCETHTOOL:
2586 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2587 return -EFAULT;
2588
2589 if (ecmd.cmd == ETHTOOL_GSET) {
2590 memset(&edata, 0, sizeof(edata));
2591 edata.supported = (SUPPORTED_10baseT_Half |
2592 SUPPORTED_10baseT_Full |
2593 SUPPORTED_100baseT_Half |
2594 SUPPORTED_100baseT_Full |
2595 SUPPORTED_Autoneg | SUPPORTED_MII);
2596 edata.port = PORT_MII;
2597 edata.transceiver = XCVR_INTERNAL;
2598 edata.phy_address = 0;
2599 if (adapter->linkspeed == LINK_100MB)
2600 edata.speed = SPEED_100;
2601 else if (adapter->linkspeed == LINK_10MB)
2602 edata.speed = SPEED_10;
2603 else
2604 edata.speed = 0;
2605
2606 if (adapter->linkduplex == LINK_FULLD)
2607 edata.duplex = DUPLEX_FULL;
2608 else
2609 edata.duplex = DUPLEX_HALF;
2610
2611 edata.autoneg = AUTONEG_ENABLE;
2612 edata.maxtxpkt = 1;
2613 edata.maxrxpkt = 1;
2614 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2615 return -EFAULT;
2616
2617 } else if (ecmd.cmd == ETHTOOL_SSET) {
2618 if (!capable(CAP_NET_ADMIN))
2619 return -EPERM;
2620
2621 if (adapter->linkspeed == LINK_100MB)
2622 edata.speed = SPEED_100;
2623 else if (adapter->linkspeed == LINK_10MB)
2624 edata.speed = SPEED_10;
2625 else
2626 edata.speed = 0;
2627
2628 if (adapter->linkduplex == LINK_FULLD)
2629 edata.duplex = DUPLEX_FULL;
2630 else
2631 edata.duplex = DUPLEX_HALF;
2632
2633 edata.autoneg = AUTONEG_ENABLE;
2634 edata.maxtxpkt = 1;
2635 edata.maxrxpkt = 1;
2636 if ((ecmd.speed != edata.speed) ||
2637 (ecmd.duplex != edata.duplex)) {
2638 u32 speed;
2639 u32 duplex;
2640
2641 if (ecmd.speed == SPEED_10)
2642 speed = 0;
2643 else
2644 speed = PCR_SPEED_100;
2645 if (ecmd.duplex == DUPLEX_FULL)
2646 duplex = PCR_DUPLEX_FULL;
2647 else
2648 duplex = 0;
2649 slic_link_config(adapter, speed, duplex);
2650 slic_link_event_handler(adapter);
2651 }
2652 }
2653 return 0;
2654 default:
2655 return -EOPNOTSUPP;
2656 }
2657 }
2658
2659 static void slic_config_pci(struct pci_dev *pcidev)
2660 {
2661 u16 pci_command;
2662 u16 new_command;
2663
2664 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2665
2666 new_command = pci_command | PCI_COMMAND_MASTER
2667 | PCI_COMMAND_MEMORY
2668 | PCI_COMMAND_INVALIDATE
2669 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2670 if (pci_command != new_command)
2671 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2672 }
2673
2674 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2675 {
2676 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2677 struct slic_eeprom *peeprom;
2678 struct oslic_eeprom *pOeeprom;
2679 dma_addr_t phys_config;
2680 u32 phys_configh;
2681 u32 phys_configl;
2682 u32 i = 0;
2683 struct slic_shmem *pshmem;
2684 int status;
2685 uint macaddrs = card->card_size;
2686 ushort eecodesize;
2687 ushort dramsize;
2688 ushort ee_chksum;
2689 ushort calc_chksum;
2690 struct slic_config_mac *pmac;
2691 unsigned char fruformat;
2692 unsigned char oemfruformat;
2693 struct atk_fru *patkfru;
2694 union oemfru *poemfru;
2695
2696 /* Reset everything except PCI configuration space */
2697 slic_soft_reset(adapter);
2698
2699 /* Download the microcode */
2700 status = slic_card_download(adapter);
2701 if (status)
2702 return status;
2703
2704 if (!card->config_set) {
2705 peeprom = pci_alloc_consistent(adapter->pcidev,
2706 sizeof(struct slic_eeprom),
2707 &phys_config);
2708
2709 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2710 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2711
2712 if (!peeprom) {
2713 dev_err(&adapter->pcidev->dev,
2714 "Failed to allocate DMA memory for EEPROM.\n");
2715 return -ENOMEM;
2716 }
2717
2718 memset(peeprom, 0, sizeof(struct slic_eeprom));
2719
2720 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2721 mdelay(1);
2722 pshmem = (struct slic_shmem *)(unsigned long)
2723 adapter->phys_shmem;
2724
2725 spin_lock_irqsave(&adapter->bit64reglock.lock,
2726 adapter->bit64reglock.flags);
2727 slic_reg32_write(&slic_regs->slic_addr_upper,
2728 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2729 slic_reg32_write(&slic_regs->slic_isp,
2730 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2731 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2732 adapter->bit64reglock.flags);
2733
2734 status = slic_config_get(adapter, phys_configl, phys_configh);
2735 if (status) {
2736 dev_err(&adapter->pcidev->dev,
2737 "Failed to fetch config data from device.\n");
2738 goto card_init_err;
2739 }
2740
2741 for (;;) {
2742 if (adapter->pshmem->isr) {
2743 if (adapter->pshmem->isr & ISR_UPC) {
2744 adapter->pshmem->isr = 0;
2745 slic_reg64_write(adapter,
2746 &slic_regs->slic_isp, 0,
2747 &slic_regs->slic_addr_upper,
2748 0, FLUSH);
2749 slic_reg32_write(&slic_regs->slic_isr,
2750 0, FLUSH);
2751
2752 slic_upr_request_complete(adapter, 0);
2753 break;
2754 }
2755
2756 adapter->pshmem->isr = 0;
2757 slic_reg32_write(&slic_regs->slic_isr,
2758 0, FLUSH);
2759 } else {
2760 mdelay(1);
2761 i++;
2762 if (i > 5000) {
2763 dev_err(&adapter->pcidev->dev,
2764 "Fetch of config data timed out.\n");
2765 slic_reg64_write(adapter,
2766 &slic_regs->slic_isp, 0,
2767 &slic_regs->slic_addr_upper,
2768 0, FLUSH);
2769 status = -EINVAL;
2770 goto card_init_err;
2771 }
2772 }
2773 }
2774
2775 switch (adapter->devid) {
2776 /* Oasis card */
2777 case SLIC_2GB_DEVICE_ID:
2778 /* extract EEPROM data and pointers to EEPROM data */
2779 pOeeprom = (struct oslic_eeprom *) peeprom;
2780 eecodesize = pOeeprom->EecodeSize;
2781 dramsize = pOeeprom->DramSize;
2782 pmac = pOeeprom->MacInfo;
2783 fruformat = pOeeprom->FruFormat;
2784 patkfru = &pOeeprom->AtkFru;
2785 oemfruformat = pOeeprom->OemFruFormat;
2786 poemfru = &pOeeprom->OemFru;
2787 macaddrs = 2;
2788 /* Minor kludge for Oasis card
2789 get 2 MAC addresses from the
2790 EEPROM to ensure that function 1
2791 gets the Port 1 MAC address */
2792 break;
2793 default:
2794 /* extract EEPROM data and pointers to EEPROM data */
2795 eecodesize = peeprom->EecodeSize;
2796 dramsize = peeprom->DramSize;
2797 pmac = peeprom->u2.mac.MacInfo;
2798 fruformat = peeprom->FruFormat;
2799 patkfru = &peeprom->AtkFru;
2800 oemfruformat = peeprom->OemFruFormat;
2801 poemfru = &peeprom->OemFru;
2802 break;
2803 }
2804
2805 card->config.EepromValid = false;
2806
2807 /* see if the EEPROM is valid by checking it's checksum */
2808 if ((eecodesize <= MAX_EECODE_SIZE) &&
2809 (eecodesize >= MIN_EECODE_SIZE)) {
2810
2811 ee_chksum =
2812 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2813 /*
2814 calculate the EEPROM checksum
2815 */
2816 calc_chksum = slic_eeprom_cksum(peeprom,
2817 eecodesize - 2);
2818 /*
2819 if the ucdoe chksum flag bit worked,
2820 we wouldn't need this
2821 */
2822 if (ee_chksum == calc_chksum)
2823 card->config.EepromValid = true;
2824 }
2825 /* copy in the DRAM size */
2826 card->config.DramSize = dramsize;
2827
2828 /* copy in the MAC address(es) */
2829 for (i = 0; i < macaddrs; i++) {
2830 memcpy(&card->config.MacInfo[i],
2831 &pmac[i], sizeof(struct slic_config_mac));
2832 }
2833
2834 /* copy the Alacritech FRU information */
2835 card->config.FruFormat = fruformat;
2836 memcpy(&card->config.AtkFru, patkfru,
2837 sizeof(struct atk_fru));
2838
2839 pci_free_consistent(adapter->pcidev,
2840 sizeof(struct slic_eeprom),
2841 peeprom, phys_config);
2842
2843 if (!card->config.EepromValid) {
2844 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2845 &slic_regs->slic_addr_upper,
2846 0, FLUSH);
2847 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2848 return -EINVAL;
2849 }
2850
2851 card->config_set = 1;
2852 }
2853
2854 status = slic_card_download_gbrcv(adapter);
2855 if (status)
2856 return status;
2857
2858 if (slic_global.dynamic_intagg)
2859 slic_intagg_set(adapter, 0);
2860 else
2861 slic_intagg_set(adapter, intagg_delay);
2862
2863 /*
2864 * Initialize ping status to "ok"
2865 */
2866 card->pingstatus = ISR_PINGMASK;
2867
2868 /*
2869 * Lastly, mark our card state as up and return success
2870 */
2871 card->state = CARD_UP;
2872 card->reset_in_progress = 0;
2873
2874 return 0;
2875
2876 card_init_err:
2877 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2878 peeprom, phys_config);
2879 return status;
2880 }
2881
2882 static void slic_init_driver(void)
2883 {
2884 if (slic_first_init) {
2885 slic_first_init = 0;
2886 spin_lock_init(&slic_global.driver_lock.lock);
2887 }
2888 }
2889
2890 static void slic_init_adapter(struct net_device *netdev,
2891 struct pci_dev *pcidev,
2892 const struct pci_device_id *pci_tbl_entry,
2893 void __iomem *memaddr, int chip_idx)
2894 {
2895 ushort index;
2896 struct slic_handle *pslic_handle;
2897 struct adapter *adapter = netdev_priv(netdev);
2898
2899 /* adapter->pcidev = pcidev;*/
2900 adapter->vendid = pci_tbl_entry->vendor;
2901 adapter->devid = pci_tbl_entry->device;
2902 adapter->subsysid = pci_tbl_entry->subdevice;
2903 adapter->busnumber = pcidev->bus->number;
2904 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2905 adapter->functionnumber = (pcidev->devfn & 0x7);
2906 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
2907 adapter->irq = pcidev->irq;
2908 /* adapter->netdev = netdev;*/
2909 adapter->chipid = chip_idx;
2910 adapter->port = 0; /*adapter->functionnumber;*/
2911 adapter->cardindex = adapter->port;
2912 spin_lock_init(&adapter->upr_lock.lock);
2913 spin_lock_init(&adapter->bit64reglock.lock);
2914 spin_lock_init(&adapter->adapter_lock.lock);
2915 spin_lock_init(&adapter->reset_lock.lock);
2916 spin_lock_init(&adapter->handle_lock.lock);
2917
2918 adapter->card_size = 1;
2919 /*
2920 Initialize slic_handle array
2921 */
2922 /*
2923 Start with 1. 0 is an invalid host handle.
2924 */
2925 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2926 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2927
2928 pslic_handle->token.handle_index = index;
2929 pslic_handle->type = SLIC_HANDLE_FREE;
2930 pslic_handle->next = adapter->pfree_slic_handles;
2931 adapter->pfree_slic_handles = pslic_handle;
2932 }
2933 adapter->pshmem = (struct slic_shmem *)
2934 pci_alloc_consistent(adapter->pcidev,
2935 sizeof(struct slic_shmem),
2936 &adapter->
2937 phys_shmem);
2938 if (adapter->pshmem)
2939 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
2940 }
2941
2942 static const struct net_device_ops slic_netdev_ops = {
2943 .ndo_open = slic_entry_open,
2944 .ndo_stop = slic_entry_halt,
2945 .ndo_start_xmit = slic_xmit_start,
2946 .ndo_do_ioctl = slic_ioctl,
2947 .ndo_set_mac_address = slic_mac_set_address,
2948 .ndo_get_stats = slic_get_stats,
2949 .ndo_set_rx_mode = slic_mcast_set_list,
2950 .ndo_validate_addr = eth_validate_addr,
2951 .ndo_change_mtu = eth_change_mtu,
2952 };
2953
2954 static u32 slic_card_locate(struct adapter *adapter)
2955 {
2956 struct sliccard *card = slic_global.slic_card;
2957 struct physcard *physcard = slic_global.phys_card;
2958 ushort card_hostid;
2959 u16 __iomem *hostid_reg;
2960 uint i;
2961 uint rdhostid_offset = 0;
2962
2963 switch (adapter->devid) {
2964 case SLIC_2GB_DEVICE_ID:
2965 rdhostid_offset = SLIC_RDHOSTID_2GB;
2966 break;
2967 case SLIC_1GB_DEVICE_ID:
2968 rdhostid_offset = SLIC_RDHOSTID_1GB;
2969 break;
2970 default:
2971 return -ENODEV;
2972 }
2973
2974 hostid_reg =
2975 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2976 rdhostid_offset);
2977
2978 /* read the 16 bit hostid from SRAM */
2979 card_hostid = (ushort) readw(hostid_reg);
2980
2981 /* Initialize a new card structure if need be */
2982 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2983 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2984 if (card == NULL)
2985 return -ENOMEM;
2986
2987 card->next = slic_global.slic_card;
2988 slic_global.slic_card = card;
2989 card->busnumber = adapter->busnumber;
2990 card->slotnumber = adapter->slotnumber;
2991
2992 /* Find an available cardnum */
2993 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2994 if (slic_global.cardnuminuse[i] == 0) {
2995 slic_global.cardnuminuse[i] = 1;
2996 card->cardnum = i;
2997 break;
2998 }
2999 }
3000 slic_global.num_slic_cards++;
3001 } else {
3002 /* Card exists, find the card this adapter belongs to */
3003 while (card) {
3004 if (card->cardnum == card_hostid)
3005 break;
3006 card = card->next;
3007 }
3008 }
3009
3010 if (!card)
3011 return -ENXIO;
3012 /* Put the adapter in the card's adapter list */
3013 if (!card->adapter[adapter->port]) {
3014 card->adapter[adapter->port] = adapter;
3015 adapter->card = card;
3016 }
3017
3018 card->card_size = 1; /* one port per *logical* card */
3019
3020 while (physcard) {
3021 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3022 if (physcard->adapter[i])
3023 break;
3024 }
3025 if (i == SLIC_MAX_PORTS)
3026 break;
3027
3028 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3029 break;
3030 physcard = physcard->next;
3031 }
3032 if (!physcard) {
3033 /* no structure allocated for this physical card yet */
3034 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
3035 if (!physcard) {
3036 if (card_hostid == SLIC_HOSTID_DEFAULT)
3037 kfree(card);
3038 return -ENOMEM;
3039 }
3040
3041 physcard->next = slic_global.phys_card;
3042 slic_global.phys_card = physcard;
3043 physcard->adapters_allocd = 1;
3044 } else {
3045 physcard->adapters_allocd++;
3046 }
3047 /* Note - this is ZERO relative */
3048 adapter->physport = physcard->adapters_allocd - 1;
3049
3050 physcard->adapter[adapter->physport] = adapter;
3051 adapter->physcard = physcard;
3052
3053 return 0;
3054 }
3055
3056 static int slic_entry_probe(struct pci_dev *pcidev,
3057 const struct pci_device_id *pci_tbl_entry)
3058 {
3059 static int cards_found;
3060 static int did_version;
3061 int err = -ENODEV;
3062 struct net_device *netdev;
3063 struct adapter *adapter;
3064 void __iomem *memmapped_ioaddr = NULL;
3065 ulong mmio_start = 0;
3066 ulong mmio_len = 0;
3067 struct sliccard *card = NULL;
3068 int pci_using_dac = 0;
3069
3070 slic_global.dynamic_intagg = dynamic_intagg;
3071
3072 err = pci_enable_device(pcidev);
3073
3074 if (err)
3075 return err;
3076
3077 if (did_version++ == 0) {
3078 dev_info(&pcidev->dev, "%s\n", slic_banner);
3079 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
3080 }
3081
3082 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3083 pci_using_dac = 1;
3084 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3085 if (err) {
3086 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3087 goto err_out_disable_pci;
3088 }
3089 } else {
3090 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3091 if (err) {
3092 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3093 goto err_out_disable_pci;
3094 }
3095 pci_using_dac = 0;
3096 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3097 }
3098
3099 err = pci_request_regions(pcidev, DRV_NAME);
3100 if (err) {
3101 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3102 goto err_out_disable_pci;
3103 }
3104
3105 pci_set_master(pcidev);
3106
3107 netdev = alloc_etherdev(sizeof(struct adapter));
3108 if (!netdev) {
3109 err = -ENOMEM;
3110 goto err_out_exit_slic_probe;
3111 }
3112
3113 SET_NETDEV_DEV(netdev, &pcidev->dev);
3114
3115 pci_set_drvdata(pcidev, netdev);
3116 adapter = netdev_priv(netdev);
3117 adapter->netdev = netdev;
3118 adapter->pcidev = pcidev;
3119 if (pci_using_dac)
3120 netdev->features |= NETIF_F_HIGHDMA;
3121
3122 mmio_start = pci_resource_start(pcidev, 0);
3123 mmio_len = pci_resource_len(pcidev, 0);
3124
3125
3126 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3127 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3128 if (!memmapped_ioaddr) {
3129 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3130 mmio_len, mmio_start);
3131 err = -ENOMEM;
3132 goto err_out_free_netdev;
3133 }
3134
3135 slic_config_pci(pcidev);
3136
3137 slic_init_driver();
3138
3139 slic_init_adapter(netdev,
3140 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3141
3142 err = slic_card_locate(adapter);
3143 if (err) {
3144 dev_err(&pcidev->dev, "cannot locate card\n");
3145 goto err_out_unmap;
3146 }
3147
3148 card = adapter->card;
3149
3150 if (!adapter->allocated) {
3151 card->adapters_allocated++;
3152 adapter->allocated = 1;
3153 }
3154
3155 err = slic_card_init(card, adapter);
3156 if (err)
3157 goto err_out_unmap;
3158
3159 slic_adapter_set_hwaddr(adapter);
3160
3161 netdev->base_addr = (unsigned long) memmapped_ioaddr;
3162 netdev->irq = adapter->irq;
3163 netdev->netdev_ops = &slic_netdev_ops;
3164
3165 strcpy(netdev->name, "eth%d");
3166 err = register_netdev(netdev);
3167 if (err) {
3168 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3169 goto err_out_unmap;
3170 }
3171
3172 cards_found++;
3173
3174 return 0;
3175
3176 err_out_unmap:
3177 iounmap(memmapped_ioaddr);
3178 err_out_free_netdev:
3179 free_netdev(netdev);
3180 err_out_exit_slic_probe:
3181 pci_release_regions(pcidev);
3182 err_out_disable_pci:
3183 pci_disable_device(pcidev);
3184 return err;
3185 }
3186
3187 static struct pci_driver slic_driver = {
3188 .name = DRV_NAME,
3189 .id_table = slic_pci_tbl,
3190 .probe = slic_entry_probe,
3191 .remove = slic_entry_remove,
3192 };
3193
3194 static int __init slic_module_init(void)
3195 {
3196 slic_init_driver();
3197
3198 return pci_register_driver(&slic_driver);
3199 }
3200
3201 static void __exit slic_module_cleanup(void)
3202 {
3203 pci_unregister_driver(&slic_driver);
3204 }
3205
3206 module_init(slic_module_init);
3207 module_exit(slic_module_cleanup);
Linux with added FPC-III support