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e1000e: Avoid wrong check on TX hang
[linux/fpc-iii.git] / drivers / net / e1000e / netdev.c
blob5430a9a4a28c207b8781b2c33f1d3e30cefbc9b1
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/vmalloc.h>
36 #include <linux/pagemap.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/tcp.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/mii.h>
45 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/cpu.h>
48 #include <linux/smp.h>
49 #include <linux/pm_qos_params.h>
50 #include <linux/pm_runtime.h>
51 #include <linux/aer.h>
52 #include <linux/prefetch.h>
53
54 #include "e1000.h"
55
56 #define DRV_EXTRAVERSION "-k2"
57
58 #define DRV_VERSION "1.3.10" DRV_EXTRAVERSION
59 char e1000e_driver_name[] = "e1000e";
60 const char e1000e_driver_version[] = DRV_VERSION;
61
62 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
63
64 static const struct e1000_info *e1000_info_tbl[] = {
65 [board_82571] = &e1000_82571_info,
66 [board_82572] = &e1000_82572_info,
67 [board_82573] = &e1000_82573_info,
68 [board_82574] = &e1000_82574_info,
69 [board_82583] = &e1000_82583_info,
70 [board_80003es2lan] = &e1000_es2_info,
71 [board_ich8lan] = &e1000_ich8_info,
72 [board_ich9lan] = &e1000_ich9_info,
73 [board_ich10lan] = &e1000_ich10_info,
74 [board_pchlan] = &e1000_pch_info,
75 [board_pch2lan] = &e1000_pch2_info,
76 };
77
78 struct e1000_reg_info {
79 u32 ofs;
80 char *name;
81 };
82
83 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
84 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
85 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
86 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
87 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
88
89 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
90 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
91 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
92 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
93 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
94
95 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
96
97 /* General Registers */
98 {E1000_CTRL, "CTRL"},
99 {E1000_STATUS, "STATUS"},
100 {E1000_CTRL_EXT, "CTRL_EXT"},
101
102 /* Interrupt Registers */
103 {E1000_ICR, "ICR"},
104
105 /* Rx Registers */
106 {E1000_RCTL, "RCTL"},
107 {E1000_RDLEN, "RDLEN"},
108 {E1000_RDH, "RDH"},
109 {E1000_RDT, "RDT"},
110 {E1000_RDTR, "RDTR"},
111 {E1000_RXDCTL(0), "RXDCTL"},
112 {E1000_ERT, "ERT"},
113 {E1000_RDBAL, "RDBAL"},
114 {E1000_RDBAH, "RDBAH"},
115 {E1000_RDFH, "RDFH"},
116 {E1000_RDFT, "RDFT"},
117 {E1000_RDFHS, "RDFHS"},
118 {E1000_RDFTS, "RDFTS"},
119 {E1000_RDFPC, "RDFPC"},
120
121 /* Tx Registers */
122 {E1000_TCTL, "TCTL"},
123 {E1000_TDBAL, "TDBAL"},
124 {E1000_TDBAH, "TDBAH"},
125 {E1000_TDLEN, "TDLEN"},
126 {E1000_TDH, "TDH"},
127 {E1000_TDT, "TDT"},
128 {E1000_TIDV, "TIDV"},
129 {E1000_TXDCTL(0), "TXDCTL"},
130 {E1000_TADV, "TADV"},
131 {E1000_TARC(0), "TARC"},
132 {E1000_TDFH, "TDFH"},
133 {E1000_TDFT, "TDFT"},
134 {E1000_TDFHS, "TDFHS"},
135 {E1000_TDFTS, "TDFTS"},
136 {E1000_TDFPC, "TDFPC"},
137
138 /* List Terminator */
139 {}
140 };
141
142 /*
143 * e1000_regdump - register printout routine
144 */
145 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
146 {
147 int n = 0;
148 char rname[16];
149 u32 regs[8];
150
151 switch (reginfo->ofs) {
152 case E1000_RXDCTL(0):
153 for (n = 0; n < 2; n++)
154 regs[n] = __er32(hw, E1000_RXDCTL(n));
155 break;
156 case E1000_TXDCTL(0):
157 for (n = 0; n < 2; n++)
158 regs[n] = __er32(hw, E1000_TXDCTL(n));
159 break;
160 case E1000_TARC(0):
161 for (n = 0; n < 2; n++)
162 regs[n] = __er32(hw, E1000_TARC(n));
163 break;
164 default:
165 printk(KERN_INFO "%-15s %08x\n",
166 reginfo->name, __er32(hw, reginfo->ofs));
167 return;
168 }
169
170 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
171 printk(KERN_INFO "%-15s ", rname);
172 for (n = 0; n < 2; n++)
173 printk(KERN_CONT "%08x ", regs[n]);
174 printk(KERN_CONT "\n");
175 }
176
177 /*
178 * e1000e_dump - Print registers, Tx-ring and Rx-ring
179 */
180 static void e1000e_dump(struct e1000_adapter *adapter)
181 {
182 struct net_device *netdev = adapter->netdev;
183 struct e1000_hw *hw = &adapter->hw;
184 struct e1000_reg_info *reginfo;
185 struct e1000_ring *tx_ring = adapter->tx_ring;
186 struct e1000_tx_desc *tx_desc;
187 struct my_u0 {
188 u64 a;
189 u64 b;
190 } *u0;
191 struct e1000_buffer *buffer_info;
192 struct e1000_ring *rx_ring = adapter->rx_ring;
193 union e1000_rx_desc_packet_split *rx_desc_ps;
194 struct e1000_rx_desc *rx_desc;
195 struct my_u1 {
196 u64 a;
197 u64 b;
198 u64 c;
199 u64 d;
200 } *u1;
201 u32 staterr;
202 int i = 0;
203
204 if (!netif_msg_hw(adapter))
205 return;
206
207 /* Print netdevice Info */
208 if (netdev) {
209 dev_info(&adapter->pdev->dev, "Net device Info\n");
210 printk(KERN_INFO "Device Name state "
211 "trans_start last_rx\n");
212 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
213 netdev->name, netdev->state, netdev->trans_start,
214 netdev->last_rx);
215 }
216
217 /* Print Registers */
218 dev_info(&adapter->pdev->dev, "Register Dump\n");
219 printk(KERN_INFO " Register Name Value\n");
220 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
221 reginfo->name; reginfo++) {
222 e1000_regdump(hw, reginfo);
223 }
224
225 /* Print Tx Ring Summary */
226 if (!netdev || !netif_running(netdev))
227 goto exit;
228
229 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
230 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
231 " leng ntw timestamp\n");
232 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
233 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
234 0, tx_ring->next_to_use, tx_ring->next_to_clean,
235 (unsigned long long)buffer_info->dma,
236 buffer_info->length,
237 buffer_info->next_to_watch,
238 (unsigned long long)buffer_info->time_stamp);
239
240 /* Print Tx Ring */
241 if (!netif_msg_tx_done(adapter))
242 goto rx_ring_summary;
243
244 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
245
246 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
247 *
248 * Legacy Transmit Descriptor
249 * +--------------------------------------------------------------+
250 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
251 * +--------------------------------------------------------------+
252 * 8 | Special | CSS | Status | CMD | CSO | Length |
253 * +--------------------------------------------------------------+
254 * 63 48 47 36 35 32 31 24 23 16 15 0
255 *
256 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
257 * 63 48 47 40 39 32 31 16 15 8 7 0
258 * +----------------------------------------------------------------+
259 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
260 * +----------------------------------------------------------------+
261 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
262 * +----------------------------------------------------------------+
263 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
264 *
265 * Extended Data Descriptor (DTYP=0x1)
266 * +----------------------------------------------------------------+
267 * 0 | Buffer Address [63:0] |
268 * +----------------------------------------------------------------+
269 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
270 * +----------------------------------------------------------------+
271 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
272 */
273 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
274 " [bi->dma ] leng ntw timestamp bi->skb "
275 "<-- Legacy format\n");
276 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
277 " [bi->dma ] leng ntw timestamp bi->skb "
278 "<-- Ext Context format\n");
279 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
280 " [bi->dma ] leng ntw timestamp bi->skb "
281 "<-- Ext Data format\n");
282 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
283 tx_desc = E1000_TX_DESC(*tx_ring, i);
284 buffer_info = &tx_ring->buffer_info[i];
285 u0 = (struct my_u0 *)tx_desc;
286 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
287 "%04X %3X %016llX %p",
288 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
289 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
290 (unsigned long long)le64_to_cpu(u0->a),
291 (unsigned long long)le64_to_cpu(u0->b),
292 (unsigned long long)buffer_info->dma,
293 buffer_info->length, buffer_info->next_to_watch,
294 (unsigned long long)buffer_info->time_stamp,
295 buffer_info->skb);
296 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
297 printk(KERN_CONT " NTC/U\n");
298 else if (i == tx_ring->next_to_use)
299 printk(KERN_CONT " NTU\n");
300 else if (i == tx_ring->next_to_clean)
301 printk(KERN_CONT " NTC\n");
302 else
303 printk(KERN_CONT "\n");
304
305 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
306 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
307 16, 1, phys_to_virt(buffer_info->dma),
308 buffer_info->length, true);
309 }
310
311 /* Print Rx Ring Summary */
312 rx_ring_summary:
313 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
314 printk(KERN_INFO "Queue [NTU] [NTC]\n");
315 printk(KERN_INFO " %5d %5X %5X\n", 0,
316 rx_ring->next_to_use, rx_ring->next_to_clean);
317
318 /* Print Rx Ring */
319 if (!netif_msg_rx_status(adapter))
320 goto exit;
321
322 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
323 switch (adapter->rx_ps_pages) {
324 case 1:
325 case 2:
326 case 3:
327 /* [Extended] Packet Split Receive Descriptor Format
328 *
329 * +-----------------------------------------------------+
330 * 0 | Buffer Address 0 [63:0] |
331 * +-----------------------------------------------------+
332 * 8 | Buffer Address 1 [63:0] |
333 * +-----------------------------------------------------+
334 * 16 | Buffer Address 2 [63:0] |
335 * +-----------------------------------------------------+
336 * 24 | Buffer Address 3 [63:0] |
337 * +-----------------------------------------------------+
338 */
339 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
340 "[buffer 1 63:0 ] "
341 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
342 "[bi->skb] <-- Ext Pkt Split format\n");
343 /* [Extended] Receive Descriptor (Write-Back) Format
344 *
345 * 63 48 47 32 31 13 12 8 7 4 3 0
346 * +------------------------------------------------------+
347 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
348 * | Checksum | Ident | | Queue | | Type |
349 * +------------------------------------------------------+
350 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
351 * +------------------------------------------------------+
352 * 63 48 47 32 31 20 19 0
353 */
354 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
355 "[vl l0 ee es] "
356 "[ l3 l2 l1 hs] [reserved ] ---------------- "
357 "[bi->skb] <-- Ext Rx Write-Back format\n");
358 for (i = 0; i < rx_ring->count; i++) {
359 buffer_info = &rx_ring->buffer_info[i];
360 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
361 u1 = (struct my_u1 *)rx_desc_ps;
362 staterr =
363 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
364 if (staterr & E1000_RXD_STAT_DD) {
365 /* Descriptor Done */
366 printk(KERN_INFO "RWB[0x%03X] %016llX "
367 "%016llX %016llX %016llX "
368 "---------------- %p", i,
369 (unsigned long long)le64_to_cpu(u1->a),
370 (unsigned long long)le64_to_cpu(u1->b),
371 (unsigned long long)le64_to_cpu(u1->c),
372 (unsigned long long)le64_to_cpu(u1->d),
373 buffer_info->skb);
374 } else {
375 printk(KERN_INFO "R [0x%03X] %016llX "
376 "%016llX %016llX %016llX %016llX %p", i,
377 (unsigned long long)le64_to_cpu(u1->a),
378 (unsigned long long)le64_to_cpu(u1->b),
379 (unsigned long long)le64_to_cpu(u1->c),
380 (unsigned long long)le64_to_cpu(u1->d),
381 (unsigned long long)buffer_info->dma,
382 buffer_info->skb);
383
384 if (netif_msg_pktdata(adapter))
385 print_hex_dump(KERN_INFO, "",
386 DUMP_PREFIX_ADDRESS, 16, 1,
387 phys_to_virt(buffer_info->dma),
388 adapter->rx_ps_bsize0, true);
389 }
390
391 if (i == rx_ring->next_to_use)
392 printk(KERN_CONT " NTU\n");
393 else if (i == rx_ring->next_to_clean)
394 printk(KERN_CONT " NTC\n");
395 else
396 printk(KERN_CONT "\n");
397 }
398 break;
399 default:
400 case 0:
401 /* Legacy Receive Descriptor Format
402 *
403 * +-----------------------------------------------------+
404 * | Buffer Address [63:0] |
405 * +-----------------------------------------------------+
406 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
407 * +-----------------------------------------------------+
408 * 63 48 47 40 39 32 31 16 15 0
409 */
410 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
411 "[vl er S cks ln] [bi->dma ] [bi->skb] "
412 "<-- Legacy format\n");
413 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
414 rx_desc = E1000_RX_DESC(*rx_ring, i);
415 buffer_info = &rx_ring->buffer_info[i];
416 u0 = (struct my_u0 *)rx_desc;
417 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
418 "%016llX %p", i,
419 (unsigned long long)le64_to_cpu(u0->a),
420 (unsigned long long)le64_to_cpu(u0->b),
421 (unsigned long long)buffer_info->dma,
422 buffer_info->skb);
423 if (i == rx_ring->next_to_use)
424 printk(KERN_CONT " NTU\n");
425 else if (i == rx_ring->next_to_clean)
426 printk(KERN_CONT " NTC\n");
427 else
428 printk(KERN_CONT "\n");
429
430 if (netif_msg_pktdata(adapter))
431 print_hex_dump(KERN_INFO, "",
432 DUMP_PREFIX_ADDRESS,
433 16, 1,
434 phys_to_virt(buffer_info->dma),
435 adapter->rx_buffer_len, true);
436 }
437 }
438
439 exit:
440 return;
441 }
442
443 /**
444 * e1000_desc_unused - calculate if we have unused descriptors
445 **/
446 static int e1000_desc_unused(struct e1000_ring *ring)
447 {
448 if (ring->next_to_clean > ring->next_to_use)
449 return ring->next_to_clean - ring->next_to_use - 1;
450
451 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
452 }
453
454 /**
455 * e1000_receive_skb - helper function to handle Rx indications
456 * @adapter: board private structure
457 * @status: descriptor status field as written by hardware
458 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
459 * @skb: pointer to sk_buff to be indicated to stack
460 **/
461 static void e1000_receive_skb(struct e1000_adapter *adapter,
462 struct net_device *netdev, struct sk_buff *skb,
463 u8 status, __le16 vlan)
464 {
465 u16 tag = le16_to_cpu(vlan);
466 skb->protocol = eth_type_trans(skb, netdev);
467
468 if (status & E1000_RXD_STAT_VP)
469 __vlan_hwaccel_put_tag(skb, tag);
470
471 napi_gro_receive(&adapter->napi, skb);
472 }
473
474 /**
475 * e1000_rx_checksum - Receive Checksum Offload
476 * @adapter: board private structure
477 * @status_err: receive descriptor status and error fields
478 * @csum: receive descriptor csum field
479 * @sk_buff: socket buffer with received data
480 **/
481 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
482 u32 csum, struct sk_buff *skb)
483 {
484 u16 status = (u16)status_err;
485 u8 errors = (u8)(status_err >> 24);
486
487 skb_checksum_none_assert(skb);
488
489 /* Ignore Checksum bit is set */
490 if (status & E1000_RXD_STAT_IXSM)
491 return;
492 /* TCP/UDP checksum error bit is set */
493 if (errors & E1000_RXD_ERR_TCPE) {
494 /* let the stack verify checksum errors */
495 adapter->hw_csum_err++;
496 return;
497 }
498
499 /* TCP/UDP Checksum has not been calculated */
500 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
501 return;
502
503 /* It must be a TCP or UDP packet with a valid checksum */
504 if (status & E1000_RXD_STAT_TCPCS) {
505 /* TCP checksum is good */
506 skb->ip_summed = CHECKSUM_UNNECESSARY;
507 } else {
508 /*
509 * IP fragment with UDP payload
510 * Hardware complements the payload checksum, so we undo it
511 * and then put the value in host order for further stack use.
512 */
513 __sum16 sum = (__force __sum16)htons(csum);
514 skb->csum = csum_unfold(~sum);
515 skb->ip_summed = CHECKSUM_COMPLETE;
516 }
517 adapter->hw_csum_good++;
518 }
519
520 /**
521 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
522 * @adapter: address of board private structure
523 **/
524 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
525 int cleaned_count)
526 {
527 struct net_device *netdev = adapter->netdev;
528 struct pci_dev *pdev = adapter->pdev;
529 struct e1000_ring *rx_ring = adapter->rx_ring;
530 struct e1000_rx_desc *rx_desc;
531 struct e1000_buffer *buffer_info;
532 struct sk_buff *skb;
533 unsigned int i;
534 unsigned int bufsz = adapter->rx_buffer_len;
535
536 i = rx_ring->next_to_use;
537 buffer_info = &rx_ring->buffer_info[i];
538
539 while (cleaned_count--) {
540 skb = buffer_info->skb;
541 if (skb) {
542 skb_trim(skb, 0);
543 goto map_skb;
544 }
545
546 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
547 if (!skb) {
548 /* Better luck next round */
549 adapter->alloc_rx_buff_failed++;
550 break;
551 }
552
553 buffer_info->skb = skb;
554 map_skb:
555 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
556 adapter->rx_buffer_len,
557 DMA_FROM_DEVICE);
558 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
559 dev_err(&pdev->dev, "Rx DMA map failed\n");
560 adapter->rx_dma_failed++;
561 break;
562 }
563
564 rx_desc = E1000_RX_DESC(*rx_ring, i);
565 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
566
567 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
568 /*
569 * Force memory writes to complete before letting h/w
570 * know there are new descriptors to fetch. (Only
571 * applicable for weak-ordered memory model archs,
572 * such as IA-64).
573 */
574 wmb();
575 writel(i, adapter->hw.hw_addr + rx_ring->tail);
576 }
577 i++;
578 if (i == rx_ring->count)
579 i = 0;
580 buffer_info = &rx_ring->buffer_info[i];
581 }
582
583 rx_ring->next_to_use = i;
584 }
585
586 /**
587 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
588 * @adapter: address of board private structure
589 **/
590 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
591 int cleaned_count)
592 {
593 struct net_device *netdev = adapter->netdev;
594 struct pci_dev *pdev = adapter->pdev;
595 union e1000_rx_desc_packet_split *rx_desc;
596 struct e1000_ring *rx_ring = adapter->rx_ring;
597 struct e1000_buffer *buffer_info;
598 struct e1000_ps_page *ps_page;
599 struct sk_buff *skb;
600 unsigned int i, j;
601
602 i = rx_ring->next_to_use;
603 buffer_info = &rx_ring->buffer_info[i];
604
605 while (cleaned_count--) {
606 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
607
608 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
609 ps_page = &buffer_info->ps_pages[j];
610 if (j >= adapter->rx_ps_pages) {
611 /* all unused desc entries get hw null ptr */
612 rx_desc->read.buffer_addr[j + 1] =
613 ~cpu_to_le64(0);
614 continue;
615 }
616 if (!ps_page->page) {
617 ps_page->page = alloc_page(GFP_ATOMIC);
618 if (!ps_page->page) {
619 adapter->alloc_rx_buff_failed++;
620 goto no_buffers;
621 }
622 ps_page->dma = dma_map_page(&pdev->dev,
623 ps_page->page,
624 0, PAGE_SIZE,
625 DMA_FROM_DEVICE);
626 if (dma_mapping_error(&pdev->dev,
627 ps_page->dma)) {
628 dev_err(&adapter->pdev->dev,
629 "Rx DMA page map failed\n");
630 adapter->rx_dma_failed++;
631 goto no_buffers;
632 }
633 }
634 /*
635 * Refresh the desc even if buffer_addrs
636 * didn't change because each write-back
637 * erases this info.
638 */
639 rx_desc->read.buffer_addr[j + 1] =
640 cpu_to_le64(ps_page->dma);
641 }
642
643 skb = netdev_alloc_skb_ip_align(netdev,
644 adapter->rx_ps_bsize0);
645
646 if (!skb) {
647 adapter->alloc_rx_buff_failed++;
648 break;
649 }
650
651 buffer_info->skb = skb;
652 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
653 adapter->rx_ps_bsize0,
654 DMA_FROM_DEVICE);
655 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
656 dev_err(&pdev->dev, "Rx DMA map failed\n");
657 adapter->rx_dma_failed++;
658 /* cleanup skb */
659 dev_kfree_skb_any(skb);
660 buffer_info->skb = NULL;
661 break;
662 }
663
664 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
665
666 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
667 /*
668 * Force memory writes to complete before letting h/w
669 * know there are new descriptors to fetch. (Only
670 * applicable for weak-ordered memory model archs,
671 * such as IA-64).
672 */
673 wmb();
674 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
675 }
676
677 i++;
678 if (i == rx_ring->count)
679 i = 0;
680 buffer_info = &rx_ring->buffer_info[i];
681 }
682
683 no_buffers:
684 rx_ring->next_to_use = i;
685 }
686
687 /**
688 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
689 * @adapter: address of board private structure
690 * @cleaned_count: number of buffers to allocate this pass
691 **/
692
693 static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
694 int cleaned_count)
695 {
696 struct net_device *netdev = adapter->netdev;
697 struct pci_dev *pdev = adapter->pdev;
698 struct e1000_rx_desc *rx_desc;
699 struct e1000_ring *rx_ring = adapter->rx_ring;
700 struct e1000_buffer *buffer_info;
701 struct sk_buff *skb;
702 unsigned int i;
703 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
704
705 i = rx_ring->next_to_use;
706 buffer_info = &rx_ring->buffer_info[i];
707
708 while (cleaned_count--) {
709 skb = buffer_info->skb;
710 if (skb) {
711 skb_trim(skb, 0);
712 goto check_page;
713 }
714
715 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
716 if (unlikely(!skb)) {
717 /* Better luck next round */
718 adapter->alloc_rx_buff_failed++;
719 break;
720 }
721
722 buffer_info->skb = skb;
723 check_page:
724 /* allocate a new page if necessary */
725 if (!buffer_info->page) {
726 buffer_info->page = alloc_page(GFP_ATOMIC);
727 if (unlikely(!buffer_info->page)) {
728 adapter->alloc_rx_buff_failed++;
729 break;
730 }
731 }
732
733 if (!buffer_info->dma)
734 buffer_info->dma = dma_map_page(&pdev->dev,
735 buffer_info->page, 0,
736 PAGE_SIZE,
737 DMA_FROM_DEVICE);
738
739 rx_desc = E1000_RX_DESC(*rx_ring, i);
740 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
741
742 if (unlikely(++i == rx_ring->count))
743 i = 0;
744 buffer_info = &rx_ring->buffer_info[i];
745 }
746
747 if (likely(rx_ring->next_to_use != i)) {
748 rx_ring->next_to_use = i;
749 if (unlikely(i-- == 0))
750 i = (rx_ring->count - 1);
751
752 /* Force memory writes to complete before letting h/w
753 * know there are new descriptors to fetch. (Only
754 * applicable for weak-ordered memory model archs,
755 * such as IA-64). */
756 wmb();
757 writel(i, adapter->hw.hw_addr + rx_ring->tail);
758 }
759 }
760
761 /**
762 * e1000_clean_rx_irq - Send received data up the network stack; legacy
763 * @adapter: board private structure
764 *
765 * the return value indicates whether actual cleaning was done, there
766 * is no guarantee that everything was cleaned
767 **/
768 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
769 int *work_done, int work_to_do)
770 {
771 struct net_device *netdev = adapter->netdev;
772 struct pci_dev *pdev = adapter->pdev;
773 struct e1000_hw *hw = &adapter->hw;
774 struct e1000_ring *rx_ring = adapter->rx_ring;
775 struct e1000_rx_desc *rx_desc, *next_rxd;
776 struct e1000_buffer *buffer_info, *next_buffer;
777 u32 length;
778 unsigned int i;
779 int cleaned_count = 0;
780 bool cleaned = 0;
781 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
782
783 i = rx_ring->next_to_clean;
784 rx_desc = E1000_RX_DESC(*rx_ring, i);
785 buffer_info = &rx_ring->buffer_info[i];
786
787 while (rx_desc->status & E1000_RXD_STAT_DD) {
788 struct sk_buff *skb;
789 u8 status;
790
791 if (*work_done >= work_to_do)
792 break;
793 (*work_done)++;
794 rmb(); /* read descriptor and rx_buffer_info after status DD */
795
796 status = rx_desc->status;
797 skb = buffer_info->skb;
798 buffer_info->skb = NULL;
799
800 prefetch(skb->data - NET_IP_ALIGN);
801
802 i++;
803 if (i == rx_ring->count)
804 i = 0;
805 next_rxd = E1000_RX_DESC(*rx_ring, i);
806 prefetch(next_rxd);
807
808 next_buffer = &rx_ring->buffer_info[i];
809
810 cleaned = 1;
811 cleaned_count++;
812 dma_unmap_single(&pdev->dev,
813 buffer_info->dma,
814 adapter->rx_buffer_len,
815 DMA_FROM_DEVICE);
816 buffer_info->dma = 0;
817
818 length = le16_to_cpu(rx_desc->length);
819
820 /*
821 * !EOP means multiple descriptors were used to store a single
822 * packet, if that's the case we need to toss it. In fact, we
823 * need to toss every packet with the EOP bit clear and the
824 * next frame that _does_ have the EOP bit set, as it is by
825 * definition only a frame fragment
826 */
827 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
828 adapter->flags2 |= FLAG2_IS_DISCARDING;
829
830 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
831 /* All receives must fit into a single buffer */
832 e_dbg("Receive packet consumed multiple buffers\n");
833 /* recycle */
834 buffer_info->skb = skb;
835 if (status & E1000_RXD_STAT_EOP)
836 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
837 goto next_desc;
838 }
839
840 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
841 /* recycle */
842 buffer_info->skb = skb;
843 goto next_desc;
844 }
845
846 /* adjust length to remove Ethernet CRC */
847 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
848 length -= 4;
849
850 total_rx_bytes += length;
851 total_rx_packets++;
852
853 /*
854 * code added for copybreak, this should improve
855 * performance for small packets with large amounts
856 * of reassembly being done in the stack
857 */
858 if (length < copybreak) {
859 struct sk_buff *new_skb =
860 netdev_alloc_skb_ip_align(netdev, length);
861 if (new_skb) {
862 skb_copy_to_linear_data_offset(new_skb,
863 -NET_IP_ALIGN,
864 (skb->data -
865 NET_IP_ALIGN),
866 (length +
867 NET_IP_ALIGN));
868 /* save the skb in buffer_info as good */
869 buffer_info->skb = skb;
870 skb = new_skb;
871 }
872 /* else just continue with the old one */
873 }
874 /* end copybreak code */
875 skb_put(skb, length);
876
877 /* Receive Checksum Offload */
878 e1000_rx_checksum(adapter,
879 (u32)(status) |
880 ((u32)(rx_desc->errors) << 24),
881 le16_to_cpu(rx_desc->csum), skb);
882
883 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
884
885 next_desc:
886 rx_desc->status = 0;
887
888 /* return some buffers to hardware, one at a time is too slow */
889 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
890 adapter->alloc_rx_buf(adapter, cleaned_count);
891 cleaned_count = 0;
892 }
893
894 /* use prefetched values */
895 rx_desc = next_rxd;
896 buffer_info = next_buffer;
897 }
898 rx_ring->next_to_clean = i;
899
900 cleaned_count = e1000_desc_unused(rx_ring);
901 if (cleaned_count)
902 adapter->alloc_rx_buf(adapter, cleaned_count);
903
904 adapter->total_rx_bytes += total_rx_bytes;
905 adapter->total_rx_packets += total_rx_packets;
906 return cleaned;
907 }
908
909 static void e1000_put_txbuf(struct e1000_adapter *adapter,
910 struct e1000_buffer *buffer_info)
911 {
912 if (buffer_info->dma) {
913 if (buffer_info->mapped_as_page)
914 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
915 buffer_info->length, DMA_TO_DEVICE);
916 else
917 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
918 buffer_info->length, DMA_TO_DEVICE);
919 buffer_info->dma = 0;
920 }
921 if (buffer_info->skb) {
922 dev_kfree_skb_any(buffer_info->skb);
923 buffer_info->skb = NULL;
924 }
925 buffer_info->time_stamp = 0;
926 }
927
928 static void e1000_print_hw_hang(struct work_struct *work)
929 {
930 struct e1000_adapter *adapter = container_of(work,
931 struct e1000_adapter,
932 print_hang_task);
933 struct net_device *netdev = adapter->netdev;
934 struct e1000_ring *tx_ring = adapter->tx_ring;
935 unsigned int i = tx_ring->next_to_clean;
936 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
937 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
938 struct e1000_hw *hw = &adapter->hw;
939 u16 phy_status, phy_1000t_status, phy_ext_status;
940 u16 pci_status;
941
942 if (test_bit(__E1000_DOWN, &adapter->state))
943 return;
944
945 if (!adapter->tx_hang_recheck &&
946 (adapter->flags2 & FLAG2_DMA_BURST)) {
947 /* May be block on write-back, flush and detect again
948 * flush pending descriptor writebacks to memory
949 */
950 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
951 /* execute the writes immediately */
952 e1e_flush();
953 adapter->tx_hang_recheck = true;
954 return;
955 }
956 /* Real hang detected */
957 adapter->tx_hang_recheck = false;
958 netif_stop_queue(netdev);
959
960 e1e_rphy(hw, PHY_STATUS, &phy_status);
961 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
962 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
963
964 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
965
966 /* detected Hardware unit hang */
967 e_err("Detected Hardware Unit Hang:\n"
968 " TDH <%x>\n"
969 " TDT <%x>\n"
970 " next_to_use <%x>\n"
971 " next_to_clean <%x>\n"
972 "buffer_info[next_to_clean]:\n"
973 " time_stamp <%lx>\n"
974 " next_to_watch <%x>\n"
975 " jiffies <%lx>\n"
976 " next_to_watch.status <%x>\n"
977 "MAC Status <%x>\n"
978 "PHY Status <%x>\n"
979 "PHY 1000BASE-T Status <%x>\n"
980 "PHY Extended Status <%x>\n"
981 "PCI Status <%x>\n",
982 readl(adapter->hw.hw_addr + tx_ring->head),
983 readl(adapter->hw.hw_addr + tx_ring->tail),
984 tx_ring->next_to_use,
985 tx_ring->next_to_clean,
986 tx_ring->buffer_info[eop].time_stamp,
987 eop,
988 jiffies,
989 eop_desc->upper.fields.status,
990 er32(STATUS),
991 phy_status,
992 phy_1000t_status,
993 phy_ext_status,
994 pci_status);
995 }
996
997 /**
998 * e1000_clean_tx_irq - Reclaim resources after transmit completes
999 * @adapter: board private structure
1000 *
1001 * the return value indicates whether actual cleaning was done, there
1002 * is no guarantee that everything was cleaned
1003 **/
1004 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
1005 {
1006 struct net_device *netdev = adapter->netdev;
1007 struct e1000_hw *hw = &adapter->hw;
1008 struct e1000_ring *tx_ring = adapter->tx_ring;
1009 struct e1000_tx_desc *tx_desc, *eop_desc;
1010 struct e1000_buffer *buffer_info;
1011 unsigned int i, eop;
1012 unsigned int count = 0;
1013 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1014
1015 i = tx_ring->next_to_clean;
1016 eop = tx_ring->buffer_info[i].next_to_watch;
1017 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1018
1019 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1020 (count < tx_ring->count)) {
1021 bool cleaned = false;
1022 rmb(); /* read buffer_info after eop_desc */
1023 for (; !cleaned; count++) {
1024 tx_desc = E1000_TX_DESC(*tx_ring, i);
1025 buffer_info = &tx_ring->buffer_info[i];
1026 cleaned = (i == eop);
1027
1028 if (cleaned) {
1029 total_tx_packets += buffer_info->segs;
1030 total_tx_bytes += buffer_info->bytecount;
1031 }
1032
1033 e1000_put_txbuf(adapter, buffer_info);
1034 tx_desc->upper.data = 0;
1035
1036 i++;
1037 if (i == tx_ring->count)
1038 i = 0;
1039 }
1040
1041 if (i == tx_ring->next_to_use)
1042 break;
1043 eop = tx_ring->buffer_info[i].next_to_watch;
1044 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1045 }
1046
1047 tx_ring->next_to_clean = i;
1048
1049 #define TX_WAKE_THRESHOLD 32
1050 if (count && netif_carrier_ok(netdev) &&
1051 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1052 /* Make sure that anybody stopping the queue after this
1053 * sees the new next_to_clean.
1054 */
1055 smp_mb();
1056
1057 if (netif_queue_stopped(netdev) &&
1058 !(test_bit(__E1000_DOWN, &adapter->state))) {
1059 netif_wake_queue(netdev);
1060 ++adapter->restart_queue;
1061 }
1062 }
1063
1064 if (adapter->detect_tx_hung) {
1065 /*
1066 * Detect a transmit hang in hardware, this serializes the
1067 * check with the clearing of time_stamp and movement of i
1068 */
1069 adapter->detect_tx_hung = 0;
1070 if (tx_ring->buffer_info[i].time_stamp &&
1071 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1072 + (adapter->tx_timeout_factor * HZ)) &&
1073 !(er32(STATUS) & E1000_STATUS_TXOFF))
1074 schedule_work(&adapter->print_hang_task);
1075 else
1076 adapter->tx_hang_recheck = false;
1077 }
1078 adapter->total_tx_bytes += total_tx_bytes;
1079 adapter->total_tx_packets += total_tx_packets;
1080 return count < tx_ring->count;
1081 }
1082
1083 /**
1084 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1085 * @adapter: board private structure
1086 *
1087 * the return value indicates whether actual cleaning was done, there
1088 * is no guarantee that everything was cleaned
1089 **/
1090 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1091 int *work_done, int work_to_do)
1092 {
1093 struct e1000_hw *hw = &adapter->hw;
1094 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1095 struct net_device *netdev = adapter->netdev;
1096 struct pci_dev *pdev = adapter->pdev;
1097 struct e1000_ring *rx_ring = adapter->rx_ring;
1098 struct e1000_buffer *buffer_info, *next_buffer;
1099 struct e1000_ps_page *ps_page;
1100 struct sk_buff *skb;
1101 unsigned int i, j;
1102 u32 length, staterr;
1103 int cleaned_count = 0;
1104 bool cleaned = 0;
1105 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1106
1107 i = rx_ring->next_to_clean;
1108 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1109 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1110 buffer_info = &rx_ring->buffer_info[i];
1111
1112 while (staterr & E1000_RXD_STAT_DD) {
1113 if (*work_done >= work_to_do)
1114 break;
1115 (*work_done)++;
1116 skb = buffer_info->skb;
1117 rmb(); /* read descriptor and rx_buffer_info after status DD */
1118
1119 /* in the packet split case this is header only */
1120 prefetch(skb->data - NET_IP_ALIGN);
1121
1122 i++;
1123 if (i == rx_ring->count)
1124 i = 0;
1125 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1126 prefetch(next_rxd);
1127
1128 next_buffer = &rx_ring->buffer_info[i];
1129
1130 cleaned = 1;
1131 cleaned_count++;
1132 dma_unmap_single(&pdev->dev, buffer_info->dma,
1133 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1134 buffer_info->dma = 0;
1135
1136 /* see !EOP comment in other Rx routine */
1137 if (!(staterr & E1000_RXD_STAT_EOP))
1138 adapter->flags2 |= FLAG2_IS_DISCARDING;
1139
1140 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1141 e_dbg("Packet Split buffers didn't pick up the full "
1142 "packet\n");
1143 dev_kfree_skb_irq(skb);
1144 if (staterr & E1000_RXD_STAT_EOP)
1145 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1146 goto next_desc;
1147 }
1148
1149 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1150 dev_kfree_skb_irq(skb);
1151 goto next_desc;
1152 }
1153
1154 length = le16_to_cpu(rx_desc->wb.middle.length0);
1155
1156 if (!length) {
1157 e_dbg("Last part of the packet spanning multiple "
1158 "descriptors\n");
1159 dev_kfree_skb_irq(skb);
1160 goto next_desc;
1161 }
1162
1163 /* Good Receive */
1164 skb_put(skb, length);
1165
1166 {
1167 /*
1168 * this looks ugly, but it seems compiler issues make it
1169 * more efficient than reusing j
1170 */
1171 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1172
1173 /*
1174 * page alloc/put takes too long and effects small packet
1175 * throughput, so unsplit small packets and save the alloc/put
1176 * only valid in softirq (napi) context to call kmap_*
1177 */
1178 if (l1 && (l1 <= copybreak) &&
1179 ((length + l1) <= adapter->rx_ps_bsize0)) {
1180 u8 *vaddr;
1181
1182 ps_page = &buffer_info->ps_pages[0];
1183
1184 /*
1185 * there is no documentation about how to call
1186 * kmap_atomic, so we can't hold the mapping
1187 * very long
1188 */
1189 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1190 PAGE_SIZE, DMA_FROM_DEVICE);
1191 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1192 memcpy(skb_tail_pointer(skb), vaddr, l1);
1193 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
1194 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1195 PAGE_SIZE, DMA_FROM_DEVICE);
1196
1197 /* remove the CRC */
1198 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1199 l1 -= 4;
1200
1201 skb_put(skb, l1);
1202 goto copydone;
1203 } /* if */
1204 }
1205
1206 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1207 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1208 if (!length)
1209 break;
1210
1211 ps_page = &buffer_info->ps_pages[j];
1212 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1213 DMA_FROM_DEVICE);
1214 ps_page->dma = 0;
1215 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1216 ps_page->page = NULL;
1217 skb->len += length;
1218 skb->data_len += length;
1219 skb->truesize += length;
1220 }
1221
1222 /* strip the ethernet crc, problem is we're using pages now so
1223 * this whole operation can get a little cpu intensive
1224 */
1225 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1226 pskb_trim(skb, skb->len - 4);
1227
1228 copydone:
1229 total_rx_bytes += skb->len;
1230 total_rx_packets++;
1231
1232 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1233 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1234
1235 if (rx_desc->wb.upper.header_status &
1236 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1237 adapter->rx_hdr_split++;
1238
1239 e1000_receive_skb(adapter, netdev, skb,
1240 staterr, rx_desc->wb.middle.vlan);
1241
1242 next_desc:
1243 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1244 buffer_info->skb = NULL;
1245
1246 /* return some buffers to hardware, one at a time is too slow */
1247 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1248 adapter->alloc_rx_buf(adapter, cleaned_count);
1249 cleaned_count = 0;
1250 }
1251
1252 /* use prefetched values */
1253 rx_desc = next_rxd;
1254 buffer_info = next_buffer;
1255
1256 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1257 }
1258 rx_ring->next_to_clean = i;
1259
1260 cleaned_count = e1000_desc_unused(rx_ring);
1261 if (cleaned_count)
1262 adapter->alloc_rx_buf(adapter, cleaned_count);
1263
1264 adapter->total_rx_bytes += total_rx_bytes;
1265 adapter->total_rx_packets += total_rx_packets;
1266 return cleaned;
1267 }
1268
1269 /**
1270 * e1000_consume_page - helper function
1271 **/
1272 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1273 u16 length)
1274 {
1275 bi->page = NULL;
1276 skb->len += length;
1277 skb->data_len += length;
1278 skb->truesize += length;
1279 }
1280
1281 /**
1282 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1283 * @adapter: board private structure
1284 *
1285 * the return value indicates whether actual cleaning was done, there
1286 * is no guarantee that everything was cleaned
1287 **/
1288
1289 static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1290 int *work_done, int work_to_do)
1291 {
1292 struct net_device *netdev = adapter->netdev;
1293 struct pci_dev *pdev = adapter->pdev;
1294 struct e1000_ring *rx_ring = adapter->rx_ring;
1295 struct e1000_rx_desc *rx_desc, *next_rxd;
1296 struct e1000_buffer *buffer_info, *next_buffer;
1297 u32 length;
1298 unsigned int i;
1299 int cleaned_count = 0;
1300 bool cleaned = false;
1301 unsigned int total_rx_bytes=0, total_rx_packets=0;
1302
1303 i = rx_ring->next_to_clean;
1304 rx_desc = E1000_RX_DESC(*rx_ring, i);
1305 buffer_info = &rx_ring->buffer_info[i];
1306
1307 while (rx_desc->status & E1000_RXD_STAT_DD) {
1308 struct sk_buff *skb;
1309 u8 status;
1310
1311 if (*work_done >= work_to_do)
1312 break;
1313 (*work_done)++;
1314 rmb(); /* read descriptor and rx_buffer_info after status DD */
1315
1316 status = rx_desc->status;
1317 skb = buffer_info->skb;
1318 buffer_info->skb = NULL;
1319
1320 ++i;
1321 if (i == rx_ring->count)
1322 i = 0;
1323 next_rxd = E1000_RX_DESC(*rx_ring, i);
1324 prefetch(next_rxd);
1325
1326 next_buffer = &rx_ring->buffer_info[i];
1327
1328 cleaned = true;
1329 cleaned_count++;
1330 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1331 DMA_FROM_DEVICE);
1332 buffer_info->dma = 0;
1333
1334 length = le16_to_cpu(rx_desc->length);
1335
1336 /* errors is only valid for DD + EOP descriptors */
1337 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1338 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1339 /* recycle both page and skb */
1340 buffer_info->skb = skb;
1341 /* an error means any chain goes out the window
1342 * too */
1343 if (rx_ring->rx_skb_top)
1344 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1345 rx_ring->rx_skb_top = NULL;
1346 goto next_desc;
1347 }
1348
1349 #define rxtop (rx_ring->rx_skb_top)
1350 if (!(status & E1000_RXD_STAT_EOP)) {
1351 /* this descriptor is only the beginning (or middle) */
1352 if (!rxtop) {
1353 /* this is the beginning of a chain */
1354 rxtop = skb;
1355 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1356 0, length);
1357 } else {
1358 /* this is the middle of a chain */
1359 skb_fill_page_desc(rxtop,
1360 skb_shinfo(rxtop)->nr_frags,
1361 buffer_info->page, 0, length);
1362 /* re-use the skb, only consumed the page */
1363 buffer_info->skb = skb;
1364 }
1365 e1000_consume_page(buffer_info, rxtop, length);
1366 goto next_desc;
1367 } else {
1368 if (rxtop) {
1369 /* end of the chain */
1370 skb_fill_page_desc(rxtop,
1371 skb_shinfo(rxtop)->nr_frags,
1372 buffer_info->page, 0, length);
1373 /* re-use the current skb, we only consumed the
1374 * page */
1375 buffer_info->skb = skb;
1376 skb = rxtop;
1377 rxtop = NULL;
1378 e1000_consume_page(buffer_info, skb, length);
1379 } else {
1380 /* no chain, got EOP, this buf is the packet
1381 * copybreak to save the put_page/alloc_page */
1382 if (length <= copybreak &&
1383 skb_tailroom(skb) >= length) {
1384 u8 *vaddr;
1385 vaddr = kmap_atomic(buffer_info->page,
1386 KM_SKB_DATA_SOFTIRQ);
1387 memcpy(skb_tail_pointer(skb), vaddr,
1388 length);
1389 kunmap_atomic(vaddr,
1390 KM_SKB_DATA_SOFTIRQ);
1391 /* re-use the page, so don't erase
1392 * buffer_info->page */
1393 skb_put(skb, length);
1394 } else {
1395 skb_fill_page_desc(skb, 0,
1396 buffer_info->page, 0,
1397 length);
1398 e1000_consume_page(buffer_info, skb,
1399 length);
1400 }
1401 }
1402 }
1403
1404 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1405 e1000_rx_checksum(adapter,
1406 (u32)(status) |
1407 ((u32)(rx_desc->errors) << 24),
1408 le16_to_cpu(rx_desc->csum), skb);
1409
1410 /* probably a little skewed due to removing CRC */
1411 total_rx_bytes += skb->len;
1412 total_rx_packets++;
1413
1414 /* eth type trans needs skb->data to point to something */
1415 if (!pskb_may_pull(skb, ETH_HLEN)) {
1416 e_err("pskb_may_pull failed.\n");
1417 dev_kfree_skb_irq(skb);
1418 goto next_desc;
1419 }
1420
1421 e1000_receive_skb(adapter, netdev, skb, status,
1422 rx_desc->special);
1423
1424 next_desc:
1425 rx_desc->status = 0;
1426
1427 /* return some buffers to hardware, one at a time is too slow */
1428 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1429 adapter->alloc_rx_buf(adapter, cleaned_count);
1430 cleaned_count = 0;
1431 }
1432
1433 /* use prefetched values */
1434 rx_desc = next_rxd;
1435 buffer_info = next_buffer;
1436 }
1437 rx_ring->next_to_clean = i;
1438
1439 cleaned_count = e1000_desc_unused(rx_ring);
1440 if (cleaned_count)
1441 adapter->alloc_rx_buf(adapter, cleaned_count);
1442
1443 adapter->total_rx_bytes += total_rx_bytes;
1444 adapter->total_rx_packets += total_rx_packets;
1445 return cleaned;
1446 }
1447
1448 /**
1449 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1450 * @adapter: board private structure
1451 **/
1452 static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1453 {
1454 struct e1000_ring *rx_ring = adapter->rx_ring;
1455 struct e1000_buffer *buffer_info;
1456 struct e1000_ps_page *ps_page;
1457 struct pci_dev *pdev = adapter->pdev;
1458 unsigned int i, j;
1459
1460 /* Free all the Rx ring sk_buffs */
1461 for (i = 0; i < rx_ring->count; i++) {
1462 buffer_info = &rx_ring->buffer_info[i];
1463 if (buffer_info->dma) {
1464 if (adapter->clean_rx == e1000_clean_rx_irq)
1465 dma_unmap_single(&pdev->dev, buffer_info->dma,
1466 adapter->rx_buffer_len,
1467 DMA_FROM_DEVICE);
1468 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1469 dma_unmap_page(&pdev->dev, buffer_info->dma,
1470 PAGE_SIZE,
1471 DMA_FROM_DEVICE);
1472 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1473 dma_unmap_single(&pdev->dev, buffer_info->dma,
1474 adapter->rx_ps_bsize0,
1475 DMA_FROM_DEVICE);
1476 buffer_info->dma = 0;
1477 }
1478
1479 if (buffer_info->page) {
1480 put_page(buffer_info->page);
1481 buffer_info->page = NULL;
1482 }
1483
1484 if (buffer_info->skb) {
1485 dev_kfree_skb(buffer_info->skb);
1486 buffer_info->skb = NULL;
1487 }
1488
1489 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1490 ps_page = &buffer_info->ps_pages[j];
1491 if (!ps_page->page)
1492 break;
1493 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1494 DMA_FROM_DEVICE);
1495 ps_page->dma = 0;
1496 put_page(ps_page->page);
1497 ps_page->page = NULL;
1498 }
1499 }
1500
1501 /* there also may be some cached data from a chained receive */
1502 if (rx_ring->rx_skb_top) {
1503 dev_kfree_skb(rx_ring->rx_skb_top);
1504 rx_ring->rx_skb_top = NULL;
1505 }
1506
1507 /* Zero out the descriptor ring */
1508 memset(rx_ring->desc, 0, rx_ring->size);
1509
1510 rx_ring->next_to_clean = 0;
1511 rx_ring->next_to_use = 0;
1512 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1513
1514 writel(0, adapter->hw.hw_addr + rx_ring->head);
1515 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1516 }
1517
1518 static void e1000e_downshift_workaround(struct work_struct *work)
1519 {
1520 struct e1000_adapter *adapter = container_of(work,
1521 struct e1000_adapter, downshift_task);
1522
1523 if (test_bit(__E1000_DOWN, &adapter->state))
1524 return;
1525
1526 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1527 }
1528
1529 /**
1530 * e1000_intr_msi - Interrupt Handler
1531 * @irq: interrupt number
1532 * @data: pointer to a network interface device structure
1533 **/
1534 static irqreturn_t e1000_intr_msi(int irq, void *data)
1535 {
1536 struct net_device *netdev = data;
1537 struct e1000_adapter *adapter = netdev_priv(netdev);
1538 struct e1000_hw *hw = &adapter->hw;
1539 u32 icr = er32(ICR);
1540
1541 /*
1542 * read ICR disables interrupts using IAM
1543 */
1544
1545 if (icr & E1000_ICR_LSC) {
1546 hw->mac.get_link_status = 1;
1547 /*
1548 * ICH8 workaround-- Call gig speed drop workaround on cable
1549 * disconnect (LSC) before accessing any PHY registers
1550 */
1551 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1552 (!(er32(STATUS) & E1000_STATUS_LU)))
1553 schedule_work(&adapter->downshift_task);
1554
1555 /*
1556 * 80003ES2LAN workaround-- For packet buffer work-around on
1557 * link down event; disable receives here in the ISR and reset
1558 * adapter in watchdog
1559 */
1560 if (netif_carrier_ok(netdev) &&
1561 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1562 /* disable receives */
1563 u32 rctl = er32(RCTL);
1564 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1565 adapter->flags |= FLAG_RX_RESTART_NOW;
1566 }
1567 /* guard against interrupt when we're going down */
1568 if (!test_bit(__E1000_DOWN, &adapter->state))
1569 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1570 }
1571
1572 if (napi_schedule_prep(&adapter->napi)) {
1573 adapter->total_tx_bytes = 0;
1574 adapter->total_tx_packets = 0;
1575 adapter->total_rx_bytes = 0;
1576 adapter->total_rx_packets = 0;
1577 __napi_schedule(&adapter->napi);
1578 }
1579
1580 return IRQ_HANDLED;
1581 }
1582
1583 /**
1584 * e1000_intr - Interrupt Handler
1585 * @irq: interrupt number
1586 * @data: pointer to a network interface device structure
1587 **/
1588 static irqreturn_t e1000_intr(int irq, void *data)
1589 {
1590 struct net_device *netdev = data;
1591 struct e1000_adapter *adapter = netdev_priv(netdev);
1592 struct e1000_hw *hw = &adapter->hw;
1593 u32 rctl, icr = er32(ICR);
1594
1595 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1596 return IRQ_NONE; /* Not our interrupt */
1597
1598 /*
1599 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1600 * not set, then the adapter didn't send an interrupt
1601 */
1602 if (!(icr & E1000_ICR_INT_ASSERTED))
1603 return IRQ_NONE;
1604
1605 /*
1606 * Interrupt Auto-Mask...upon reading ICR,
1607 * interrupts are masked. No need for the
1608 * IMC write
1609 */
1610
1611 if (icr & E1000_ICR_LSC) {
1612 hw->mac.get_link_status = 1;
1613 /*
1614 * ICH8 workaround-- Call gig speed drop workaround on cable
1615 * disconnect (LSC) before accessing any PHY registers
1616 */
1617 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1618 (!(er32(STATUS) & E1000_STATUS_LU)))
1619 schedule_work(&adapter->downshift_task);
1620
1621 /*
1622 * 80003ES2LAN workaround--
1623 * For packet buffer work-around on link down event;
1624 * disable receives here in the ISR and
1625 * reset adapter in watchdog
1626 */
1627 if (netif_carrier_ok(netdev) &&
1628 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1629 /* disable receives */
1630 rctl = er32(RCTL);
1631 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1632 adapter->flags |= FLAG_RX_RESTART_NOW;
1633 }
1634 /* guard against interrupt when we're going down */
1635 if (!test_bit(__E1000_DOWN, &adapter->state))
1636 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1637 }
1638
1639 if (napi_schedule_prep(&adapter->napi)) {
1640 adapter->total_tx_bytes = 0;
1641 adapter->total_tx_packets = 0;
1642 adapter->total_rx_bytes = 0;
1643 adapter->total_rx_packets = 0;
1644 __napi_schedule(&adapter->napi);
1645 }
1646
1647 return IRQ_HANDLED;
1648 }
1649
1650 static irqreturn_t e1000_msix_other(int irq, void *data)
1651 {
1652 struct net_device *netdev = data;
1653 struct e1000_adapter *adapter = netdev_priv(netdev);
1654 struct e1000_hw *hw = &adapter->hw;
1655 u32 icr = er32(ICR);
1656
1657 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1658 if (!test_bit(__E1000_DOWN, &adapter->state))
1659 ew32(IMS, E1000_IMS_OTHER);
1660 return IRQ_NONE;
1661 }
1662
1663 if (icr & adapter->eiac_mask)
1664 ew32(ICS, (icr & adapter->eiac_mask));
1665
1666 if (icr & E1000_ICR_OTHER) {
1667 if (!(icr & E1000_ICR_LSC))
1668 goto no_link_interrupt;
1669 hw->mac.get_link_status = 1;
1670 /* guard against interrupt when we're going down */
1671 if (!test_bit(__E1000_DOWN, &adapter->state))
1672 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1673 }
1674
1675 no_link_interrupt:
1676 if (!test_bit(__E1000_DOWN, &adapter->state))
1677 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1678
1679 return IRQ_HANDLED;
1680 }
1681
1682
1683 static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1684 {
1685 struct net_device *netdev = data;
1686 struct e1000_adapter *adapter = netdev_priv(netdev);
1687 struct e1000_hw *hw = &adapter->hw;
1688 struct e1000_ring *tx_ring = adapter->tx_ring;
1689
1690
1691 adapter->total_tx_bytes = 0;
1692 adapter->total_tx_packets = 0;
1693
1694 if (!e1000_clean_tx_irq(adapter))
1695 /* Ring was not completely cleaned, so fire another interrupt */
1696 ew32(ICS, tx_ring->ims_val);
1697
1698 return IRQ_HANDLED;
1699 }
1700
1701 static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1702 {
1703 struct net_device *netdev = data;
1704 struct e1000_adapter *adapter = netdev_priv(netdev);
1705
1706 /* Write the ITR value calculated at the end of the
1707 * previous interrupt.
1708 */
1709 if (adapter->rx_ring->set_itr) {
1710 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1711 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1712 adapter->rx_ring->set_itr = 0;
1713 }
1714
1715 if (napi_schedule_prep(&adapter->napi)) {
1716 adapter->total_rx_bytes = 0;
1717 adapter->total_rx_packets = 0;
1718 __napi_schedule(&adapter->napi);
1719 }
1720 return IRQ_HANDLED;
1721 }
1722
1723 /**
1724 * e1000_configure_msix - Configure MSI-X hardware
1725 *
1726 * e1000_configure_msix sets up the hardware to properly
1727 * generate MSI-X interrupts.
1728 **/
1729 static void e1000_configure_msix(struct e1000_adapter *adapter)
1730 {
1731 struct e1000_hw *hw = &adapter->hw;
1732 struct e1000_ring *rx_ring = adapter->rx_ring;
1733 struct e1000_ring *tx_ring = adapter->tx_ring;
1734 int vector = 0;
1735 u32 ctrl_ext, ivar = 0;
1736
1737 adapter->eiac_mask = 0;
1738
1739 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1740 if (hw->mac.type == e1000_82574) {
1741 u32 rfctl = er32(RFCTL);
1742 rfctl |= E1000_RFCTL_ACK_DIS;
1743 ew32(RFCTL, rfctl);
1744 }
1745
1746 #define E1000_IVAR_INT_ALLOC_VALID 0x8
1747 /* Configure Rx vector */
1748 rx_ring->ims_val = E1000_IMS_RXQ0;
1749 adapter->eiac_mask |= rx_ring->ims_val;
1750 if (rx_ring->itr_val)
1751 writel(1000000000 / (rx_ring->itr_val * 256),
1752 hw->hw_addr + rx_ring->itr_register);
1753 else
1754 writel(1, hw->hw_addr + rx_ring->itr_register);
1755 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1756
1757 /* Configure Tx vector */
1758 tx_ring->ims_val = E1000_IMS_TXQ0;
1759 vector++;
1760 if (tx_ring->itr_val)
1761 writel(1000000000 / (tx_ring->itr_val * 256),
1762 hw->hw_addr + tx_ring->itr_register);
1763 else
1764 writel(1, hw->hw_addr + tx_ring->itr_register);
1765 adapter->eiac_mask |= tx_ring->ims_val;
1766 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1767
1768 /* set vector for Other Causes, e.g. link changes */
1769 vector++;
1770 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1771 if (rx_ring->itr_val)
1772 writel(1000000000 / (rx_ring->itr_val * 256),
1773 hw->hw_addr + E1000_EITR_82574(vector));
1774 else
1775 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1776
1777 /* Cause Tx interrupts on every write back */
1778 ivar |= (1 << 31);
1779
1780 ew32(IVAR, ivar);
1781
1782 /* enable MSI-X PBA support */
1783 ctrl_ext = er32(CTRL_EXT);
1784 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1785
1786 /* Auto-Mask Other interrupts upon ICR read */
1787 #define E1000_EIAC_MASK_82574 0x01F00000
1788 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1789 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1790 ew32(CTRL_EXT, ctrl_ext);
1791 e1e_flush();
1792 }
1793
1794 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1795 {
1796 if (adapter->msix_entries) {
1797 pci_disable_msix(adapter->pdev);
1798 kfree(adapter->msix_entries);
1799 adapter->msix_entries = NULL;
1800 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1801 pci_disable_msi(adapter->pdev);
1802 adapter->flags &= ~FLAG_MSI_ENABLED;
1803 }
1804 }
1805
1806 /**
1807 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1808 *
1809 * Attempt to configure interrupts using the best available
1810 * capabilities of the hardware and kernel.
1811 **/
1812 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1813 {
1814 int err;
1815 int i;
1816
1817 switch (adapter->int_mode) {
1818 case E1000E_INT_MODE_MSIX:
1819 if (adapter->flags & FLAG_HAS_MSIX) {
1820 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1821 adapter->msix_entries = kcalloc(adapter->num_vectors,
1822 sizeof(struct msix_entry),
1823 GFP_KERNEL);
1824 if (adapter->msix_entries) {
1825 for (i = 0; i < adapter->num_vectors; i++)
1826 adapter->msix_entries[i].entry = i;
1827
1828 err = pci_enable_msix(adapter->pdev,
1829 adapter->msix_entries,
1830 adapter->num_vectors);
1831 if (err == 0)
1832 return;
1833 }
1834 /* MSI-X failed, so fall through and try MSI */
1835 e_err("Failed to initialize MSI-X interrupts. "
1836 "Falling back to MSI interrupts.\n");
1837 e1000e_reset_interrupt_capability(adapter);
1838 }
1839 adapter->int_mode = E1000E_INT_MODE_MSI;
1840 /* Fall through */
1841 case E1000E_INT_MODE_MSI:
1842 if (!pci_enable_msi(adapter->pdev)) {
1843 adapter->flags |= FLAG_MSI_ENABLED;
1844 } else {
1845 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1846 e_err("Failed to initialize MSI interrupts. Falling "
1847 "back to legacy interrupts.\n");
1848 }
1849 /* Fall through */
1850 case E1000E_INT_MODE_LEGACY:
1851 /* Don't do anything; this is the system default */
1852 break;
1853 }
1854
1855 /* store the number of vectors being used */
1856 adapter->num_vectors = 1;
1857 }
1858
1859 /**
1860 * e1000_request_msix - Initialize MSI-X interrupts
1861 *
1862 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1863 * kernel.
1864 **/
1865 static int e1000_request_msix(struct e1000_adapter *adapter)
1866 {
1867 struct net_device *netdev = adapter->netdev;
1868 int err = 0, vector = 0;
1869
1870 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1871 snprintf(adapter->rx_ring->name,
1872 sizeof(adapter->rx_ring->name) - 1,
1873 "%s-rx-0", netdev->name);
1874 else
1875 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1876 err = request_irq(adapter->msix_entries[vector].vector,
1877 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1878 netdev);
1879 if (err)
1880 goto out;
1881 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1882 adapter->rx_ring->itr_val = adapter->itr;
1883 vector++;
1884
1885 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1886 snprintf(adapter->tx_ring->name,
1887 sizeof(adapter->tx_ring->name) - 1,
1888 "%s-tx-0", netdev->name);
1889 else
1890 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1891 err = request_irq(adapter->msix_entries[vector].vector,
1892 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1893 netdev);
1894 if (err)
1895 goto out;
1896 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1897 adapter->tx_ring->itr_val = adapter->itr;
1898 vector++;
1899
1900 err = request_irq(adapter->msix_entries[vector].vector,
1901 e1000_msix_other, 0, netdev->name, netdev);
1902 if (err)
1903 goto out;
1904
1905 e1000_configure_msix(adapter);
1906 return 0;
1907 out:
1908 return err;
1909 }
1910
1911 /**
1912 * e1000_request_irq - initialize interrupts
1913 *
1914 * Attempts to configure interrupts using the best available
1915 * capabilities of the hardware and kernel.
1916 **/
1917 static int e1000_request_irq(struct e1000_adapter *adapter)
1918 {
1919 struct net_device *netdev = adapter->netdev;
1920 int err;
1921
1922 if (adapter->msix_entries) {
1923 err = e1000_request_msix(adapter);
1924 if (!err)
1925 return err;
1926 /* fall back to MSI */
1927 e1000e_reset_interrupt_capability(adapter);
1928 adapter->int_mode = E1000E_INT_MODE_MSI;
1929 e1000e_set_interrupt_capability(adapter);
1930 }
1931 if (adapter->flags & FLAG_MSI_ENABLED) {
1932 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
1933 netdev->name, netdev);
1934 if (!err)
1935 return err;
1936
1937 /* fall back to legacy interrupt */
1938 e1000e_reset_interrupt_capability(adapter);
1939 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1940 }
1941
1942 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
1943 netdev->name, netdev);
1944 if (err)
1945 e_err("Unable to allocate interrupt, Error: %d\n", err);
1946
1947 return err;
1948 }
1949
1950 static void e1000_free_irq(struct e1000_adapter *adapter)
1951 {
1952 struct net_device *netdev = adapter->netdev;
1953
1954 if (adapter->msix_entries) {
1955 int vector = 0;
1956
1957 free_irq(adapter->msix_entries[vector].vector, netdev);
1958 vector++;
1959
1960 free_irq(adapter->msix_entries[vector].vector, netdev);
1961 vector++;
1962
1963 /* Other Causes interrupt vector */
1964 free_irq(adapter->msix_entries[vector].vector, netdev);
1965 return;
1966 }
1967
1968 free_irq(adapter->pdev->irq, netdev);
1969 }
1970
1971 /**
1972 * e1000_irq_disable - Mask off interrupt generation on the NIC
1973 **/
1974 static void e1000_irq_disable(struct e1000_adapter *adapter)
1975 {
1976 struct e1000_hw *hw = &adapter->hw;
1977
1978 ew32(IMC, ~0);
1979 if (adapter->msix_entries)
1980 ew32(EIAC_82574, 0);
1981 e1e_flush();
1982
1983 if (adapter->msix_entries) {
1984 int i;
1985 for (i = 0; i < adapter->num_vectors; i++)
1986 synchronize_irq(adapter->msix_entries[i].vector);
1987 } else {
1988 synchronize_irq(adapter->pdev->irq);
1989 }
1990 }
1991
1992 /**
1993 * e1000_irq_enable - Enable default interrupt generation settings
1994 **/
1995 static void e1000_irq_enable(struct e1000_adapter *adapter)
1996 {
1997 struct e1000_hw *hw = &adapter->hw;
1998
1999 if (adapter->msix_entries) {
2000 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2001 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2002 } else {
2003 ew32(IMS, IMS_ENABLE_MASK);
2004 }
2005 e1e_flush();
2006 }
2007
2008 /**
2009 * e1000e_get_hw_control - get control of the h/w from f/w
2010 * @adapter: address of board private structure
2011 *
2012 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2013 * For ASF and Pass Through versions of f/w this means that
2014 * the driver is loaded. For AMT version (only with 82573)
2015 * of the f/w this means that the network i/f is open.
2016 **/
2017 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2018 {
2019 struct e1000_hw *hw = &adapter->hw;
2020 u32 ctrl_ext;
2021 u32 swsm;
2022
2023 /* Let firmware know the driver has taken over */
2024 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2025 swsm = er32(SWSM);
2026 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2027 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2028 ctrl_ext = er32(CTRL_EXT);
2029 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2030 }
2031 }
2032
2033 /**
2034 * e1000e_release_hw_control - release control of the h/w to f/w
2035 * @adapter: address of board private structure
2036 *
2037 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2038 * For ASF and Pass Through versions of f/w this means that the
2039 * driver is no longer loaded. For AMT version (only with 82573) i
2040 * of the f/w this means that the network i/f is closed.
2041 *
2042 **/
2043 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2044 {
2045 struct e1000_hw *hw = &adapter->hw;
2046 u32 ctrl_ext;
2047 u32 swsm;
2048
2049 /* Let firmware taken over control of h/w */
2050 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2051 swsm = er32(SWSM);
2052 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2053 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2054 ctrl_ext = er32(CTRL_EXT);
2055 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2056 }
2057 }
2058
2059 /**
2060 * @e1000_alloc_ring - allocate memory for a ring structure
2061 **/
2062 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2063 struct e1000_ring *ring)
2064 {
2065 struct pci_dev *pdev = adapter->pdev;
2066
2067 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2068 GFP_KERNEL);
2069 if (!ring->desc)
2070 return -ENOMEM;
2071
2072 return 0;
2073 }
2074
2075 /**
2076 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2077 * @adapter: board private structure
2078 *
2079 * Return 0 on success, negative on failure
2080 **/
2081 int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2082 {
2083 struct e1000_ring *tx_ring = adapter->tx_ring;
2084 int err = -ENOMEM, size;
2085
2086 size = sizeof(struct e1000_buffer) * tx_ring->count;
2087 tx_ring->buffer_info = vzalloc(size);
2088 if (!tx_ring->buffer_info)
2089 goto err;
2090
2091 /* round up to nearest 4K */
2092 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2093 tx_ring->size = ALIGN(tx_ring->size, 4096);
2094
2095 err = e1000_alloc_ring_dma(adapter, tx_ring);
2096 if (err)
2097 goto err;
2098
2099 tx_ring->next_to_use = 0;
2100 tx_ring->next_to_clean = 0;
2101
2102 return 0;
2103 err:
2104 vfree(tx_ring->buffer_info);
2105 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2106 return err;
2107 }
2108
2109 /**
2110 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2111 * @adapter: board private structure
2112 *
2113 * Returns 0 on success, negative on failure
2114 **/
2115 int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2116 {
2117 struct e1000_ring *rx_ring = adapter->rx_ring;
2118 struct e1000_buffer *buffer_info;
2119 int i, size, desc_len, err = -ENOMEM;
2120
2121 size = sizeof(struct e1000_buffer) * rx_ring->count;
2122 rx_ring->buffer_info = vzalloc(size);
2123 if (!rx_ring->buffer_info)
2124 goto err;
2125
2126 for (i = 0; i < rx_ring->count; i++) {
2127 buffer_info = &rx_ring->buffer_info[i];
2128 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2129 sizeof(struct e1000_ps_page),
2130 GFP_KERNEL);
2131 if (!buffer_info->ps_pages)
2132 goto err_pages;
2133 }
2134
2135 desc_len = sizeof(union e1000_rx_desc_packet_split);
2136
2137 /* Round up to nearest 4K */
2138 rx_ring->size = rx_ring->count * desc_len;
2139 rx_ring->size = ALIGN(rx_ring->size, 4096);
2140
2141 err = e1000_alloc_ring_dma(adapter, rx_ring);
2142 if (err)
2143 goto err_pages;
2144
2145 rx_ring->next_to_clean = 0;
2146 rx_ring->next_to_use = 0;
2147 rx_ring->rx_skb_top = NULL;
2148
2149 return 0;
2150
2151 err_pages:
2152 for (i = 0; i < rx_ring->count; i++) {
2153 buffer_info = &rx_ring->buffer_info[i];
2154 kfree(buffer_info->ps_pages);
2155 }
2156 err:
2157 vfree(rx_ring->buffer_info);
2158 e_err("Unable to allocate memory for the receive descriptor ring\n");
2159 return err;
2160 }
2161
2162 /**
2163 * e1000_clean_tx_ring - Free Tx Buffers
2164 * @adapter: board private structure
2165 **/
2166 static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2167 {
2168 struct e1000_ring *tx_ring = adapter->tx_ring;
2169 struct e1000_buffer *buffer_info;
2170 unsigned long size;
2171 unsigned int i;
2172
2173 for (i = 0; i < tx_ring->count; i++) {
2174 buffer_info = &tx_ring->buffer_info[i];
2175 e1000_put_txbuf(adapter, buffer_info);
2176 }
2177
2178 size = sizeof(struct e1000_buffer) * tx_ring->count;
2179 memset(tx_ring->buffer_info, 0, size);
2180
2181 memset(tx_ring->desc, 0, tx_ring->size);
2182
2183 tx_ring->next_to_use = 0;
2184 tx_ring->next_to_clean = 0;
2185
2186 writel(0, adapter->hw.hw_addr + tx_ring->head);
2187 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2188 }
2189
2190 /**
2191 * e1000e_free_tx_resources - Free Tx Resources per Queue
2192 * @adapter: board private structure
2193 *
2194 * Free all transmit software resources
2195 **/
2196 void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2197 {
2198 struct pci_dev *pdev = adapter->pdev;
2199 struct e1000_ring *tx_ring = adapter->tx_ring;
2200
2201 e1000_clean_tx_ring(adapter);
2202
2203 vfree(tx_ring->buffer_info);
2204 tx_ring->buffer_info = NULL;
2205
2206 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2207 tx_ring->dma);
2208 tx_ring->desc = NULL;
2209 }
2210
2211 /**
2212 * e1000e_free_rx_resources - Free Rx Resources
2213 * @adapter: board private structure
2214 *
2215 * Free all receive software resources
2216 **/
2217
2218 void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2219 {
2220 struct pci_dev *pdev = adapter->pdev;
2221 struct e1000_ring *rx_ring = adapter->rx_ring;
2222 int i;
2223
2224 e1000_clean_rx_ring(adapter);
2225
2226 for (i = 0; i < rx_ring->count; i++)
2227 kfree(rx_ring->buffer_info[i].ps_pages);
2228
2229 vfree(rx_ring->buffer_info);
2230 rx_ring->buffer_info = NULL;
2231
2232 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2233 rx_ring->dma);
2234 rx_ring->desc = NULL;
2235 }
2236
2237 /**
2238 * e1000_update_itr - update the dynamic ITR value based on statistics
2239 * @adapter: pointer to adapter
2240 * @itr_setting: current adapter->itr
2241 * @packets: the number of packets during this measurement interval
2242 * @bytes: the number of bytes during this measurement interval
2243 *
2244 * Stores a new ITR value based on packets and byte
2245 * counts during the last interrupt. The advantage of per interrupt
2246 * computation is faster updates and more accurate ITR for the current
2247 * traffic pattern. Constants in this function were computed
2248 * based on theoretical maximum wire speed and thresholds were set based
2249 * on testing data as well as attempting to minimize response time
2250 * while increasing bulk throughput. This functionality is controlled
2251 * by the InterruptThrottleRate module parameter.
2252 **/
2253 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2254 u16 itr_setting, int packets,
2255 int bytes)
2256 {
2257 unsigned int retval = itr_setting;
2258
2259 if (packets == 0)
2260 goto update_itr_done;
2261
2262 switch (itr_setting) {
2263 case lowest_latency:
2264 /* handle TSO and jumbo frames */
2265 if (bytes/packets > 8000)
2266 retval = bulk_latency;
2267 else if ((packets < 5) && (bytes > 512))
2268 retval = low_latency;
2269 break;
2270 case low_latency: /* 50 usec aka 20000 ints/s */
2271 if (bytes > 10000) {
2272 /* this if handles the TSO accounting */
2273 if (bytes/packets > 8000)
2274 retval = bulk_latency;
2275 else if ((packets < 10) || ((bytes/packets) > 1200))
2276 retval = bulk_latency;
2277 else if ((packets > 35))
2278 retval = lowest_latency;
2279 } else if (bytes/packets > 2000) {
2280 retval = bulk_latency;
2281 } else if (packets <= 2 && bytes < 512) {
2282 retval = lowest_latency;
2283 }
2284 break;
2285 case bulk_latency: /* 250 usec aka 4000 ints/s */
2286 if (bytes > 25000) {
2287 if (packets > 35)
2288 retval = low_latency;
2289 } else if (bytes < 6000) {
2290 retval = low_latency;
2291 }
2292 break;
2293 }
2294
2295 update_itr_done:
2296 return retval;
2297 }
2298
2299 static void e1000_set_itr(struct e1000_adapter *adapter)
2300 {
2301 struct e1000_hw *hw = &adapter->hw;
2302 u16 current_itr;
2303 u32 new_itr = adapter->itr;
2304
2305 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2306 if (adapter->link_speed != SPEED_1000) {
2307 current_itr = 0;
2308 new_itr = 4000;
2309 goto set_itr_now;
2310 }
2311
2312 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2313 new_itr = 0;
2314 goto set_itr_now;
2315 }
2316
2317 adapter->tx_itr = e1000_update_itr(adapter,
2318 adapter->tx_itr,
2319 adapter->total_tx_packets,
2320 adapter->total_tx_bytes);
2321 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2322 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2323 adapter->tx_itr = low_latency;
2324
2325 adapter->rx_itr = e1000_update_itr(adapter,
2326 adapter->rx_itr,
2327 adapter->total_rx_packets,
2328 adapter->total_rx_bytes);
2329 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2330 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2331 adapter->rx_itr = low_latency;
2332
2333 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2334
2335 switch (current_itr) {
2336 /* counts and packets in update_itr are dependent on these numbers */
2337 case lowest_latency:
2338 new_itr = 70000;
2339 break;
2340 case low_latency:
2341 new_itr = 20000; /* aka hwitr = ~200 */
2342 break;
2343 case bulk_latency:
2344 new_itr = 4000;
2345 break;
2346 default:
2347 break;
2348 }
2349
2350 set_itr_now:
2351 if (new_itr != adapter->itr) {
2352 /*
2353 * this attempts to bias the interrupt rate towards Bulk
2354 * by adding intermediate steps when interrupt rate is
2355 * increasing
2356 */
2357 new_itr = new_itr > adapter->itr ?
2358 min(adapter->itr + (new_itr >> 2), new_itr) :
2359 new_itr;
2360 adapter->itr = new_itr;
2361 adapter->rx_ring->itr_val = new_itr;
2362 if (adapter->msix_entries)
2363 adapter->rx_ring->set_itr = 1;
2364 else
2365 if (new_itr)
2366 ew32(ITR, 1000000000 / (new_itr * 256));
2367 else
2368 ew32(ITR, 0);
2369 }
2370 }
2371
2372 /**
2373 * e1000_alloc_queues - Allocate memory for all rings
2374 * @adapter: board private structure to initialize
2375 **/
2376 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2377 {
2378 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2379 if (!adapter->tx_ring)
2380 goto err;
2381
2382 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2383 if (!adapter->rx_ring)
2384 goto err;
2385
2386 return 0;
2387 err:
2388 e_err("Unable to allocate memory for queues\n");
2389 kfree(adapter->rx_ring);
2390 kfree(adapter->tx_ring);
2391 return -ENOMEM;
2392 }
2393
2394 /**
2395 * e1000_clean - NAPI Rx polling callback
2396 * @napi: struct associated with this polling callback
2397 * @budget: amount of packets driver is allowed to process this poll
2398 **/
2399 static int e1000_clean(struct napi_struct *napi, int budget)
2400 {
2401 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
2402 struct e1000_hw *hw = &adapter->hw;
2403 struct net_device *poll_dev = adapter->netdev;
2404 int tx_cleaned = 1, work_done = 0;
2405
2406 adapter = netdev_priv(poll_dev);
2407
2408 if (adapter->msix_entries &&
2409 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2410 goto clean_rx;
2411
2412 tx_cleaned = e1000_clean_tx_irq(adapter);
2413
2414 clean_rx:
2415 adapter->clean_rx(adapter, &work_done, budget);
2416
2417 if (!tx_cleaned)
2418 work_done = budget;
2419
2420 /* If budget not fully consumed, exit the polling mode */
2421 if (work_done < budget) {
2422 if (adapter->itr_setting & 3)
2423 e1000_set_itr(adapter);
2424 napi_complete(napi);
2425 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2426 if (adapter->msix_entries)
2427 ew32(IMS, adapter->rx_ring->ims_val);
2428 else
2429 e1000_irq_enable(adapter);
2430 }
2431 }
2432
2433 return work_done;
2434 }
2435
2436 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2437 {
2438 struct e1000_adapter *adapter = netdev_priv(netdev);
2439 struct e1000_hw *hw = &adapter->hw;
2440 u32 vfta, index;
2441
2442 /* don't update vlan cookie if already programmed */
2443 if ((adapter->hw.mng_cookie.status &
2444 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2445 (vid == adapter->mng_vlan_id))
2446 return;
2447
2448 /* add VID to filter table */
2449 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2450 index = (vid >> 5) & 0x7F;
2451 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2452 vfta |= (1 << (vid & 0x1F));
2453 hw->mac.ops.write_vfta(hw, index, vfta);
2454 }
2455
2456 set_bit(vid, adapter->active_vlans);
2457 }
2458
2459 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2460 {
2461 struct e1000_adapter *adapter = netdev_priv(netdev);
2462 struct e1000_hw *hw = &adapter->hw;
2463 u32 vfta, index;
2464
2465 if ((adapter->hw.mng_cookie.status &
2466 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2467 (vid == adapter->mng_vlan_id)) {
2468 /* release control to f/w */
2469 e1000e_release_hw_control(adapter);
2470 return;
2471 }
2472
2473 /* remove VID from filter table */
2474 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2475 index = (vid >> 5) & 0x7F;
2476 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2477 vfta &= ~(1 << (vid & 0x1F));
2478 hw->mac.ops.write_vfta(hw, index, vfta);
2479 }
2480
2481 clear_bit(vid, adapter->active_vlans);
2482 }
2483
2484 /**
2485 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2486 * @adapter: board private structure to initialize
2487 **/
2488 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2489 {
2490 struct net_device *netdev = adapter->netdev;
2491 struct e1000_hw *hw = &adapter->hw;
2492 u32 rctl;
2493
2494 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2495 /* disable VLAN receive filtering */
2496 rctl = er32(RCTL);
2497 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2498 ew32(RCTL, rctl);
2499
2500 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2501 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2502 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2503 }
2504 }
2505 }
2506
2507 /**
2508 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2509 * @adapter: board private structure to initialize
2510 **/
2511 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2512 {
2513 struct e1000_hw *hw = &adapter->hw;
2514 u32 rctl;
2515
2516 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2517 /* enable VLAN receive filtering */
2518 rctl = er32(RCTL);
2519 rctl |= E1000_RCTL_VFE;
2520 rctl &= ~E1000_RCTL_CFIEN;
2521 ew32(RCTL, rctl);
2522 }
2523 }
2524
2525 /**
2526 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2527 * @adapter: board private structure to initialize
2528 **/
2529 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2530 {
2531 struct e1000_hw *hw = &adapter->hw;
2532 u32 ctrl;
2533
2534 /* disable VLAN tag insert/strip */
2535 ctrl = er32(CTRL);
2536 ctrl &= ~E1000_CTRL_VME;
2537 ew32(CTRL, ctrl);
2538 }
2539
2540 /**
2541 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2542 * @adapter: board private structure to initialize
2543 **/
2544 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2545 {
2546 struct e1000_hw *hw = &adapter->hw;
2547 u32 ctrl;
2548
2549 /* enable VLAN tag insert/strip */
2550 ctrl = er32(CTRL);
2551 ctrl |= E1000_CTRL_VME;
2552 ew32(CTRL, ctrl);
2553 }
2554
2555 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2556 {
2557 struct net_device *netdev = adapter->netdev;
2558 u16 vid = adapter->hw.mng_cookie.vlan_id;
2559 u16 old_vid = adapter->mng_vlan_id;
2560
2561 if (adapter->hw.mng_cookie.status &
2562 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2563 e1000_vlan_rx_add_vid(netdev, vid);
2564 adapter->mng_vlan_id = vid;
2565 }
2566
2567 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2568 e1000_vlan_rx_kill_vid(netdev, old_vid);
2569 }
2570
2571 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2572 {
2573 u16 vid;
2574
2575 e1000_vlan_rx_add_vid(adapter->netdev, 0);
2576
2577 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2578 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2579 }
2580
2581 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2582 {
2583 struct e1000_hw *hw = &adapter->hw;
2584 u32 manc, manc2h, mdef, i, j;
2585
2586 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2587 return;
2588
2589 manc = er32(MANC);
2590
2591 /*
2592 * enable receiving management packets to the host. this will probably
2593 * generate destination unreachable messages from the host OS, but
2594 * the packets will be handled on SMBUS
2595 */
2596 manc |= E1000_MANC_EN_MNG2HOST;
2597 manc2h = er32(MANC2H);
2598
2599 switch (hw->mac.type) {
2600 default:
2601 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2602 break;
2603 case e1000_82574:
2604 case e1000_82583:
2605 /*
2606 * Check if IPMI pass-through decision filter already exists;
2607 * if so, enable it.
2608 */
2609 for (i = 0, j = 0; i < 8; i++) {
2610 mdef = er32(MDEF(i));
2611
2612 /* Ignore filters with anything other than IPMI ports */
2613 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2614 continue;
2615
2616 /* Enable this decision filter in MANC2H */
2617 if (mdef)
2618 manc2h |= (1 << i);
2619
2620 j |= mdef;
2621 }
2622
2623 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2624 break;
2625
2626 /* Create new decision filter in an empty filter */
2627 for (i = 0, j = 0; i < 8; i++)
2628 if (er32(MDEF(i)) == 0) {
2629 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2630 E1000_MDEF_PORT_664));
2631 manc2h |= (1 << 1);
2632 j++;
2633 break;
2634 }
2635
2636 if (!j)
2637 e_warn("Unable to create IPMI pass-through filter\n");
2638 break;
2639 }
2640
2641 ew32(MANC2H, manc2h);
2642 ew32(MANC, manc);
2643 }
2644
2645 /**
2646 * e1000_configure_tx - Configure Transmit Unit after Reset
2647 * @adapter: board private structure
2648 *
2649 * Configure the Tx unit of the MAC after a reset.
2650 **/
2651 static void e1000_configure_tx(struct e1000_adapter *adapter)
2652 {
2653 struct e1000_hw *hw = &adapter->hw;
2654 struct e1000_ring *tx_ring = adapter->tx_ring;
2655 u64 tdba;
2656 u32 tdlen, tctl, tipg, tarc;
2657 u32 ipgr1, ipgr2;
2658
2659 /* Setup the HW Tx Head and Tail descriptor pointers */
2660 tdba = tx_ring->dma;
2661 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2662 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
2663 ew32(TDBAH, (tdba >> 32));
2664 ew32(TDLEN, tdlen);
2665 ew32(TDH, 0);
2666 ew32(TDT, 0);
2667 tx_ring->head = E1000_TDH;
2668 tx_ring->tail = E1000_TDT;
2669
2670 /* Set the default values for the Tx Inter Packet Gap timer */
2671 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2672 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2673 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2674
2675 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2676 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2677
2678 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2679 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2680 ew32(TIPG, tipg);
2681
2682 /* Set the Tx Interrupt Delay register */
2683 ew32(TIDV, adapter->tx_int_delay);
2684 /* Tx irq moderation */
2685 ew32(TADV, adapter->tx_abs_int_delay);
2686
2687 if (adapter->flags2 & FLAG2_DMA_BURST) {
2688 u32 txdctl = er32(TXDCTL(0));
2689 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2690 E1000_TXDCTL_WTHRESH);
2691 /*
2692 * set up some performance related parameters to encourage the
2693 * hardware to use the bus more efficiently in bursts, depends
2694 * on the tx_int_delay to be enabled,
2695 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2696 * hthresh = 1 ==> prefetch when one or more available
2697 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2698 * BEWARE: this seems to work but should be considered first if
2699 * there are Tx hangs or other Tx related bugs
2700 */
2701 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2702 ew32(TXDCTL(0), txdctl);
2703 /* erratum work around: set txdctl the same for both queues */
2704 ew32(TXDCTL(1), txdctl);
2705 }
2706
2707 /* Program the Transmit Control Register */
2708 tctl = er32(TCTL);
2709 tctl &= ~E1000_TCTL_CT;
2710 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2711 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2712
2713 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2714 tarc = er32(TARC(0));
2715 /*
2716 * set the speed mode bit, we'll clear it if we're not at
2717 * gigabit link later
2718 */
2719 #define SPEED_MODE_BIT (1 << 21)
2720 tarc |= SPEED_MODE_BIT;
2721 ew32(TARC(0), tarc);
2722 }
2723
2724 /* errata: program both queues to unweighted RR */
2725 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2726 tarc = er32(TARC(0));
2727 tarc |= 1;
2728 ew32(TARC(0), tarc);
2729 tarc = er32(TARC(1));
2730 tarc |= 1;
2731 ew32(TARC(1), tarc);
2732 }
2733
2734 /* Setup Transmit Descriptor Settings for eop descriptor */
2735 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2736
2737 /* only set IDE if we are delaying interrupts using the timers */
2738 if (adapter->tx_int_delay)
2739 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2740
2741 /* enable Report Status bit */
2742 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2743
2744 ew32(TCTL, tctl);
2745
2746 e1000e_config_collision_dist(hw);
2747 }
2748
2749 /**
2750 * e1000_setup_rctl - configure the receive control registers
2751 * @adapter: Board private structure
2752 **/
2753 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2754 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2755 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2756 {
2757 struct e1000_hw *hw = &adapter->hw;
2758 u32 rctl, rfctl;
2759 u32 pages = 0;
2760
2761 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2762 if (hw->mac.type == e1000_pch2lan) {
2763 s32 ret_val;
2764
2765 if (adapter->netdev->mtu > ETH_DATA_LEN)
2766 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2767 else
2768 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2769
2770 if (ret_val)
2771 e_dbg("failed to enable jumbo frame workaround mode\n");
2772 }
2773
2774 /* Program MC offset vector base */
2775 rctl = er32(RCTL);
2776 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2777 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2778 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2779 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2780
2781 /* Do not Store bad packets */
2782 rctl &= ~E1000_RCTL_SBP;
2783
2784 /* Enable Long Packet receive */
2785 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2786 rctl &= ~E1000_RCTL_LPE;
2787 else
2788 rctl |= E1000_RCTL_LPE;
2789
2790 /* Some systems expect that the CRC is included in SMBUS traffic. The
2791 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2792 * host memory when this is enabled
2793 */
2794 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2795 rctl |= E1000_RCTL_SECRC;
2796
2797 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2798 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2799 u16 phy_data;
2800
2801 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2802 phy_data &= 0xfff8;
2803 phy_data |= (1 << 2);
2804 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2805
2806 e1e_rphy(hw, 22, &phy_data);
2807 phy_data &= 0x0fff;
2808 phy_data |= (1 << 14);
2809 e1e_wphy(hw, 0x10, 0x2823);
2810 e1e_wphy(hw, 0x11, 0x0003);
2811 e1e_wphy(hw, 22, phy_data);
2812 }
2813
2814 /* Setup buffer sizes */
2815 rctl &= ~E1000_RCTL_SZ_4096;
2816 rctl |= E1000_RCTL_BSEX;
2817 switch (adapter->rx_buffer_len) {
2818 case 2048:
2819 default:
2820 rctl |= E1000_RCTL_SZ_2048;
2821 rctl &= ~E1000_RCTL_BSEX;
2822 break;
2823 case 4096:
2824 rctl |= E1000_RCTL_SZ_4096;
2825 break;
2826 case 8192:
2827 rctl |= E1000_RCTL_SZ_8192;
2828 break;
2829 case 16384:
2830 rctl |= E1000_RCTL_SZ_16384;
2831 break;
2832 }
2833
2834 /*
2835 * 82571 and greater support packet-split where the protocol
2836 * header is placed in skb->data and the packet data is
2837 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2838 * In the case of a non-split, skb->data is linearly filled,
2839 * followed by the page buffers. Therefore, skb->data is
2840 * sized to hold the largest protocol header.
2841 *
2842 * allocations using alloc_page take too long for regular MTU
2843 * so only enable packet split for jumbo frames
2844 *
2845 * Using pages when the page size is greater than 16k wastes
2846 * a lot of memory, since we allocate 3 pages at all times
2847 * per packet.
2848 */
2849 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2850 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
2851 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2852 adapter->rx_ps_pages = pages;
2853 else
2854 adapter->rx_ps_pages = 0;
2855
2856 if (adapter->rx_ps_pages) {
2857 u32 psrctl = 0;
2858
2859 /* Configure extra packet-split registers */
2860 rfctl = er32(RFCTL);
2861 rfctl |= E1000_RFCTL_EXTEN;
2862 /*
2863 * disable packet split support for IPv6 extension headers,
2864 * because some malformed IPv6 headers can hang the Rx
2865 */
2866 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2867 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2868
2869 ew32(RFCTL, rfctl);
2870
2871 /* Enable Packet split descriptors */
2872 rctl |= E1000_RCTL_DTYP_PS;
2873
2874 psrctl |= adapter->rx_ps_bsize0 >>
2875 E1000_PSRCTL_BSIZE0_SHIFT;
2876
2877 switch (adapter->rx_ps_pages) {
2878 case 3:
2879 psrctl |= PAGE_SIZE <<
2880 E1000_PSRCTL_BSIZE3_SHIFT;
2881 case 2:
2882 psrctl |= PAGE_SIZE <<
2883 E1000_PSRCTL_BSIZE2_SHIFT;
2884 case 1:
2885 psrctl |= PAGE_SIZE >>
2886 E1000_PSRCTL_BSIZE1_SHIFT;
2887 break;
2888 }
2889
2890 ew32(PSRCTL, psrctl);
2891 }
2892
2893 ew32(RCTL, rctl);
2894 /* just started the receive unit, no need to restart */
2895 adapter->flags &= ~FLAG_RX_RESTART_NOW;
2896 }
2897
2898 /**
2899 * e1000_configure_rx - Configure Receive Unit after Reset
2900 * @adapter: board private structure
2901 *
2902 * Configure the Rx unit of the MAC after a reset.
2903 **/
2904 static void e1000_configure_rx(struct e1000_adapter *adapter)
2905 {
2906 struct e1000_hw *hw = &adapter->hw;
2907 struct e1000_ring *rx_ring = adapter->rx_ring;
2908 u64 rdba;
2909 u32 rdlen, rctl, rxcsum, ctrl_ext;
2910
2911 if (adapter->rx_ps_pages) {
2912 /* this is a 32 byte descriptor */
2913 rdlen = rx_ring->count *
2914 sizeof(union e1000_rx_desc_packet_split);
2915 adapter->clean_rx = e1000_clean_rx_irq_ps;
2916 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2917 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2918 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2919 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2920 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
2921 } else {
2922 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2923 adapter->clean_rx = e1000_clean_rx_irq;
2924 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2925 }
2926
2927 /* disable receives while setting up the descriptors */
2928 rctl = er32(RCTL);
2929 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2930 e1e_flush();
2931 usleep_range(10000, 20000);
2932
2933 if (adapter->flags2 & FLAG2_DMA_BURST) {
2934 /*
2935 * set the writeback threshold (only takes effect if the RDTR
2936 * is set). set GRAN=1 and write back up to 0x4 worth, and
2937 * enable prefetching of 0x20 Rx descriptors
2938 * granularity = 01
2939 * wthresh = 04,
2940 * hthresh = 04,
2941 * pthresh = 0x20
2942 */
2943 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2944 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2945
2946 /*
2947 * override the delay timers for enabling bursting, only if
2948 * the value was not set by the user via module options
2949 */
2950 if (adapter->rx_int_delay == DEFAULT_RDTR)
2951 adapter->rx_int_delay = BURST_RDTR;
2952 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2953 adapter->rx_abs_int_delay = BURST_RADV;
2954 }
2955
2956 /* set the Receive Delay Timer Register */
2957 ew32(RDTR, adapter->rx_int_delay);
2958
2959 /* irq moderation */
2960 ew32(RADV, adapter->rx_abs_int_delay);
2961 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
2962 ew32(ITR, 1000000000 / (adapter->itr * 256));
2963
2964 ctrl_ext = er32(CTRL_EXT);
2965 /* Auto-Mask interrupts upon ICR access */
2966 ctrl_ext |= E1000_CTRL_EXT_IAME;
2967 ew32(IAM, 0xffffffff);
2968 ew32(CTRL_EXT, ctrl_ext);
2969 e1e_flush();
2970
2971 /*
2972 * Setup the HW Rx Head and Tail Descriptor Pointers and
2973 * the Base and Length of the Rx Descriptor Ring
2974 */
2975 rdba = rx_ring->dma;
2976 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
2977 ew32(RDBAH, (rdba >> 32));
2978 ew32(RDLEN, rdlen);
2979 ew32(RDH, 0);
2980 ew32(RDT, 0);
2981 rx_ring->head = E1000_RDH;
2982 rx_ring->tail = E1000_RDT;
2983
2984 /* Enable Receive Checksum Offload for TCP and UDP */
2985 rxcsum = er32(RXCSUM);
2986 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2987 rxcsum |= E1000_RXCSUM_TUOFL;
2988
2989 /*
2990 * IPv4 payload checksum for UDP fragments must be
2991 * used in conjunction with packet-split.
2992 */
2993 if (adapter->rx_ps_pages)
2994 rxcsum |= E1000_RXCSUM_IPPCSE;
2995 } else {
2996 rxcsum &= ~E1000_RXCSUM_TUOFL;
2997 /* no need to clear IPPCSE as it defaults to 0 */
2998 }
2999 ew32(RXCSUM, rxcsum);
3000
3001 /*
3002 * Enable early receives on supported devices, only takes effect when
3003 * packet size is equal or larger than the specified value (in 8 byte
3004 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
3005 */
3006 if ((adapter->flags & FLAG_HAS_ERT) ||
3007 (adapter->hw.mac.type == e1000_pch2lan)) {
3008 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3009 u32 rxdctl = er32(RXDCTL(0));
3010 ew32(RXDCTL(0), rxdctl | 0x3);
3011 if (adapter->flags & FLAG_HAS_ERT)
3012 ew32(ERT, E1000_ERT_2048 | (1 << 13));
3013 /*
3014 * With jumbo frames and early-receive enabled,
3015 * excessive C-state transition latencies result in
3016 * dropped transactions.
3017 */
3018 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
3019 } else {
3020 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3021 PM_QOS_DEFAULT_VALUE);
3022 }
3023 }
3024
3025 /* Enable Receives */
3026 ew32(RCTL, rctl);
3027 }
3028
3029 /**
3030 * e1000_update_mc_addr_list - Update Multicast addresses
3031 * @hw: pointer to the HW structure
3032 * @mc_addr_list: array of multicast addresses to program
3033 * @mc_addr_count: number of multicast addresses to program
3034 *
3035 * Updates the Multicast Table Array.
3036 * The caller must have a packed mc_addr_list of multicast addresses.
3037 **/
3038 static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
3039 u32 mc_addr_count)
3040 {
3041 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
3042 }
3043
3044 /**
3045 * e1000_set_multi - Multicast and Promiscuous mode set
3046 * @netdev: network interface device structure
3047 *
3048 * The set_multi entry point is called whenever the multicast address
3049 * list or the network interface flags are updated. This routine is
3050 * responsible for configuring the hardware for proper multicast,
3051 * promiscuous mode, and all-multi behavior.
3052 **/
3053 static void e1000_set_multi(struct net_device *netdev)
3054 {
3055 struct e1000_adapter *adapter = netdev_priv(netdev);
3056 struct e1000_hw *hw = &adapter->hw;
3057 struct netdev_hw_addr *ha;
3058 u8 *mta_list;
3059 u32 rctl;
3060
3061 /* Check for Promiscuous and All Multicast modes */
3062
3063 rctl = er32(RCTL);
3064
3065 if (netdev->flags & IFF_PROMISC) {
3066 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3067 rctl &= ~E1000_RCTL_VFE;
3068 /* Do not hardware filter VLANs in promisc mode */
3069 e1000e_vlan_filter_disable(adapter);
3070 } else {
3071 if (netdev->flags & IFF_ALLMULTI) {
3072 rctl |= E1000_RCTL_MPE;
3073 rctl &= ~E1000_RCTL_UPE;
3074 } else {
3075 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3076 }
3077 e1000e_vlan_filter_enable(adapter);
3078 }
3079
3080 ew32(RCTL, rctl);
3081
3082 if (!netdev_mc_empty(netdev)) {
3083 int i = 0;
3084
3085 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3086 if (!mta_list)
3087 return;
3088
3089 /* prepare a packed array of only addresses. */
3090 netdev_for_each_mc_addr(ha, netdev)
3091 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3092
3093 e1000_update_mc_addr_list(hw, mta_list, i);
3094 kfree(mta_list);
3095 } else {
3096 /*
3097 * if we're called from probe, we might not have
3098 * anything to do here, so clear out the list
3099 */
3100 e1000_update_mc_addr_list(hw, NULL, 0);
3101 }
3102
3103 if (netdev->features & NETIF_F_HW_VLAN_RX)
3104 e1000e_vlan_strip_enable(adapter);
3105 else
3106 e1000e_vlan_strip_disable(adapter);
3107 }
3108
3109 /**
3110 * e1000_configure - configure the hardware for Rx and Tx
3111 * @adapter: private board structure
3112 **/
3113 static void e1000_configure(struct e1000_adapter *adapter)
3114 {
3115 e1000_set_multi(adapter->netdev);
3116
3117 e1000_restore_vlan(adapter);
3118 e1000_init_manageability_pt(adapter);
3119
3120 e1000_configure_tx(adapter);
3121 e1000_setup_rctl(adapter);
3122 e1000_configure_rx(adapter);
3123 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
3124 }
3125
3126 /**
3127 * e1000e_power_up_phy - restore link in case the phy was powered down
3128 * @adapter: address of board private structure
3129 *
3130 * The phy may be powered down to save power and turn off link when the
3131 * driver is unloaded and wake on lan is not enabled (among others)
3132 * *** this routine MUST be followed by a call to e1000e_reset ***
3133 **/
3134 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3135 {
3136 if (adapter->hw.phy.ops.power_up)
3137 adapter->hw.phy.ops.power_up(&adapter->hw);
3138
3139 adapter->hw.mac.ops.setup_link(&adapter->hw);
3140 }
3141
3142 /**
3143 * e1000_power_down_phy - Power down the PHY
3144 *
3145 * Power down the PHY so no link is implied when interface is down.
3146 * The PHY cannot be powered down if management or WoL is active.
3147 */
3148 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3149 {
3150 /* WoL is enabled */
3151 if (adapter->wol)
3152 return;
3153
3154 if (adapter->hw.phy.ops.power_down)
3155 adapter->hw.phy.ops.power_down(&adapter->hw);
3156 }
3157
3158 /**
3159 * e1000e_reset - bring the hardware into a known good state
3160 *
3161 * This function boots the hardware and enables some settings that
3162 * require a configuration cycle of the hardware - those cannot be
3163 * set/changed during runtime. After reset the device needs to be
3164 * properly configured for Rx, Tx etc.
3165 */
3166 void e1000e_reset(struct e1000_adapter *adapter)
3167 {
3168 struct e1000_mac_info *mac = &adapter->hw.mac;
3169 struct e1000_fc_info *fc = &adapter->hw.fc;
3170 struct e1000_hw *hw = &adapter->hw;
3171 u32 tx_space, min_tx_space, min_rx_space;
3172 u32 pba = adapter->pba;
3173 u16 hwm;
3174
3175 /* reset Packet Buffer Allocation to default */
3176 ew32(PBA, pba);
3177
3178 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3179 /*
3180 * To maintain wire speed transmits, the Tx FIFO should be
3181 * large enough to accommodate two full transmit packets,
3182 * rounded up to the next 1KB and expressed in KB. Likewise,
3183 * the Rx FIFO should be large enough to accommodate at least
3184 * one full receive packet and is similarly rounded up and
3185 * expressed in KB.
3186 */
3187 pba = er32(PBA);
3188 /* upper 16 bits has Tx packet buffer allocation size in KB */
3189 tx_space = pba >> 16;
3190 /* lower 16 bits has Rx packet buffer allocation size in KB */
3191 pba &= 0xffff;
3192 /*
3193 * the Tx fifo also stores 16 bytes of information about the Tx
3194 * but don't include ethernet FCS because hardware appends it
3195 */
3196 min_tx_space = (adapter->max_frame_size +
3197 sizeof(struct e1000_tx_desc) -
3198 ETH_FCS_LEN) * 2;
3199 min_tx_space = ALIGN(min_tx_space, 1024);
3200 min_tx_space >>= 10;
3201 /* software strips receive CRC, so leave room for it */
3202 min_rx_space = adapter->max_frame_size;
3203 min_rx_space = ALIGN(min_rx_space, 1024);
3204 min_rx_space >>= 10;
3205
3206 /*
3207 * If current Tx allocation is less than the min Tx FIFO size,
3208 * and the min Tx FIFO size is less than the current Rx FIFO
3209 * allocation, take space away from current Rx allocation
3210 */
3211 if ((tx_space < min_tx_space) &&
3212 ((min_tx_space - tx_space) < pba)) {
3213 pba -= min_tx_space - tx_space;
3214
3215 /*
3216 * if short on Rx space, Rx wins and must trump Tx
3217 * adjustment or use Early Receive if available
3218 */
3219 if ((pba < min_rx_space) &&
3220 (!(adapter->flags & FLAG_HAS_ERT)))
3221 /* ERT enabled in e1000_configure_rx */
3222 pba = min_rx_space;
3223 }
3224
3225 ew32(PBA, pba);
3226 }
3227
3228 /*
3229 * flow control settings
3230 *
3231 * The high water mark must be low enough to fit one full frame
3232 * (or the size used for early receive) above it in the Rx FIFO.
3233 * Set it to the lower of:
3234 * - 90% of the Rx FIFO size, and
3235 * - the full Rx FIFO size minus the early receive size (for parts
3236 * with ERT support assuming ERT set to E1000_ERT_2048), or
3237 * - the full Rx FIFO size minus one full frame
3238 */
3239 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3240 fc->pause_time = 0xFFFF;
3241 else
3242 fc->pause_time = E1000_FC_PAUSE_TIME;
3243 fc->send_xon = 1;
3244 fc->current_mode = fc->requested_mode;
3245
3246 switch (hw->mac.type) {
3247 default:
3248 if ((adapter->flags & FLAG_HAS_ERT) &&
3249 (adapter->netdev->mtu > ETH_DATA_LEN))
3250 hwm = min(((pba << 10) * 9 / 10),
3251 ((pba << 10) - (E1000_ERT_2048 << 3)));
3252 else
3253 hwm = min(((pba << 10) * 9 / 10),
3254 ((pba << 10) - adapter->max_frame_size));
3255
3256 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3257 fc->low_water = fc->high_water - 8;
3258 break;
3259 case e1000_pchlan:
3260 /*
3261 * Workaround PCH LOM adapter hangs with certain network
3262 * loads. If hangs persist, try disabling Tx flow control.
3263 */
3264 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3265 fc->high_water = 0x3500;
3266 fc->low_water = 0x1500;
3267 } else {
3268 fc->high_water = 0x5000;
3269 fc->low_water = 0x3000;
3270 }
3271 fc->refresh_time = 0x1000;
3272 break;
3273 case e1000_pch2lan:
3274 fc->high_water = 0x05C20;
3275 fc->low_water = 0x05048;
3276 fc->pause_time = 0x0650;
3277 fc->refresh_time = 0x0400;
3278 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3279 pba = 14;
3280 ew32(PBA, pba);
3281 }
3282 break;
3283 }
3284
3285 /*
3286 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3287 * fit in receive buffer and early-receive not supported.
3288 */
3289 if (adapter->itr_setting & 0x3) {
3290 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3291 !(adapter->flags & FLAG_HAS_ERT)) {
3292 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3293 dev_info(&adapter->pdev->dev,
3294 "Interrupt Throttle Rate turned off\n");
3295 adapter->flags2 |= FLAG2_DISABLE_AIM;
3296 ew32(ITR, 0);
3297 }
3298 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3299 dev_info(&adapter->pdev->dev,
3300 "Interrupt Throttle Rate turned on\n");
3301 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3302 adapter->itr = 20000;
3303 ew32(ITR, 1000000000 / (adapter->itr * 256));
3304 }
3305 }
3306
3307 /* Allow time for pending master requests to run */
3308 mac->ops.reset_hw(hw);
3309
3310 /*
3311 * For parts with AMT enabled, let the firmware know
3312 * that the network interface is in control
3313 */
3314 if (adapter->flags & FLAG_HAS_AMT)
3315 e1000e_get_hw_control(adapter);
3316
3317 ew32(WUC, 0);
3318
3319 if (mac->ops.init_hw(hw))
3320 e_err("Hardware Error\n");
3321
3322 e1000_update_mng_vlan(adapter);
3323
3324 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3325 ew32(VET, ETH_P_8021Q);
3326
3327 e1000e_reset_adaptive(hw);
3328
3329 if (!netif_running(adapter->netdev) &&
3330 !test_bit(__E1000_TESTING, &adapter->state)) {
3331 e1000_power_down_phy(adapter);
3332 return;
3333 }
3334
3335 e1000_get_phy_info(hw);
3336
3337 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3338 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3339 u16 phy_data = 0;
3340 /*
3341 * speed up time to link by disabling smart power down, ignore
3342 * the return value of this function because there is nothing
3343 * different we would do if it failed
3344 */
3345 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3346 phy_data &= ~IGP02E1000_PM_SPD;
3347 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3348 }
3349 }
3350
3351 int e1000e_up(struct e1000_adapter *adapter)
3352 {
3353 struct e1000_hw *hw = &adapter->hw;
3354
3355 /* hardware has been reset, we need to reload some things */
3356 e1000_configure(adapter);
3357
3358 clear_bit(__E1000_DOWN, &adapter->state);
3359
3360 napi_enable(&adapter->napi);
3361 if (adapter->msix_entries)
3362 e1000_configure_msix(adapter);
3363 e1000_irq_enable(adapter);
3364
3365 netif_wake_queue(adapter->netdev);
3366
3367 /* fire a link change interrupt to start the watchdog */
3368 if (adapter->msix_entries)
3369 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3370 else
3371 ew32(ICS, E1000_ICS_LSC);
3372
3373 return 0;
3374 }
3375
3376 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3377 {
3378 struct e1000_hw *hw = &adapter->hw;
3379
3380 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3381 return;
3382
3383 /* flush pending descriptor writebacks to memory */
3384 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3385 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3386
3387 /* execute the writes immediately */
3388 e1e_flush();
3389 }
3390
3391 static void e1000e_update_stats(struct e1000_adapter *adapter);
3392
3393 void e1000e_down(struct e1000_adapter *adapter)
3394 {
3395 struct net_device *netdev = adapter->netdev;
3396 struct e1000_hw *hw = &adapter->hw;
3397 u32 tctl, rctl;
3398
3399 /*
3400 * signal that we're down so the interrupt handler does not
3401 * reschedule our watchdog timer
3402 */
3403 set_bit(__E1000_DOWN, &adapter->state);
3404
3405 /* disable receives in the hardware */
3406 rctl = er32(RCTL);
3407 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3408 /* flush and sleep below */
3409
3410 netif_stop_queue(netdev);
3411
3412 /* disable transmits in the hardware */
3413 tctl = er32(TCTL);
3414 tctl &= ~E1000_TCTL_EN;
3415 ew32(TCTL, tctl);
3416 /* flush both disables and wait for them to finish */
3417 e1e_flush();
3418 usleep_range(10000, 20000);
3419
3420 napi_disable(&adapter->napi);
3421 e1000_irq_disable(adapter);
3422
3423 del_timer_sync(&adapter->watchdog_timer);
3424 del_timer_sync(&adapter->phy_info_timer);
3425
3426 netif_carrier_off(netdev);
3427
3428 spin_lock(&adapter->stats64_lock);
3429 e1000e_update_stats(adapter);
3430 spin_unlock(&adapter->stats64_lock);
3431
3432 adapter->link_speed = 0;
3433 adapter->link_duplex = 0;
3434
3435 if (!pci_channel_offline(adapter->pdev))
3436 e1000e_reset(adapter);
3437
3438 e1000e_flush_descriptors(adapter);
3439
3440 e1000_clean_tx_ring(adapter);
3441 e1000_clean_rx_ring(adapter);
3442
3443 /*
3444 * TODO: for power management, we could drop the link and
3445 * pci_disable_device here.
3446 */
3447 }
3448
3449 void e1000e_reinit_locked(struct e1000_adapter *adapter)
3450 {
3451 might_sleep();
3452 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3453 usleep_range(1000, 2000);
3454 e1000e_down(adapter);
3455 e1000e_up(adapter);
3456 clear_bit(__E1000_RESETTING, &adapter->state);
3457 }
3458
3459 /**
3460 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3461 * @adapter: board private structure to initialize
3462 *
3463 * e1000_sw_init initializes the Adapter private data structure.
3464 * Fields are initialized based on PCI device information and
3465 * OS network device settings (MTU size).
3466 **/
3467 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3468 {
3469 struct net_device *netdev = adapter->netdev;
3470
3471 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3472 adapter->rx_ps_bsize0 = 128;
3473 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3474 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3475
3476 spin_lock_init(&adapter->stats64_lock);
3477
3478 e1000e_set_interrupt_capability(adapter);
3479
3480 if (e1000_alloc_queues(adapter))
3481 return -ENOMEM;
3482
3483 /* Explicitly disable IRQ since the NIC can be in any state. */
3484 e1000_irq_disable(adapter);
3485
3486 set_bit(__E1000_DOWN, &adapter->state);
3487 return 0;
3488 }
3489
3490 /**
3491 * e1000_intr_msi_test - Interrupt Handler
3492 * @irq: interrupt number
3493 * @data: pointer to a network interface device structure
3494 **/
3495 static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3496 {
3497 struct net_device *netdev = data;
3498 struct e1000_adapter *adapter = netdev_priv(netdev);
3499 struct e1000_hw *hw = &adapter->hw;
3500 u32 icr = er32(ICR);
3501
3502 e_dbg("icr is %08X\n", icr);
3503 if (icr & E1000_ICR_RXSEQ) {
3504 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3505 wmb();
3506 }
3507
3508 return IRQ_HANDLED;
3509 }
3510
3511 /**
3512 * e1000_test_msi_interrupt - Returns 0 for successful test
3513 * @adapter: board private struct
3514 *
3515 * code flow taken from tg3.c
3516 **/
3517 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3518 {
3519 struct net_device *netdev = adapter->netdev;
3520 struct e1000_hw *hw = &adapter->hw;
3521 int err;
3522
3523 /* poll_enable hasn't been called yet, so don't need disable */
3524 /* clear any pending events */
3525 er32(ICR);
3526
3527 /* free the real vector and request a test handler */
3528 e1000_free_irq(adapter);
3529 e1000e_reset_interrupt_capability(adapter);
3530
3531 /* Assume that the test fails, if it succeeds then the test
3532 * MSI irq handler will unset this flag */
3533 adapter->flags |= FLAG_MSI_TEST_FAILED;
3534
3535 err = pci_enable_msi(adapter->pdev);
3536 if (err)
3537 goto msi_test_failed;
3538
3539 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3540 netdev->name, netdev);
3541 if (err) {
3542 pci_disable_msi(adapter->pdev);
3543 goto msi_test_failed;
3544 }
3545
3546 wmb();
3547
3548 e1000_irq_enable(adapter);
3549
3550 /* fire an unusual interrupt on the test handler */
3551 ew32(ICS, E1000_ICS_RXSEQ);
3552 e1e_flush();
3553 msleep(50);
3554
3555 e1000_irq_disable(adapter);
3556
3557 rmb();
3558
3559 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3560 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3561 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3562 } else
3563 e_dbg("MSI interrupt test succeeded!\n");
3564
3565 free_irq(adapter->pdev->irq, netdev);
3566 pci_disable_msi(adapter->pdev);
3567
3568 msi_test_failed:
3569 e1000e_set_interrupt_capability(adapter);
3570 return e1000_request_irq(adapter);
3571 }
3572
3573 /**
3574 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3575 * @adapter: board private struct
3576 *
3577 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3578 **/
3579 static int e1000_test_msi(struct e1000_adapter *adapter)
3580 {
3581 int err;
3582 u16 pci_cmd;
3583
3584 if (!(adapter->flags & FLAG_MSI_ENABLED))
3585 return 0;
3586
3587 /* disable SERR in case the MSI write causes a master abort */
3588 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3589 if (pci_cmd & PCI_COMMAND_SERR)
3590 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3591 pci_cmd & ~PCI_COMMAND_SERR);
3592
3593 err = e1000_test_msi_interrupt(adapter);
3594
3595 /* re-enable SERR */
3596 if (pci_cmd & PCI_COMMAND_SERR) {
3597 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3598 pci_cmd |= PCI_COMMAND_SERR;
3599 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3600 }
3601
3602 return err;
3603 }
3604
3605 /**
3606 * e1000_open - Called when a network interface is made active
3607 * @netdev: network interface device structure
3608 *
3609 * Returns 0 on success, negative value on failure
3610 *
3611 * The open entry point is called when a network interface is made
3612 * active by the system (IFF_UP). At this point all resources needed
3613 * for transmit and receive operations are allocated, the interrupt
3614 * handler is registered with the OS, the watchdog timer is started,
3615 * and the stack is notified that the interface is ready.
3616 **/
3617 static int e1000_open(struct net_device *netdev)
3618 {
3619 struct e1000_adapter *adapter = netdev_priv(netdev);
3620 struct e1000_hw *hw = &adapter->hw;
3621 struct pci_dev *pdev = adapter->pdev;
3622 int err;
3623
3624 /* disallow open during test */
3625 if (test_bit(__E1000_TESTING, &adapter->state))
3626 return -EBUSY;
3627
3628 pm_runtime_get_sync(&pdev->dev);
3629
3630 netif_carrier_off(netdev);
3631
3632 /* allocate transmit descriptors */
3633 err = e1000e_setup_tx_resources(adapter);
3634 if (err)
3635 goto err_setup_tx;
3636
3637 /* allocate receive descriptors */
3638 err = e1000e_setup_rx_resources(adapter);
3639 if (err)
3640 goto err_setup_rx;
3641
3642 /*
3643 * If AMT is enabled, let the firmware know that the network
3644 * interface is now open and reset the part to a known state.
3645 */
3646 if (adapter->flags & FLAG_HAS_AMT) {
3647 e1000e_get_hw_control(adapter);
3648 e1000e_reset(adapter);
3649 }
3650
3651 e1000e_power_up_phy(adapter);
3652
3653 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3654 if ((adapter->hw.mng_cookie.status &
3655 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3656 e1000_update_mng_vlan(adapter);
3657
3658 /* DMA latency requirement to workaround early-receive/jumbo issue */
3659 if ((adapter->flags & FLAG_HAS_ERT) ||
3660 (adapter->hw.mac.type == e1000_pch2lan))
3661 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3662 PM_QOS_CPU_DMA_LATENCY,
3663 PM_QOS_DEFAULT_VALUE);
3664
3665 /*
3666 * before we allocate an interrupt, we must be ready to handle it.
3667 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3668 * as soon as we call pci_request_irq, so we have to setup our
3669 * clean_rx handler before we do so.
3670 */
3671 e1000_configure(adapter);
3672
3673 err = e1000_request_irq(adapter);
3674 if (err)
3675 goto err_req_irq;
3676
3677 /*
3678 * Work around PCIe errata with MSI interrupts causing some chipsets to
3679 * ignore e1000e MSI messages, which means we need to test our MSI
3680 * interrupt now
3681 */
3682 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3683 err = e1000_test_msi(adapter);
3684 if (err) {
3685 e_err("Interrupt allocation failed\n");
3686 goto err_req_irq;
3687 }
3688 }
3689
3690 /* From here on the code is the same as e1000e_up() */
3691 clear_bit(__E1000_DOWN, &adapter->state);
3692
3693 napi_enable(&adapter->napi);
3694
3695 e1000_irq_enable(adapter);
3696
3697 adapter->tx_hang_recheck = false;
3698 netif_start_queue(netdev);
3699
3700 adapter->idle_check = true;
3701 pm_runtime_put(&pdev->dev);
3702
3703 /* fire a link status change interrupt to start the watchdog */
3704 if (adapter->msix_entries)
3705 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3706 else
3707 ew32(ICS, E1000_ICS_LSC);
3708
3709 return 0;
3710
3711 err_req_irq:
3712 e1000e_release_hw_control(adapter);
3713 e1000_power_down_phy(adapter);
3714 e1000e_free_rx_resources(adapter);
3715 err_setup_rx:
3716 e1000e_free_tx_resources(adapter);
3717 err_setup_tx:
3718 e1000e_reset(adapter);
3719 pm_runtime_put_sync(&pdev->dev);
3720
3721 return err;
3722 }
3723
3724 /**
3725 * e1000_close - Disables a network interface
3726 * @netdev: network interface device structure
3727 *
3728 * Returns 0, this is not allowed to fail
3729 *
3730 * The close entry point is called when an interface is de-activated
3731 * by the OS. The hardware is still under the drivers control, but
3732 * needs to be disabled. A global MAC reset is issued to stop the
3733 * hardware, and all transmit and receive resources are freed.
3734 **/
3735 static int e1000_close(struct net_device *netdev)
3736 {
3737 struct e1000_adapter *adapter = netdev_priv(netdev);
3738 struct pci_dev *pdev = adapter->pdev;
3739
3740 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3741
3742 pm_runtime_get_sync(&pdev->dev);
3743
3744 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3745 e1000e_down(adapter);
3746 e1000_free_irq(adapter);
3747 }
3748 e1000_power_down_phy(adapter);
3749
3750 e1000e_free_tx_resources(adapter);
3751 e1000e_free_rx_resources(adapter);
3752
3753 /*
3754 * kill manageability vlan ID if supported, but not if a vlan with
3755 * the same ID is registered on the host OS (let 8021q kill it)
3756 */
3757 if (adapter->hw.mng_cookie.status &
3758 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
3759 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3760
3761 /*
3762 * If AMT is enabled, let the firmware know that the network
3763 * interface is now closed
3764 */
3765 if ((adapter->flags & FLAG_HAS_AMT) &&
3766 !test_bit(__E1000_TESTING, &adapter->state))
3767 e1000e_release_hw_control(adapter);
3768
3769 if ((adapter->flags & FLAG_HAS_ERT) ||
3770 (adapter->hw.mac.type == e1000_pch2lan))
3771 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
3772
3773 pm_runtime_put_sync(&pdev->dev);
3774
3775 return 0;
3776 }
3777 /**
3778 * e1000_set_mac - Change the Ethernet Address of the NIC
3779 * @netdev: network interface device structure
3780 * @p: pointer to an address structure
3781 *
3782 * Returns 0 on success, negative on failure
3783 **/
3784 static int e1000_set_mac(struct net_device *netdev, void *p)
3785 {
3786 struct e1000_adapter *adapter = netdev_priv(netdev);
3787 struct sockaddr *addr = p;
3788
3789 if (!is_valid_ether_addr(addr->sa_data))
3790 return -EADDRNOTAVAIL;
3791
3792 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3793 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3794
3795 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3796
3797 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3798 /* activate the work around */
3799 e1000e_set_laa_state_82571(&adapter->hw, 1);
3800
3801 /*
3802 * Hold a copy of the LAA in RAR[14] This is done so that
3803 * between the time RAR[0] gets clobbered and the time it
3804 * gets fixed (in e1000_watchdog), the actual LAA is in one
3805 * of the RARs and no incoming packets directed to this port
3806 * are dropped. Eventually the LAA will be in RAR[0] and
3807 * RAR[14]
3808 */
3809 e1000e_rar_set(&adapter->hw,
3810 adapter->hw.mac.addr,
3811 adapter->hw.mac.rar_entry_count - 1);
3812 }
3813
3814 return 0;
3815 }
3816
3817 /**
3818 * e1000e_update_phy_task - work thread to update phy
3819 * @work: pointer to our work struct
3820 *
3821 * this worker thread exists because we must acquire a
3822 * semaphore to read the phy, which we could msleep while
3823 * waiting for it, and we can't msleep in a timer.
3824 **/
3825 static void e1000e_update_phy_task(struct work_struct *work)
3826 {
3827 struct e1000_adapter *adapter = container_of(work,
3828 struct e1000_adapter, update_phy_task);
3829
3830 if (test_bit(__E1000_DOWN, &adapter->state))
3831 return;
3832
3833 e1000_get_phy_info(&adapter->hw);
3834 }
3835
3836 /*
3837 * Need to wait a few seconds after link up to get diagnostic information from
3838 * the phy
3839 */
3840 static void e1000_update_phy_info(unsigned long data)
3841 {
3842 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3843
3844 if (test_bit(__E1000_DOWN, &adapter->state))
3845 return;
3846
3847 schedule_work(&adapter->update_phy_task);
3848 }
3849
3850 /**
3851 * e1000e_update_phy_stats - Update the PHY statistics counters
3852 * @adapter: board private structure
3853 **/
3854 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3855 {
3856 struct e1000_hw *hw = &adapter->hw;
3857 s32 ret_val;
3858 u16 phy_data;
3859
3860 ret_val = hw->phy.ops.acquire(hw);
3861 if (ret_val)
3862 return;
3863
3864 hw->phy.addr = 1;
3865
3866 #define HV_PHY_STATS_PAGE 778
3867 /*
3868 * A page set is expensive so check if already on desired page.
3869 * If not, set to the page with the PHY status registers.
3870 */
3871 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3872 &phy_data);
3873 if (ret_val)
3874 goto release;
3875 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3876 ret_val = e1000e_write_phy_reg_mdic(hw,
3877 IGP01E1000_PHY_PAGE_SELECT,
3878 (HV_PHY_STATS_PAGE <<
3879 IGP_PAGE_SHIFT));
3880 if (ret_val)
3881 goto release;
3882 }
3883
3884 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3885
3886 /* Single Collision Count */
3887 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3888 &phy_data);
3889 ret_val = e1000e_read_phy_reg_mdic(hw,
3890 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3891 &phy_data);
3892 if (!ret_val)
3893 adapter->stats.scc += phy_data;
3894
3895 /* Excessive Collision Count */
3896 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3897 &phy_data);
3898 ret_val = e1000e_read_phy_reg_mdic(hw,
3899 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3900 &phy_data);
3901 if (!ret_val)
3902 adapter->stats.ecol += phy_data;
3903
3904 /* Multiple Collision Count */
3905 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3906 &phy_data);
3907 ret_val = e1000e_read_phy_reg_mdic(hw,
3908 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3909 &phy_data);
3910 if (!ret_val)
3911 adapter->stats.mcc += phy_data;
3912
3913 /* Late Collision Count */
3914 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3915 &phy_data);
3916 ret_val = e1000e_read_phy_reg_mdic(hw,
3917 HV_LATECOL_LOWER &
3918 MAX_PHY_REG_ADDRESS,
3919 &phy_data);
3920 if (!ret_val)
3921 adapter->stats.latecol += phy_data;
3922
3923 /* Collision Count - also used for adaptive IFS */
3924 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3925 &phy_data);
3926 ret_val = e1000e_read_phy_reg_mdic(hw,
3927 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3928 &phy_data);
3929 if (!ret_val)
3930 hw->mac.collision_delta = phy_data;
3931
3932 /* Defer Count */
3933 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3934 &phy_data);
3935 ret_val = e1000e_read_phy_reg_mdic(hw,
3936 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3937 &phy_data);
3938 if (!ret_val)
3939 adapter->stats.dc += phy_data;
3940
3941 /* Transmit with no CRS */
3942 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3943 &phy_data);
3944 ret_val = e1000e_read_phy_reg_mdic(hw,
3945 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3946 &phy_data);
3947 if (!ret_val)
3948 adapter->stats.tncrs += phy_data;
3949
3950 release:
3951 hw->phy.ops.release(hw);
3952 }
3953
3954 /**
3955 * e1000e_update_stats - Update the board statistics counters
3956 * @adapter: board private structure
3957 **/
3958 static void e1000e_update_stats(struct e1000_adapter *adapter)
3959 {
3960 struct net_device *netdev = adapter->netdev;
3961 struct e1000_hw *hw = &adapter->hw;
3962 struct pci_dev *pdev = adapter->pdev;
3963
3964 /*
3965 * Prevent stats update while adapter is being reset, or if the pci
3966 * connection is down.
3967 */
3968 if (adapter->link_speed == 0)
3969 return;
3970 if (pci_channel_offline(pdev))
3971 return;
3972
3973 adapter->stats.crcerrs += er32(CRCERRS);
3974 adapter->stats.gprc += er32(GPRC);
3975 adapter->stats.gorc += er32(GORCL);
3976 er32(GORCH); /* Clear gorc */
3977 adapter->stats.bprc += er32(BPRC);
3978 adapter->stats.mprc += er32(MPRC);
3979 adapter->stats.roc += er32(ROC);
3980
3981 adapter->stats.mpc += er32(MPC);
3982
3983 /* Half-duplex statistics */
3984 if (adapter->link_duplex == HALF_DUPLEX) {
3985 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3986 e1000e_update_phy_stats(adapter);
3987 } else {
3988 adapter->stats.scc += er32(SCC);
3989 adapter->stats.ecol += er32(ECOL);
3990 adapter->stats.mcc += er32(MCC);
3991 adapter->stats.latecol += er32(LATECOL);
3992 adapter->stats.dc += er32(DC);
3993
3994 hw->mac.collision_delta = er32(COLC);
3995
3996 if ((hw->mac.type != e1000_82574) &&
3997 (hw->mac.type != e1000_82583))
3998 adapter->stats.tncrs += er32(TNCRS);
3999 }
4000 adapter->stats.colc += hw->mac.collision_delta;
4001 }
4002
4003 adapter->stats.xonrxc += er32(XONRXC);
4004 adapter->stats.xontxc += er32(XONTXC);
4005 adapter->stats.xoffrxc += er32(XOFFRXC);
4006 adapter->stats.xofftxc += er32(XOFFTXC);
4007 adapter->stats.gptc += er32(GPTC);
4008 adapter->stats.gotc += er32(GOTCL);
4009 er32(GOTCH); /* Clear gotc */
4010 adapter->stats.rnbc += er32(RNBC);
4011 adapter->stats.ruc += er32(RUC);
4012
4013 adapter->stats.mptc += er32(MPTC);
4014 adapter->stats.bptc += er32(BPTC);
4015
4016 /* used for adaptive IFS */
4017
4018 hw->mac.tx_packet_delta = er32(TPT);
4019 adapter->stats.tpt += hw->mac.tx_packet_delta;
4020
4021 adapter->stats.algnerrc += er32(ALGNERRC);
4022 adapter->stats.rxerrc += er32(RXERRC);
4023 adapter->stats.cexterr += er32(CEXTERR);
4024 adapter->stats.tsctc += er32(TSCTC);
4025 adapter->stats.tsctfc += er32(TSCTFC);
4026
4027 /* Fill out the OS statistics structure */
4028 netdev->stats.multicast = adapter->stats.mprc;
4029 netdev->stats.collisions = adapter->stats.colc;
4030
4031 /* Rx Errors */
4032
4033 /*
4034 * RLEC on some newer hardware can be incorrect so build
4035 * our own version based on RUC and ROC
4036 */
4037 netdev->stats.rx_errors = adapter->stats.rxerrc +
4038 adapter->stats.crcerrs + adapter->stats.algnerrc +
4039 adapter->stats.ruc + adapter->stats.roc +
4040 adapter->stats.cexterr;
4041 netdev->stats.rx_length_errors = adapter->stats.ruc +
4042 adapter->stats.roc;
4043 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4044 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4045 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4046
4047 /* Tx Errors */
4048 netdev->stats.tx_errors = adapter->stats.ecol +
4049 adapter->stats.latecol;
4050 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4051 netdev->stats.tx_window_errors = adapter->stats.latecol;
4052 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4053
4054 /* Tx Dropped needs to be maintained elsewhere */
4055
4056 /* Management Stats */
4057 adapter->stats.mgptc += er32(MGTPTC);
4058 adapter->stats.mgprc += er32(MGTPRC);
4059 adapter->stats.mgpdc += er32(MGTPDC);
4060 }
4061
4062 /**
4063 * e1000_phy_read_status - Update the PHY register status snapshot
4064 * @adapter: board private structure
4065 **/
4066 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4067 {
4068 struct e1000_hw *hw = &adapter->hw;
4069 struct e1000_phy_regs *phy = &adapter->phy_regs;
4070
4071 if ((er32(STATUS) & E1000_STATUS_LU) &&
4072 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4073 int ret_val;
4074
4075 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4076 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4077 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4078 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4079 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4080 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4081 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4082 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4083 if (ret_val)
4084 e_warn("Error reading PHY register\n");
4085 } else {
4086 /*
4087 * Do not read PHY registers if link is not up
4088 * Set values to typical power-on defaults
4089 */
4090 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4091 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4092 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4093 BMSR_ERCAP);
4094 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4095 ADVERTISE_ALL | ADVERTISE_CSMA);
4096 phy->lpa = 0;
4097 phy->expansion = EXPANSION_ENABLENPAGE;
4098 phy->ctrl1000 = ADVERTISE_1000FULL;
4099 phy->stat1000 = 0;
4100 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4101 }
4102 }
4103
4104 static void e1000_print_link_info(struct e1000_adapter *adapter)
4105 {
4106 struct e1000_hw *hw = &adapter->hw;
4107 u32 ctrl = er32(CTRL);
4108
4109 /* Link status message must follow this format for user tools */
4110 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4111 "Flow Control: %s\n",
4112 adapter->netdev->name,
4113 adapter->link_speed,
4114 (adapter->link_duplex == FULL_DUPLEX) ?
4115 "Full Duplex" : "Half Duplex",
4116 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4117 "Rx/Tx" :
4118 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4119 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
4120 }
4121
4122 static bool e1000e_has_link(struct e1000_adapter *adapter)
4123 {
4124 struct e1000_hw *hw = &adapter->hw;
4125 bool link_active = 0;
4126 s32 ret_val = 0;
4127
4128 /*
4129 * get_link_status is set on LSC (link status) interrupt or
4130 * Rx sequence error interrupt. get_link_status will stay
4131 * false until the check_for_link establishes link
4132 * for copper adapters ONLY
4133 */
4134 switch (hw->phy.media_type) {
4135 case e1000_media_type_copper:
4136 if (hw->mac.get_link_status) {
4137 ret_val = hw->mac.ops.check_for_link(hw);
4138 link_active = !hw->mac.get_link_status;
4139 } else {
4140 link_active = 1;
4141 }
4142 break;
4143 case e1000_media_type_fiber:
4144 ret_val = hw->mac.ops.check_for_link(hw);
4145 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4146 break;
4147 case e1000_media_type_internal_serdes:
4148 ret_val = hw->mac.ops.check_for_link(hw);
4149 link_active = adapter->hw.mac.serdes_has_link;
4150 break;
4151 default:
4152 case e1000_media_type_unknown:
4153 break;
4154 }
4155
4156 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4157 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4158 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4159 e_info("Gigabit has been disabled, downgrading speed\n");
4160 }
4161
4162 return link_active;
4163 }
4164
4165 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4166 {
4167 /* make sure the receive unit is started */
4168 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4169 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4170 struct e1000_hw *hw = &adapter->hw;
4171 u32 rctl = er32(RCTL);
4172 ew32(RCTL, rctl | E1000_RCTL_EN);
4173 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4174 }
4175 }
4176
4177 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4178 {
4179 struct e1000_hw *hw = &adapter->hw;
4180
4181 /*
4182 * With 82574 controllers, PHY needs to be checked periodically
4183 * for hung state and reset, if two calls return true
4184 */
4185 if (e1000_check_phy_82574(hw))
4186 adapter->phy_hang_count++;
4187 else
4188 adapter->phy_hang_count = 0;
4189
4190 if (adapter->phy_hang_count > 1) {
4191 adapter->phy_hang_count = 0;
4192 schedule_work(&adapter->reset_task);
4193 }
4194 }
4195
4196 /**
4197 * e1000_watchdog - Timer Call-back
4198 * @data: pointer to adapter cast into an unsigned long
4199 **/
4200 static void e1000_watchdog(unsigned long data)
4201 {
4202 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4203
4204 /* Do the rest outside of interrupt context */
4205 schedule_work(&adapter->watchdog_task);
4206
4207 /* TODO: make this use queue_delayed_work() */
4208 }
4209
4210 static void e1000_watchdog_task(struct work_struct *work)
4211 {
4212 struct e1000_adapter *adapter = container_of(work,
4213 struct e1000_adapter, watchdog_task);
4214 struct net_device *netdev = adapter->netdev;
4215 struct e1000_mac_info *mac = &adapter->hw.mac;
4216 struct e1000_phy_info *phy = &adapter->hw.phy;
4217 struct e1000_ring *tx_ring = adapter->tx_ring;
4218 struct e1000_hw *hw = &adapter->hw;
4219 u32 link, tctl;
4220
4221 if (test_bit(__E1000_DOWN, &adapter->state))
4222 return;
4223
4224 link = e1000e_has_link(adapter);
4225 if ((netif_carrier_ok(netdev)) && link) {
4226 /* Cancel scheduled suspend requests. */
4227 pm_runtime_resume(netdev->dev.parent);
4228
4229 e1000e_enable_receives(adapter);
4230 goto link_up;
4231 }
4232
4233 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4234 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4235 e1000_update_mng_vlan(adapter);
4236
4237 if (link) {
4238 if (!netif_carrier_ok(netdev)) {
4239 bool txb2b = 1;
4240
4241 /* Cancel scheduled suspend requests. */
4242 pm_runtime_resume(netdev->dev.parent);
4243
4244 /* update snapshot of PHY registers on LSC */
4245 e1000_phy_read_status(adapter);
4246 mac->ops.get_link_up_info(&adapter->hw,
4247 &adapter->link_speed,
4248 &adapter->link_duplex);
4249 e1000_print_link_info(adapter);
4250 /*
4251 * On supported PHYs, check for duplex mismatch only
4252 * if link has autonegotiated at 10/100 half
4253 */
4254 if ((hw->phy.type == e1000_phy_igp_3 ||
4255 hw->phy.type == e1000_phy_bm) &&
4256 (hw->mac.autoneg == true) &&
4257 (adapter->link_speed == SPEED_10 ||
4258 adapter->link_speed == SPEED_100) &&
4259 (adapter->link_duplex == HALF_DUPLEX)) {
4260 u16 autoneg_exp;
4261
4262 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4263
4264 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4265 e_info("Autonegotiated half duplex but"
4266 " link partner cannot autoneg. "
4267 " Try forcing full duplex if "
4268 "link gets many collisions.\n");
4269 }
4270
4271 /* adjust timeout factor according to speed/duplex */
4272 adapter->tx_timeout_factor = 1;
4273 switch (adapter->link_speed) {
4274 case SPEED_10:
4275 txb2b = 0;
4276 adapter->tx_timeout_factor = 16;
4277 break;
4278 case SPEED_100:
4279 txb2b = 0;
4280 adapter->tx_timeout_factor = 10;
4281 break;
4282 }
4283
4284 /*
4285 * workaround: re-program speed mode bit after
4286 * link-up event
4287 */
4288 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4289 !txb2b) {
4290 u32 tarc0;
4291 tarc0 = er32(TARC(0));
4292 tarc0 &= ~SPEED_MODE_BIT;
4293 ew32(TARC(0), tarc0);
4294 }
4295
4296 /*
4297 * disable TSO for pcie and 10/100 speeds, to avoid
4298 * some hardware issues
4299 */
4300 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4301 switch (adapter->link_speed) {
4302 case SPEED_10:
4303 case SPEED_100:
4304 e_info("10/100 speed: disabling TSO\n");
4305 netdev->features &= ~NETIF_F_TSO;
4306 netdev->features &= ~NETIF_F_TSO6;
4307 break;
4308 case SPEED_1000:
4309 netdev->features |= NETIF_F_TSO;
4310 netdev->features |= NETIF_F_TSO6;
4311 break;
4312 default:
4313 /* oops */
4314 break;
4315 }
4316 }
4317
4318 /*
4319 * enable transmits in the hardware, need to do this
4320 * after setting TARC(0)
4321 */
4322 tctl = er32(TCTL);
4323 tctl |= E1000_TCTL_EN;
4324 ew32(TCTL, tctl);
4325
4326 /*
4327 * Perform any post-link-up configuration before
4328 * reporting link up.
4329 */
4330 if (phy->ops.cfg_on_link_up)
4331 phy->ops.cfg_on_link_up(hw);
4332
4333 netif_carrier_on(netdev);
4334
4335 if (!test_bit(__E1000_DOWN, &adapter->state))
4336 mod_timer(&adapter->phy_info_timer,
4337 round_jiffies(jiffies + 2 * HZ));
4338 }
4339 } else {
4340 if (netif_carrier_ok(netdev)) {
4341 adapter->link_speed = 0;
4342 adapter->link_duplex = 0;
4343 /* Link status message must follow this format */
4344 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4345 adapter->netdev->name);
4346 netif_carrier_off(netdev);
4347 if (!test_bit(__E1000_DOWN, &adapter->state))
4348 mod_timer(&adapter->phy_info_timer,
4349 round_jiffies(jiffies + 2 * HZ));
4350
4351 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4352 schedule_work(&adapter->reset_task);
4353 else
4354 pm_schedule_suspend(netdev->dev.parent,
4355 LINK_TIMEOUT);
4356 }
4357 }
4358
4359 link_up:
4360 spin_lock(&adapter->stats64_lock);
4361 e1000e_update_stats(adapter);
4362
4363 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4364 adapter->tpt_old = adapter->stats.tpt;
4365 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4366 adapter->colc_old = adapter->stats.colc;
4367
4368 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4369 adapter->gorc_old = adapter->stats.gorc;
4370 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4371 adapter->gotc_old = adapter->stats.gotc;
4372 spin_unlock(&adapter->stats64_lock);
4373
4374 e1000e_update_adaptive(&adapter->hw);
4375
4376 if (!netif_carrier_ok(netdev) &&
4377 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4378 /*
4379 * We've lost link, so the controller stops DMA,
4380 * but we've got queued Tx work that's never going
4381 * to get done, so reset controller to flush Tx.
4382 * (Do the reset outside of interrupt context).
4383 */
4384 schedule_work(&adapter->reset_task);
4385 /* return immediately since reset is imminent */
4386 return;
4387 }
4388
4389 /* Simple mode for Interrupt Throttle Rate (ITR) */
4390 if (adapter->itr_setting == 4) {
4391 /*
4392 * Symmetric Tx/Rx gets a reduced ITR=2000;
4393 * Total asymmetrical Tx or Rx gets ITR=8000;
4394 * everyone else is between 2000-8000.
4395 */
4396 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4397 u32 dif = (adapter->gotc > adapter->gorc ?
4398 adapter->gotc - adapter->gorc :
4399 adapter->gorc - adapter->gotc) / 10000;
4400 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4401
4402 ew32(ITR, 1000000000 / (itr * 256));
4403 }
4404
4405 /* Cause software interrupt to ensure Rx ring is cleaned */
4406 if (adapter->msix_entries)
4407 ew32(ICS, adapter->rx_ring->ims_val);
4408 else
4409 ew32(ICS, E1000_ICS_RXDMT0);
4410
4411 /* flush pending descriptors to memory before detecting Tx hang */
4412 e1000e_flush_descriptors(adapter);
4413
4414 /* Force detection of hung controller every watchdog period */
4415 adapter->detect_tx_hung = 1;
4416
4417 /*
4418 * With 82571 controllers, LAA may be overwritten due to controller
4419 * reset from the other port. Set the appropriate LAA in RAR[0]
4420 */
4421 if (e1000e_get_laa_state_82571(hw))
4422 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4423
4424 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4425 e1000e_check_82574_phy_workaround(adapter);
4426
4427 /* Reset the timer */
4428 if (!test_bit(__E1000_DOWN, &adapter->state))
4429 mod_timer(&adapter->watchdog_timer,
4430 round_jiffies(jiffies + 2 * HZ));
4431 }
4432
4433 #define E1000_TX_FLAGS_CSUM 0x00000001
4434 #define E1000_TX_FLAGS_VLAN 0x00000002
4435 #define E1000_TX_FLAGS_TSO 0x00000004
4436 #define E1000_TX_FLAGS_IPV4 0x00000008
4437 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4438 #define E1000_TX_FLAGS_VLAN_SHIFT 16
4439
4440 static int e1000_tso(struct e1000_adapter *adapter,
4441 struct sk_buff *skb)
4442 {
4443 struct e1000_ring *tx_ring = adapter->tx_ring;
4444 struct e1000_context_desc *context_desc;
4445 struct e1000_buffer *buffer_info;
4446 unsigned int i;
4447 u32 cmd_length = 0;
4448 u16 ipcse = 0, tucse, mss;
4449 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4450
4451 if (!skb_is_gso(skb))
4452 return 0;
4453
4454 if (skb_header_cloned(skb)) {
4455 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4456
4457 if (err)
4458 return err;
4459 }
4460
4461 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4462 mss = skb_shinfo(skb)->gso_size;
4463 if (skb->protocol == htons(ETH_P_IP)) {
4464 struct iphdr *iph = ip_hdr(skb);
4465 iph->tot_len = 0;
4466 iph->check = 0;
4467 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4468 0, IPPROTO_TCP, 0);
4469 cmd_length = E1000_TXD_CMD_IP;
4470 ipcse = skb_transport_offset(skb) - 1;
4471 } else if (skb_is_gso_v6(skb)) {
4472 ipv6_hdr(skb)->payload_len = 0;
4473 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4474 &ipv6_hdr(skb)->daddr,
4475 0, IPPROTO_TCP, 0);
4476 ipcse = 0;
4477 }
4478 ipcss = skb_network_offset(skb);
4479 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4480 tucss = skb_transport_offset(skb);
4481 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4482 tucse = 0;
4483
4484 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4485 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4486
4487 i = tx_ring->next_to_use;
4488 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4489 buffer_info = &tx_ring->buffer_info[i];
4490
4491 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4492 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4493 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4494 context_desc->upper_setup.tcp_fields.tucss = tucss;
4495 context_desc->upper_setup.tcp_fields.tucso = tucso;
4496 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4497 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4498 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4499 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4500
4501 buffer_info->time_stamp = jiffies;
4502 buffer_info->next_to_watch = i;
4503
4504 i++;
4505 if (i == tx_ring->count)
4506 i = 0;
4507 tx_ring->next_to_use = i;
4508
4509 return 1;
4510 }
4511
4512 static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4513 {
4514 struct e1000_ring *tx_ring = adapter->tx_ring;
4515 struct e1000_context_desc *context_desc;
4516 struct e1000_buffer *buffer_info;
4517 unsigned int i;
4518 u8 css;
4519 u32 cmd_len = E1000_TXD_CMD_DEXT;
4520 __be16 protocol;
4521
4522 if (skb->ip_summed != CHECKSUM_PARTIAL)
4523 return 0;
4524
4525 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4526 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4527 else
4528 protocol = skb->protocol;
4529
4530 switch (protocol) {
4531 case cpu_to_be16(ETH_P_IP):
4532 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4533 cmd_len |= E1000_TXD_CMD_TCP;
4534 break;
4535 case cpu_to_be16(ETH_P_IPV6):
4536 /* XXX not handling all IPV6 headers */
4537 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4538 cmd_len |= E1000_TXD_CMD_TCP;
4539 break;
4540 default:
4541 if (unlikely(net_ratelimit()))
4542 e_warn("checksum_partial proto=%x!\n",
4543 be16_to_cpu(protocol));
4544 break;
4545 }
4546
4547 css = skb_checksum_start_offset(skb);
4548
4549 i = tx_ring->next_to_use;
4550 buffer_info = &tx_ring->buffer_info[i];
4551 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4552
4553 context_desc->lower_setup.ip_config = 0;
4554 context_desc->upper_setup.tcp_fields.tucss = css;
4555 context_desc->upper_setup.tcp_fields.tucso =
4556 css + skb->csum_offset;
4557 context_desc->upper_setup.tcp_fields.tucse = 0;
4558 context_desc->tcp_seg_setup.data = 0;
4559 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4560
4561 buffer_info->time_stamp = jiffies;
4562 buffer_info->next_to_watch = i;
4563
4564 i++;
4565 if (i == tx_ring->count)
4566 i = 0;
4567 tx_ring->next_to_use = i;
4568
4569 return 1;
4570 }
4571
4572 #define E1000_MAX_PER_TXD 8192
4573 #define E1000_MAX_TXD_PWR 12
4574
4575 static int e1000_tx_map(struct e1000_adapter *adapter,
4576 struct sk_buff *skb, unsigned int first,
4577 unsigned int max_per_txd, unsigned int nr_frags,
4578 unsigned int mss)
4579 {
4580 struct e1000_ring *tx_ring = adapter->tx_ring;
4581 struct pci_dev *pdev = adapter->pdev;
4582 struct e1000_buffer *buffer_info;
4583 unsigned int len = skb_headlen(skb);
4584 unsigned int offset = 0, size, count = 0, i;
4585 unsigned int f, bytecount, segs;
4586
4587 i = tx_ring->next_to_use;
4588
4589 while (len) {
4590 buffer_info = &tx_ring->buffer_info[i];
4591 size = min(len, max_per_txd);
4592
4593 buffer_info->length = size;
4594 buffer_info->time_stamp = jiffies;
4595 buffer_info->next_to_watch = i;
4596 buffer_info->dma = dma_map_single(&pdev->dev,
4597 skb->data + offset,
4598 size, DMA_TO_DEVICE);
4599 buffer_info->mapped_as_page = false;
4600 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4601 goto dma_error;
4602
4603 len -= size;
4604 offset += size;
4605 count++;
4606
4607 if (len) {
4608 i++;
4609 if (i == tx_ring->count)
4610 i = 0;
4611 }
4612 }
4613
4614 for (f = 0; f < nr_frags; f++) {
4615 struct skb_frag_struct *frag;
4616
4617 frag = &skb_shinfo(skb)->frags[f];
4618 len = frag->size;
4619 offset = frag->page_offset;
4620
4621 while (len) {
4622 i++;
4623 if (i == tx_ring->count)
4624 i = 0;
4625
4626 buffer_info = &tx_ring->buffer_info[i];
4627 size = min(len, max_per_txd);
4628
4629 buffer_info->length = size;
4630 buffer_info->time_stamp = jiffies;
4631 buffer_info->next_to_watch = i;
4632 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
4633 offset, size,
4634 DMA_TO_DEVICE);
4635 buffer_info->mapped_as_page = true;
4636 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4637 goto dma_error;
4638
4639 len -= size;
4640 offset += size;
4641 count++;
4642 }
4643 }
4644
4645 segs = skb_shinfo(skb)->gso_segs ? : 1;
4646 /* multiply data chunks by size of headers */
4647 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4648
4649 tx_ring->buffer_info[i].skb = skb;
4650 tx_ring->buffer_info[i].segs = segs;
4651 tx_ring->buffer_info[i].bytecount = bytecount;
4652 tx_ring->buffer_info[first].next_to_watch = i;
4653
4654 return count;
4655
4656 dma_error:
4657 dev_err(&pdev->dev, "Tx DMA map failed\n");
4658 buffer_info->dma = 0;
4659 if (count)
4660 count--;
4661
4662 while (count--) {
4663 if (i == 0)
4664 i += tx_ring->count;
4665 i--;
4666 buffer_info = &tx_ring->buffer_info[i];
4667 e1000_put_txbuf(adapter, buffer_info);
4668 }
4669
4670 return 0;
4671 }
4672
4673 static void e1000_tx_queue(struct e1000_adapter *adapter,
4674 int tx_flags, int count)
4675 {
4676 struct e1000_ring *tx_ring = adapter->tx_ring;
4677 struct e1000_tx_desc *tx_desc = NULL;
4678 struct e1000_buffer *buffer_info;
4679 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4680 unsigned int i;
4681
4682 if (tx_flags & E1000_TX_FLAGS_TSO) {
4683 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4684 E1000_TXD_CMD_TSE;
4685 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4686
4687 if (tx_flags & E1000_TX_FLAGS_IPV4)
4688 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4689 }
4690
4691 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4692 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4693 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4694 }
4695
4696 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4697 txd_lower |= E1000_TXD_CMD_VLE;
4698 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4699 }
4700
4701 i = tx_ring->next_to_use;
4702
4703 do {
4704 buffer_info = &tx_ring->buffer_info[i];
4705 tx_desc = E1000_TX_DESC(*tx_ring, i);
4706 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4707 tx_desc->lower.data =
4708 cpu_to_le32(txd_lower | buffer_info->length);
4709 tx_desc->upper.data = cpu_to_le32(txd_upper);
4710
4711 i++;
4712 if (i == tx_ring->count)
4713 i = 0;
4714 } while (--count > 0);
4715
4716 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4717
4718 /*
4719 * Force memory writes to complete before letting h/w
4720 * know there are new descriptors to fetch. (Only
4721 * applicable for weak-ordered memory model archs,
4722 * such as IA-64).
4723 */
4724 wmb();
4725
4726 tx_ring->next_to_use = i;
4727 writel(i, adapter->hw.hw_addr + tx_ring->tail);
4728 /*
4729 * we need this if more than one processor can write to our tail
4730 * at a time, it synchronizes IO on IA64/Altix systems
4731 */
4732 mmiowb();
4733 }
4734
4735 #define MINIMUM_DHCP_PACKET_SIZE 282
4736 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4737 struct sk_buff *skb)
4738 {
4739 struct e1000_hw *hw = &adapter->hw;
4740 u16 length, offset;
4741
4742 if (vlan_tx_tag_present(skb)) {
4743 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4744 (adapter->hw.mng_cookie.status &
4745 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4746 return 0;
4747 }
4748
4749 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4750 return 0;
4751
4752 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4753 return 0;
4754
4755 {
4756 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4757 struct udphdr *udp;
4758
4759 if (ip->protocol != IPPROTO_UDP)
4760 return 0;
4761
4762 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4763 if (ntohs(udp->dest) != 67)
4764 return 0;
4765
4766 offset = (u8 *)udp + 8 - skb->data;
4767 length = skb->len - offset;
4768 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4769 }
4770
4771 return 0;
4772 }
4773
4774 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4775 {
4776 struct e1000_adapter *adapter = netdev_priv(netdev);
4777
4778 netif_stop_queue(netdev);
4779 /*
4780 * Herbert's original patch had:
4781 * smp_mb__after_netif_stop_queue();
4782 * but since that doesn't exist yet, just open code it.
4783 */
4784 smp_mb();
4785
4786 /*
4787 * We need to check again in a case another CPU has just
4788 * made room available.
4789 */
4790 if (e1000_desc_unused(adapter->tx_ring) < size)
4791 return -EBUSY;
4792
4793 /* A reprieve! */
4794 netif_start_queue(netdev);
4795 ++adapter->restart_queue;
4796 return 0;
4797 }
4798
4799 static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4800 {
4801 struct e1000_adapter *adapter = netdev_priv(netdev);
4802
4803 if (e1000_desc_unused(adapter->tx_ring) >= size)
4804 return 0;
4805 return __e1000_maybe_stop_tx(netdev, size);
4806 }
4807
4808 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4809 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4810 struct net_device *netdev)
4811 {
4812 struct e1000_adapter *adapter = netdev_priv(netdev);
4813 struct e1000_ring *tx_ring = adapter->tx_ring;
4814 unsigned int first;
4815 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4816 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4817 unsigned int tx_flags = 0;
4818 unsigned int len = skb_headlen(skb);
4819 unsigned int nr_frags;
4820 unsigned int mss;
4821 int count = 0;
4822 int tso;
4823 unsigned int f;
4824
4825 if (test_bit(__E1000_DOWN, &adapter->state)) {
4826 dev_kfree_skb_any(skb);
4827 return NETDEV_TX_OK;
4828 }
4829
4830 if (skb->len <= 0) {
4831 dev_kfree_skb_any(skb);
4832 return NETDEV_TX_OK;
4833 }
4834
4835 mss = skb_shinfo(skb)->gso_size;
4836 /*
4837 * The controller does a simple calculation to
4838 * make sure there is enough room in the FIFO before
4839 * initiating the DMA for each buffer. The calc is:
4840 * 4 = ceil(buffer len/mss). To make sure we don't
4841 * overrun the FIFO, adjust the max buffer len if mss
4842 * drops.
4843 */
4844 if (mss) {
4845 u8 hdr_len;
4846 max_per_txd = min(mss << 2, max_per_txd);
4847 max_txd_pwr = fls(max_per_txd) - 1;
4848
4849 /*
4850 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4851 * points to just header, pull a few bytes of payload from
4852 * frags into skb->data
4853 */
4854 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4855 /*
4856 * we do this workaround for ES2LAN, but it is un-necessary,
4857 * avoiding it could save a lot of cycles
4858 */
4859 if (skb->data_len && (hdr_len == len)) {
4860 unsigned int pull_size;
4861
4862 pull_size = min((unsigned int)4, skb->data_len);
4863 if (!__pskb_pull_tail(skb, pull_size)) {
4864 e_err("__pskb_pull_tail failed.\n");
4865 dev_kfree_skb_any(skb);
4866 return NETDEV_TX_OK;
4867 }
4868 len = skb_headlen(skb);
4869 }
4870 }
4871
4872 /* reserve a descriptor for the offload context */
4873 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4874 count++;
4875 count++;
4876
4877 count += TXD_USE_COUNT(len, max_txd_pwr);
4878
4879 nr_frags = skb_shinfo(skb)->nr_frags;
4880 for (f = 0; f < nr_frags; f++)
4881 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4882 max_txd_pwr);
4883
4884 if (adapter->hw.mac.tx_pkt_filtering)
4885 e1000_transfer_dhcp_info(adapter, skb);
4886
4887 /*
4888 * need: count + 2 desc gap to keep tail from touching
4889 * head, otherwise try next time
4890 */
4891 if (e1000_maybe_stop_tx(netdev, count + 2))
4892 return NETDEV_TX_BUSY;
4893
4894 if (vlan_tx_tag_present(skb)) {
4895 tx_flags |= E1000_TX_FLAGS_VLAN;
4896 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4897 }
4898
4899 first = tx_ring->next_to_use;
4900
4901 tso = e1000_tso(adapter, skb);
4902 if (tso < 0) {
4903 dev_kfree_skb_any(skb);
4904 return NETDEV_TX_OK;
4905 }
4906
4907 if (tso)
4908 tx_flags |= E1000_TX_FLAGS_TSO;
4909 else if (e1000_tx_csum(adapter, skb))
4910 tx_flags |= E1000_TX_FLAGS_CSUM;
4911
4912 /*
4913 * Old method was to assume IPv4 packet by default if TSO was enabled.
4914 * 82571 hardware supports TSO capabilities for IPv6 as well...
4915 * no longer assume, we must.
4916 */
4917 if (skb->protocol == htons(ETH_P_IP))
4918 tx_flags |= E1000_TX_FLAGS_IPV4;
4919
4920 /* if count is 0 then mapping error has occurred */
4921 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4922 if (count) {
4923 e1000_tx_queue(adapter, tx_flags, count);
4924 /* Make sure there is space in the ring for the next send. */
4925 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4926
4927 } else {
4928 dev_kfree_skb_any(skb);
4929 tx_ring->buffer_info[first].time_stamp = 0;
4930 tx_ring->next_to_use = first;
4931 }
4932
4933 return NETDEV_TX_OK;
4934 }
4935
4936 /**
4937 * e1000_tx_timeout - Respond to a Tx Hang
4938 * @netdev: network interface device structure
4939 **/
4940 static void e1000_tx_timeout(struct net_device *netdev)
4941 {
4942 struct e1000_adapter *adapter = netdev_priv(netdev);
4943
4944 /* Do the reset outside of interrupt context */
4945 adapter->tx_timeout_count++;
4946 schedule_work(&adapter->reset_task);
4947 }
4948
4949 static void e1000_reset_task(struct work_struct *work)
4950 {
4951 struct e1000_adapter *adapter;
4952 adapter = container_of(work, struct e1000_adapter, reset_task);
4953
4954 /* don't run the task if already down */
4955 if (test_bit(__E1000_DOWN, &adapter->state))
4956 return;
4957
4958 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4959 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4960 e1000e_dump(adapter);
4961 e_err("Reset adapter\n");
4962 }
4963 e1000e_reinit_locked(adapter);
4964 }
4965
4966 /**
4967 * e1000_get_stats64 - Get System Network Statistics
4968 * @netdev: network interface device structure
4969 * @stats: rtnl_link_stats64 pointer
4970 *
4971 * Returns the address of the device statistics structure.
4972 **/
4973 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4974 struct rtnl_link_stats64 *stats)
4975 {
4976 struct e1000_adapter *adapter = netdev_priv(netdev);
4977
4978 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4979 spin_lock(&adapter->stats64_lock);
4980 e1000e_update_stats(adapter);
4981 /* Fill out the OS statistics structure */
4982 stats->rx_bytes = adapter->stats.gorc;
4983 stats->rx_packets = adapter->stats.gprc;
4984 stats->tx_bytes = adapter->stats.gotc;
4985 stats->tx_packets = adapter->stats.gptc;
4986 stats->multicast = adapter->stats.mprc;
4987 stats->collisions = adapter->stats.colc;
4988
4989 /* Rx Errors */
4990
4991 /*
4992 * RLEC on some newer hardware can be incorrect so build
4993 * our own version based on RUC and ROC
4994 */
4995 stats->rx_errors = adapter->stats.rxerrc +
4996 adapter->stats.crcerrs + adapter->stats.algnerrc +
4997 adapter->stats.ruc + adapter->stats.roc +
4998 adapter->stats.cexterr;
4999 stats->rx_length_errors = adapter->stats.ruc +
5000 adapter->stats.roc;
5001 stats->rx_crc_errors = adapter->stats.crcerrs;
5002 stats->rx_frame_errors = adapter->stats.algnerrc;
5003 stats->rx_missed_errors = adapter->stats.mpc;
5004
5005 /* Tx Errors */
5006 stats->tx_errors = adapter->stats.ecol +
5007 adapter->stats.latecol;
5008 stats->tx_aborted_errors = adapter->stats.ecol;
5009 stats->tx_window_errors = adapter->stats.latecol;
5010 stats->tx_carrier_errors = adapter->stats.tncrs;
5011
5012 /* Tx Dropped needs to be maintained elsewhere */
5013
5014 spin_unlock(&adapter->stats64_lock);
5015 return stats;
5016 }
5017
5018 /**
5019 * e1000_change_mtu - Change the Maximum Transfer Unit
5020 * @netdev: network interface device structure
5021 * @new_mtu: new value for maximum frame size
5022 *
5023 * Returns 0 on success, negative on failure
5024 **/
5025 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5026 {
5027 struct e1000_adapter *adapter = netdev_priv(netdev);
5028 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5029
5030 /* Jumbo frame support */
5031 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5032 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5033 e_err("Jumbo Frames not supported.\n");
5034 return -EINVAL;
5035 }
5036
5037 /* Supported frame sizes */
5038 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5039 (max_frame > adapter->max_hw_frame_size)) {
5040 e_err("Unsupported MTU setting\n");
5041 return -EINVAL;
5042 }
5043
5044 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5045 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5046 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5047 (new_mtu > ETH_DATA_LEN)) {
5048 e_err("Jumbo Frames not supported on 82579 when CRC "
5049 "stripping is disabled.\n");
5050 return -EINVAL;
5051 }
5052
5053 /* 82573 Errata 17 */
5054 if (((adapter->hw.mac.type == e1000_82573) ||
5055 (adapter->hw.mac.type == e1000_82574)) &&
5056 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5057 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5058 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5059 }
5060
5061 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5062 usleep_range(1000, 2000);
5063 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5064 adapter->max_frame_size = max_frame;
5065 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5066 netdev->mtu = new_mtu;
5067 if (netif_running(netdev))
5068 e1000e_down(adapter);
5069
5070 /*
5071 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5072 * means we reserve 2 more, this pushes us to allocate from the next
5073 * larger slab size.
5074 * i.e. RXBUFFER_2048 --> size-4096 slab
5075 * However with the new *_jumbo_rx* routines, jumbo receives will use
5076 * fragmented skbs
5077 */
5078
5079 if (max_frame <= 2048)
5080 adapter->rx_buffer_len = 2048;
5081 else
5082 adapter->rx_buffer_len = 4096;
5083
5084 /* adjust allocation if LPE protects us, and we aren't using SBP */
5085 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5086 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5087 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5088 + ETH_FCS_LEN;
5089
5090 if (netif_running(netdev))
5091 e1000e_up(adapter);
5092 else
5093 e1000e_reset(adapter);
5094
5095 clear_bit(__E1000_RESETTING, &adapter->state);
5096
5097 return 0;
5098 }
5099
5100 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5101 int cmd)
5102 {
5103 struct e1000_adapter *adapter = netdev_priv(netdev);
5104 struct mii_ioctl_data *data = if_mii(ifr);
5105
5106 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5107 return -EOPNOTSUPP;
5108
5109 switch (cmd) {
5110 case SIOCGMIIPHY:
5111 data->phy_id = adapter->hw.phy.addr;
5112 break;
5113 case SIOCGMIIREG:
5114 e1000_phy_read_status(adapter);
5115
5116 switch (data->reg_num & 0x1F) {
5117 case MII_BMCR:
5118 data->val_out = adapter->phy_regs.bmcr;
5119 break;
5120 case MII_BMSR:
5121 data->val_out = adapter->phy_regs.bmsr;
5122 break;
5123 case MII_PHYSID1:
5124 data->val_out = (adapter->hw.phy.id >> 16);
5125 break;
5126 case MII_PHYSID2:
5127 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5128 break;
5129 case MII_ADVERTISE:
5130 data->val_out = adapter->phy_regs.advertise;
5131 break;
5132 case MII_LPA:
5133 data->val_out = adapter->phy_regs.lpa;
5134 break;
5135 case MII_EXPANSION:
5136 data->val_out = adapter->phy_regs.expansion;
5137 break;
5138 case MII_CTRL1000:
5139 data->val_out = adapter->phy_regs.ctrl1000;
5140 break;
5141 case MII_STAT1000:
5142 data->val_out = adapter->phy_regs.stat1000;
5143 break;
5144 case MII_ESTATUS:
5145 data->val_out = adapter->phy_regs.estatus;
5146 break;
5147 default:
5148 return -EIO;
5149 }
5150 break;
5151 case SIOCSMIIREG:
5152 default:
5153 return -EOPNOTSUPP;
5154 }
5155 return 0;
5156 }
5157
5158 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5159 {
5160 switch (cmd) {
5161 case SIOCGMIIPHY:
5162 case SIOCGMIIREG:
5163 case SIOCSMIIREG:
5164 return e1000_mii_ioctl(netdev, ifr, cmd);
5165 default:
5166 return -EOPNOTSUPP;
5167 }
5168 }
5169
5170 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5171 {
5172 struct e1000_hw *hw = &adapter->hw;
5173 u32 i, mac_reg;
5174 u16 phy_reg;
5175 int retval = 0;
5176
5177 /* copy MAC RARs to PHY RARs */
5178 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5179
5180 /* copy MAC MTA to PHY MTA */
5181 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5182 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5183 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5184 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5185 }
5186
5187 /* configure PHY Rx Control register */
5188 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5189 mac_reg = er32(RCTL);
5190 if (mac_reg & E1000_RCTL_UPE)
5191 phy_reg |= BM_RCTL_UPE;
5192 if (mac_reg & E1000_RCTL_MPE)
5193 phy_reg |= BM_RCTL_MPE;
5194 phy_reg &= ~(BM_RCTL_MO_MASK);
5195 if (mac_reg & E1000_RCTL_MO_3)
5196 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5197 << BM_RCTL_MO_SHIFT);
5198 if (mac_reg & E1000_RCTL_BAM)
5199 phy_reg |= BM_RCTL_BAM;
5200 if (mac_reg & E1000_RCTL_PMCF)
5201 phy_reg |= BM_RCTL_PMCF;
5202 mac_reg = er32(CTRL);
5203 if (mac_reg & E1000_CTRL_RFCE)
5204 phy_reg |= BM_RCTL_RFCE;
5205 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5206
5207 /* enable PHY wakeup in MAC register */
5208 ew32(WUFC, wufc);
5209 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5210
5211 /* configure and enable PHY wakeup in PHY registers */
5212 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5213 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5214
5215 /* activate PHY wakeup */
5216 retval = hw->phy.ops.acquire(hw);
5217 if (retval) {
5218 e_err("Could not acquire PHY\n");
5219 return retval;
5220 }
5221 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5222 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5223 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5224 if (retval) {
5225 e_err("Could not read PHY page 769\n");
5226 goto out;
5227 }
5228 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5229 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5230 if (retval)
5231 e_err("Could not set PHY Host Wakeup bit\n");
5232 out:
5233 hw->phy.ops.release(hw);
5234
5235 return retval;
5236 }
5237
5238 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5239 bool runtime)
5240 {
5241 struct net_device *netdev = pci_get_drvdata(pdev);
5242 struct e1000_adapter *adapter = netdev_priv(netdev);
5243 struct e1000_hw *hw = &adapter->hw;
5244 u32 ctrl, ctrl_ext, rctl, status;
5245 /* Runtime suspend should only enable wakeup for link changes */
5246 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5247 int retval = 0;
5248
5249 netif_device_detach(netdev);
5250
5251 if (netif_running(netdev)) {
5252 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5253 e1000e_down(adapter);
5254 e1000_free_irq(adapter);
5255 }
5256 e1000e_reset_interrupt_capability(adapter);
5257
5258 retval = pci_save_state(pdev);
5259 if (retval)
5260 return retval;
5261
5262 status = er32(STATUS);
5263 if (status & E1000_STATUS_LU)
5264 wufc &= ~E1000_WUFC_LNKC;
5265
5266 if (wufc) {
5267 e1000_setup_rctl(adapter);
5268 e1000_set_multi(netdev);
5269
5270 /* turn on all-multi mode if wake on multicast is enabled */
5271 if (wufc & E1000_WUFC_MC) {
5272 rctl = er32(RCTL);
5273 rctl |= E1000_RCTL_MPE;
5274 ew32(RCTL, rctl);
5275 }
5276
5277 ctrl = er32(CTRL);
5278 /* advertise wake from D3Cold */
5279 #define E1000_CTRL_ADVD3WUC 0x00100000
5280 /* phy power management enable */
5281 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5282 ctrl |= E1000_CTRL_ADVD3WUC;
5283 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5284 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5285 ew32(CTRL, ctrl);
5286
5287 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5288 adapter->hw.phy.media_type ==
5289 e1000_media_type_internal_serdes) {
5290 /* keep the laser running in D3 */
5291 ctrl_ext = er32(CTRL_EXT);
5292 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5293 ew32(CTRL_EXT, ctrl_ext);
5294 }
5295
5296 if (adapter->flags & FLAG_IS_ICH)
5297 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5298
5299 /* Allow time for pending master requests to run */
5300 e1000e_disable_pcie_master(&adapter->hw);
5301
5302 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5303 /* enable wakeup by the PHY */
5304 retval = e1000_init_phy_wakeup(adapter, wufc);
5305 if (retval)
5306 return retval;
5307 } else {
5308 /* enable wakeup by the MAC */
5309 ew32(WUFC, wufc);
5310 ew32(WUC, E1000_WUC_PME_EN);
5311 }
5312 } else {
5313 ew32(WUC, 0);
5314 ew32(WUFC, 0);
5315 }
5316
5317 *enable_wake = !!wufc;
5318
5319 /* make sure adapter isn't asleep if manageability is enabled */
5320 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5321 (hw->mac.ops.check_mng_mode(hw)))
5322 *enable_wake = true;
5323
5324 if (adapter->hw.phy.type == e1000_phy_igp_3)
5325 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5326
5327 /*
5328 * Release control of h/w to f/w. If f/w is AMT enabled, this
5329 * would have already happened in close and is redundant.
5330 */
5331 e1000e_release_hw_control(adapter);
5332
5333 pci_disable_device(pdev);
5334
5335 return 0;
5336 }
5337
5338 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5339 {
5340 if (sleep && wake) {
5341 pci_prepare_to_sleep(pdev);
5342 return;
5343 }
5344
5345 pci_wake_from_d3(pdev, wake);
5346 pci_set_power_state(pdev, PCI_D3hot);
5347 }
5348
5349 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5350 bool wake)
5351 {
5352 struct net_device *netdev = pci_get_drvdata(pdev);
5353 struct e1000_adapter *adapter = netdev_priv(netdev);
5354
5355 /*
5356 * The pci-e switch on some quad port adapters will report a
5357 * correctable error when the MAC transitions from D0 to D3. To
5358 * prevent this we need to mask off the correctable errors on the
5359 * downstream port of the pci-e switch.
5360 */
5361 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5362 struct pci_dev *us_dev = pdev->bus->self;
5363 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5364 u16 devctl;
5365
5366 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5367 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5368 (devctl & ~PCI_EXP_DEVCTL_CERE));
5369
5370 e1000_power_off(pdev, sleep, wake);
5371
5372 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5373 } else {
5374 e1000_power_off(pdev, sleep, wake);
5375 }
5376 }
5377
5378 #ifdef CONFIG_PCIEASPM
5379 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5380 {
5381 pci_disable_link_state_locked(pdev, state);
5382 }
5383 #else
5384 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5385 {
5386 int pos;
5387 u16 reg16;
5388
5389 /*
5390 * Both device and parent should have the same ASPM setting.
5391 * Disable ASPM in downstream component first and then upstream.
5392 */
5393 pos = pci_pcie_cap(pdev);
5394 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5395 reg16 &= ~state;
5396 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5397
5398 if (!pdev->bus->self)
5399 return;
5400
5401 pos = pci_pcie_cap(pdev->bus->self);
5402 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5403 reg16 &= ~state;
5404 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5405 }
5406 #endif
5407 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5408 {
5409 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5410 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5411 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5412
5413 __e1000e_disable_aspm(pdev, state);
5414 }
5415
5416 #ifdef CONFIG_PM
5417 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5418 {
5419 return !!adapter->tx_ring->buffer_info;
5420 }
5421
5422 static int __e1000_resume(struct pci_dev *pdev)
5423 {
5424 struct net_device *netdev = pci_get_drvdata(pdev);
5425 struct e1000_adapter *adapter = netdev_priv(netdev);
5426 struct e1000_hw *hw = &adapter->hw;
5427 u16 aspm_disable_flag = 0;
5428 u32 err;
5429
5430 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5431 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5432 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5433 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5434 if (aspm_disable_flag)
5435 e1000e_disable_aspm(pdev, aspm_disable_flag);
5436
5437 pci_set_power_state(pdev, PCI_D0);
5438 pci_restore_state(pdev);
5439 pci_save_state(pdev);
5440
5441 e1000e_set_interrupt_capability(adapter);
5442 if (netif_running(netdev)) {
5443 err = e1000_request_irq(adapter);
5444 if (err)
5445 return err;
5446 }
5447
5448 e1000e_power_up_phy(adapter);
5449
5450 /* report the system wakeup cause from S3/S4 */
5451 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5452 u16 phy_data;
5453
5454 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5455 if (phy_data) {
5456 e_info("PHY Wakeup cause - %s\n",
5457 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5458 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5459 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5460 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5461 phy_data & E1000_WUS_LNKC ? "Link Status "
5462 " Change" : "other");
5463 }
5464 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5465 } else {
5466 u32 wus = er32(WUS);
5467 if (wus) {
5468 e_info("MAC Wakeup cause - %s\n",
5469 wus & E1000_WUS_EX ? "Unicast Packet" :
5470 wus & E1000_WUS_MC ? "Multicast Packet" :
5471 wus & E1000_WUS_BC ? "Broadcast Packet" :
5472 wus & E1000_WUS_MAG ? "Magic Packet" :
5473 wus & E1000_WUS_LNKC ? "Link Status Change" :
5474 "other");
5475 }
5476 ew32(WUS, ~0);
5477 }
5478
5479 e1000e_reset(adapter);
5480
5481 e1000_init_manageability_pt(adapter);
5482
5483 if (netif_running(netdev))
5484 e1000e_up(adapter);
5485
5486 netif_device_attach(netdev);
5487
5488 /*
5489 * If the controller has AMT, do not set DRV_LOAD until the interface
5490 * is up. For all other cases, let the f/w know that the h/w is now
5491 * under the control of the driver.
5492 */
5493 if (!(adapter->flags & FLAG_HAS_AMT))
5494 e1000e_get_hw_control(adapter);
5495
5496 return 0;
5497 }
5498
5499 #ifdef CONFIG_PM_SLEEP
5500 static int e1000_suspend(struct device *dev)
5501 {
5502 struct pci_dev *pdev = to_pci_dev(dev);
5503 int retval;
5504 bool wake;
5505
5506 retval = __e1000_shutdown(pdev, &wake, false);
5507 if (!retval)
5508 e1000_complete_shutdown(pdev, true, wake);
5509
5510 return retval;
5511 }
5512
5513 static int e1000_resume(struct device *dev)
5514 {
5515 struct pci_dev *pdev = to_pci_dev(dev);
5516 struct net_device *netdev = pci_get_drvdata(pdev);
5517 struct e1000_adapter *adapter = netdev_priv(netdev);
5518
5519 if (e1000e_pm_ready(adapter))
5520 adapter->idle_check = true;
5521
5522 return __e1000_resume(pdev);
5523 }
5524 #endif /* CONFIG_PM_SLEEP */
5525
5526 #ifdef CONFIG_PM_RUNTIME
5527 static int e1000_runtime_suspend(struct device *dev)
5528 {
5529 struct pci_dev *pdev = to_pci_dev(dev);
5530 struct net_device *netdev = pci_get_drvdata(pdev);
5531 struct e1000_adapter *adapter = netdev_priv(netdev);
5532
5533 if (e1000e_pm_ready(adapter)) {
5534 bool wake;
5535
5536 __e1000_shutdown(pdev, &wake, true);
5537 }
5538
5539 return 0;
5540 }
5541
5542 static int e1000_idle(struct device *dev)
5543 {
5544 struct pci_dev *pdev = to_pci_dev(dev);
5545 struct net_device *netdev = pci_get_drvdata(pdev);
5546 struct e1000_adapter *adapter = netdev_priv(netdev);
5547
5548 if (!e1000e_pm_ready(adapter))
5549 return 0;
5550
5551 if (adapter->idle_check) {
5552 adapter->idle_check = false;
5553 if (!e1000e_has_link(adapter))
5554 pm_schedule_suspend(dev, MSEC_PER_SEC);
5555 }
5556
5557 return -EBUSY;
5558 }
5559
5560 static int e1000_runtime_resume(struct device *dev)
5561 {
5562 struct pci_dev *pdev = to_pci_dev(dev);
5563 struct net_device *netdev = pci_get_drvdata(pdev);
5564 struct e1000_adapter *adapter = netdev_priv(netdev);
5565
5566 if (!e1000e_pm_ready(adapter))
5567 return 0;
5568
5569 adapter->idle_check = !dev->power.runtime_auto;
5570 return __e1000_resume(pdev);
5571 }
5572 #endif /* CONFIG_PM_RUNTIME */
5573 #endif /* CONFIG_PM */
5574
5575 static void e1000_shutdown(struct pci_dev *pdev)
5576 {
5577 bool wake = false;
5578
5579 __e1000_shutdown(pdev, &wake, false);
5580
5581 if (system_state == SYSTEM_POWER_OFF)
5582 e1000_complete_shutdown(pdev, false, wake);
5583 }
5584
5585 #ifdef CONFIG_NET_POLL_CONTROLLER
5586
5587 static irqreturn_t e1000_intr_msix(int irq, void *data)
5588 {
5589 struct net_device *netdev = data;
5590 struct e1000_adapter *adapter = netdev_priv(netdev);
5591
5592 if (adapter->msix_entries) {
5593 int vector, msix_irq;
5594
5595 vector = 0;
5596 msix_irq = adapter->msix_entries[vector].vector;
5597 disable_irq(msix_irq);
5598 e1000_intr_msix_rx(msix_irq, netdev);
5599 enable_irq(msix_irq);
5600
5601 vector++;
5602 msix_irq = adapter->msix_entries[vector].vector;
5603 disable_irq(msix_irq);
5604 e1000_intr_msix_tx(msix_irq, netdev);
5605 enable_irq(msix_irq);
5606
5607 vector++;
5608 msix_irq = adapter->msix_entries[vector].vector;
5609 disable_irq(msix_irq);
5610 e1000_msix_other(msix_irq, netdev);
5611 enable_irq(msix_irq);
5612 }
5613
5614 return IRQ_HANDLED;
5615 }
5616
5617 /*
5618 * Polling 'interrupt' - used by things like netconsole to send skbs
5619 * without having to re-enable interrupts. It's not called while
5620 * the interrupt routine is executing.
5621 */
5622 static void e1000_netpoll(struct net_device *netdev)
5623 {
5624 struct e1000_adapter *adapter = netdev_priv(netdev);
5625
5626 switch (adapter->int_mode) {
5627 case E1000E_INT_MODE_MSIX:
5628 e1000_intr_msix(adapter->pdev->irq, netdev);
5629 break;
5630 case E1000E_INT_MODE_MSI:
5631 disable_irq(adapter->pdev->irq);
5632 e1000_intr_msi(adapter->pdev->irq, netdev);
5633 enable_irq(adapter->pdev->irq);
5634 break;
5635 default: /* E1000E_INT_MODE_LEGACY */
5636 disable_irq(adapter->pdev->irq);
5637 e1000_intr(adapter->pdev->irq, netdev);
5638 enable_irq(adapter->pdev->irq);
5639 break;
5640 }
5641 }
5642 #endif
5643
5644 /**
5645 * e1000_io_error_detected - called when PCI error is detected
5646 * @pdev: Pointer to PCI device
5647 * @state: The current pci connection state
5648 *
5649 * This function is called after a PCI bus error affecting
5650 * this device has been detected.
5651 */
5652 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5653 pci_channel_state_t state)
5654 {
5655 struct net_device *netdev = pci_get_drvdata(pdev);
5656 struct e1000_adapter *adapter = netdev_priv(netdev);
5657
5658 netif_device_detach(netdev);
5659
5660 if (state == pci_channel_io_perm_failure)
5661 return PCI_ERS_RESULT_DISCONNECT;
5662
5663 if (netif_running(netdev))
5664 e1000e_down(adapter);
5665 pci_disable_device(pdev);
5666
5667 /* Request a slot slot reset. */
5668 return PCI_ERS_RESULT_NEED_RESET;
5669 }
5670
5671 /**
5672 * e1000_io_slot_reset - called after the pci bus has been reset.
5673 * @pdev: Pointer to PCI device
5674 *
5675 * Restart the card from scratch, as if from a cold-boot. Implementation
5676 * resembles the first-half of the e1000_resume routine.
5677 */
5678 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5679 {
5680 struct net_device *netdev = pci_get_drvdata(pdev);
5681 struct e1000_adapter *adapter = netdev_priv(netdev);
5682 struct e1000_hw *hw = &adapter->hw;
5683 u16 aspm_disable_flag = 0;
5684 int err;
5685 pci_ers_result_t result;
5686
5687 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5688 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5689 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5690 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5691 if (aspm_disable_flag)
5692 e1000e_disable_aspm(pdev, aspm_disable_flag);
5693
5694 err = pci_enable_device_mem(pdev);
5695 if (err) {
5696 dev_err(&pdev->dev,
5697 "Cannot re-enable PCI device after reset.\n");
5698 result = PCI_ERS_RESULT_DISCONNECT;
5699 } else {
5700 pci_set_master(pdev);
5701 pdev->state_saved = true;
5702 pci_restore_state(pdev);
5703
5704 pci_enable_wake(pdev, PCI_D3hot, 0);
5705 pci_enable_wake(pdev, PCI_D3cold, 0);
5706
5707 e1000e_reset(adapter);
5708 ew32(WUS, ~0);
5709 result = PCI_ERS_RESULT_RECOVERED;
5710 }
5711
5712 pci_cleanup_aer_uncorrect_error_status(pdev);
5713
5714 return result;
5715 }
5716
5717 /**
5718 * e1000_io_resume - called when traffic can start flowing again.
5719 * @pdev: Pointer to PCI device
5720 *
5721 * This callback is called when the error recovery driver tells us that
5722 * its OK to resume normal operation. Implementation resembles the
5723 * second-half of the e1000_resume routine.
5724 */
5725 static void e1000_io_resume(struct pci_dev *pdev)
5726 {
5727 struct net_device *netdev = pci_get_drvdata(pdev);
5728 struct e1000_adapter *adapter = netdev_priv(netdev);
5729
5730 e1000_init_manageability_pt(adapter);
5731
5732 if (netif_running(netdev)) {
5733 if (e1000e_up(adapter)) {
5734 dev_err(&pdev->dev,
5735 "can't bring device back up after reset\n");
5736 return;
5737 }
5738 }
5739
5740 netif_device_attach(netdev);
5741
5742 /*
5743 * If the controller has AMT, do not set DRV_LOAD until the interface
5744 * is up. For all other cases, let the f/w know that the h/w is now
5745 * under the control of the driver.
5746 */
5747 if (!(adapter->flags & FLAG_HAS_AMT))
5748 e1000e_get_hw_control(adapter);
5749
5750 }
5751
5752 static void e1000_print_device_info(struct e1000_adapter *adapter)
5753 {
5754 struct e1000_hw *hw = &adapter->hw;
5755 struct net_device *netdev = adapter->netdev;
5756 u32 ret_val;
5757 u8 pba_str[E1000_PBANUM_LENGTH];
5758
5759 /* print bus type/speed/width info */
5760 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
5761 /* bus width */
5762 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5763 "Width x1"),
5764 /* MAC address */
5765 netdev->dev_addr);
5766 e_info("Intel(R) PRO/%s Network Connection\n",
5767 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5768 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5769 E1000_PBANUM_LENGTH);
5770 if (ret_val)
5771 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
5772 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5773 hw->mac.type, hw->phy.type, pba_str);
5774 }
5775
5776 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5777 {
5778 struct e1000_hw *hw = &adapter->hw;
5779 int ret_val;
5780 u16 buf = 0;
5781
5782 if (hw->mac.type != e1000_82573)
5783 return;
5784
5785 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
5786 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
5787 /* Deep Smart Power Down (DSPD) */
5788 dev_warn(&adapter->pdev->dev,
5789 "Warning: detected DSPD enabled in EEPROM\n");
5790 }
5791 }
5792
5793 static const struct net_device_ops e1000e_netdev_ops = {
5794 .ndo_open = e1000_open,
5795 .ndo_stop = e1000_close,
5796 .ndo_start_xmit = e1000_xmit_frame,
5797 .ndo_get_stats64 = e1000e_get_stats64,
5798 .ndo_set_multicast_list = e1000_set_multi,
5799 .ndo_set_mac_address = e1000_set_mac,
5800 .ndo_change_mtu = e1000_change_mtu,
5801 .ndo_do_ioctl = e1000_ioctl,
5802 .ndo_tx_timeout = e1000_tx_timeout,
5803 .ndo_validate_addr = eth_validate_addr,
5804
5805 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5806 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5807 #ifdef CONFIG_NET_POLL_CONTROLLER
5808 .ndo_poll_controller = e1000_netpoll,
5809 #endif
5810 };
5811
5812 /**
5813 * e1000_probe - Device Initialization Routine
5814 * @pdev: PCI device information struct
5815 * @ent: entry in e1000_pci_tbl
5816 *
5817 * Returns 0 on success, negative on failure
5818 *
5819 * e1000_probe initializes an adapter identified by a pci_dev structure.
5820 * The OS initialization, configuring of the adapter private structure,
5821 * and a hardware reset occur.
5822 **/
5823 static int __devinit e1000_probe(struct pci_dev *pdev,
5824 const struct pci_device_id *ent)
5825 {
5826 struct net_device *netdev;
5827 struct e1000_adapter *adapter;
5828 struct e1000_hw *hw;
5829 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
5830 resource_size_t mmio_start, mmio_len;
5831 resource_size_t flash_start, flash_len;
5832
5833 static int cards_found;
5834 u16 aspm_disable_flag = 0;
5835 int i, err, pci_using_dac;
5836 u16 eeprom_data = 0;
5837 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5838
5839 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
5840 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5841 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5842 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5843 if (aspm_disable_flag)
5844 e1000e_disable_aspm(pdev, aspm_disable_flag);
5845
5846 err = pci_enable_device_mem(pdev);
5847 if (err)
5848 return err;
5849
5850 pci_using_dac = 0;
5851 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
5852 if (!err) {
5853 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
5854 if (!err)
5855 pci_using_dac = 1;
5856 } else {
5857 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5858 if (err) {
5859 err = dma_set_coherent_mask(&pdev->dev,
5860 DMA_BIT_MASK(32));
5861 if (err) {
5862 dev_err(&pdev->dev, "No usable DMA "
5863 "configuration, aborting\n");
5864 goto err_dma;
5865 }
5866 }
5867 }
5868
5869 err = pci_request_selected_regions_exclusive(pdev,
5870 pci_select_bars(pdev, IORESOURCE_MEM),
5871 e1000e_driver_name);
5872 if (err)
5873 goto err_pci_reg;
5874
5875 /* AER (Advanced Error Reporting) hooks */
5876 pci_enable_pcie_error_reporting(pdev);
5877
5878 pci_set_master(pdev);
5879 /* PCI config space info */
5880 err = pci_save_state(pdev);
5881 if (err)
5882 goto err_alloc_etherdev;
5883
5884 err = -ENOMEM;
5885 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5886 if (!netdev)
5887 goto err_alloc_etherdev;
5888
5889 SET_NETDEV_DEV(netdev, &pdev->dev);
5890
5891 netdev->irq = pdev->irq;
5892
5893 pci_set_drvdata(pdev, netdev);
5894 adapter = netdev_priv(netdev);
5895 hw = &adapter->hw;
5896 adapter->netdev = netdev;
5897 adapter->pdev = pdev;
5898 adapter->ei = ei;
5899 adapter->pba = ei->pba;
5900 adapter->flags = ei->flags;
5901 adapter->flags2 = ei->flags2;
5902 adapter->hw.adapter = adapter;
5903 adapter->hw.mac.type = ei->mac;
5904 adapter->max_hw_frame_size = ei->max_hw_frame_size;
5905 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5906
5907 mmio_start = pci_resource_start(pdev, 0);
5908 mmio_len = pci_resource_len(pdev, 0);
5909
5910 err = -EIO;
5911 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5912 if (!adapter->hw.hw_addr)
5913 goto err_ioremap;
5914
5915 if ((adapter->flags & FLAG_HAS_FLASH) &&
5916 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5917 flash_start = pci_resource_start(pdev, 1);
5918 flash_len = pci_resource_len(pdev, 1);
5919 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5920 if (!adapter->hw.flash_address)
5921 goto err_flashmap;
5922 }
5923
5924 /* construct the net_device struct */
5925 netdev->netdev_ops = &e1000e_netdev_ops;
5926 e1000e_set_ethtool_ops(netdev);
5927 netdev->watchdog_timeo = 5 * HZ;
5928 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
5929 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5930
5931 netdev->mem_start = mmio_start;
5932 netdev->mem_end = mmio_start + mmio_len;
5933
5934 adapter->bd_number = cards_found++;
5935
5936 e1000e_check_options(adapter);
5937
5938 /* setup adapter struct */
5939 err = e1000_sw_init(adapter);
5940 if (err)
5941 goto err_sw_init;
5942
5943 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5944 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5945 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5946
5947 err = ei->get_variants(adapter);
5948 if (err)
5949 goto err_hw_init;
5950
5951 if ((adapter->flags & FLAG_IS_ICH) &&
5952 (adapter->flags & FLAG_READ_ONLY_NVM))
5953 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5954
5955 hw->mac.ops.get_bus_info(&adapter->hw);
5956
5957 adapter->hw.phy.autoneg_wait_to_complete = 0;
5958
5959 /* Copper options */
5960 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
5961 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5962 adapter->hw.phy.disable_polarity_correction = 0;
5963 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5964 }
5965
5966 if (e1000_check_reset_block(&adapter->hw))
5967 e_info("PHY reset is blocked due to SOL/IDER session.\n");
5968
5969 netdev->features = NETIF_F_SG |
5970 NETIF_F_HW_CSUM |
5971 NETIF_F_HW_VLAN_TX |
5972 NETIF_F_HW_VLAN_RX;
5973
5974 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5975 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5976
5977 netdev->features |= NETIF_F_TSO;
5978 netdev->features |= NETIF_F_TSO6;
5979
5980 netdev->vlan_features |= NETIF_F_TSO;
5981 netdev->vlan_features |= NETIF_F_TSO6;
5982 netdev->vlan_features |= NETIF_F_HW_CSUM;
5983 netdev->vlan_features |= NETIF_F_SG;
5984
5985 if (pci_using_dac) {
5986 netdev->features |= NETIF_F_HIGHDMA;
5987 netdev->vlan_features |= NETIF_F_HIGHDMA;
5988 }
5989
5990 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5991 adapter->flags |= FLAG_MNG_PT_ENABLED;
5992
5993 /*
5994 * before reading the NVM, reset the controller to
5995 * put the device in a known good starting state
5996 */
5997 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5998
5999 /*
6000 * systems with ASPM and others may see the checksum fail on the first
6001 * attempt. Let's give it a few tries
6002 */
6003 for (i = 0;; i++) {
6004 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6005 break;
6006 if (i == 2) {
6007 e_err("The NVM Checksum Is Not Valid\n");
6008 err = -EIO;
6009 goto err_eeprom;
6010 }
6011 }
6012
6013 e1000_eeprom_checks(adapter);
6014
6015 /* copy the MAC address */
6016 if (e1000e_read_mac_addr(&adapter->hw))
6017 e_err("NVM Read Error while reading MAC address\n");
6018
6019 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6020 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6021
6022 if (!is_valid_ether_addr(netdev->perm_addr)) {
6023 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
6024 err = -EIO;
6025 goto err_eeprom;
6026 }
6027
6028 init_timer(&adapter->watchdog_timer);
6029 adapter->watchdog_timer.function = e1000_watchdog;
6030 adapter->watchdog_timer.data = (unsigned long) adapter;
6031
6032 init_timer(&adapter->phy_info_timer);
6033 adapter->phy_info_timer.function = e1000_update_phy_info;
6034 adapter->phy_info_timer.data = (unsigned long) adapter;
6035
6036 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6037 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6038 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6039 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6040 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6041
6042 /* Initialize link parameters. User can change them with ethtool */
6043 adapter->hw.mac.autoneg = 1;
6044 adapter->fc_autoneg = 1;
6045 adapter->hw.fc.requested_mode = e1000_fc_default;
6046 adapter->hw.fc.current_mode = e1000_fc_default;
6047 adapter->hw.phy.autoneg_advertised = 0x2f;
6048
6049 /* ring size defaults */
6050 adapter->rx_ring->count = 256;
6051 adapter->tx_ring->count = 256;
6052
6053 /*
6054 * Initial Wake on LAN setting - If APM wake is enabled in
6055 * the EEPROM, enable the ACPI Magic Packet filter
6056 */
6057 if (adapter->flags & FLAG_APME_IN_WUC) {
6058 /* APME bit in EEPROM is mapped to WUC.APME */
6059 eeprom_data = er32(WUC);
6060 eeprom_apme_mask = E1000_WUC_APME;
6061 if ((hw->mac.type > e1000_ich10lan) &&
6062 (eeprom_data & E1000_WUC_PHY_WAKE))
6063 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6064 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6065 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6066 (adapter->hw.bus.func == 1))
6067 e1000_read_nvm(&adapter->hw,
6068 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
6069 else
6070 e1000_read_nvm(&adapter->hw,
6071 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
6072 }
6073
6074 /* fetch WoL from EEPROM */
6075 if (eeprom_data & eeprom_apme_mask)
6076 adapter->eeprom_wol |= E1000_WUFC_MAG;
6077
6078 /*
6079 * now that we have the eeprom settings, apply the special cases
6080 * where the eeprom may be wrong or the board simply won't support
6081 * wake on lan on a particular port
6082 */
6083 if (!(adapter->flags & FLAG_HAS_WOL))
6084 adapter->eeprom_wol = 0;
6085
6086 /* initialize the wol settings based on the eeprom settings */
6087 adapter->wol = adapter->eeprom_wol;
6088 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6089
6090 /* save off EEPROM version number */
6091 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6092
6093 /* reset the hardware with the new settings */
6094 e1000e_reset(adapter);
6095
6096 /*
6097 * If the controller has AMT, do not set DRV_LOAD until the interface
6098 * is up. For all other cases, let the f/w know that the h/w is now
6099 * under the control of the driver.
6100 */
6101 if (!(adapter->flags & FLAG_HAS_AMT))
6102 e1000e_get_hw_control(adapter);
6103
6104 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
6105 err = register_netdev(netdev);
6106 if (err)
6107 goto err_register;
6108
6109 /* carrier off reporting is important to ethtool even BEFORE open */
6110 netif_carrier_off(netdev);
6111
6112 e1000_print_device_info(adapter);
6113
6114 if (pci_dev_run_wake(pdev))
6115 pm_runtime_put_noidle(&pdev->dev);
6116
6117 return 0;
6118
6119 err_register:
6120 if (!(adapter->flags & FLAG_HAS_AMT))
6121 e1000e_release_hw_control(adapter);
6122 err_eeprom:
6123 if (!e1000_check_reset_block(&adapter->hw))
6124 e1000_phy_hw_reset(&adapter->hw);
6125 err_hw_init:
6126 kfree(adapter->tx_ring);
6127 kfree(adapter->rx_ring);
6128 err_sw_init:
6129 if (adapter->hw.flash_address)
6130 iounmap(adapter->hw.flash_address);
6131 e1000e_reset_interrupt_capability(adapter);
6132 err_flashmap:
6133 iounmap(adapter->hw.hw_addr);
6134 err_ioremap:
6135 free_netdev(netdev);
6136 err_alloc_etherdev:
6137 pci_release_selected_regions(pdev,
6138 pci_select_bars(pdev, IORESOURCE_MEM));
6139 err_pci_reg:
6140 err_dma:
6141 pci_disable_device(pdev);
6142 return err;
6143 }
6144
6145 /**
6146 * e1000_remove - Device Removal Routine
6147 * @pdev: PCI device information struct
6148 *
6149 * e1000_remove is called by the PCI subsystem to alert the driver
6150 * that it should release a PCI device. The could be caused by a
6151 * Hot-Plug event, or because the driver is going to be removed from
6152 * memory.
6153 **/
6154 static void __devexit e1000_remove(struct pci_dev *pdev)
6155 {
6156 struct net_device *netdev = pci_get_drvdata(pdev);
6157 struct e1000_adapter *adapter = netdev_priv(netdev);
6158 bool down = test_bit(__E1000_DOWN, &adapter->state);
6159
6160 /*
6161 * The timers may be rescheduled, so explicitly disable them
6162 * from being rescheduled.
6163 */
6164 if (!down)
6165 set_bit(__E1000_DOWN, &adapter->state);
6166 del_timer_sync(&adapter->watchdog_timer);
6167 del_timer_sync(&adapter->phy_info_timer);
6168
6169 cancel_work_sync(&adapter->reset_task);
6170 cancel_work_sync(&adapter->watchdog_task);
6171 cancel_work_sync(&adapter->downshift_task);
6172 cancel_work_sync(&adapter->update_phy_task);
6173 cancel_work_sync(&adapter->print_hang_task);
6174
6175 if (!(netdev->flags & IFF_UP))
6176 e1000_power_down_phy(adapter);
6177
6178 /* Don't lie to e1000_close() down the road. */
6179 if (!down)
6180 clear_bit(__E1000_DOWN, &adapter->state);
6181 unregister_netdev(netdev);
6182
6183 if (pci_dev_run_wake(pdev))
6184 pm_runtime_get_noresume(&pdev->dev);
6185
6186 /*
6187 * Release control of h/w to f/w. If f/w is AMT enabled, this
6188 * would have already happened in close and is redundant.
6189 */
6190 e1000e_release_hw_control(adapter);
6191
6192 e1000e_reset_interrupt_capability(adapter);
6193 kfree(adapter->tx_ring);
6194 kfree(adapter->rx_ring);
6195
6196 iounmap(adapter->hw.hw_addr);
6197 if (adapter->hw.flash_address)
6198 iounmap(adapter->hw.flash_address);
6199 pci_release_selected_regions(pdev,
6200 pci_select_bars(pdev, IORESOURCE_MEM));
6201
6202 free_netdev(netdev);
6203
6204 /* AER disable */
6205 pci_disable_pcie_error_reporting(pdev);
6206
6207 pci_disable_device(pdev);
6208 }
6209
6210 /* PCI Error Recovery (ERS) */
6211 static struct pci_error_handlers e1000_err_handler = {
6212 .error_detected = e1000_io_error_detected,
6213 .slot_reset = e1000_io_slot_reset,
6214 .resume = e1000_io_resume,
6215 };
6216
6217 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6218 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6219 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6220 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6221 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6222 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6223 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6224 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6225 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6226 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6227
6228 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6229 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6230 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6231 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6232
6233 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6234 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6235 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6236
6237 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6238 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6239 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6240
6241 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6242 board_80003es2lan },
6243 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6244 board_80003es2lan },
6245 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6246 board_80003es2lan },
6247 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6248 board_80003es2lan },
6249
6250 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6251 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6252 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6253 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6254 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6255 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6256 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6257 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6258
6259 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6260 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6261 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6262 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6263 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6264 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6265 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6266 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6267 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6268
6269 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6270 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6271 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6272
6273 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6274 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6275 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6276
6277 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6278 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6279 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6280 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6281
6282 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6283 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6284
6285 { } /* terminate list */
6286 };
6287 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6288
6289 #ifdef CONFIG_PM
6290 static const struct dev_pm_ops e1000_pm_ops = {
6291 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6292 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6293 e1000_runtime_resume, e1000_idle)
6294 };
6295 #endif
6296
6297 /* PCI Device API Driver */
6298 static struct pci_driver e1000_driver = {
6299 .name = e1000e_driver_name,
6300 .id_table = e1000_pci_tbl,
6301 .probe = e1000_probe,
6302 .remove = __devexit_p(e1000_remove),
6303 #ifdef CONFIG_PM
6304 .driver.pm = &e1000_pm_ops,
6305 #endif
6306 .shutdown = e1000_shutdown,
6307 .err_handler = &e1000_err_handler
6308 };
6309
6310 /**
6311 * e1000_init_module - Driver Registration Routine
6312 *
6313 * e1000_init_module is the first routine called when the driver is
6314 * loaded. All it does is register with the PCI subsystem.
6315 **/
6316 static int __init e1000_init_module(void)
6317 {
6318 int ret;
6319 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6320 e1000e_driver_version);
6321 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
6322 ret = pci_register_driver(&e1000_driver);
6323
6324 return ret;
6325 }
6326 module_init(e1000_init_module);
6327
6328 /**
6329 * e1000_exit_module - Driver Exit Cleanup Routine
6330 *
6331 * e1000_exit_module is called just before the driver is removed
6332 * from memory.
6333 **/
6334 static void __exit e1000_exit_module(void)
6335 {
6336 pci_unregister_driver(&e1000_driver);
6337 }
6338 module_exit(e1000_exit_module);
6339
6340
6341 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6342 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6343 MODULE_LICENSE("GPL");
6344 MODULE_VERSION(DRV_VERSION);
6345
6346 /* e1000_main.c */
Linux with added FPC-III support