| blob | e139fe5c62ecd5c8375e7bc8fd503465e475985b |
1 /*
2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
43 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
44 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
46 #define CLK_PLL_PERIPH0 9
48 #define CLK_CPUX 14
50 #define CLK_BUS_CE 20
51 #define CLK_BUS_DMA 21
52 #define CLK_BUS_MMC0 22
53 #define CLK_BUS_MMC1 23
54 #define CLK_BUS_MMC2 24
55 #define CLK_BUS_NAND 25
56 #define CLK_BUS_DRAM 26
57 #define CLK_BUS_EMAC 27
58 #define CLK_BUS_TS 28
59 #define CLK_BUS_HSTIMER 29
60 #define CLK_BUS_SPI0 30
61 #define CLK_BUS_SPI1 31
62 #define CLK_BUS_OTG 32
63 #define CLK_BUS_EHCI0 33
64 #define CLK_BUS_EHCI1 34
65 #define CLK_BUS_EHCI2 35
66 #define CLK_BUS_EHCI3 36
67 #define CLK_BUS_OHCI0 37
68 #define CLK_BUS_OHCI1 38
69 #define CLK_BUS_OHCI2 39
70 #define CLK_BUS_OHCI3 40
71 #define CLK_BUS_VE 41
72 #define CLK_BUS_TCON0 42
73 #define CLK_BUS_TCON1 43
74 #define CLK_BUS_DEINTERLACE 44
75 #define CLK_BUS_CSI 45
76 #define CLK_BUS_TVE 46
77 #define CLK_BUS_HDMI 47
78 #define CLK_BUS_DE 48
79 #define CLK_BUS_GPU 49
80 #define CLK_BUS_MSGBOX 50
81 #define CLK_BUS_SPINLOCK 51
82 #define CLK_BUS_CODEC 52
83 #define CLK_BUS_SPDIF 53
84 #define CLK_BUS_PIO 54
85 #define CLK_BUS_THS 55
86 #define CLK_BUS_I2S0 56
87 #define CLK_BUS_I2S1 57
88 #define CLK_BUS_I2S2 58
89 #define CLK_BUS_I2C0 59
90 #define CLK_BUS_I2C1 60
91 #define CLK_BUS_I2C2 61
92 #define CLK_BUS_UART0 62
93 #define CLK_BUS_UART1 63
94 #define CLK_BUS_UART2 64
95 #define CLK_BUS_UART3 65
96 #define CLK_BUS_SCR0 66
97 #define CLK_BUS_EPHY 67
98 #define CLK_BUS_DBG 68
100 #define CLK_THS 69
101 #define CLK_NAND 70
102 #define CLK_MMC0 71
103 #define CLK_MMC0_SAMPLE 72
104 #define CLK_MMC0_OUTPUT 73
105 #define CLK_MMC1 74
106 #define CLK_MMC1_SAMPLE 75
107 #define CLK_MMC1_OUTPUT 76
108 #define CLK_MMC2 77
109 #define CLK_MMC2_SAMPLE 78
110 #define CLK_MMC2_OUTPUT 79
111 #define CLK_TS 80
112 #define CLK_CE 81
113 #define CLK_SPI0 82
114 #define CLK_SPI1 83
115 #define CLK_I2S0 84
116 #define CLK_I2S1 85
117 #define CLK_I2S2 86
118 #define CLK_SPDIF 87
119 #define CLK_USB_PHY0 88
120 #define CLK_USB_PHY1 89
121 #define CLK_USB_PHY2 90
122 #define CLK_USB_PHY3 91
123 #define CLK_USB_OHCI0 92
124 #define CLK_USB_OHCI1 93
125 #define CLK_USB_OHCI2 94
126 #define CLK_USB_OHCI3 95
128 #define CLK_DRAM_VE 97
129 #define CLK_DRAM_CSI 98
130 #define CLK_DRAM_DEINTERLACE 99
131 #define CLK_DRAM_TS 100
132 #define CLK_DE 101
133 #define CLK_TCON0 102
134 #define CLK_TVE 103
135 #define CLK_DEINTERLACE 104
136 #define CLK_CSI_MISC 105
137 #define CLK_CSI_SCLK 106
138 #define CLK_CSI_MCLK 107
139 #define CLK_VE 108
140 #define CLK_AC_DIG 109
141 #define CLK_AVS 110
142 #define CLK_HDMI 111
143 #define CLK_HDMI_DDC 112
145 #define CLK_GPU 114
147 /* New clocks imported in H5 */
148 #define CLK_BUS_SCR1 115