USB: usb-storage: unusual_devs update for Super TOP SATA bridge
[linux/fpc-iii.git] / drivers / base / regmap / regcache.c
blob74b69095def6def7129d77a142936e7b751705d1
1 /*
2 * Register cache access API
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/slab.h>
14 #include <linux/export.h>
15 #include <linux/device.h>
16 #include <trace/events/regmap.h>
17 #include <linux/bsearch.h>
18 #include <linux/sort.h>
20 #include "internal.h"
22 static const struct regcache_ops *cache_types[] = {
23 &regcache_rbtree_ops,
24 &regcache_lzo_ops,
27 static int regcache_hw_init(struct regmap *map)
29 int i, j;
30 int ret;
31 int count;
32 unsigned int val;
33 void *tmp_buf;
35 if (!map->num_reg_defaults_raw)
36 return -EINVAL;
38 if (!map->reg_defaults_raw) {
39 u32 cache_bypass = map->cache_bypass;
40 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
42 /* Bypass the cache access till data read from HW*/
43 map->cache_bypass = 1;
44 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
45 if (!tmp_buf)
46 return -EINVAL;
47 ret = regmap_bulk_read(map, 0, tmp_buf,
48 map->num_reg_defaults_raw);
49 map->cache_bypass = cache_bypass;
50 if (ret < 0) {
51 kfree(tmp_buf);
52 return ret;
54 map->reg_defaults_raw = tmp_buf;
55 map->cache_free = 1;
58 /* calculate the size of reg_defaults */
59 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
60 val = regcache_get_val(map->reg_defaults_raw,
61 i, map->cache_word_size);
62 if (regmap_volatile(map, i))
63 continue;
64 count++;
67 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
68 GFP_KERNEL);
69 if (!map->reg_defaults) {
70 ret = -ENOMEM;
71 goto err_free;
74 /* fill the reg_defaults */
75 map->num_reg_defaults = count;
76 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
77 val = regcache_get_val(map->reg_defaults_raw,
78 i, map->cache_word_size);
79 if (regmap_volatile(map, i))
80 continue;
81 map->reg_defaults[j].reg = i;
82 map->reg_defaults[j].def = val;
83 j++;
86 return 0;
88 err_free:
89 if (map->cache_free)
90 kfree(map->reg_defaults_raw);
92 return ret;
95 int regcache_init(struct regmap *map, const struct regmap_config *config)
97 int ret;
98 int i;
99 void *tmp_buf;
101 if (map->cache_type == REGCACHE_NONE) {
102 map->cache_bypass = true;
103 return 0;
106 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
107 if (cache_types[i]->type == map->cache_type)
108 break;
110 if (i == ARRAY_SIZE(cache_types)) {
111 dev_err(map->dev, "Could not match compress type: %d\n",
112 map->cache_type);
113 return -EINVAL;
116 map->num_reg_defaults = config->num_reg_defaults;
117 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
118 map->reg_defaults_raw = config->reg_defaults_raw;
119 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
120 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
122 map->cache = NULL;
123 map->cache_ops = cache_types[i];
125 if (!map->cache_ops->read ||
126 !map->cache_ops->write ||
127 !map->cache_ops->name)
128 return -EINVAL;
130 /* We still need to ensure that the reg_defaults
131 * won't vanish from under us. We'll need to make
132 * a copy of it.
134 if (config->reg_defaults) {
135 if (!map->num_reg_defaults)
136 return -EINVAL;
137 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
138 sizeof(struct reg_default), GFP_KERNEL);
139 if (!tmp_buf)
140 return -ENOMEM;
141 map->reg_defaults = tmp_buf;
142 } else if (map->num_reg_defaults_raw) {
143 /* Some devices such as PMICs don't have cache defaults,
144 * we cope with this by reading back the HW registers and
145 * crafting the cache defaults by hand.
147 ret = regcache_hw_init(map);
148 if (ret < 0)
149 return ret;
152 if (!map->max_register)
153 map->max_register = map->num_reg_defaults_raw;
155 if (map->cache_ops->init) {
156 dev_dbg(map->dev, "Initializing %s cache\n",
157 map->cache_ops->name);
158 ret = map->cache_ops->init(map);
159 if (ret)
160 goto err_free;
162 return 0;
164 err_free:
165 kfree(map->reg_defaults);
166 if (map->cache_free)
167 kfree(map->reg_defaults_raw);
169 return ret;
172 void regcache_exit(struct regmap *map)
174 if (map->cache_type == REGCACHE_NONE)
175 return;
177 BUG_ON(!map->cache_ops);
179 kfree(map->reg_defaults);
180 if (map->cache_free)
181 kfree(map->reg_defaults_raw);
183 if (map->cache_ops->exit) {
184 dev_dbg(map->dev, "Destroying %s cache\n",
185 map->cache_ops->name);
186 map->cache_ops->exit(map);
191 * regcache_read: Fetch the value of a given register from the cache.
193 * @map: map to configure.
194 * @reg: The register index.
195 * @value: The value to be returned.
197 * Return a negative value on failure, 0 on success.
199 int regcache_read(struct regmap *map,
200 unsigned int reg, unsigned int *value)
202 int ret;
204 if (map->cache_type == REGCACHE_NONE)
205 return -ENOSYS;
207 BUG_ON(!map->cache_ops);
209 if (!regmap_volatile(map, reg)) {
210 ret = map->cache_ops->read(map, reg, value);
212 if (ret == 0)
213 trace_regmap_reg_read_cache(map->dev, reg, *value);
215 return ret;
218 return -EINVAL;
222 * regcache_write: Set the value of a given register in the cache.
224 * @map: map to configure.
225 * @reg: The register index.
226 * @value: The new register value.
228 * Return a negative value on failure, 0 on success.
230 int regcache_write(struct regmap *map,
231 unsigned int reg, unsigned int value)
233 if (map->cache_type == REGCACHE_NONE)
234 return 0;
236 BUG_ON(!map->cache_ops);
238 if (!regmap_writeable(map, reg))
239 return -EIO;
241 if (!regmap_volatile(map, reg))
242 return map->cache_ops->write(map, reg, value);
244 return 0;
248 * regcache_sync: Sync the register cache with the hardware.
250 * @map: map to configure.
252 * Any registers that should not be synced should be marked as
253 * volatile. In general drivers can choose not to use the provided
254 * syncing functionality if they so require.
256 * Return a negative value on failure, 0 on success.
258 int regcache_sync(struct regmap *map)
260 int ret = 0;
261 unsigned int i;
262 const char *name;
263 unsigned int bypass;
265 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
267 mutex_lock(&map->lock);
268 /* Remember the initial bypass state */
269 bypass = map->cache_bypass;
270 dev_dbg(map->dev, "Syncing %s cache\n",
271 map->cache_ops->name);
272 name = map->cache_ops->name;
273 trace_regcache_sync(map->dev, name, "start");
275 if (!map->cache_dirty)
276 goto out;
278 /* Apply any patch first */
279 map->cache_bypass = 1;
280 for (i = 0; i < map->patch_regs; i++) {
281 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
282 if (ret != 0) {
283 dev_err(map->dev, "Failed to write %x = %x: %d\n",
284 map->patch[i].reg, map->patch[i].def, ret);
285 goto out;
288 map->cache_bypass = 0;
290 ret = map->cache_ops->sync(map, 0, map->max_register);
292 if (ret == 0)
293 map->cache_dirty = false;
295 out:
296 trace_regcache_sync(map->dev, name, "stop");
297 /* Restore the bypass state */
298 map->cache_bypass = bypass;
299 mutex_unlock(&map->lock);
301 return ret;
303 EXPORT_SYMBOL_GPL(regcache_sync);
306 * regcache_sync_region: Sync part of the register cache with the hardware.
308 * @map: map to sync.
309 * @min: first register to sync
310 * @max: last register to sync
312 * Write all non-default register values in the specified region to
313 * the hardware.
315 * Return a negative value on failure, 0 on success.
317 int regcache_sync_region(struct regmap *map, unsigned int min,
318 unsigned int max)
320 int ret = 0;
321 const char *name;
322 unsigned int bypass;
324 BUG_ON(!map->cache_ops || !map->cache_ops->sync);
326 mutex_lock(&map->lock);
328 /* Remember the initial bypass state */
329 bypass = map->cache_bypass;
331 name = map->cache_ops->name;
332 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
334 trace_regcache_sync(map->dev, name, "start region");
336 if (!map->cache_dirty)
337 goto out;
339 ret = map->cache_ops->sync(map, min, max);
341 out:
342 trace_regcache_sync(map->dev, name, "stop region");
343 /* Restore the bypass state */
344 map->cache_bypass = bypass;
345 mutex_unlock(&map->lock);
347 return ret;
349 EXPORT_SYMBOL_GPL(regcache_sync_region);
352 * regcache_cache_only: Put a register map into cache only mode
354 * @map: map to configure
355 * @cache_only: flag if changes should be written to the hardware
357 * When a register map is marked as cache only writes to the register
358 * map API will only update the register cache, they will not cause
359 * any hardware changes. This is useful for allowing portions of
360 * drivers to act as though the device were functioning as normal when
361 * it is disabled for power saving reasons.
363 void regcache_cache_only(struct regmap *map, bool enable)
365 mutex_lock(&map->lock);
366 WARN_ON(map->cache_bypass && enable);
367 map->cache_only = enable;
368 trace_regmap_cache_only(map->dev, enable);
369 mutex_unlock(&map->lock);
371 EXPORT_SYMBOL_GPL(regcache_cache_only);
374 * regcache_mark_dirty: Mark the register cache as dirty
376 * @map: map to mark
378 * Mark the register cache as dirty, for example due to the device
379 * having been powered down for suspend. If the cache is not marked
380 * as dirty then the cache sync will be suppressed.
382 void regcache_mark_dirty(struct regmap *map)
384 mutex_lock(&map->lock);
385 map->cache_dirty = true;
386 mutex_unlock(&map->lock);
388 EXPORT_SYMBOL_GPL(regcache_mark_dirty);
391 * regcache_cache_bypass: Put a register map into cache bypass mode
393 * @map: map to configure
394 * @cache_bypass: flag if changes should not be written to the hardware
396 * When a register map is marked with the cache bypass option, writes
397 * to the register map API will only update the hardware and not the
398 * the cache directly. This is useful when syncing the cache back to
399 * the hardware.
401 void regcache_cache_bypass(struct regmap *map, bool enable)
403 mutex_lock(&map->lock);
404 WARN_ON(map->cache_only && enable);
405 map->cache_bypass = enable;
406 trace_regmap_cache_bypass(map->dev, enable);
407 mutex_unlock(&map->lock);
409 EXPORT_SYMBOL_GPL(regcache_cache_bypass);
411 bool regcache_set_val(void *base, unsigned int idx,
412 unsigned int val, unsigned int word_size)
414 switch (word_size) {
415 case 1: {
416 u8 *cache = base;
417 if (cache[idx] == val)
418 return true;
419 cache[idx] = val;
420 break;
422 case 2: {
423 u16 *cache = base;
424 if (cache[idx] == val)
425 return true;
426 cache[idx] = val;
427 break;
429 case 4: {
430 u32 *cache = base;
431 if (cache[idx] == val)
432 return true;
433 cache[idx] = val;
434 break;
436 default:
437 BUG();
439 return false;
442 unsigned int regcache_get_val(const void *base, unsigned int idx,
443 unsigned int word_size)
445 if (!base)
446 return -EINVAL;
448 switch (word_size) {
449 case 1: {
450 const u8 *cache = base;
451 return cache[idx];
453 case 2: {
454 const u16 *cache = base;
455 return cache[idx];
457 case 4: {
458 const u32 *cache = base;
459 return cache[idx];
461 default:
462 BUG();
464 /* unreachable */
465 return -1;
468 static int regcache_default_cmp(const void *a, const void *b)
470 const struct reg_default *_a = a;
471 const struct reg_default *_b = b;
473 return _a->reg - _b->reg;
476 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
478 struct reg_default key;
479 struct reg_default *r;
481 key.reg = reg;
482 key.def = 0;
484 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
485 sizeof(struct reg_default), regcache_default_cmp);
487 if (r)
488 return r - map->reg_defaults;
489 else
490 return -ENOENT;