drivers/base/regmap/regmap-irq.c

   1 /*
   2  * regmap based irq_chip
   3  *
   4  * Copyright 2011 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/export.h>
  14 #include <linux/device.h>
  15 #include <linux/regmap.h>
  16 #include <linux/irq.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/slab.h>
  19
  20 #include "internal.h"
  21
  22 struct regmap_irq_chip_data {
  23         struct mutex lock;
  24
  25         struct regmap *map;
  26         struct regmap_irq_chip *chip;
  27
  28         int irq_base;
  29
  30         void *status_reg_buf;
  31         unsigned int *status_buf;
  32         unsigned int *mask_buf;
  33         unsigned int *mask_buf_def;
  34 };
  35
  36 static inline const
  37 struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
  38                                      int irq)
  39 {
  40         return &data->chip->irqs[irq - data->irq_base];
  41 }
  42
  43 static void regmap_irq_lock(struct irq_data *data)
  44 {
  45         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  46
  47         mutex_lock(&d->lock);
  48 }
  49
  50 static void regmap_irq_sync_unlock(struct irq_data *data)
  51 {
  52         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  53         int i, ret;
  54
  55         /*
  56          * If there's been a change in the mask write it back to the
  57          * hardware.  We rely on the use of the regmap core cache to
  58          * suppress pointless writes.
  59          */
  60         for (i = 0; i < d->chip->num_regs; i++) {
  61                 ret = regmap_update_bits(d->map, d->chip->mask_base + i,
  62                                          d->mask_buf_def[i], d->mask_buf[i]);
  63                 if (ret != 0)
  64                         dev_err(d->map->dev, "Failed to sync masks in %x\n",
  65                                 d->chip->mask_base + i);
  66         }
  67
  68         mutex_unlock(&d->lock);
  69 }
  70
  71 static void regmap_irq_enable(struct irq_data *data)
  72 {
  73         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  74         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->irq);
  75
  76         d->mask_buf[irq_data->reg_offset] &= ~irq_data->mask;
  77 }
  78
  79 static void regmap_irq_disable(struct irq_data *data)
  80 {
  81         struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
  82         const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->irq);
  83
  84         d->mask_buf[irq_data->reg_offset] |= irq_data->mask;
  85 }
  86
  87 static struct irq_chip regmap_irq_chip = {
  88         .name                   = "regmap",
  89         .irq_bus_lock           = regmap_irq_lock,
  90         .irq_bus_sync_unlock    = regmap_irq_sync_unlock,
  91         .irq_disable            = regmap_irq_disable,
  92         .irq_enable             = regmap_irq_enable,
  93 };
  94
  95 static irqreturn_t regmap_irq_thread(int irq, void *d)
  96 {
  97         struct regmap_irq_chip_data *data = d;
  98         struct regmap_irq_chip *chip = data->chip;
  99         struct regmap *map = data->map;
 100         int ret, i;
 101         u8 *buf8 = data->status_reg_buf;
 102         u16 *buf16 = data->status_reg_buf;
 103         u32 *buf32 = data->status_reg_buf;
 104         bool handled = false;
 105
 106         ret = regmap_bulk_read(map, chip->status_base, data->status_reg_buf,
 107                                chip->num_regs);
 108         if (ret != 0) {
 109                 dev_err(map->dev, "Failed to read IRQ status: %d\n", ret);
 110                 return IRQ_NONE;
 111         }
 112
 113         /*
 114          * Ignore masked IRQs and ack if we need to; we ack early so
 115          * there is no race between handling and acknowleding the
 116          * interrupt.  We assume that typically few of the interrupts
 117          * will fire simultaneously so don't worry about overhead from
 118          * doing a write per register.
 119          */
 120         for (i = 0; i < data->chip->num_regs; i++) {
 121                 switch (map->format.val_bytes) {
 122                 case 1:
 123                         data->status_buf[i] = buf8[i];
 124                         break;
 125                 case 2:
 126                         data->status_buf[i] = buf16[i];
 127                         break;
 128                 case 4:
 129                         data->status_buf[i] = buf32[i];
 130                         break;
 131                 default:
 132                         BUG();
 133                         return IRQ_NONE;
 134                 }
 135
 136                 data->status_buf[i] &= ~data->mask_buf[i];
 137
 138                 if (data->status_buf[i] && chip->ack_base) {
 139                         ret = regmap_write(map, chip->ack_base + i,
 140                                            data->status_buf[i]);
 141                         if (ret != 0)
 142                                 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
 143                                         chip->ack_base + i, ret);
 144                 }
 145         }
 146
 147         for (i = 0; i < chip->num_irqs; i++) {
 148                 if (data->status_buf[chip->irqs[i].reg_offset] &
 149                     chip->irqs[i].mask) {
 150                         handle_nested_irq(data->irq_base + i);
 151                         handled = true;
 152                 }
 153         }
 154
 155         if (handled)
 156                 return IRQ_HANDLED;
 157         else
 158                 return IRQ_NONE;
 159 }
 160
 161 /**
 162  * regmap_add_irq_chip(): Use standard regmap IRQ controller handling
 163  *
 164  * map:       The regmap for the device.
 165  * irq:       The IRQ the device uses to signal interrupts
 166  * irq_flags: The IRQF_ flags to use for the primary interrupt.
 167  * chip:      Configuration for the interrupt controller.
 168  * data:      Runtime data structure for the controller, allocated on success
 169  *
 170  * Returns 0 on success or an errno on failure.
 171  *
 172  * In order for this to be efficient the chip really should use a
 173  * register cache.  The chip driver is responsible for restoring the
 174  * register values used by the IRQ controller over suspend and resume.
 175  */
 176 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 177                         int irq_base, struct regmap_irq_chip *chip,
 178                         struct regmap_irq_chip_data **data)
 179 {
 180         struct regmap_irq_chip_data *d;
 181         int cur_irq, i;
 182         int ret = -ENOMEM;
 183
 184         irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
 185         if (irq_base < 0) {
 186                 dev_warn(map->dev, "Failed to allocate IRQs: %d\n",
 187                          irq_base);
 188                 return irq_base;
 189         }
 190
 191         d = kzalloc(sizeof(*d), GFP_KERNEL);
 192         if (!d)
 193                 return -ENOMEM;
 194
 195         d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
 196                                 GFP_KERNEL);
 197         if (!d->status_buf)
 198                 goto err_alloc;
 199
 200         d->status_reg_buf = kzalloc(map->format.val_bytes * chip->num_regs,
 201                                     GFP_KERNEL);
 202         if (!d->status_reg_buf)
 203                 goto err_alloc;
 204
 205         d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
 206                               GFP_KERNEL);
 207         if (!d->mask_buf)
 208                 goto err_alloc;
 209
 210         d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs,
 211                                   GFP_KERNEL);
 212         if (!d->mask_buf_def)
 213                 goto err_alloc;
 214
 215         d->map = map;
 216         d->chip = chip;
 217         d->irq_base = irq_base;
 218         mutex_init(&d->lock);
 219
 220         for (i = 0; i < chip->num_irqs; i++)
 221                 d->mask_buf_def[chip->irqs[i].reg_offset]
 222                         |= chip->irqs[i].mask;
 223
 224         /* Mask all the interrupts by default */
 225         for (i = 0; i < chip->num_regs; i++) {
 226                 d->mask_buf[i] = d->mask_buf_def[i];
 227                 ret = regmap_write(map, chip->mask_base + i, d->mask_buf[i]);
 228                 if (ret != 0) {
 229                         dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
 230                                 chip->mask_base + i, ret);
 231                         goto err_alloc;
 232                 }
 233         }
 234
 235         /* Register them with genirq */
 236         for (cur_irq = irq_base;
 237              cur_irq < chip->num_irqs + irq_base;
 238              cur_irq++) {
 239                 irq_set_chip_data(cur_irq, d);
 240                 irq_set_chip_and_handler(cur_irq, &regmap_irq_chip,
 241                                          handle_edge_irq);
 242                 irq_set_nested_thread(cur_irq, 1);
 243
 244                 /* ARM needs us to explicitly flag the IRQ as valid
 245                  * and will set them noprobe when we do so. */
 246 #ifdef CONFIG_ARM
 247                 set_irq_flags(cur_irq, IRQF_VALID);
 248 #else
 249                 irq_set_noprobe(cur_irq);
 250 #endif
 251         }
 252
 253         ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags,
 254                                    chip->name, d);
 255         if (ret != 0) {
 256                 dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret);
 257                 goto err_alloc;
 258         }
 259
 260         return 0;
 261
 262 err_alloc:
 263         kfree(d->mask_buf_def);
 264         kfree(d->mask_buf);
 265         kfree(d->status_reg_buf);
 266         kfree(d->status_buf);
 267         kfree(d);
 268         return ret;
 269 }
 270 EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
 271
 272 /**
 273  * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip
 274  *
 275  * @irq: Primary IRQ for the device
 276  * @d:   regmap_irq_chip_data allocated by regmap_add_irq_chip()
 277  */
 278 void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 279 {
 280         if (!d)
 281                 return;
 282
 283         free_irq(irq, d);
 284         kfree(d->mask_buf_def);
 285         kfree(d->mask_buf);
 286         kfree(d->status_reg_buf);
 287         kfree(d->status_buf);
 288         kfree(d);
 289 }
 290 EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
 291
 292 /**
 293  * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip
 294  *
 295  * Useful for drivers to request their own IRQs.
 296  *
 297  * @data: regmap_irq controller to operate on.
 298  */
 299 int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)
 300 {
 301         return data->irq_base;
 302 }
 303 EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);