USB: usb-storage: unusual_devs update for Super TOP SATA bridge
[linux/fpc-iii.git] / drivers / mtd / devices / doc2001.c
blobf6927955dab0d108385f853b5f6499a19961d333
2 /*
3 * Linux driver for Disk-On-Chip Millennium
4 * (c) 1999 Machine Vision Holdings, Inc.
5 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
6 */
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <asm/errno.h>
11 #include <asm/io.h>
12 #include <asm/uaccess.h>
13 #include <linux/delay.h>
14 #include <linux/slab.h>
15 #include <linux/init.h>
16 #include <linux/types.h>
17 #include <linux/bitops.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/doc2000.h>
23 /* #define ECC_DEBUG */
25 /* I have no idea why some DoC chips can not use memcop_form|to_io().
26 * This may be due to the different revisions of the ASIC controller built-in or
27 * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
28 * this:*/
29 #undef USE_MEMCPY
31 static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
32 size_t *retlen, u_char *buf);
33 static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
34 size_t *retlen, const u_char *buf);
35 static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
36 struct mtd_oob_ops *ops);
37 static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
38 struct mtd_oob_ops *ops);
39 static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
41 static struct mtd_info *docmillist = NULL;
43 /* Perform the required delay cycles by reading from the NOP register */
44 static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
46 volatile char dummy;
47 int i;
49 for (i = 0; i < cycles; i++)
50 dummy = ReadDOC(docptr, NOP);
53 /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
54 static int _DoC_WaitReady(void __iomem * docptr)
56 unsigned short c = 0xffff;
58 pr_debug("_DoC_WaitReady called for out-of-line wait\n");
60 /* Out-of-line routine to wait for chip response */
61 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
64 if (c == 0)
65 pr_debug("_DoC_WaitReady timed out.\n");
67 return (c == 0);
70 static inline int DoC_WaitReady(void __iomem * docptr)
72 /* This is inline, to optimise the common case, where it's ready instantly */
73 int ret = 0;
75 /* 4 read form NOP register should be issued in prior to the read from CDSNControl
76 see Software Requirement 11.4 item 2. */
77 DoC_Delay(docptr, 4);
79 if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
80 /* Call the out-of-line routine to wait */
81 ret = _DoC_WaitReady(docptr);
83 /* issue 2 read from NOP register after reading from CDSNControl register
84 see Software Requirement 11.4 item 2. */
85 DoC_Delay(docptr, 2);
87 return ret;
90 /* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
91 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
92 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
94 static void DoC_Command(void __iomem * docptr, unsigned char command,
95 unsigned char xtraflags)
97 /* Assert the CLE (Command Latch Enable) line to the flash chip */
98 WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
99 DoC_Delay(docptr, 4);
101 /* Send the command */
102 WriteDOC(command, docptr, Mil_CDSN_IO);
103 WriteDOC(0x00, docptr, WritePipeTerm);
105 /* Lower the CLE line */
106 WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
107 DoC_Delay(docptr, 4);
110 /* DoC_Address: Set the current address for the flash chip through the CDSN IO register
111 with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
112 required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
114 static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
115 unsigned char xtraflags1, unsigned char xtraflags2)
117 /* Assert the ALE (Address Latch Enable) line to the flash chip */
118 WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
119 DoC_Delay(docptr, 4);
121 /* Send the address */
122 switch (numbytes)
124 case 1:
125 /* Send single byte, bits 0-7. */
126 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
127 WriteDOC(0x00, docptr, WritePipeTerm);
128 break;
129 case 2:
130 /* Send bits 9-16 followed by 17-23 */
131 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
132 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
133 WriteDOC(0x00, docptr, WritePipeTerm);
134 break;
135 case 3:
136 /* Send 0-7, 9-16, then 17-23 */
137 WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
138 WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
139 WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
140 WriteDOC(0x00, docptr, WritePipeTerm);
141 break;
142 default:
143 return;
146 /* Lower the ALE line */
147 WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
148 DoC_Delay(docptr, 4);
151 /* DoC_SelectChip: Select a given flash chip within the current floor */
152 static int DoC_SelectChip(void __iomem * docptr, int chip)
154 /* Select the individual flash chip requested */
155 WriteDOC(chip, docptr, CDSNDeviceSelect);
156 DoC_Delay(docptr, 4);
158 /* Wait for it to be ready */
159 return DoC_WaitReady(docptr);
162 /* DoC_SelectFloor: Select a given floor (bank of flash chips) */
163 static int DoC_SelectFloor(void __iomem * docptr, int floor)
165 /* Select the floor (bank) of chips required */
166 WriteDOC(floor, docptr, FloorSelect);
168 /* Wait for the chip to be ready */
169 return DoC_WaitReady(docptr);
172 /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
173 static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
175 int mfr, id, i, j;
176 volatile char dummy;
178 /* Page in the required floor/chip
179 FIXME: is this supported by Millennium ?? */
180 DoC_SelectFloor(doc->virtadr, floor);
181 DoC_SelectChip(doc->virtadr, chip);
183 /* Reset the chip, see Software Requirement 11.4 item 1. */
184 DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
185 DoC_WaitReady(doc->virtadr);
187 /* Read the NAND chip ID: 1. Send ReadID command */
188 DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
190 /* Read the NAND chip ID: 2. Send address byte zero */
191 DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
193 /* Read the manufacturer and device id codes of the flash device through
194 CDSN IO register see Software Requirement 11.4 item 5.*/
195 dummy = ReadDOC(doc->virtadr, ReadPipeInit);
196 DoC_Delay(doc->virtadr, 2);
197 mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
199 DoC_Delay(doc->virtadr, 2);
200 id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
201 dummy = ReadDOC(doc->virtadr, LastDataRead);
203 /* No response - return failure */
204 if (mfr == 0xff || mfr == 0)
205 return 0;
207 /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
208 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
209 if ( id == nand_flash_ids[i].id) {
210 /* Try to identify manufacturer */
211 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
212 if (nand_manuf_ids[j].id == mfr)
213 break;
215 printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
216 "Chip ID: %2.2X (%s:%s)\n",
217 mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
218 doc->mfr = mfr;
219 doc->id = id;
220 doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
221 break;
225 if (nand_flash_ids[i].name == NULL)
226 return 0;
227 else
228 return 1;
231 /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
232 static void DoC_ScanChips(struct DiskOnChip *this)
234 int floor, chip;
235 int numchips[MAX_FLOORS_MIL];
236 int ret;
238 this->numchips = 0;
239 this->mfr = 0;
240 this->id = 0;
242 /* For each floor, find the number of valid chips it contains */
243 for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
244 numchips[floor] = 0;
245 for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
246 ret = DoC_IdentChip(this, floor, chip);
247 if (ret) {
248 numchips[floor]++;
249 this->numchips++;
253 /* If there are none at all that we recognise, bail */
254 if (!this->numchips) {
255 printk("No flash chips recognised.\n");
256 return;
259 /* Allocate an array to hold the information for each chip */
260 this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
261 if (!this->chips){
262 printk("No memory for allocating chip info structures\n");
263 return;
266 /* Fill out the chip array with {floor, chipno} for each
267 * detected chip in the device. */
268 for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
269 for (chip = 0 ; chip < numchips[floor] ; chip++) {
270 this->chips[ret].floor = floor;
271 this->chips[ret].chip = chip;
272 this->chips[ret].curadr = 0;
273 this->chips[ret].curmode = 0x50;
274 ret++;
278 /* Calculate and print the total size of the device */
279 this->totlen = this->numchips * (1 << this->chipshift);
280 printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
281 this->numchips ,this->totlen >> 20);
284 static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
286 int tmp1, tmp2, retval;
288 if (doc1->physadr == doc2->physadr)
289 return 1;
291 /* Use the alias resolution register which was set aside for this
292 * purpose. If it's value is the same on both chips, they might
293 * be the same chip, and we write to one and check for a change in
294 * the other. It's unclear if this register is usuable in the
295 * DoC 2000 (it's in the Millenium docs), but it seems to work. */
296 tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
297 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
298 if (tmp1 != tmp2)
299 return 0;
301 WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
302 tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
303 if (tmp2 == (tmp1+1) % 0xff)
304 retval = 1;
305 else
306 retval = 0;
308 /* Restore register contents. May not be necessary, but do it just to
309 * be safe. */
310 WriteDOC(tmp1, doc1->virtadr, AliasResolution);
312 return retval;
315 /* This routine is found from the docprobe code by symbol_get(),
316 * which will bump the use count of this module. */
317 void DoCMil_init(struct mtd_info *mtd)
319 struct DiskOnChip *this = mtd->priv;
320 struct DiskOnChip *old = NULL;
322 /* We must avoid being called twice for the same device. */
323 if (docmillist)
324 old = docmillist->priv;
326 while (old) {
327 if (DoCMil_is_alias(this, old)) {
328 printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
329 "0x%lX - already configured\n", this->physadr);
330 iounmap(this->virtadr);
331 kfree(mtd);
332 return;
334 if (old->nextdoc)
335 old = old->nextdoc->priv;
336 else
337 old = NULL;
340 mtd->name = "DiskOnChip Millennium";
341 printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
342 this->physadr);
344 mtd->type = MTD_NANDFLASH;
345 mtd->flags = MTD_CAP_NANDFLASH;
347 /* FIXME: erase size is not always 8KiB */
348 mtd->erasesize = 0x2000;
349 mtd->writebufsize = mtd->writesize = 512;
350 mtd->oobsize = 16;
351 mtd->ecc_strength = 2;
352 mtd->owner = THIS_MODULE;
353 mtd->_erase = doc_erase;
354 mtd->_read = doc_read;
355 mtd->_write = doc_write;
356 mtd->_read_oob = doc_read_oob;
357 mtd->_write_oob = doc_write_oob;
358 this->curfloor = -1;
359 this->curchip = -1;
361 /* Ident all the chips present. */
362 DoC_ScanChips(this);
364 if (!this->totlen) {
365 kfree(mtd);
366 iounmap(this->virtadr);
367 } else {
368 this->nextdoc = docmillist;
369 docmillist = mtd;
370 mtd->size = this->totlen;
371 mtd_device_register(mtd, NULL, 0);
372 return;
375 EXPORT_SYMBOL_GPL(DoCMil_init);
377 static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
378 size_t *retlen, u_char *buf)
380 int i, ret;
381 volatile char dummy;
382 unsigned char syndrome[6], eccbuf[6];
383 struct DiskOnChip *this = mtd->priv;
384 void __iomem *docptr = this->virtadr;
385 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
387 /* Don't allow a single read to cross a 512-byte block boundary */
388 if (from + len > ((from | 0x1ff) + 1))
389 len = ((from | 0x1ff) + 1) - from;
391 /* Find the chip which is to be used and select it */
392 if (this->curfloor != mychip->floor) {
393 DoC_SelectFloor(docptr, mychip->floor);
394 DoC_SelectChip(docptr, mychip->chip);
395 } else if (this->curchip != mychip->chip) {
396 DoC_SelectChip(docptr, mychip->chip);
398 this->curfloor = mychip->floor;
399 this->curchip = mychip->chip;
401 /* issue the Read0 or Read1 command depend on which half of the page
402 we are accessing. Polling the Flash Ready bit after issue 3 bytes
403 address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
404 DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
405 DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
406 DoC_WaitReady(docptr);
408 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
409 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
410 WriteDOC (DOC_ECC_EN, docptr, ECCConf);
412 /* Read the data via the internal pipeline through CDSN IO register,
413 see Pipelined Read Operations 11.3 */
414 dummy = ReadDOC(docptr, ReadPipeInit);
415 #ifndef USE_MEMCPY
416 for (i = 0; i < len-1; i++) {
417 /* N.B. you have to increase the source address in this way or the
418 ECC logic will not work properly */
419 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
421 #else
422 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
423 #endif
424 buf[len - 1] = ReadDOC(docptr, LastDataRead);
426 /* Let the caller know we completed it */
427 *retlen = len;
428 ret = 0;
430 /* Read the ECC data from Spare Data Area,
431 see Reed-Solomon EDC/ECC 11.1 */
432 dummy = ReadDOC(docptr, ReadPipeInit);
433 #ifndef USE_MEMCPY
434 for (i = 0; i < 5; i++) {
435 /* N.B. you have to increase the source address in this way or the
436 ECC logic will not work properly */
437 eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
439 #else
440 memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
441 #endif
442 eccbuf[5] = ReadDOC(docptr, LastDataRead);
444 /* Flush the pipeline */
445 dummy = ReadDOC(docptr, ECCConf);
446 dummy = ReadDOC(docptr, ECCConf);
448 /* Check the ECC Status */
449 if (ReadDOC(docptr, ECCConf) & 0x80) {
450 int nb_errors;
451 /* There was an ECC error */
452 #ifdef ECC_DEBUG
453 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
454 #endif
455 /* Read the ECC syndrome through the DiskOnChip ECC logic.
456 These syndrome will be all ZERO when there is no error */
457 for (i = 0; i < 6; i++) {
458 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
460 nb_errors = doc_decode_ecc(buf, syndrome);
461 #ifdef ECC_DEBUG
462 printk("ECC Errors corrected: %x\n", nb_errors);
463 #endif
464 if (nb_errors < 0) {
465 /* We return error, but have actually done the read. Not that
466 this can be told to user-space, via sys_read(), but at least
467 MTD-aware stuff can know about it by checking *retlen */
468 ret = -EIO;
472 #ifdef PSYCHO_DEBUG
473 printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
474 (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
475 eccbuf[4], eccbuf[5]);
476 #endif
478 /* disable the ECC engine */
479 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
481 return ret;
484 static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
485 size_t *retlen, const u_char *buf)
487 int i,ret = 0;
488 char eccbuf[6];
489 volatile char dummy;
490 struct DiskOnChip *this = mtd->priv;
491 void __iomem *docptr = this->virtadr;
492 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
494 #if 0
495 /* Don't allow a single write to cross a 512-byte block boundary */
496 if (to + len > ( (to | 0x1ff) + 1))
497 len = ((to | 0x1ff) + 1) - to;
498 #else
499 /* Don't allow writes which aren't exactly one block */
500 if (to & 0x1ff || len != 0x200)
501 return -EINVAL;
502 #endif
504 /* Find the chip which is to be used and select it */
505 if (this->curfloor != mychip->floor) {
506 DoC_SelectFloor(docptr, mychip->floor);
507 DoC_SelectChip(docptr, mychip->chip);
508 } else if (this->curchip != mychip->chip) {
509 DoC_SelectChip(docptr, mychip->chip);
511 this->curfloor = mychip->floor;
512 this->curchip = mychip->chip;
514 /* Reset the chip, see Software Requirement 11.4 item 1. */
515 DoC_Command(docptr, NAND_CMD_RESET, 0x00);
516 DoC_WaitReady(docptr);
517 /* Set device to main plane of flash */
518 DoC_Command(docptr, NAND_CMD_READ0, 0x00);
520 /* issue the Serial Data In command to initial the Page Program process */
521 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
522 DoC_Address(docptr, 3, to, 0x00, 0x00);
523 DoC_WaitReady(docptr);
525 /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
526 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
527 WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
529 /* Write the data via the internal pipeline through CDSN IO register,
530 see Pipelined Write Operations 11.2 */
531 #ifndef USE_MEMCPY
532 for (i = 0; i < len; i++) {
533 /* N.B. you have to increase the source address in this way or the
534 ECC logic will not work properly */
535 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
537 #else
538 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
539 #endif
540 WriteDOC(0x00, docptr, WritePipeTerm);
542 /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
543 see Reed-Solomon EDC/ECC 11.1 */
544 WriteDOC(0, docptr, NOP);
545 WriteDOC(0, docptr, NOP);
546 WriteDOC(0, docptr, NOP);
548 /* Read the ECC data through the DiskOnChip ECC logic */
549 for (i = 0; i < 6; i++) {
550 eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
553 /* ignore the ECC engine */
554 WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
556 #ifndef USE_MEMCPY
557 /* Write the ECC data to flash */
558 for (i = 0; i < 6; i++) {
559 /* N.B. you have to increase the source address in this way or the
560 ECC logic will not work properly */
561 WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
563 #else
564 memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
565 #endif
567 /* write the block status BLOCK_USED (0x5555) at the end of ECC data
568 FIXME: this is only a hack for programming the IPL area for LinuxBIOS
569 and should be replace with proper codes in user space utilities */
570 WriteDOC(0x55, docptr, Mil_CDSN_IO);
571 WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
573 WriteDOC(0x00, docptr, WritePipeTerm);
575 #ifdef PSYCHO_DEBUG
576 printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
577 (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
578 eccbuf[4], eccbuf[5]);
579 #endif
581 /* Commit the Page Program command and wait for ready
582 see Software Requirement 11.4 item 1.*/
583 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
584 DoC_WaitReady(docptr);
586 /* Read the status of the flash device through CDSN IO register
587 see Software Requirement 11.4 item 5.*/
588 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
589 dummy = ReadDOC(docptr, ReadPipeInit);
590 DoC_Delay(docptr, 2);
591 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
592 printk("Error programming flash\n");
593 /* Error in programming
594 FIXME: implement Bad Block Replacement (in nftl.c ??) */
595 ret = -EIO;
597 dummy = ReadDOC(docptr, LastDataRead);
599 /* Let the caller know we completed it */
600 *retlen = len;
602 return ret;
605 static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
606 struct mtd_oob_ops *ops)
608 #ifndef USE_MEMCPY
609 int i;
610 #endif
611 volatile char dummy;
612 struct DiskOnChip *this = mtd->priv;
613 void __iomem *docptr = this->virtadr;
614 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
615 uint8_t *buf = ops->oobbuf;
616 size_t len = ops->len;
618 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
620 ofs += ops->ooboffs;
622 /* Find the chip which is to be used and select it */
623 if (this->curfloor != mychip->floor) {
624 DoC_SelectFloor(docptr, mychip->floor);
625 DoC_SelectChip(docptr, mychip->chip);
626 } else if (this->curchip != mychip->chip) {
627 DoC_SelectChip(docptr, mychip->chip);
629 this->curfloor = mychip->floor;
630 this->curchip = mychip->chip;
632 /* disable the ECC engine */
633 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
634 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
636 /* issue the Read2 command to set the pointer to the Spare Data Area.
637 Polling the Flash Ready bit after issue 3 bytes address in
638 Sequence Read Mode, see Software Requirement 11.4 item 1.*/
639 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
640 DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
641 DoC_WaitReady(docptr);
643 /* Read the data out via the internal pipeline through CDSN IO register,
644 see Pipelined Read Operations 11.3 */
645 dummy = ReadDOC(docptr, ReadPipeInit);
646 #ifndef USE_MEMCPY
647 for (i = 0; i < len-1; i++) {
648 /* N.B. you have to increase the source address in this way or the
649 ECC logic will not work properly */
650 buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
652 #else
653 memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
654 #endif
655 buf[len - 1] = ReadDOC(docptr, LastDataRead);
657 ops->retlen = len;
659 return 0;
662 static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
663 struct mtd_oob_ops *ops)
665 #ifndef USE_MEMCPY
666 int i;
667 #endif
668 volatile char dummy;
669 int ret = 0;
670 struct DiskOnChip *this = mtd->priv;
671 void __iomem *docptr = this->virtadr;
672 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
673 uint8_t *buf = ops->oobbuf;
674 size_t len = ops->len;
676 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB);
678 ofs += ops->ooboffs;
680 /* Find the chip which is to be used and select it */
681 if (this->curfloor != mychip->floor) {
682 DoC_SelectFloor(docptr, mychip->floor);
683 DoC_SelectChip(docptr, mychip->chip);
684 } else if (this->curchip != mychip->chip) {
685 DoC_SelectChip(docptr, mychip->chip);
687 this->curfloor = mychip->floor;
688 this->curchip = mychip->chip;
690 /* disable the ECC engine */
691 WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
692 WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
694 /* Reset the chip, see Software Requirement 11.4 item 1. */
695 DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
696 DoC_WaitReady(docptr);
697 /* issue the Read2 command to set the pointer to the Spare Data Area. */
698 DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
700 /* issue the Serial Data In command to initial the Page Program process */
701 DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
702 DoC_Address(docptr, 3, ofs, 0x00, 0x00);
704 /* Write the data via the internal pipeline through CDSN IO register,
705 see Pipelined Write Operations 11.2 */
706 #ifndef USE_MEMCPY
707 for (i = 0; i < len; i++) {
708 /* N.B. you have to increase the source address in this way or the
709 ECC logic will not work properly */
710 WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
712 #else
713 memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
714 #endif
715 WriteDOC(0x00, docptr, WritePipeTerm);
717 /* Commit the Page Program command and wait for ready
718 see Software Requirement 11.4 item 1.*/
719 DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
720 DoC_WaitReady(docptr);
722 /* Read the status of the flash device through CDSN IO register
723 see Software Requirement 11.4 item 5.*/
724 DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
725 dummy = ReadDOC(docptr, ReadPipeInit);
726 DoC_Delay(docptr, 2);
727 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
728 printk("Error programming oob data\n");
729 /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
730 ops->retlen = 0;
731 ret = -EIO;
733 dummy = ReadDOC(docptr, LastDataRead);
735 ops->retlen = len;
737 return ret;
740 int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
742 volatile char dummy;
743 struct DiskOnChip *this = mtd->priv;
744 __u32 ofs = instr->addr;
745 __u32 len = instr->len;
746 void __iomem *docptr = this->virtadr;
747 struct Nand *mychip = &this->chips[ofs >> this->chipshift];
749 if (len != mtd->erasesize)
750 printk(KERN_WARNING "Erase not right size (%x != %x)n",
751 len, mtd->erasesize);
753 /* Find the chip which is to be used and select it */
754 if (this->curfloor != mychip->floor) {
755 DoC_SelectFloor(docptr, mychip->floor);
756 DoC_SelectChip(docptr, mychip->chip);
757 } else if (this->curchip != mychip->chip) {
758 DoC_SelectChip(docptr, mychip->chip);
760 this->curfloor = mychip->floor;
761 this->curchip = mychip->chip;
763 instr->state = MTD_ERASE_PENDING;
765 /* issue the Erase Setup command */
766 DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
767 DoC_Address(docptr, 2, ofs, 0x00, 0x00);
769 /* Commit the Erase Start command and wait for ready
770 see Software Requirement 11.4 item 1.*/
771 DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
772 DoC_WaitReady(docptr);
774 instr->state = MTD_ERASING;
776 /* Read the status of the flash device through CDSN IO register
777 see Software Requirement 11.4 item 5.
778 FIXME: it seems that we are not wait long enough, some blocks are not
779 erased fully */
780 DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
781 dummy = ReadDOC(docptr, ReadPipeInit);
782 DoC_Delay(docptr, 2);
783 if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
784 printk("Error Erasing at 0x%x\n", ofs);
785 /* There was an error
786 FIXME: implement Bad Block Replacement (in nftl.c ??) */
787 instr->state = MTD_ERASE_FAILED;
788 } else
789 instr->state = MTD_ERASE_DONE;
790 dummy = ReadDOC(docptr, LastDataRead);
792 mtd_erase_callback(instr);
794 return 0;
797 /****************************************************************************
799 * Module stuff
801 ****************************************************************************/
803 static void __exit cleanup_doc2001(void)
805 struct mtd_info *mtd;
806 struct DiskOnChip *this;
808 while ((mtd=docmillist)) {
809 this = mtd->priv;
810 docmillist = this->nextdoc;
812 mtd_device_unregister(mtd);
814 iounmap(this->virtadr);
815 kfree(this->chips);
816 kfree(mtd);
820 module_exit(cleanup_doc2001);
822 MODULE_LICENSE("GPL");
823 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
824 MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");