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USB: usb-storage: unusual_devs update for Super TOP SATA bridge
[linux/fpc-iii.git] / drivers / scsi / arcmsr / arcmsr_hba.c
blobcbde1dca45ad52e37eede57572f19b825cd39408
1 /*
2 *******************************************************************************
3 ** O.S : Linux
4 ** FILE NAME : arcmsr_hba.c
5 ** BY : Nick Cheng
6 ** Description: SCSI RAID Device Driver for
7 ** ARECA RAID Host adapter
8 *******************************************************************************
9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10 **
11 ** Web site: www.areca.com.tw
12 ** E-mail: support@areca.com.tw
13 **
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License version 2 as
16 ** published by the Free Software Foundation.
17 ** This program is distributed in the hope that it will be useful,
18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 ** GNU General Public License for more details.
21 *******************************************************************************
22 ** Redistribution and use in source and binary forms, with or without
23 ** modification, are permitted provided that the following conditions
24 ** are met:
25 ** 1. Redistributions of source code must retain the above copyright
26 ** notice, this list of conditions and the following disclaimer.
27 ** 2. Redistributions in binary form must reproduce the above copyright
28 ** notice, this list of conditions and the following disclaimer in the
29 ** documentation and/or other materials provided with the distribution.
30 ** 3. The name of the author may not be used to endorse or promote products
31 ** derived from this software without specific prior written permission.
32 **
33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 *******************************************************************************
44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46 *******************************************************************************
47 */
48 #include <linux/module.h>
49 #include <linux/reboot.h>
50 #include <linux/spinlock.h>
51 #include <linux/pci_ids.h>
52 #include <linux/interrupt.h>
53 #include <linux/moduleparam.h>
54 #include <linux/errno.h>
55 #include <linux/types.h>
56 #include <linux/delay.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/timer.h>
59 #include <linux/slab.h>
60 #include <linux/pci.h>
61 #include <linux/aer.h>
62 #include <asm/dma.h>
63 #include <asm/io.h>
64 #include <asm/uaccess.h>
65 #include <scsi/scsi_host.h>
66 #include <scsi/scsi.h>
67 #include <scsi/scsi_cmnd.h>
68 #include <scsi/scsi_tcq.h>
69 #include <scsi/scsi_device.h>
70 #include <scsi/scsi_transport.h>
71 #include <scsi/scsicam.h>
72 #include "arcmsr.h"
73 MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
74 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
75 MODULE_LICENSE("Dual BSD/GPL");
76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
77
78 #define ARCMSR_SLEEPTIME 10
79 #define ARCMSR_RETRYCOUNT 12
80
81 wait_queue_head_t wait_q;
82 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
83 struct scsi_cmnd *cmd);
84 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
85 static int arcmsr_abort(struct scsi_cmnd *);
86 static int arcmsr_bus_reset(struct scsi_cmnd *);
87 static int arcmsr_bios_param(struct scsi_device *sdev,
88 struct block_device *bdev, sector_t capacity, int *info);
89 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
90 static int arcmsr_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id);
92 static void arcmsr_remove(struct pci_dev *pdev);
93 static void arcmsr_shutdown(struct pci_dev *pdev);
94 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
95 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
96 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
97 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
98 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
99 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
100 static void arcmsr_request_device_map(unsigned long pacb);
101 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
102 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
103 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
104 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
105 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
106 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
107 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
108 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
109 static const char *arcmsr_info(struct Scsi_Host *);
110 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
111 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
112 int queue_depth, int reason)
113 {
114 if (reason != SCSI_QDEPTH_DEFAULT)
115 return -EOPNOTSUPP;
116
117 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
118 queue_depth = ARCMSR_MAX_CMD_PERLUN;
119 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
120 return queue_depth;
121 }
122
123 static struct scsi_host_template arcmsr_scsi_host_template = {
124 .module = THIS_MODULE,
125 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
126 ARCMSR_DRIVER_VERSION,
127 .info = arcmsr_info,
128 .queuecommand = arcmsr_queue_command,
129 .eh_abort_handler = arcmsr_abort,
130 .eh_bus_reset_handler = arcmsr_bus_reset,
131 .bios_param = arcmsr_bios_param,
132 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
133 .can_queue = ARCMSR_MAX_FREECCB_NUM,
134 .this_id = ARCMSR_SCSI_INITIATOR_ID,
135 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
136 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
137 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
138 .use_clustering = ENABLE_CLUSTERING,
139 .shost_attrs = arcmsr_host_attrs,
140 };
141 static struct pci_device_id arcmsr_device_id_table[] = {
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
161 {0, 0}, /* Terminating entry */
162 };
163 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
164 static struct pci_driver arcmsr_pci_driver = {
165 .name = "arcmsr",
166 .id_table = arcmsr_device_id_table,
167 .probe = arcmsr_probe,
168 .remove = arcmsr_remove,
169 .shutdown = arcmsr_shutdown,
170 };
171 /*
172 ****************************************************************************
173 ****************************************************************************
174 */
175
176 static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
177 {
178 switch (acb->adapter_type) {
179 case ACB_ADAPTER_TYPE_A:
180 case ACB_ADAPTER_TYPE_C:
181 break;
182 case ACB_ADAPTER_TYPE_B:{
183 dma_free_coherent(&acb->pdev->dev,
184 sizeof(struct MessageUnit_B),
185 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
186 }
187 }
188 }
189
190 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
191 {
192 struct pci_dev *pdev = acb->pdev;
193 switch (acb->adapter_type){
194 case ACB_ADAPTER_TYPE_A:{
195 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
196 if (!acb->pmuA) {
197 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
198 return false;
199 }
200 break;
201 }
202 case ACB_ADAPTER_TYPE_B:{
203 void __iomem *mem_base0, *mem_base1;
204 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
205 if (!mem_base0) {
206 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
207 return false;
208 }
209 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
210 if (!mem_base1) {
211 iounmap(mem_base0);
212 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
213 return false;
214 }
215 acb->mem_base0 = mem_base0;
216 acb->mem_base1 = mem_base1;
217 break;
218 }
219 case ACB_ADAPTER_TYPE_C:{
220 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
221 if (!acb->pmuC) {
222 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
223 return false;
224 }
225 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
226 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
227 return true;
228 }
229 break;
230 }
231 }
232 return true;
233 }
234
235 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
236 {
237 switch (acb->adapter_type) {
238 case ACB_ADAPTER_TYPE_A:{
239 iounmap(acb->pmuA);
240 }
241 break;
242 case ACB_ADAPTER_TYPE_B:{
243 iounmap(acb->mem_base0);
244 iounmap(acb->mem_base1);
245 }
246
247 break;
248 case ACB_ADAPTER_TYPE_C:{
249 iounmap(acb->pmuC);
250 }
251 }
252 }
253
254 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
255 {
256 irqreturn_t handle_state;
257 struct AdapterControlBlock *acb = dev_id;
258
259 handle_state = arcmsr_interrupt(acb);
260 return handle_state;
261 }
262
263 static int arcmsr_bios_param(struct scsi_device *sdev,
264 struct block_device *bdev, sector_t capacity, int *geom)
265 {
266 int ret, heads, sectors, cylinders, total_capacity;
267 unsigned char *buffer;/* return copy of block device's partition table */
268
269 buffer = scsi_bios_ptable(bdev);
270 if (buffer) {
271 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
272 kfree(buffer);
273 if (ret != -1)
274 return ret;
275 }
276 total_capacity = capacity;
277 heads = 64;
278 sectors = 32;
279 cylinders = total_capacity / (heads * sectors);
280 if (cylinders > 1024) {
281 heads = 255;
282 sectors = 63;
283 cylinders = total_capacity / (heads * sectors);
284 }
285 geom[0] = heads;
286 geom[1] = sectors;
287 geom[2] = cylinders;
288 return 0;
289 }
290
291 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
292 {
293 struct pci_dev *pdev = acb->pdev;
294 u16 dev_id;
295 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
296 acb->dev_id = dev_id;
297 switch (dev_id) {
298 case 0x1880: {
299 acb->adapter_type = ACB_ADAPTER_TYPE_C;
300 }
301 break;
302 case 0x1201: {
303 acb->adapter_type = ACB_ADAPTER_TYPE_B;
304 }
305 break;
306
307 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
308 }
309 }
310
311 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
312 {
313 struct MessageUnit_A __iomem *reg = acb->pmuA;
314 int i;
315
316 for (i = 0; i < 2000; i++) {
317 if (readl(&reg->outbound_intstatus) &
318 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
319 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
320 &reg->outbound_intstatus);
321 return true;
322 }
323 msleep(10);
324 } /* max 20 seconds */
325
326 return false;
327 }
328
329 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
330 {
331 struct MessageUnit_B *reg = acb->pmuB;
332 int i;
333
334 for (i = 0; i < 2000; i++) {
335 if (readl(reg->iop2drv_doorbell)
336 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
337 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
338 reg->iop2drv_doorbell);
339 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
340 reg->drv2iop_doorbell);
341 return true;
342 }
343 msleep(10);
344 } /* max 20 seconds */
345
346 return false;
347 }
348
349 static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
350 {
351 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
352 int i;
353
354 for (i = 0; i < 2000; i++) {
355 if (readl(&phbcmu->outbound_doorbell)
356 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
357 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
358 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
359 return true;
360 }
361 msleep(10);
362 } /* max 20 seconds */
363
364 return false;
365 }
366
367 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
368 {
369 struct MessageUnit_A __iomem *reg = acb->pmuA;
370 int retry_count = 30;
371 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
372 do {
373 if (arcmsr_hba_wait_msgint_ready(acb))
374 break;
375 else {
376 retry_count--;
377 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
378 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
379 }
380 } while (retry_count != 0);
381 }
382
383 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
384 {
385 struct MessageUnit_B *reg = acb->pmuB;
386 int retry_count = 30;
387 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
388 do {
389 if (arcmsr_hbb_wait_msgint_ready(acb))
390 break;
391 else {
392 retry_count--;
393 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
394 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
395 }
396 } while (retry_count != 0);
397 }
398
399 static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
400 {
401 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
402 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
403 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
404 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
405 do {
406 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
407 break;
408 } else {
409 retry_count--;
410 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
411 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
412 }
413 } while (retry_count != 0);
414 return;
415 }
416 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
417 {
418 switch (acb->adapter_type) {
419
420 case ACB_ADAPTER_TYPE_A: {
421 arcmsr_flush_hba_cache(acb);
422 }
423 break;
424
425 case ACB_ADAPTER_TYPE_B: {
426 arcmsr_flush_hbb_cache(acb);
427 }
428 break;
429 case ACB_ADAPTER_TYPE_C: {
430 arcmsr_flush_hbc_cache(acb);
431 }
432 }
433 }
434
435 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
436 {
437 struct pci_dev *pdev = acb->pdev;
438 void *dma_coherent;
439 dma_addr_t dma_coherent_handle;
440 struct CommandControlBlock *ccb_tmp;
441 int i = 0, j = 0;
442 dma_addr_t cdb_phyaddr;
443 unsigned long roundup_ccbsize;
444 unsigned long max_xfer_len;
445 unsigned long max_sg_entrys;
446 uint32_t firm_config_version;
447
448 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
449 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
450 acb->devstate[i][j] = ARECA_RAID_GONE;
451
452 max_xfer_len = ARCMSR_MAX_XFER_LEN;
453 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
454 firm_config_version = acb->firm_cfg_version;
455 if((firm_config_version & 0xFF) >= 3){
456 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
457 max_sg_entrys = (max_xfer_len/4096);
458 }
459 acb->host->max_sectors = max_xfer_len/512;
460 acb->host->sg_tablesize = max_sg_entrys;
461 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
462 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
463 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
464 if(!dma_coherent){
465 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
466 return -ENOMEM;
467 }
468 acb->dma_coherent = dma_coherent;
469 acb->dma_coherent_handle = dma_coherent_handle;
470 memset(dma_coherent, 0, acb->uncache_size);
471 ccb_tmp = dma_coherent;
472 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
473 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
474 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
475 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
476 acb->pccb_pool[i] = ccb_tmp;
477 ccb_tmp->acb = acb;
478 INIT_LIST_HEAD(&ccb_tmp->list);
479 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
480 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
481 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
482 }
483 return 0;
484 }
485
486 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
487 {
488 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
489 switch (acb->adapter_type) {
490 case ACB_ADAPTER_TYPE_A: {
491
492 struct MessageUnit_A __iomem *reg = acb->pmuA;
493 char *acb_dev_map = (char *)acb->device_map;
494 uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
495 char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
496 int target, lun;
497 struct scsi_device *psdev;
498 char diff;
499
500 atomic_inc(&acb->rq_map_token);
501 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
502 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
503 diff = (*acb_dev_map)^readb(devicemap);
504 if (diff != 0) {
505 char temp;
506 *acb_dev_map = readb(devicemap);
507 temp =*acb_dev_map;
508 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
509 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
510 scsi_add_device(acb->host, 0, target, lun);
511 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
512 psdev = scsi_device_lookup(acb->host, 0, target, lun);
513 if (psdev != NULL ) {
514 scsi_remove_device(psdev);
515 scsi_device_put(psdev);
516 }
517 }
518 temp >>= 1;
519 diff >>= 1;
520 }
521 }
522 devicemap++;
523 acb_dev_map++;
524 }
525 }
526 break;
527 }
528
529 case ACB_ADAPTER_TYPE_B: {
530 struct MessageUnit_B *reg = acb->pmuB;
531 char *acb_dev_map = (char *)acb->device_map;
532 uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
533 char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
534 int target, lun;
535 struct scsi_device *psdev;
536 char diff;
537
538 atomic_inc(&acb->rq_map_token);
539 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
540 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
541 diff = (*acb_dev_map)^readb(devicemap);
542 if (diff != 0) {
543 char temp;
544 *acb_dev_map = readb(devicemap);
545 temp =*acb_dev_map;
546 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
547 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
548 scsi_add_device(acb->host, 0, target, lun);
549 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
550 psdev = scsi_device_lookup(acb->host, 0, target, lun);
551 if (psdev != NULL ) {
552 scsi_remove_device(psdev);
553 scsi_device_put(psdev);
554 }
555 }
556 temp >>= 1;
557 diff >>= 1;
558 }
559 }
560 devicemap++;
561 acb_dev_map++;
562 }
563 }
564 }
565 break;
566 case ACB_ADAPTER_TYPE_C: {
567 struct MessageUnit_C *reg = acb->pmuC;
568 char *acb_dev_map = (char *)acb->device_map;
569 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
570 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
571 int target, lun;
572 struct scsi_device *psdev;
573 char diff;
574
575 atomic_inc(&acb->rq_map_token);
576 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
577 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
578 diff = (*acb_dev_map)^readb(devicemap);
579 if (diff != 0) {
580 char temp;
581 *acb_dev_map = readb(devicemap);
582 temp = *acb_dev_map;
583 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
584 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
585 scsi_add_device(acb->host, 0, target, lun);
586 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
587 psdev = scsi_device_lookup(acb->host, 0, target, lun);
588 if (psdev != NULL) {
589 scsi_remove_device(psdev);
590 scsi_device_put(psdev);
591 }
592 }
593 temp >>= 1;
594 diff >>= 1;
595 }
596 }
597 devicemap++;
598 acb_dev_map++;
599 }
600 }
601 }
602 }
603 }
604
605 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
606 {
607 struct Scsi_Host *host;
608 struct AdapterControlBlock *acb;
609 uint8_t bus,dev_fun;
610 int error;
611 error = pci_enable_device(pdev);
612 if(error){
613 return -ENODEV;
614 }
615 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
616 if(!host){
617 goto pci_disable_dev;
618 }
619 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
620 if(error){
621 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
622 if(error){
623 printk(KERN_WARNING
624 "scsi%d: No suitable DMA mask available\n",
625 host->host_no);
626 goto scsi_host_release;
627 }
628 }
629 init_waitqueue_head(&wait_q);
630 bus = pdev->bus->number;
631 dev_fun = pdev->devfn;
632 acb = (struct AdapterControlBlock *) host->hostdata;
633 memset(acb,0,sizeof(struct AdapterControlBlock));
634 acb->pdev = pdev;
635 acb->host = host;
636 host->max_lun = ARCMSR_MAX_TARGETLUN;
637 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
638 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
639 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
640 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
641 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
642 host->unique_id = (bus << 8) | dev_fun;
643 pci_set_drvdata(pdev, host);
644 pci_set_master(pdev);
645 error = pci_request_regions(pdev, "arcmsr");
646 if(error){
647 goto scsi_host_release;
648 }
649 spin_lock_init(&acb->eh_lock);
650 spin_lock_init(&acb->ccblist_lock);
651 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
652 ACB_F_MESSAGE_RQBUFFER_CLEARED |
653 ACB_F_MESSAGE_WQBUFFER_READED);
654 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
655 INIT_LIST_HEAD(&acb->ccb_free_list);
656 arcmsr_define_adapter_type(acb);
657 error = arcmsr_remap_pciregion(acb);
658 if(!error){
659 goto pci_release_regs;
660 }
661 error = arcmsr_get_firmware_spec(acb);
662 if(!error){
663 goto unmap_pci_region;
664 }
665 error = arcmsr_alloc_ccb_pool(acb);
666 if(error){
667 goto free_hbb_mu;
668 }
669 arcmsr_iop_init(acb);
670 error = scsi_add_host(host, &pdev->dev);
671 if(error){
672 goto RAID_controller_stop;
673 }
674 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
675 if(error){
676 goto scsi_host_remove;
677 }
678 host->irq = pdev->irq;
679 scsi_scan_host(host);
680 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
681 atomic_set(&acb->rq_map_token, 16);
682 atomic_set(&acb->ante_token_value, 16);
683 acb->fw_flag = FW_NORMAL;
684 init_timer(&acb->eternal_timer);
685 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
686 acb->eternal_timer.data = (unsigned long) acb;
687 acb->eternal_timer.function = &arcmsr_request_device_map;
688 add_timer(&acb->eternal_timer);
689 if(arcmsr_alloc_sysfs_attr(acb))
690 goto out_free_sysfs;
691 return 0;
692 out_free_sysfs:
693 scsi_host_remove:
694 scsi_remove_host(host);
695 RAID_controller_stop:
696 arcmsr_stop_adapter_bgrb(acb);
697 arcmsr_flush_adapter_cache(acb);
698 arcmsr_free_ccb_pool(acb);
699 free_hbb_mu:
700 arcmsr_free_hbb_mu(acb);
701 unmap_pci_region:
702 arcmsr_unmap_pciregion(acb);
703 pci_release_regs:
704 pci_release_regions(pdev);
705 scsi_host_release:
706 scsi_host_put(host);
707 pci_disable_dev:
708 pci_disable_device(pdev);
709 return -ENODEV;
710 }
711
712 static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
713 {
714 struct MessageUnit_A __iomem *reg = acb->pmuA;
715 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
716 if (!arcmsr_hba_wait_msgint_ready(acb)) {
717 printk(KERN_NOTICE
718 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
719 , acb->host->host_no);
720 return false;
721 }
722 return true;
723 }
724
725 static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
726 {
727 struct MessageUnit_B *reg = acb->pmuB;
728
729 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
730 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
731 printk(KERN_NOTICE
732 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
733 , acb->host->host_no);
734 return false;
735 }
736 return true;
737 }
738 static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
739 {
740 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
741 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
742 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
743 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
744 printk(KERN_NOTICE
745 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
746 , pACB->host->host_no);
747 return false;
748 }
749 return true;
750 }
751 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
752 {
753 uint8_t rtnval = 0;
754 switch (acb->adapter_type) {
755 case ACB_ADAPTER_TYPE_A: {
756 rtnval = arcmsr_abort_hba_allcmd(acb);
757 }
758 break;
759
760 case ACB_ADAPTER_TYPE_B: {
761 rtnval = arcmsr_abort_hbb_allcmd(acb);
762 }
763 break;
764
765 case ACB_ADAPTER_TYPE_C: {
766 rtnval = arcmsr_abort_hbc_allcmd(acb);
767 }
768 }
769 return rtnval;
770 }
771
772 static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
773 {
774 struct MessageUnit_B *reg = pacb->pmuB;
775 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
776 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
777 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
778 return false;
779 }
780 return true;
781 }
782
783 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
784 {
785 struct scsi_cmnd *pcmd = ccb->pcmd;
786
787 scsi_dma_unmap(pcmd);
788 }
789
790 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
791 {
792 struct AdapterControlBlock *acb = ccb->acb;
793 struct scsi_cmnd *pcmd = ccb->pcmd;
794 unsigned long flags;
795 atomic_dec(&acb->ccboutstandingcount);
796 arcmsr_pci_unmap_dma(ccb);
797 ccb->startdone = ARCMSR_CCB_DONE;
798 spin_lock_irqsave(&acb->ccblist_lock, flags);
799 list_add_tail(&ccb->list, &acb->ccb_free_list);
800 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
801 pcmd->scsi_done(pcmd);
802 }
803
804 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
805 {
806
807 struct scsi_cmnd *pcmd = ccb->pcmd;
808 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
809 pcmd->result = DID_OK << 16;
810 if (sensebuffer) {
811 int sense_data_length =
812 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
813 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
814 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
815 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
816 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
817 sensebuffer->Valid = 1;
818 }
819 }
820
821 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
822 {
823 u32 orig_mask = 0;
824 switch (acb->adapter_type) {
825 case ACB_ADAPTER_TYPE_A : {
826 struct MessageUnit_A __iomem *reg = acb->pmuA;
827 orig_mask = readl(&reg->outbound_intmask);
828 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
829 &reg->outbound_intmask);
830 }
831 break;
832 case ACB_ADAPTER_TYPE_B : {
833 struct MessageUnit_B *reg = acb->pmuB;
834 orig_mask = readl(reg->iop2drv_doorbell_mask);
835 writel(0, reg->iop2drv_doorbell_mask);
836 }
837 break;
838 case ACB_ADAPTER_TYPE_C:{
839 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
840 /* disable all outbound interrupt */
841 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
842 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
843 }
844 break;
845 }
846 return orig_mask;
847 }
848
849 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
850 struct CommandControlBlock *ccb, bool error)
851 {
852 uint8_t id, lun;
853 id = ccb->pcmd->device->id;
854 lun = ccb->pcmd->device->lun;
855 if (!error) {
856 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
857 acb->devstate[id][lun] = ARECA_RAID_GOOD;
858 ccb->pcmd->result = DID_OK << 16;
859 arcmsr_ccb_complete(ccb);
860 }else{
861 switch (ccb->arcmsr_cdb.DeviceStatus) {
862 case ARCMSR_DEV_SELECT_TIMEOUT: {
863 acb->devstate[id][lun] = ARECA_RAID_GONE;
864 ccb->pcmd->result = DID_NO_CONNECT << 16;
865 arcmsr_ccb_complete(ccb);
866 }
867 break;
868
869 case ARCMSR_DEV_ABORTED:
870
871 case ARCMSR_DEV_INIT_FAIL: {
872 acb->devstate[id][lun] = ARECA_RAID_GONE;
873 ccb->pcmd->result = DID_BAD_TARGET << 16;
874 arcmsr_ccb_complete(ccb);
875 }
876 break;
877
878 case ARCMSR_DEV_CHECK_CONDITION: {
879 acb->devstate[id][lun] = ARECA_RAID_GOOD;
880 arcmsr_report_sense_info(ccb);
881 arcmsr_ccb_complete(ccb);
882 }
883 break;
884
885 default:
886 printk(KERN_NOTICE
887 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
888 but got unknown DeviceStatus = 0x%x \n"
889 , acb->host->host_no
890 , id
891 , lun
892 , ccb->arcmsr_cdb.DeviceStatus);
893 acb->devstate[id][lun] = ARECA_RAID_GONE;
894 ccb->pcmd->result = DID_NO_CONNECT << 16;
895 arcmsr_ccb_complete(ccb);
896 break;
897 }
898 }
899 }
900
901 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
902 {
903 int id, lun;
904 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
905 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
906 struct scsi_cmnd *abortcmd = pCCB->pcmd;
907 if (abortcmd) {
908 id = abortcmd->device->id;
909 lun = abortcmd->device->lun;
910 abortcmd->result |= DID_ABORT << 16;
911 arcmsr_ccb_complete(pCCB);
912 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
913 acb->host->host_no, pCCB);
914 }
915 return;
916 }
917 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
918 done acb = '0x%p'"
919 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
920 " ccboutstandingcount = %d \n"
921 , acb->host->host_no
922 , acb
923 , pCCB
924 , pCCB->acb
925 , pCCB->startdone
926 , atomic_read(&acb->ccboutstandingcount));
927 return;
928 }
929 arcmsr_report_ccb_state(acb, pCCB, error);
930 }
931
932 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
933 {
934 int i = 0;
935 uint32_t flag_ccb;
936 struct ARCMSR_CDB *pARCMSR_CDB;
937 bool error;
938 struct CommandControlBlock *pCCB;
939 switch (acb->adapter_type) {
940
941 case ACB_ADAPTER_TYPE_A: {
942 struct MessageUnit_A __iomem *reg = acb->pmuA;
943 uint32_t outbound_intstatus;
944 outbound_intstatus = readl(&reg->outbound_intstatus) &
945 acb->outbound_int_enable;
946 /*clear and abort all outbound posted Q*/
947 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
948 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
949 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
950 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
951 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
952 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
953 arcmsr_drain_donequeue(acb, pCCB, error);
954 }
955 }
956 break;
957
958 case ACB_ADAPTER_TYPE_B: {
959 struct MessageUnit_B *reg = acb->pmuB;
960 /*clear all outbound posted Q*/
961 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
962 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
963 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
964 writel(0, &reg->done_qbuffer[i]);
965 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
966 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
967 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
968 arcmsr_drain_donequeue(acb, pCCB, error);
969 }
970 reg->post_qbuffer[i] = 0;
971 }
972 reg->doneq_index = 0;
973 reg->postq_index = 0;
974 }
975 break;
976 case ACB_ADAPTER_TYPE_C: {
977 struct MessageUnit_C *reg = acb->pmuC;
978 struct ARCMSR_CDB *pARCMSR_CDB;
979 uint32_t flag_ccb, ccb_cdb_phy;
980 bool error;
981 struct CommandControlBlock *pCCB;
982 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
983 /*need to do*/
984 flag_ccb = readl(&reg->outbound_queueport_low);
985 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
986 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
987 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
988 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
989 arcmsr_drain_donequeue(acb, pCCB, error);
990 }
991 }
992 }
993 }
994 static void arcmsr_remove(struct pci_dev *pdev)
995 {
996 struct Scsi_Host *host = pci_get_drvdata(pdev);
997 struct AdapterControlBlock *acb =
998 (struct AdapterControlBlock *) host->hostdata;
999 int poll_count = 0;
1000 arcmsr_free_sysfs_attr(acb);
1001 scsi_remove_host(host);
1002 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
1003 del_timer_sync(&acb->eternal_timer);
1004 arcmsr_disable_outbound_ints(acb);
1005 arcmsr_stop_adapter_bgrb(acb);
1006 arcmsr_flush_adapter_cache(acb);
1007 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1008 acb->acb_flags &= ~ACB_F_IOP_INITED;
1009
1010 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
1011 if (!atomic_read(&acb->ccboutstandingcount))
1012 break;
1013 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1014 msleep(25);
1015 }
1016
1017 if (atomic_read(&acb->ccboutstandingcount)) {
1018 int i;
1019
1020 arcmsr_abort_allcmd(acb);
1021 arcmsr_done4abort_postqueue(acb);
1022 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1023 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1024 if (ccb->startdone == ARCMSR_CCB_START) {
1025 ccb->startdone = ARCMSR_CCB_ABORTED;
1026 ccb->pcmd->result = DID_ABORT << 16;
1027 arcmsr_ccb_complete(ccb);
1028 }
1029 }
1030 }
1031 free_irq(pdev->irq, acb);
1032 arcmsr_free_ccb_pool(acb);
1033 arcmsr_free_hbb_mu(acb);
1034 arcmsr_unmap_pciregion(acb);
1035 pci_release_regions(pdev);
1036 scsi_host_put(host);
1037 pci_disable_device(pdev);
1038 pci_set_drvdata(pdev, NULL);
1039 }
1040
1041 static void arcmsr_shutdown(struct pci_dev *pdev)
1042 {
1043 struct Scsi_Host *host = pci_get_drvdata(pdev);
1044 struct AdapterControlBlock *acb =
1045 (struct AdapterControlBlock *)host->hostdata;
1046 del_timer_sync(&acb->eternal_timer);
1047 arcmsr_disable_outbound_ints(acb);
1048 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
1049 arcmsr_stop_adapter_bgrb(acb);
1050 arcmsr_flush_adapter_cache(acb);
1051 }
1052
1053 static int arcmsr_module_init(void)
1054 {
1055 int error = 0;
1056 error = pci_register_driver(&arcmsr_pci_driver);
1057 return error;
1058 }
1059
1060 static void arcmsr_module_exit(void)
1061 {
1062 pci_unregister_driver(&arcmsr_pci_driver);
1063 }
1064 module_init(arcmsr_module_init);
1065 module_exit(arcmsr_module_exit);
1066
1067 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1068 u32 intmask_org)
1069 {
1070 u32 mask;
1071 switch (acb->adapter_type) {
1072
1073 case ACB_ADAPTER_TYPE_A: {
1074 struct MessageUnit_A __iomem *reg = acb->pmuA;
1075 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1076 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1077 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1078 writel(mask, &reg->outbound_intmask);
1079 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1080 }
1081 break;
1082
1083 case ACB_ADAPTER_TYPE_B: {
1084 struct MessageUnit_B *reg = acb->pmuB;
1085 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1086 ARCMSR_IOP2DRV_DATA_READ_OK |
1087 ARCMSR_IOP2DRV_CDB_DONE |
1088 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1089 writel(mask, reg->iop2drv_doorbell_mask);
1090 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1091 }
1092 break;
1093 case ACB_ADAPTER_TYPE_C: {
1094 struct MessageUnit_C *reg = acb->pmuC;
1095 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1096 writel(intmask_org & mask, &reg->host_int_mask);
1097 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1098 }
1099 }
1100 }
1101
1102 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1103 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1104 {
1105 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1106 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1107 __le32 address_lo, address_hi;
1108 int arccdbsize = 0x30;
1109 __le32 length = 0;
1110 int i;
1111 struct scatterlist *sg;
1112 int nseg;
1113 ccb->pcmd = pcmd;
1114 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1115 arcmsr_cdb->TargetID = pcmd->device->id;
1116 arcmsr_cdb->LUN = pcmd->device->lun;
1117 arcmsr_cdb->Function = 1;
1118 arcmsr_cdb->Context = 0;
1119 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1120
1121 nseg = scsi_dma_map(pcmd);
1122 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1123 return FAILED;
1124 scsi_for_each_sg(pcmd, sg, nseg, i) {
1125 /* Get the physical address of the current data pointer */
1126 length = cpu_to_le32(sg_dma_len(sg));
1127 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1128 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1129 if (address_hi == 0) {
1130 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1131
1132 pdma_sg->address = address_lo;
1133 pdma_sg->length = length;
1134 psge += sizeof (struct SG32ENTRY);
1135 arccdbsize += sizeof (struct SG32ENTRY);
1136 } else {
1137 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1138
1139 pdma_sg->addresshigh = address_hi;
1140 pdma_sg->address = address_lo;
1141 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1142 psge += sizeof (struct SG64ENTRY);
1143 arccdbsize += sizeof (struct SG64ENTRY);
1144 }
1145 }
1146 arcmsr_cdb->sgcount = (uint8_t)nseg;
1147 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1148 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1149 if ( arccdbsize > 256)
1150 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1151 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1152 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1153 ccb->arc_cdb_size = arccdbsize;
1154 return SUCCESS;
1155 }
1156
1157 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1158 {
1159 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
1160 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1161 atomic_inc(&acb->ccboutstandingcount);
1162 ccb->startdone = ARCMSR_CCB_START;
1163 switch (acb->adapter_type) {
1164 case ACB_ADAPTER_TYPE_A: {
1165 struct MessageUnit_A __iomem *reg = acb->pmuA;
1166
1167 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1168 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1169 &reg->inbound_queueport);
1170 else {
1171 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
1172 }
1173 }
1174 break;
1175
1176 case ACB_ADAPTER_TYPE_B: {
1177 struct MessageUnit_B *reg = acb->pmuB;
1178 uint32_t ending_index, index = reg->postq_index;
1179
1180 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1181 writel(0, &reg->post_qbuffer[ending_index]);
1182 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1183 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
1184 &reg->post_qbuffer[index]);
1185 } else {
1186 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
1187 }
1188 index++;
1189 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1190 reg->postq_index = index;
1191 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1192 }
1193 break;
1194 case ACB_ADAPTER_TYPE_C: {
1195 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1196 uint32_t ccb_post_stamp, arc_cdb_size;
1197
1198 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1199 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1200 if (acb->cdb_phyaddr_hi32) {
1201 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1202 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1203 } else {
1204 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1205 }
1206 }
1207 }
1208 }
1209
1210 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1211 {
1212 struct MessageUnit_A __iomem *reg = acb->pmuA;
1213 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1214 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1215 if (!arcmsr_hba_wait_msgint_ready(acb)) {
1216 printk(KERN_NOTICE
1217 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1218 , acb->host->host_no);
1219 }
1220 }
1221
1222 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1223 {
1224 struct MessageUnit_B *reg = acb->pmuB;
1225 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1226 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1227
1228 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
1229 printk(KERN_NOTICE
1230 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1231 , acb->host->host_no);
1232 }
1233 }
1234
1235 static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1236 {
1237 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1238 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1239 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1240 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1241 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1242 printk(KERN_NOTICE
1243 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1244 , pACB->host->host_no);
1245 }
1246 return;
1247 }
1248 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1249 {
1250 switch (acb->adapter_type) {
1251 case ACB_ADAPTER_TYPE_A: {
1252 arcmsr_stop_hba_bgrb(acb);
1253 }
1254 break;
1255
1256 case ACB_ADAPTER_TYPE_B: {
1257 arcmsr_stop_hbb_bgrb(acb);
1258 }
1259 break;
1260 case ACB_ADAPTER_TYPE_C: {
1261 arcmsr_stop_hbc_bgrb(acb);
1262 }
1263 }
1264 }
1265
1266 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1267 {
1268 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1269 }
1270
1271 void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1272 {
1273 switch (acb->adapter_type) {
1274 case ACB_ADAPTER_TYPE_A: {
1275 struct MessageUnit_A __iomem *reg = acb->pmuA;
1276 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1277 }
1278 break;
1279
1280 case ACB_ADAPTER_TYPE_B: {
1281 struct MessageUnit_B *reg = acb->pmuB;
1282 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1283 }
1284 break;
1285 case ACB_ADAPTER_TYPE_C: {
1286 struct MessageUnit_C __iomem *reg = acb->pmuC;
1287 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1288 }
1289 }
1290 }
1291
1292 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1293 {
1294 switch (acb->adapter_type) {
1295 case ACB_ADAPTER_TYPE_A: {
1296 struct MessageUnit_A __iomem *reg = acb->pmuA;
1297 /*
1298 ** push inbound doorbell tell iop, driver data write ok
1299 ** and wait reply on next hwinterrupt for next Qbuffer post
1300 */
1301 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1302 }
1303 break;
1304
1305 case ACB_ADAPTER_TYPE_B: {
1306 struct MessageUnit_B *reg = acb->pmuB;
1307 /*
1308 ** push inbound doorbell tell iop, driver data write ok
1309 ** and wait reply on next hwinterrupt for next Qbuffer post
1310 */
1311 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1312 }
1313 break;
1314 case ACB_ADAPTER_TYPE_C: {
1315 struct MessageUnit_C __iomem *reg = acb->pmuC;
1316 /*
1317 ** push inbound doorbell tell iop, driver data write ok
1318 ** and wait reply on next hwinterrupt for next Qbuffer post
1319 */
1320 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1321 }
1322 break;
1323 }
1324 }
1325
1326 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1327 {
1328 struct QBUFFER __iomem *qbuffer = NULL;
1329 switch (acb->adapter_type) {
1330
1331 case ACB_ADAPTER_TYPE_A: {
1332 struct MessageUnit_A __iomem *reg = acb->pmuA;
1333 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1334 }
1335 break;
1336
1337 case ACB_ADAPTER_TYPE_B: {
1338 struct MessageUnit_B *reg = acb->pmuB;
1339 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1340 }
1341 break;
1342 case ACB_ADAPTER_TYPE_C: {
1343 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1344 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1345 }
1346 }
1347 return qbuffer;
1348 }
1349
1350 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1351 {
1352 struct QBUFFER __iomem *pqbuffer = NULL;
1353 switch (acb->adapter_type) {
1354
1355 case ACB_ADAPTER_TYPE_A: {
1356 struct MessageUnit_A __iomem *reg = acb->pmuA;
1357 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
1358 }
1359 break;
1360
1361 case ACB_ADAPTER_TYPE_B: {
1362 struct MessageUnit_B *reg = acb->pmuB;
1363 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1364 }
1365 break;
1366 case ACB_ADAPTER_TYPE_C: {
1367 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1368 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1369 }
1370
1371 }
1372 return pqbuffer;
1373 }
1374
1375 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1376 {
1377 struct QBUFFER __iomem *prbuffer;
1378 struct QBUFFER *pQbuffer;
1379 uint8_t __iomem *iop_data;
1380 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
1381 rqbuf_lastindex = acb->rqbuf_lastindex;
1382 rqbuf_firstindex = acb->rqbuf_firstindex;
1383 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1384 iop_data = (uint8_t __iomem *)prbuffer->data;
1385 iop_len = prbuffer->data_len;
1386 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
1387
1388 if (my_empty_len >= iop_len)
1389 {
1390 while (iop_len > 0) {
1391 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
1392 memcpy(pQbuffer, iop_data, 1);
1393 rqbuf_lastindex++;
1394 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1395 iop_data++;
1396 iop_len--;
1397 }
1398 acb->rqbuf_lastindex = rqbuf_lastindex;
1399 arcmsr_iop_message_read(acb);
1400 }
1401
1402 else {
1403 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1404 }
1405 }
1406
1407 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1408 {
1409 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1410 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1411 uint8_t *pQbuffer;
1412 struct QBUFFER __iomem *pwbuffer;
1413 uint8_t __iomem *iop_data;
1414 int32_t allxfer_len = 0;
1415
1416 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1417 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1418 iop_data = (uint8_t __iomem *)pwbuffer->data;
1419
1420 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1421 (allxfer_len < 124)) {
1422 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1423 memcpy(iop_data, pQbuffer, 1);
1424 acb->wqbuf_firstindex++;
1425 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1426 iop_data++;
1427 allxfer_len++;
1428 }
1429 pwbuffer->data_len = allxfer_len;
1430
1431 arcmsr_iop_message_wrote(acb);
1432 }
1433
1434 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1435 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1436 }
1437 }
1438
1439 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1440 {
1441 uint32_t outbound_doorbell;
1442 struct MessageUnit_A __iomem *reg = acb->pmuA;
1443 outbound_doorbell = readl(&reg->outbound_doorbell);
1444 writel(outbound_doorbell, &reg->outbound_doorbell);
1445 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1446 arcmsr_iop2drv_data_wrote_handle(acb);
1447 }
1448
1449 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1450 arcmsr_iop2drv_data_read_handle(acb);
1451 }
1452 }
1453 static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1454 {
1455 uint32_t outbound_doorbell;
1456 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1457 /*
1458 *******************************************************************
1459 ** Maybe here we need to check wrqbuffer_lock is lock or not
1460 ** DOORBELL: din! don!
1461 ** check if there are any mail need to pack from firmware
1462 *******************************************************************
1463 */
1464 outbound_doorbell = readl(&reg->outbound_doorbell);
1465 writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
1466 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1467 arcmsr_iop2drv_data_wrote_handle(pACB);
1468 }
1469 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1470 arcmsr_iop2drv_data_read_handle(pACB);
1471 }
1472 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1473 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
1474 }
1475 return;
1476 }
1477 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1478 {
1479 uint32_t flag_ccb;
1480 struct MessageUnit_A __iomem *reg = acb->pmuA;
1481 struct ARCMSR_CDB *pARCMSR_CDB;
1482 struct CommandControlBlock *pCCB;
1483 bool error;
1484 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
1485 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1486 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1487 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1488 arcmsr_drain_donequeue(acb, pCCB, error);
1489 }
1490 }
1491 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1492 {
1493 uint32_t index;
1494 uint32_t flag_ccb;
1495 struct MessageUnit_B *reg = acb->pmuB;
1496 struct ARCMSR_CDB *pARCMSR_CDB;
1497 struct CommandControlBlock *pCCB;
1498 bool error;
1499 index = reg->doneq_index;
1500 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1501 writel(0, &reg->done_qbuffer[index]);
1502 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1503 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1504 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1505 arcmsr_drain_donequeue(acb, pCCB, error);
1506 index++;
1507 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1508 reg->doneq_index = index;
1509 }
1510 }
1511
1512 static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1513 {
1514 struct MessageUnit_C *phbcmu;
1515 struct ARCMSR_CDB *arcmsr_cdb;
1516 struct CommandControlBlock *ccb;
1517 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1518 int error;
1519
1520 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1521 /* areca cdb command done */
1522 /* Use correct offset and size for syncing */
1523
1524 while (readl(&phbcmu->host_int_status) &
1525 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1526 /* check if command done with no error*/
1527 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1528 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
1529 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1530 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1531 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1532 /* check if command done with no error */
1533 arcmsr_drain_donequeue(acb, ccb, error);
1534 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1535 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1536 break;
1537 }
1538 throttling++;
1539 }
1540 }
1541 /*
1542 **********************************************************************************
1543 ** Handle a message interrupt
1544 **
1545 ** The only message interrupt we expect is in response to a query for the current adapter config.
1546 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1547 **********************************************************************************
1548 */
1549 static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1550 {
1551 struct MessageUnit_A *reg = acb->pmuA;
1552 /*clear interrupt and message state*/
1553 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1554 schedule_work(&acb->arcmsr_do_message_isr_bh);
1555 }
1556 static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1557 {
1558 struct MessageUnit_B *reg = acb->pmuB;
1559
1560 /*clear interrupt and message state*/
1561 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
1562 schedule_work(&acb->arcmsr_do_message_isr_bh);
1563 }
1564 /*
1565 **********************************************************************************
1566 ** Handle a message interrupt
1567 **
1568 ** The only message interrupt we expect is in response to a query for the
1569 ** current adapter config.
1570 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1571 **********************************************************************************
1572 */
1573 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1574 {
1575 struct MessageUnit_C *reg = acb->pmuC;
1576 /*clear interrupt and message state*/
1577 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1578 schedule_work(&acb->arcmsr_do_message_isr_bh);
1579 }
1580
1581 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1582 {
1583 uint32_t outbound_intstatus;
1584 struct MessageUnit_A __iomem *reg = acb->pmuA;
1585 outbound_intstatus = readl(&reg->outbound_intstatus) &
1586 acb->outbound_int_enable;
1587 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1588 return 1;
1589 }
1590 writel(outbound_intstatus, &reg->outbound_intstatus);
1591 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1592 arcmsr_hba_doorbell_isr(acb);
1593 }
1594 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1595 arcmsr_hba_postqueue_isr(acb);
1596 }
1597 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
1598 /* messenger of "driver to iop commands" */
1599 arcmsr_hba_message_isr(acb);
1600 }
1601 return 0;
1602 }
1603
1604 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1605 {
1606 uint32_t outbound_doorbell;
1607 struct MessageUnit_B *reg = acb->pmuB;
1608 outbound_doorbell = readl(reg->iop2drv_doorbell) &
1609 acb->outbound_int_enable;
1610 if (!outbound_doorbell)
1611 return 1;
1612
1613 writel(~outbound_doorbell, reg->iop2drv_doorbell);
1614 /*in case the last action of doorbell interrupt clearance is cached,
1615 this action can push HW to write down the clear bit*/
1616 readl(reg->iop2drv_doorbell);
1617 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
1618 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1619 arcmsr_iop2drv_data_wrote_handle(acb);
1620 }
1621 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1622 arcmsr_iop2drv_data_read_handle(acb);
1623 }
1624 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1625 arcmsr_hbb_postqueue_isr(acb);
1626 }
1627 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
1628 /* messenger of "driver to iop commands" */
1629 arcmsr_hbb_message_isr(acb);
1630 }
1631 return 0;
1632 }
1633
1634 static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1635 {
1636 uint32_t host_interrupt_status;
1637 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1638 /*
1639 *********************************************
1640 ** check outbound intstatus
1641 *********************************************
1642 */
1643 host_interrupt_status = readl(&phbcmu->host_int_status);
1644 if (!host_interrupt_status) {
1645 /*it must be share irq*/
1646 return 1;
1647 }
1648 /* MU ioctl transfer doorbell interrupts*/
1649 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1650 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
1651 }
1652 /* MU post queue interrupts*/
1653 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1654 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
1655 }
1656 return 0;
1657 }
1658 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1659 {
1660 switch (acb->adapter_type) {
1661 case ACB_ADAPTER_TYPE_A: {
1662 if (arcmsr_handle_hba_isr(acb)) {
1663 return IRQ_NONE;
1664 }
1665 }
1666 break;
1667
1668 case ACB_ADAPTER_TYPE_B: {
1669 if (arcmsr_handle_hbb_isr(acb)) {
1670 return IRQ_NONE;
1671 }
1672 }
1673 break;
1674 case ACB_ADAPTER_TYPE_C: {
1675 if (arcmsr_handle_hbc_isr(acb)) {
1676 return IRQ_NONE;
1677 }
1678 }
1679 }
1680 return IRQ_HANDLED;
1681 }
1682
1683 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1684 {
1685 if (acb) {
1686 /* stop adapter background rebuild */
1687 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
1688 uint32_t intmask_org;
1689 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1690 intmask_org = arcmsr_disable_outbound_ints(acb);
1691 arcmsr_stop_adapter_bgrb(acb);
1692 arcmsr_flush_adapter_cache(acb);
1693 arcmsr_enable_outbound_ints(acb, intmask_org);
1694 }
1695 }
1696 }
1697
1698 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
1699 {
1700 int32_t wqbuf_firstindex, wqbuf_lastindex;
1701 uint8_t *pQbuffer;
1702 struct QBUFFER __iomem *pwbuffer;
1703 uint8_t __iomem *iop_data;
1704 int32_t allxfer_len = 0;
1705 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1706 iop_data = (uint8_t __iomem *)pwbuffer->data;
1707 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1708 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1709 wqbuf_firstindex = acb->wqbuf_firstindex;
1710 wqbuf_lastindex = acb->wqbuf_lastindex;
1711 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1712 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1713 memcpy(iop_data, pQbuffer, 1);
1714 wqbuf_firstindex++;
1715 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1716 iop_data++;
1717 allxfer_len++;
1718 }
1719 acb->wqbuf_firstindex = wqbuf_firstindex;
1720 pwbuffer->data_len = allxfer_len;
1721 arcmsr_iop_message_wrote(acb);
1722 }
1723 }
1724
1725 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
1726 struct scsi_cmnd *cmd)
1727 {
1728 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1729 int retvalue = 0, transfer_len = 0;
1730 char *buffer;
1731 struct scatterlist *sg;
1732 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1733 (uint32_t ) cmd->cmnd[6] << 16 |
1734 (uint32_t ) cmd->cmnd[7] << 8 |
1735 (uint32_t ) cmd->cmnd[8];
1736 /* 4 bytes: Areca io control code */
1737 sg = scsi_sglist(cmd);
1738 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
1739 if (scsi_sg_count(cmd) > 1) {
1740 retvalue = ARCMSR_MESSAGE_FAIL;
1741 goto message_out;
1742 }
1743 transfer_len += sg->length;
1744
1745 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1746 retvalue = ARCMSR_MESSAGE_FAIL;
1747 goto message_out;
1748 }
1749 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1750 switch(controlcode) {
1751
1752 case ARCMSR_MESSAGE_READ_RQBUFFER: {
1753 unsigned char *ver_addr;
1754 uint8_t *pQbuffer, *ptmpQbuffer;
1755 int32_t allxfer_len = 0;
1756
1757 ver_addr = kmalloc(1032, GFP_ATOMIC);
1758 if (!ver_addr) {
1759 retvalue = ARCMSR_MESSAGE_FAIL;
1760 goto message_out;
1761 }
1762
1763 ptmpQbuffer = ver_addr;
1764 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1765 && (allxfer_len < 1031)) {
1766 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1767 memcpy(ptmpQbuffer, pQbuffer, 1);
1768 acb->rqbuf_firstindex++;
1769 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1770 ptmpQbuffer++;
1771 allxfer_len++;
1772 }
1773 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1774
1775 struct QBUFFER __iomem *prbuffer;
1776 uint8_t __iomem *iop_data;
1777 int32_t iop_len;
1778
1779 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1780 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1781 iop_data = prbuffer->data;
1782 iop_len = readl(&prbuffer->data_len);
1783 while (iop_len > 0) {
1784 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1785 acb->rqbuf_lastindex++;
1786 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1787 iop_data++;
1788 iop_len--;
1789 }
1790 arcmsr_iop_message_read(acb);
1791 }
1792 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
1793 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1794 if(acb->fw_flag == FW_DEADLOCK) {
1795 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1796 }else{
1797 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1798 }
1799 kfree(ver_addr);
1800 }
1801 break;
1802
1803 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
1804 unsigned char *ver_addr;
1805 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1806 uint8_t *pQbuffer, *ptmpuserbuffer;
1807
1808 ver_addr = kmalloc(1032, GFP_ATOMIC);
1809 if (!ver_addr) {
1810 retvalue = ARCMSR_MESSAGE_FAIL;
1811 goto message_out;
1812 }
1813 if(acb->fw_flag == FW_DEADLOCK) {
1814 pcmdmessagefld->cmdmessage.ReturnCode =
1815 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1816 }else{
1817 pcmdmessagefld->cmdmessage.ReturnCode =
1818 ARCMSR_MESSAGE_RETURNCODE_OK;
1819 }
1820 ptmpuserbuffer = ver_addr;
1821 user_len = pcmdmessagefld->cmdmessage.Length;
1822 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1823 wqbuf_lastindex = acb->wqbuf_lastindex;
1824 wqbuf_firstindex = acb->wqbuf_firstindex;
1825 if (wqbuf_lastindex != wqbuf_firstindex) {
1826 struct SENSE_DATA *sensebuffer =
1827 (struct SENSE_DATA *)cmd->sense_buffer;
1828 arcmsr_post_ioctldata2iop(acb);
1829 /* has error report sensedata */
1830 sensebuffer->ErrorCode = 0x70;
1831 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1832 sensebuffer->AdditionalSenseLength = 0x0A;
1833 sensebuffer->AdditionalSenseCode = 0x20;
1834 sensebuffer->Valid = 1;
1835 retvalue = ARCMSR_MESSAGE_FAIL;
1836 } else {
1837 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1838 &(ARCMSR_MAX_QBUFFER - 1);
1839 if (my_empty_len >= user_len) {
1840 while (user_len > 0) {
1841 pQbuffer =
1842 &acb->wqbuffer[acb->wqbuf_lastindex];
1843 memcpy(pQbuffer, ptmpuserbuffer, 1);
1844 acb->wqbuf_lastindex++;
1845 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1846 ptmpuserbuffer++;
1847 user_len--;
1848 }
1849 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1850 acb->acb_flags &=
1851 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1852 arcmsr_post_ioctldata2iop(acb);
1853 }
1854 } else {
1855 /* has error report sensedata */
1856 struct SENSE_DATA *sensebuffer =
1857 (struct SENSE_DATA *)cmd->sense_buffer;
1858 sensebuffer->ErrorCode = 0x70;
1859 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1860 sensebuffer->AdditionalSenseLength = 0x0A;
1861 sensebuffer->AdditionalSenseCode = 0x20;
1862 sensebuffer->Valid = 1;
1863 retvalue = ARCMSR_MESSAGE_FAIL;
1864 }
1865 }
1866 kfree(ver_addr);
1867 }
1868 break;
1869
1870 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1871 uint8_t *pQbuffer = acb->rqbuffer;
1872 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1873 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1874 arcmsr_iop_message_read(acb);
1875 }
1876 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1877 acb->rqbuf_firstindex = 0;
1878 acb->rqbuf_lastindex = 0;
1879 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1880 if(acb->fw_flag == FW_DEADLOCK) {
1881 pcmdmessagefld->cmdmessage.ReturnCode =
1882 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1883 }else{
1884 pcmdmessagefld->cmdmessage.ReturnCode =
1885 ARCMSR_MESSAGE_RETURNCODE_OK;
1886 }
1887 }
1888 break;
1889
1890 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1891 uint8_t *pQbuffer = acb->wqbuffer;
1892 if(acb->fw_flag == FW_DEADLOCK) {
1893 pcmdmessagefld->cmdmessage.ReturnCode =
1894 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1895 }else{
1896 pcmdmessagefld->cmdmessage.ReturnCode =
1897 ARCMSR_MESSAGE_RETURNCODE_OK;
1898 }
1899
1900 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1901 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1902 arcmsr_iop_message_read(acb);
1903 }
1904 acb->acb_flags |=
1905 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1906 ACB_F_MESSAGE_WQBUFFER_READED);
1907 acb->wqbuf_firstindex = 0;
1908 acb->wqbuf_lastindex = 0;
1909 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1910 }
1911 break;
1912
1913 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1914 uint8_t *pQbuffer;
1915
1916 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1917 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1918 arcmsr_iop_message_read(acb);
1919 }
1920 acb->acb_flags |=
1921 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1922 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1923 | ACB_F_MESSAGE_WQBUFFER_READED);
1924 acb->rqbuf_firstindex = 0;
1925 acb->rqbuf_lastindex = 0;
1926 acb->wqbuf_firstindex = 0;
1927 acb->wqbuf_lastindex = 0;
1928 pQbuffer = acb->rqbuffer;
1929 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1930 pQbuffer = acb->wqbuffer;
1931 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1932 if(acb->fw_flag == FW_DEADLOCK) {
1933 pcmdmessagefld->cmdmessage.ReturnCode =
1934 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1935 }else{
1936 pcmdmessagefld->cmdmessage.ReturnCode =
1937 ARCMSR_MESSAGE_RETURNCODE_OK;
1938 }
1939 }
1940 break;
1941
1942 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1943 if(acb->fw_flag == FW_DEADLOCK) {
1944 pcmdmessagefld->cmdmessage.ReturnCode =
1945 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1946 }else{
1947 pcmdmessagefld->cmdmessage.ReturnCode =
1948 ARCMSR_MESSAGE_RETURNCODE_3F;
1949 }
1950 break;
1951 }
1952 case ARCMSR_MESSAGE_SAY_HELLO: {
1953 int8_t *hello_string = "Hello! I am ARCMSR";
1954 if(acb->fw_flag == FW_DEADLOCK) {
1955 pcmdmessagefld->cmdmessage.ReturnCode =
1956 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1957 }else{
1958 pcmdmessagefld->cmdmessage.ReturnCode =
1959 ARCMSR_MESSAGE_RETURNCODE_OK;
1960 }
1961 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1962 , (int16_t)strlen(hello_string));
1963 }
1964 break;
1965
1966 case ARCMSR_MESSAGE_SAY_GOODBYE:
1967 if(acb->fw_flag == FW_DEADLOCK) {
1968 pcmdmessagefld->cmdmessage.ReturnCode =
1969 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1970 }
1971 arcmsr_iop_parking(acb);
1972 break;
1973
1974 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1975 if(acb->fw_flag == FW_DEADLOCK) {
1976 pcmdmessagefld->cmdmessage.ReturnCode =
1977 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
1978 }
1979 arcmsr_flush_adapter_cache(acb);
1980 break;
1981
1982 default:
1983 retvalue = ARCMSR_MESSAGE_FAIL;
1984 }
1985 message_out:
1986 sg = scsi_sglist(cmd);
1987 kunmap_atomic(buffer - sg->offset);
1988 return retvalue;
1989 }
1990
1991 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1992 {
1993 struct list_head *head = &acb->ccb_free_list;
1994 struct CommandControlBlock *ccb = NULL;
1995 unsigned long flags;
1996 spin_lock_irqsave(&acb->ccblist_lock, flags);
1997 if (!list_empty(head)) {
1998 ccb = list_entry(head->next, struct CommandControlBlock, list);
1999 list_del_init(&ccb->list);
2000 }else{
2001 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2002 return 0;
2003 }
2004 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2005 return ccb;
2006 }
2007
2008 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2009 struct scsi_cmnd *cmd)
2010 {
2011 switch (cmd->cmnd[0]) {
2012 case INQUIRY: {
2013 unsigned char inqdata[36];
2014 char *buffer;
2015 struct scatterlist *sg;
2016
2017 if (cmd->device->lun) {
2018 cmd->result = (DID_TIME_OUT << 16);
2019 cmd->scsi_done(cmd);
2020 return;
2021 }
2022 inqdata[0] = TYPE_PROCESSOR;
2023 /* Periph Qualifier & Periph Dev Type */
2024 inqdata[1] = 0;
2025 /* rem media bit & Dev Type Modifier */
2026 inqdata[2] = 0;
2027 /* ISO, ECMA, & ANSI versions */
2028 inqdata[4] = 31;
2029 /* length of additional data */
2030 strncpy(&inqdata[8], "Areca ", 8);
2031 /* Vendor Identification */
2032 strncpy(&inqdata[16], "RAID controller ", 16);
2033 /* Product Identification */
2034 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2035
2036 sg = scsi_sglist(cmd);
2037 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2038
2039 memcpy(buffer, inqdata, sizeof(inqdata));
2040 sg = scsi_sglist(cmd);
2041 kunmap_atomic(buffer - sg->offset);
2042
2043 cmd->scsi_done(cmd);
2044 }
2045 break;
2046 case WRITE_BUFFER:
2047 case READ_BUFFER: {
2048 if (arcmsr_iop_message_xfer(acb, cmd))
2049 cmd->result = (DID_ERROR << 16);
2050 cmd->scsi_done(cmd);
2051 }
2052 break;
2053 default:
2054 cmd->scsi_done(cmd);
2055 }
2056 }
2057
2058 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
2059 void (* done)(struct scsi_cmnd *))
2060 {
2061 struct Scsi_Host *host = cmd->device->host;
2062 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
2063 struct CommandControlBlock *ccb;
2064 int target = cmd->device->id;
2065 int lun = cmd->device->lun;
2066 uint8_t scsicmd = cmd->cmnd[0];
2067 cmd->scsi_done = done;
2068 cmd->host_scribble = NULL;
2069 cmd->result = 0;
2070 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2071 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2072 cmd->result = (DID_NO_CONNECT << 16);
2073 }
2074 cmd->scsi_done(cmd);
2075 return 0;
2076 }
2077 if (target == 16) {
2078 /* virtual device for iop message transfer */
2079 arcmsr_handle_virtual_command(acb, cmd);
2080 return 0;
2081 }
2082 if (atomic_read(&acb->ccboutstandingcount) >=
2083 ARCMSR_MAX_OUTSTANDING_CMD)
2084 return SCSI_MLQUEUE_HOST_BUSY;
2085 ccb = arcmsr_get_freeccb(acb);
2086 if (!ccb)
2087 return SCSI_MLQUEUE_HOST_BUSY;
2088 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
2089 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2090 cmd->scsi_done(cmd);
2091 return 0;
2092 }
2093 arcmsr_post_ccb(acb, ccb);
2094 return 0;
2095 }
2096
2097 static DEF_SCSI_QCMD(arcmsr_queue_command)
2098
2099 static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
2100 {
2101 struct MessageUnit_A __iomem *reg = acb->pmuA;
2102 char *acb_firm_model = acb->firm_model;
2103 char *acb_firm_version = acb->firm_version;
2104 char *acb_device_map = acb->device_map;
2105 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2106 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
2107 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
2108 int count;
2109 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2110 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2111 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2112 miscellaneous data' timeout \n", acb->host->host_no);
2113 return false;
2114 }
2115 count = 8;
2116 while (count){
2117 *acb_firm_model = readb(iop_firm_model);
2118 acb_firm_model++;
2119 iop_firm_model++;
2120 count--;
2121 }
2122
2123 count = 16;
2124 while (count){
2125 *acb_firm_version = readb(iop_firm_version);
2126 acb_firm_version++;
2127 iop_firm_version++;
2128 count--;
2129 }
2130
2131 count=16;
2132 while(count){
2133 *acb_device_map = readb(iop_device_map);
2134 acb_device_map++;
2135 iop_device_map++;
2136 count--;
2137 }
2138 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2139 acb->host->host_no,
2140 acb->firm_version,
2141 acb->firm_model);
2142 acb->signature = readl(&reg->message_rwbuffer[0]);
2143 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2144 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2145 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2146 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
2147 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2148 return true;
2149 }
2150 static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
2151 {
2152 struct MessageUnit_B *reg = acb->pmuB;
2153 struct pci_dev *pdev = acb->pdev;
2154 void *dma_coherent;
2155 dma_addr_t dma_coherent_handle;
2156 char *acb_firm_model = acb->firm_model;
2157 char *acb_firm_version = acb->firm_version;
2158 char *acb_device_map = acb->device_map;
2159 char __iomem *iop_firm_model;
2160 /*firm_model,15,60-67*/
2161 char __iomem *iop_firm_version;
2162 /*firm_version,17,68-83*/
2163 char __iomem *iop_device_map;
2164 /*firm_version,21,84-99*/
2165 int count;
2166 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
2167 if (!dma_coherent){
2168 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2169 return false;
2170 }
2171 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2172 reg = (struct MessageUnit_B *)dma_coherent;
2173 acb->pmuB = reg;
2174 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
2175 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2176 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2177 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2178 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2179 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2180 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2181 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2182 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2183 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
2184
2185 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2186 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2187 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2188 miscellaneous data' timeout \n", acb->host->host_no);
2189 return false;
2190 }
2191 count = 8;
2192 while (count){
2193 *acb_firm_model = readb(iop_firm_model);
2194 acb_firm_model++;
2195 iop_firm_model++;
2196 count--;
2197 }
2198 count = 16;
2199 while (count){
2200 *acb_firm_version = readb(iop_firm_version);
2201 acb_firm_version++;
2202 iop_firm_version++;
2203 count--;
2204 }
2205
2206 count = 16;
2207 while(count){
2208 *acb_device_map = readb(iop_device_map);
2209 acb_device_map++;
2210 iop_device_map++;
2211 count--;
2212 }
2213
2214 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2215 acb->host->host_no,
2216 acb->firm_version,
2217 acb->firm_model);
2218
2219 acb->signature = readl(&reg->message_rwbuffer[1]);
2220 /*firm_signature,1,00-03*/
2221 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2222 /*firm_request_len,1,04-07*/
2223 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2224 /*firm_numbers_queue,2,08-11*/
2225 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2226 /*firm_sdram_size,3,12-15*/
2227 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2228 /*firm_ide_channels,4,16-19*/
2229 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2230 /*firm_ide_channels,4,16-19*/
2231 return true;
2232 }
2233
2234 static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2235 {
2236 uint32_t intmask_org, Index, firmware_state = 0;
2237 struct MessageUnit_C *reg = pACB->pmuC;
2238 char *acb_firm_model = pACB->firm_model;
2239 char *acb_firm_version = pACB->firm_version;
2240 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2241 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2242 int count;
2243 /* disable all outbound interrupt */
2244 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2245 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2246 /* wait firmware ready */
2247 do {
2248 firmware_state = readl(&reg->outbound_msgaddr1);
2249 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2250 /* post "get config" instruction */
2251 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2252 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2253 /* wait message ready */
2254 for (Index = 0; Index < 2000; Index++) {
2255 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2256 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2257 break;
2258 }
2259 udelay(10);
2260 } /*max 1 seconds*/
2261 if (Index >= 2000) {
2262 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2263 miscellaneous data' timeout \n", pACB->host->host_no);
2264 return false;
2265 }
2266 count = 8;
2267 while (count) {
2268 *acb_firm_model = readb(iop_firm_model);
2269 acb_firm_model++;
2270 iop_firm_model++;
2271 count--;
2272 }
2273 count = 16;
2274 while (count) {
2275 *acb_firm_version = readb(iop_firm_version);
2276 acb_firm_version++;
2277 iop_firm_version++;
2278 count--;
2279 }
2280 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2281 pACB->host->host_no,
2282 pACB->firm_version,
2283 pACB->firm_model);
2284 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2285 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2286 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2287 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2288 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2289 /*all interrupt service will be enable at arcmsr_iop_init*/
2290 return true;
2291 }
2292 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
2293 {
2294 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2295 return arcmsr_get_hba_config(acb);
2296 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
2297 return arcmsr_get_hbb_config(acb);
2298 else
2299 return arcmsr_get_hbc_config(acb);
2300 }
2301
2302 static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
2303 struct CommandControlBlock *poll_ccb)
2304 {
2305 struct MessageUnit_A __iomem *reg = acb->pmuA;
2306 struct CommandControlBlock *ccb;
2307 struct ARCMSR_CDB *arcmsr_cdb;
2308 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
2309 int rtn;
2310 bool error;
2311 polling_hba_ccb_retry:
2312 poll_count++;
2313 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
2314 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2315 while (1) {
2316 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
2317 if (poll_ccb_done){
2318 rtn = SUCCESS;
2319 break;
2320 }else {
2321 msleep(25);
2322 if (poll_count > 100){
2323 rtn = FAILED;
2324 break;
2325 }
2326 goto polling_hba_ccb_retry;
2327 }
2328 }
2329 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2330 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2331 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2332 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2333 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2334 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2335 " poll command abort successfully \n"
2336 , acb->host->host_no
2337 , ccb->pcmd->device->id
2338 , ccb->pcmd->device->lun
2339 , ccb);
2340 ccb->pcmd->result = DID_ABORT << 16;
2341 arcmsr_ccb_complete(ccb);
2342 continue;
2343 }
2344 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2345 " command done ccb = '0x%p'"
2346 "ccboutstandingcount = %d \n"
2347 , acb->host->host_no
2348 , ccb
2349 , atomic_read(&acb->ccboutstandingcount));
2350 continue;
2351 }
2352 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2353 arcmsr_report_ccb_state(acb, ccb, error);
2354 }
2355 return rtn;
2356 }
2357
2358 static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
2359 struct CommandControlBlock *poll_ccb)
2360 {
2361 struct MessageUnit_B *reg = acb->pmuB;
2362 struct ARCMSR_CDB *arcmsr_cdb;
2363 struct CommandControlBlock *ccb;
2364 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
2365 int index, rtn;
2366 bool error;
2367 polling_hbb_ccb_retry:
2368
2369 poll_count++;
2370 /* clear doorbell interrupt */
2371 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2372 while(1){
2373 index = reg->doneq_index;
2374 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2375 if (poll_ccb_done){
2376 rtn = SUCCESS;
2377 break;
2378 }else {
2379 msleep(25);
2380 if (poll_count > 100){
2381 rtn = FAILED;
2382 break;
2383 }
2384 goto polling_hbb_ccb_retry;
2385 }
2386 }
2387 writel(0, &reg->done_qbuffer[index]);
2388 index++;
2389 /*if last index number set it to 0 */
2390 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2391 reg->doneq_index = index;
2392 /* check if command done with no error*/
2393 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2394 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2395 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2396 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2397 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2398 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2399 " poll command abort successfully \n"
2400 ,acb->host->host_no
2401 ,ccb->pcmd->device->id
2402 ,ccb->pcmd->device->lun
2403 ,ccb);
2404 ccb->pcmd->result = DID_ABORT << 16;
2405 arcmsr_ccb_complete(ccb);
2406 continue;
2407 }
2408 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2409 " command done ccb = '0x%p'"
2410 "ccboutstandingcount = %d \n"
2411 , acb->host->host_no
2412 , ccb
2413 , atomic_read(&acb->ccboutstandingcount));
2414 continue;
2415 }
2416 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2417 arcmsr_report_ccb_state(acb, ccb, error);
2418 }
2419 return rtn;
2420 }
2421
2422 static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2423 {
2424 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2425 uint32_t flag_ccb, ccb_cdb_phy;
2426 struct ARCMSR_CDB *arcmsr_cdb;
2427 bool error;
2428 struct CommandControlBlock *pCCB;
2429 uint32_t poll_ccb_done = 0, poll_count = 0;
2430 int rtn;
2431 polling_hbc_ccb_retry:
2432 poll_count++;
2433 while (1) {
2434 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2435 if (poll_ccb_done) {
2436 rtn = SUCCESS;
2437 break;
2438 } else {
2439 msleep(25);
2440 if (poll_count > 100) {
2441 rtn = FAILED;
2442 break;
2443 }
2444 goto polling_hbc_ccb_retry;
2445 }
2446 }
2447 flag_ccb = readl(&reg->outbound_queueport_low);
2448 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2449 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2450 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2451 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2452 /* check ifcommand done with no error*/
2453 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2454 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2455 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2456 " poll command abort successfully \n"
2457 , acb->host->host_no
2458 , pCCB->pcmd->device->id
2459 , pCCB->pcmd->device->lun
2460 , pCCB);
2461 pCCB->pcmd->result = DID_ABORT << 16;
2462 arcmsr_ccb_complete(pCCB);
2463 continue;
2464 }
2465 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2466 " command done ccb = '0x%p'"
2467 "ccboutstandingcount = %d \n"
2468 , acb->host->host_no
2469 , pCCB
2470 , atomic_read(&acb->ccboutstandingcount));
2471 continue;
2472 }
2473 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2474 arcmsr_report_ccb_state(acb, pCCB, error);
2475 }
2476 return rtn;
2477 }
2478 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
2479 struct CommandControlBlock *poll_ccb)
2480 {
2481 int rtn = 0;
2482 switch (acb->adapter_type) {
2483
2484 case ACB_ADAPTER_TYPE_A: {
2485 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
2486 }
2487 break;
2488
2489 case ACB_ADAPTER_TYPE_B: {
2490 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
2491 }
2492 break;
2493 case ACB_ADAPTER_TYPE_C: {
2494 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2495 }
2496 }
2497 return rtn;
2498 }
2499
2500 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
2501 {
2502 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
2503 dma_addr_t dma_coherent_handle;
2504 /*
2505 ********************************************************************
2506 ** here we need to tell iop 331 our freeccb.HighPart
2507 ** if freeccb.HighPart is not zero
2508 ********************************************************************
2509 */
2510 dma_coherent_handle = acb->dma_coherent_handle;
2511 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
2512 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
2513 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
2514 /*
2515 ***********************************************************************
2516 ** if adapter type B, set window of "post command Q"
2517 ***********************************************************************
2518 */
2519 switch (acb->adapter_type) {
2520
2521 case ACB_ADAPTER_TYPE_A: {
2522 if (cdb_phyaddr_hi32 != 0) {
2523 struct MessageUnit_A __iomem *reg = acb->pmuA;
2524 uint32_t intmask_org;
2525 intmask_org = arcmsr_disable_outbound_ints(acb);
2526 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2527 &reg->message_rwbuffer[0]);
2528 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
2529 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2530 &reg->inbound_msgaddr0);
2531 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2532 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2533 part physical address timeout\n",
2534 acb->host->host_no);
2535 return 1;
2536 }
2537 arcmsr_enable_outbound_ints(acb, intmask_org);
2538 }
2539 }
2540 break;
2541
2542 case ACB_ADAPTER_TYPE_B: {
2543 unsigned long post_queue_phyaddr;
2544 uint32_t __iomem *rwbuffer;
2545
2546 struct MessageUnit_B *reg = acb->pmuB;
2547 uint32_t intmask_org;
2548 intmask_org = arcmsr_disable_outbound_ints(acb);
2549 reg->postq_index = 0;
2550 reg->doneq_index = 0;
2551 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
2552 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2553 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2554 acb->host->host_no);
2555 return 1;
2556 }
2557 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2558 rwbuffer = reg->message_rwbuffer;
2559 /* driver "set config" signature */
2560 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2561 /* normal should be zero */
2562 writel(cdb_phyaddr_hi32, rwbuffer++);
2563 /* postQ size (256 + 8)*4 */
2564 writel(post_queue_phyaddr, rwbuffer++);
2565 /* doneQ size (256 + 8)*4 */
2566 writel(post_queue_phyaddr + 1056, rwbuffer++);
2567 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2568 writel(1056, rwbuffer);
2569
2570 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
2571 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2572 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2573 timeout \n",acb->host->host_no);
2574 return 1;
2575 }
2576 arcmsr_hbb_enable_driver_mode(acb);
2577 arcmsr_enable_outbound_ints(acb, intmask_org);
2578 }
2579 break;
2580 case ACB_ADAPTER_TYPE_C: {
2581 if (cdb_phyaddr_hi32 != 0) {
2582 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2583
2584 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2585 acb->adapter_index, cdb_phyaddr_hi32);
2586 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2587 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2588 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2589 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2590 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2591 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2592 timeout \n", acb->host->host_no);
2593 return 1;
2594 }
2595 }
2596 }
2597 }
2598 return 0;
2599 }
2600
2601 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2602 {
2603 uint32_t firmware_state = 0;
2604 switch (acb->adapter_type) {
2605
2606 case ACB_ADAPTER_TYPE_A: {
2607 struct MessageUnit_A __iomem *reg = acb->pmuA;
2608 do {
2609 firmware_state = readl(&reg->outbound_msgaddr1);
2610 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2611 }
2612 break;
2613
2614 case ACB_ADAPTER_TYPE_B: {
2615 struct MessageUnit_B *reg = acb->pmuB;
2616 do {
2617 firmware_state = readl(reg->iop2drv_doorbell);
2618 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2619 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2620 }
2621 break;
2622 case ACB_ADAPTER_TYPE_C: {
2623 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2624 do {
2625 firmware_state = readl(&reg->outbound_msgaddr1);
2626 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2627 }
2628 }
2629 }
2630
2631 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2632 {
2633 struct MessageUnit_A __iomem *reg = acb->pmuA;
2634 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2635 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2636 return;
2637 } else {
2638 acb->fw_flag = FW_NORMAL;
2639 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2640 atomic_set(&acb->rq_map_token, 16);
2641 }
2642 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2643 if (atomic_dec_and_test(&acb->rq_map_token)) {
2644 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2645 return;
2646 }
2647 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2648 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2649 }
2650 return;
2651 }
2652
2653 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2654 {
2655 struct MessageUnit_B __iomem *reg = acb->pmuB;
2656 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
2657 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2658 return;
2659 } else {
2660 acb->fw_flag = FW_NORMAL;
2661 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2662 atomic_set(&acb->rq_map_token, 16);
2663 }
2664 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2665 if (atomic_dec_and_test(&acb->rq_map_token)) {
2666 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2667 return;
2668 }
2669 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2670 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2671 }
2672 return;
2673 }
2674
2675 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2676 {
2677 struct MessageUnit_C __iomem *reg = acb->pmuC;
2678 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
2679 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2680 return;
2681 } else {
2682 acb->fw_flag = FW_NORMAL;
2683 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
2684 atomic_set(&acb->rq_map_token, 16);
2685 }
2686 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
2687 if (atomic_dec_and_test(&acb->rq_map_token)) {
2688 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2689 return;
2690 }
2691 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2692 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2693 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2694 }
2695 return;
2696 }
2697
2698 static void arcmsr_request_device_map(unsigned long pacb)
2699 {
2700 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
2701 switch (acb->adapter_type) {
2702 case ACB_ADAPTER_TYPE_A: {
2703 arcmsr_request_hba_device_map(acb);
2704 }
2705 break;
2706 case ACB_ADAPTER_TYPE_B: {
2707 arcmsr_request_hbb_device_map(acb);
2708 }
2709 break;
2710 case ACB_ADAPTER_TYPE_C: {
2711 arcmsr_request_hbc_device_map(acb);
2712 }
2713 }
2714 }
2715
2716 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2717 {
2718 struct MessageUnit_A __iomem *reg = acb->pmuA;
2719 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2720 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
2721 if (!arcmsr_hba_wait_msgint_ready(acb)) {
2722 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2723 rebulid' timeout \n", acb->host->host_no);
2724 }
2725 }
2726
2727 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2728 {
2729 struct MessageUnit_B *reg = acb->pmuB;
2730 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2731 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
2732 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2733 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2734 rebulid' timeout \n",acb->host->host_no);
2735 }
2736 }
2737
2738 static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2739 {
2740 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2741 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2742 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2743 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2744 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2745 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2746 rebulid' timeout \n", pACB->host->host_no);
2747 }
2748 return;
2749 }
2750 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2751 {
2752 switch (acb->adapter_type) {
2753 case ACB_ADAPTER_TYPE_A:
2754 arcmsr_start_hba_bgrb(acb);
2755 break;
2756 case ACB_ADAPTER_TYPE_B:
2757 arcmsr_start_hbb_bgrb(acb);
2758 break;
2759 case ACB_ADAPTER_TYPE_C:
2760 arcmsr_start_hbc_bgrb(acb);
2761 }
2762 }
2763
2764 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2765 {
2766 switch (acb->adapter_type) {
2767 case ACB_ADAPTER_TYPE_A: {
2768 struct MessageUnit_A __iomem *reg = acb->pmuA;
2769 uint32_t outbound_doorbell;
2770 /* empty doorbell Qbuffer if door bell ringed */
2771 outbound_doorbell = readl(&reg->outbound_doorbell);
2772 /*clear doorbell interrupt */
2773 writel(outbound_doorbell, &reg->outbound_doorbell);
2774 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2775 }
2776 break;
2777
2778 case ACB_ADAPTER_TYPE_B: {
2779 struct MessageUnit_B *reg = acb->pmuB;
2780 /*clear interrupt and message state*/
2781 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2782 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2783 /* let IOP know data has been read */
2784 }
2785 break;
2786 case ACB_ADAPTER_TYPE_C: {
2787 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2788 uint32_t outbound_doorbell;
2789 /* empty doorbell Qbuffer if door bell ringed */
2790 outbound_doorbell = readl(&reg->outbound_doorbell);
2791 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2792 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2793 }
2794 }
2795 }
2796
2797 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2798 {
2799 switch (acb->adapter_type) {
2800 case ACB_ADAPTER_TYPE_A:
2801 return;
2802 case ACB_ADAPTER_TYPE_B:
2803 {
2804 struct MessageUnit_B *reg = acb->pmuB;
2805 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
2806 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
2807 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2808 return;
2809 }
2810 }
2811 break;
2812 case ACB_ADAPTER_TYPE_C:
2813 return;
2814 }
2815 return;
2816 }
2817
2818 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2819 {
2820 uint8_t value[64];
2821 int i, count = 0;
2822 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2823 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
2824 u32 temp = 0;
2825 /* backup pci config data */
2826 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
2827 for (i = 0; i < 64; i++) {
2828 pci_read_config_byte(acb->pdev, i, &value[i]);
2829 }
2830 /* hardware reset signal */
2831 if ((acb->dev_id == 0x1680)) {
2832 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2833 } else if ((acb->dev_id == 0x1880)) {
2834 do {
2835 count++;
2836 writel(0xF, &pmuC->write_sequence);
2837 writel(0x4, &pmuC->write_sequence);
2838 writel(0xB, &pmuC->write_sequence);
2839 writel(0x2, &pmuC->write_sequence);
2840 writel(0x7, &pmuC->write_sequence);
2841 writel(0xD, &pmuC->write_sequence);
2842 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
2843 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
2844 } else {
2845 pci_write_config_byte(acb->pdev, 0x84, 0x20);
2846 }
2847 msleep(2000);
2848 /* write back pci config data */
2849 for (i = 0; i < 64; i++) {
2850 pci_write_config_byte(acb->pdev, i, value[i]);
2851 }
2852 msleep(1000);
2853 return;
2854 }
2855 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2856 {
2857 uint32_t intmask_org;
2858 /* disable all outbound interrupt */
2859 intmask_org = arcmsr_disable_outbound_ints(acb);
2860 arcmsr_wait_firmware_ready(acb);
2861 arcmsr_iop_confirm(acb);
2862 /*start background rebuild*/
2863 arcmsr_start_adapter_bgrb(acb);
2864 /* empty doorbell Qbuffer if door bell ringed */
2865 arcmsr_clear_doorbell_queue_buffer(acb);
2866 arcmsr_enable_eoi_mode(acb);
2867 /* enable outbound Post Queue,outbound doorbell Interrupt */
2868 arcmsr_enable_outbound_ints(acb, intmask_org);
2869 acb->acb_flags |= ACB_F_IOP_INITED;
2870 }
2871
2872 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
2873 {
2874 struct CommandControlBlock *ccb;
2875 uint32_t intmask_org;
2876 uint8_t rtnval = 0x00;
2877 int i = 0;
2878 unsigned long flags;
2879
2880 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2881 /* disable all outbound interrupt */
2882 intmask_org = arcmsr_disable_outbound_ints(acb);
2883 /* talk to iop 331 outstanding command aborted */
2884 rtnval = arcmsr_abort_allcmd(acb);
2885 /* clear all outbound posted Q */
2886 arcmsr_done4abort_postqueue(acb);
2887 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2888 ccb = acb->pccb_pool[i];
2889 if (ccb->startdone == ARCMSR_CCB_START) {
2890 scsi_dma_unmap(ccb->pcmd);
2891 ccb->startdone = ARCMSR_CCB_DONE;
2892 ccb->ccb_flags = 0;
2893 spin_lock_irqsave(&acb->ccblist_lock, flags);
2894 list_add_tail(&ccb->list, &acb->ccb_free_list);
2895 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2896 }
2897 }
2898 atomic_set(&acb->ccboutstandingcount, 0);
2899 /* enable all outbound interrupt */
2900 arcmsr_enable_outbound_ints(acb, intmask_org);
2901 return rtnval;
2902 }
2903 return rtnval;
2904 }
2905
2906 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2907 {
2908 struct AdapterControlBlock *acb;
2909 uint32_t intmask_org, outbound_doorbell;
2910 int retry_count = 0;
2911 int rtn = FAILED;
2912 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
2913 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
2914 acb->num_resets++;
2915
2916 switch(acb->adapter_type){
2917 case ACB_ADAPTER_TYPE_A:{
2918 if (acb->acb_flags & ACB_F_BUS_RESET){
2919 long timeout;
2920 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2921 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2922 if (timeout) {
2923 return SUCCESS;
2924 }
2925 }
2926 acb->acb_flags |= ACB_F_BUS_RESET;
2927 if (!arcmsr_iop_reset(acb)) {
2928 struct MessageUnit_A __iomem *reg;
2929 reg = acb->pmuA;
2930 arcmsr_hardware_reset(acb);
2931 acb->acb_flags &= ~ACB_F_IOP_INITED;
2932 sleep_again:
2933 ssleep(ARCMSR_SLEEPTIME);
2934 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
2935 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
2936 if (retry_count > ARCMSR_RETRYCOUNT) {
2937 acb->fw_flag = FW_DEADLOCK;
2938 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
2939 return FAILED;
2940 }
2941 retry_count++;
2942 goto sleep_again;
2943 }
2944 acb->acb_flags |= ACB_F_IOP_INITED;
2945 /* disable all outbound interrupt */
2946 intmask_org = arcmsr_disable_outbound_ints(acb);
2947 arcmsr_get_firmware_spec(acb);
2948 arcmsr_start_adapter_bgrb(acb);
2949 /* clear Qbuffer if door bell ringed */
2950 outbound_doorbell = readl(&reg->outbound_doorbell);
2951 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
2952 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2953 /* enable outbound Post Queue,outbound doorbell Interrupt */
2954 arcmsr_enable_outbound_ints(acb, intmask_org);
2955 atomic_set(&acb->rq_map_token, 16);
2956 atomic_set(&acb->ante_token_value, 16);
2957 acb->fw_flag = FW_NORMAL;
2958 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2959 acb->acb_flags &= ~ACB_F_BUS_RESET;
2960 rtn = SUCCESS;
2961 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
2962 } else {
2963 acb->acb_flags &= ~ACB_F_BUS_RESET;
2964 atomic_set(&acb->rq_map_token, 16);
2965 atomic_set(&acb->ante_token_value, 16);
2966 acb->fw_flag = FW_NORMAL;
2967 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
2968 rtn = SUCCESS;
2969 }
2970 break;
2971 }
2972 case ACB_ADAPTER_TYPE_B:{
2973 acb->acb_flags |= ACB_F_BUS_RESET;
2974 if (!arcmsr_iop_reset(acb)) {
2975 acb->acb_flags &= ~ACB_F_BUS_RESET;
2976 rtn = FAILED;
2977 } else {
2978 acb->acb_flags &= ~ACB_F_BUS_RESET;
2979 atomic_set(&acb->rq_map_token, 16);
2980 atomic_set(&acb->ante_token_value, 16);
2981 acb->fw_flag = FW_NORMAL;
2982 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2983 rtn = SUCCESS;
2984 }
2985 break;
2986 }
2987 case ACB_ADAPTER_TYPE_C:{
2988 if (acb->acb_flags & ACB_F_BUS_RESET) {
2989 long timeout;
2990 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2991 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2992 if (timeout) {
2993 return SUCCESS;
2994 }
2995 }
2996 acb->acb_flags |= ACB_F_BUS_RESET;
2997 if (!arcmsr_iop_reset(acb)) {
2998 struct MessageUnit_C __iomem *reg;
2999 reg = acb->pmuC;
3000 arcmsr_hardware_reset(acb);
3001 acb->acb_flags &= ~ACB_F_IOP_INITED;
3002 sleep:
3003 ssleep(ARCMSR_SLEEPTIME);
3004 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
3005 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3006 if (retry_count > ARCMSR_RETRYCOUNT) {
3007 acb->fw_flag = FW_DEADLOCK;
3008 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
3009 return FAILED;
3010 }
3011 retry_count++;
3012 goto sleep;
3013 }
3014 acb->acb_flags |= ACB_F_IOP_INITED;
3015 /* disable all outbound interrupt */
3016 intmask_org = arcmsr_disable_outbound_ints(acb);
3017 arcmsr_get_firmware_spec(acb);
3018 arcmsr_start_adapter_bgrb(acb);
3019 /* clear Qbuffer if door bell ringed */
3020 outbound_doorbell = readl(&reg->outbound_doorbell);
3021 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3022 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3023 /* enable outbound Post Queue,outbound doorbell Interrupt */
3024 arcmsr_enable_outbound_ints(acb, intmask_org);
3025 atomic_set(&acb->rq_map_token, 16);
3026 atomic_set(&acb->ante_token_value, 16);
3027 acb->fw_flag = FW_NORMAL;
3028 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3029 acb->acb_flags &= ~ACB_F_BUS_RESET;
3030 rtn = SUCCESS;
3031 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3032 } else {
3033 acb->acb_flags &= ~ACB_F_BUS_RESET;
3034 atomic_set(&acb->rq_map_token, 16);
3035 atomic_set(&acb->ante_token_value, 16);
3036 acb->fw_flag = FW_NORMAL;
3037 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3038 rtn = SUCCESS;
3039 }
3040 break;
3041 }
3042 }
3043 return rtn;
3044 }
3045
3046 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
3047 struct CommandControlBlock *ccb)
3048 {
3049 int rtn;
3050 rtn = arcmsr_polling_ccbdone(acb, ccb);
3051 return rtn;
3052 }
3053
3054 static int arcmsr_abort(struct scsi_cmnd *cmd)
3055 {
3056 struct AdapterControlBlock *acb =
3057 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3058 int i = 0;
3059 int rtn = FAILED;
3060 printk(KERN_NOTICE
3061 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
3062 acb->host->host_no, cmd->device->id, cmd->device->lun);
3063 acb->acb_flags |= ACB_F_ABORT;
3064 acb->num_aborts++;
3065 /*
3066 ************************************************
3067 ** the all interrupt service routine is locked
3068 ** we need to handle it as soon as possible and exit
3069 ************************************************
3070 */
3071 if (!atomic_read(&acb->ccboutstandingcount))
3072 return rtn;
3073
3074 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3075 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3076 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
3077 ccb->startdone = ARCMSR_CCB_ABORTED;
3078 rtn = arcmsr_abort_one_cmd(acb, ccb);
3079 break;
3080 }
3081 }
3082 acb->acb_flags &= ~ACB_F_ABORT;
3083 return rtn;
3084 }
3085
3086 static const char *arcmsr_info(struct Scsi_Host *host)
3087 {
3088 struct AdapterControlBlock *acb =
3089 (struct AdapterControlBlock *) host->hostdata;
3090 static char buf[256];
3091 char *type;
3092 int raid6 = 1;
3093 switch (acb->pdev->device) {
3094 case PCI_DEVICE_ID_ARECA_1110:
3095 case PCI_DEVICE_ID_ARECA_1200:
3096 case PCI_DEVICE_ID_ARECA_1202:
3097 case PCI_DEVICE_ID_ARECA_1210:
3098 raid6 = 0;
3099 /*FALLTHRU*/
3100 case PCI_DEVICE_ID_ARECA_1120:
3101 case PCI_DEVICE_ID_ARECA_1130:
3102 case PCI_DEVICE_ID_ARECA_1160:
3103 case PCI_DEVICE_ID_ARECA_1170:
3104 case PCI_DEVICE_ID_ARECA_1201:
3105 case PCI_DEVICE_ID_ARECA_1220:
3106 case PCI_DEVICE_ID_ARECA_1230:
3107 case PCI_DEVICE_ID_ARECA_1260:
3108 case PCI_DEVICE_ID_ARECA_1270:
3109 case PCI_DEVICE_ID_ARECA_1280:
3110 type = "SATA";
3111 break;
3112 case PCI_DEVICE_ID_ARECA_1380:
3113 case PCI_DEVICE_ID_ARECA_1381:
3114 case PCI_DEVICE_ID_ARECA_1680:
3115 case PCI_DEVICE_ID_ARECA_1681:
3116 case PCI_DEVICE_ID_ARECA_1880:
3117 type = "SAS";
3118 break;
3119 default:
3120 type = "X-TYPE";
3121 break;
3122 }
3123 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
3124 type, raid6 ? "( RAID6 capable)" : "",
3125 ARCMSR_DRIVER_VERSION);
3126 return buf;
3127 }
Linux with added FPC-III support