1 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
19 state statistics. Either \fBcommand\fP is forked and
20 statistics are printed upon its completion, or statistics are printed periodically.
22 \fBcpupower-monitor \fP implements independent processor sleep state and
23 frequency counters. Some are retrieved from kernel statistics, some are
24 directly reading out hardware registers. Use \-l to get an overview which are
25 supported on your system.
31 List available monitors on your system. Additional details about each monitor
35 The name in quotation marks which can be passed to the \-m parameter.
37 The number of different counters the monitor supports in brackets.
39 The amount of time in seconds the counters might overflow, due to
40 implementation constraints.
42 The name and a description of each counter and its processor hierarchy level
43 coverage in square brackets:
50 [P] \-> Processor Package (Socket)
52 [M] \-> Machine/Platform wide counter
59 Only display specific monitors. Use the monitor string(s) provided by \-l option.
69 Schedule the process on every core before starting and ending measuring.
70 This could be needed for the Idle_Stats monitor when no other MSR based
71 monitor (has to be run on the core that is measured) is run in parallel.
72 This is to wake up the processors from deeper sleep states and let the
74 -account its cpuidle (C-state) information before reading the
75 cpuidle timings from sysfs.
80 Measure idle and frequency characteristics of an arbitrary command/workload.
81 The executable \fBcommand\fP is forked and upon its exit, statistics gathered since it was
87 Increase verbosity if the binary was compiled with the DEBUG option set.
90 .SH MONITOR DESCRIPTIONS
92 Shows statistics of the cpuidle kernel subsystem. Values are retrieved from
93 /sys/devices/system/cpu/cpu*/cpuidle/state*/.
94 The kernel updates these values every time an idle state is entered or
95 left. Therefore there can be some inaccuracy when cores are in an idle
96 state for some time when the measure starts or ends. In worst case it can happen
97 that one core stayed in an idle state for the whole measure time and the idle
98 state usage time as exported by the kernel did not get updated. In this case
99 a state residency of 0 percent is shown while it was 100.
102 The name comes from the aperf/mperf (average and maximum) MSR registers used
103 which are available on recent X86 processors. It shows the average frequency
104 (including boost frequencies).
105 The fact that on all recent hardware the mperf timer stops ticking in any idle
106 state it is also used to show C0 (processor is active) and Cx (processor is in
107 any sleep state) times. These counters do not have the inaccuracy restrictions
108 the "Idle_Stats" counters may show.
109 May work poorly on Linux-2.6.20 through 2.6.29, as the \fBacpi-cpufreq \fP
110 kernel frequency driver periodically cleared aperf/mperf registers in those
113 .SS "Nehalem" "SandyBridge" "HaswellExtended"
114 Intel Core and Package sleep state counters.
115 Threads (hyperthreaded cores) may not be able to enter deeper core states if
116 its sibling is utilized.
117 Deepest package sleep states may in reality show up as machine/platform wide
118 sleep states and can only be entered if all cores are idle. Look up Intel
119 manuals (some are provided in the References section) for further details.
120 The monitors are named after the CPU family where the sleep state capabilities
121 got introduced and may not match exactly the CPU name of the platform.
122 For example an IvyBridge processor has sleep state capabilities which got
123 introduced in Nehalem and SandyBridge processor families.
124 Thus on an IvyBridge processor one will get Nehalem and SandyBridge sleep
126 HaswellExtended extra package sleep state capabilities are available only in a
127 specific Haswell (family 0x45) and probably also other future processors.
129 .SS "Fam_12h" "Fam_14h"
130 AMD laptop and desktop processor (family 12h and 14h) sleep state counters.
131 The registers are accessed via PCI and therefore can still be read out while
132 cores have been offlined.
134 There is one special counter: NBP1 (North Bridge P1).
135 This one always returns 0 or 1, depending on whether the North Bridge P1
136 power state got entered at least once during measure time.
137 Being able to enter NBP1 state also depends on graphics power management.
138 Therefore this counter can be used to verify whether the graphics' driver
139 power management is working as expected.
143 cpupower monitor -l" may show:
145 Monitor "Mperf" (3 states) \- Might overflow after 922000000 s
149 Monitor "Idle_Stats" (3 states) \- Might overflow after 4294967295 s
154 cpupower monitor \-m "Idle_Stats,Mperf" scp /tmp/test /nfs/tmp
156 Monitor the scp command, show both Mperf and Idle_Stats states counter
157 statistics, but in exchanged order.
162 Be careful that the typical command to fully utilize one CPU by doing:
164 cpupower monitor cat /dev/zero >/dev/null
166 Does not work as expected, because the measured output is redirected to
167 /dev/null. This could get workarounded by putting the line into an own, tiny
168 shell script. Hit CTRL\-c to terminate the command and get the measure output
172 "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Processors"
173 http://support.amd.com/us/Processor_TechDocs/43170.pdf
175 "Intel® Turbo Boost Technology
176 in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
177 http://download.intel.com/design/processor/applnots/320354.pdf
179 "Intel® 64 and IA-32 Architectures Software Developer's Manual
180 Volume 3B: System Programming Guide"
181 http://www.intel.com/products/processor/manuals
187 /sys/devices/system/cpu/cpu*/cpuidle/state*/.
191 powertop(8), msr(4), vmstat(8)
195 Written by Thomas Renninger <trenn@suse.de>
197 Nehalem, SandyBridge monitors and command passing
198 based on turbostat.8 from Len Brown <len.brown@intel.com>