drivers/gpu/drm/pl111/pl111_drm.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2012-2013 ARM Limited. All rights reserved.
   4  *
   5  *
   6  * Parts of this file were based on sources as follows:
   7  *
   8  * Copyright (c) 2006-2008 Intel Corporation
   9  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  10  * Copyright (C) 2011 Texas Instruments
  11  *
  12  * This program is free software and is provided to you under the terms of the
  13  * GNU General Public License version 2 as published by the Free Software
  14  * Foundation, and any use by you of this program is subject to the terms of
  15  * such GNU licence.
  16  *
  17  */
  18
  19 #ifndef _PL111_DRM_H_
  20 #define _PL111_DRM_H_
  21
  22 #include <drm/drm_gem.h>
  23 #include <drm/drm_simple_kms_helper.h>
  24 #include <drm/drm_connector.h>
  25 #include <drm/drm_encoder.h>
  26 #include <drm/drm_panel.h>
  27 #include <drm/drm_bridge.h>
  28 #include <linux/clk-provider.h>
  29 #include <linux/interrupt.h>
  30
  31 #define CLCD_IRQ_NEXTBASE_UPDATE BIT(2)
  32
  33 struct drm_minor;
  34
  35 /**
  36  * struct pl111_variant_data - encodes IP differences
  37  * @name: the name of this variant
  38  * @is_pl110: this is the early PL110 variant
  39  * @is_lcdc: this is the ST Microelectronics Nomadik LCDC variant
  40  * @external_bgr: this is the Versatile Pl110 variant with external
  41  *      BGR/RGB routing
  42  * @broken_clockdivider: the clock divider is broken and we need to
  43  *      use the supplied clock directly
  44  * @broken_vblank: the vblank IRQ is broken on this variant
  45  * @st_bitmux_control: this variant is using the ST Micro bitmux
  46  *      extensions to the control register
  47  * @formats: array of supported pixel formats on this variant
  48  * @nformats: the length of the array of supported pixel formats
  49  * @fb_bpp: desired bits per pixel on the default framebuffer
  50  */
  51 struct pl111_variant_data {
  52         const char *name;
  53         bool is_pl110;
  54         bool is_lcdc;
  55         bool external_bgr;
  56         bool broken_clockdivider;
  57         bool broken_vblank;
  58         bool st_bitmux_control;
  59         const u32 *formats;
  60         unsigned int nformats;
  61         unsigned int fb_bpp;
  62 };
  63
  64 struct pl111_drm_dev_private {
  65         struct drm_device *drm;
  66
  67         struct drm_connector *connector;
  68         struct drm_panel *panel;
  69         struct drm_bridge *bridge;
  70         struct drm_simple_display_pipe pipe;
  71
  72         void *regs;
  73         u32 memory_bw;
  74         u32 ienb;
  75         u32 ctrl;
  76         /* The pixel clock (a reference to our clock divider off of CLCDCLK). */
  77         struct clk *clk;
  78         /* pl111's internal clock divider. */
  79         struct clk_hw clk_div;
  80         /* Lock to sync access to CLCD_TIM2 between the common clock
  81          * subsystem and pl111_display_enable().
  82          */
  83         spinlock_t tim2_lock;
  84         const struct pl111_variant_data *variant;
  85         void (*variant_display_enable) (struct drm_device *drm, u32 format);
  86         void (*variant_display_disable) (struct drm_device *drm);
  87         bool use_device_memory;
  88 };
  89
  90 int pl111_display_init(struct drm_device *dev);
  91 irqreturn_t pl111_irq(int irq, void *data);
  92 int pl111_debugfs_init(struct drm_minor *minor);
  93
  94 #endif /* _PL111_DRM_H_ */