HID: hiddev: Fix slab-out-of-bounds write in hiddev_ioctl_usage()
[linux/fpc-iii.git] / drivers / char / tpm / tpm_tis.c
blob9dd93a209ef29c4c1e40988b7b2cf8dade72764e
1 /*
2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
5 * Authors:
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
20 * License.
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
31 #include <acpi/actbl2.h>
32 #include "tpm.h"
34 enum tis_access {
35 TPM_ACCESS_VALID = 0x80,
36 TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
37 TPM_ACCESS_REQUEST_PENDING = 0x04,
38 TPM_ACCESS_REQUEST_USE = 0x02,
41 enum tis_status {
42 TPM_STS_VALID = 0x80,
43 TPM_STS_COMMAND_READY = 0x40,
44 TPM_STS_GO = 0x20,
45 TPM_STS_DATA_AVAIL = 0x10,
46 TPM_STS_DATA_EXPECT = 0x08,
49 enum tis_int_flags {
50 TPM_GLOBAL_INT_ENABLE = 0x80000000,
51 TPM_INTF_BURST_COUNT_STATIC = 0x100,
52 TPM_INTF_CMD_READY_INT = 0x080,
53 TPM_INTF_INT_EDGE_FALLING = 0x040,
54 TPM_INTF_INT_EDGE_RISING = 0x020,
55 TPM_INTF_INT_LEVEL_LOW = 0x010,
56 TPM_INTF_INT_LEVEL_HIGH = 0x008,
57 TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
58 TPM_INTF_STS_VALID_INT = 0x002,
59 TPM_INTF_DATA_AVAIL_INT = 0x001,
62 enum tis_defaults {
63 TIS_MEM_BASE = 0xFED40000,
64 TIS_MEM_LEN = 0x5000,
65 TIS_SHORT_TIMEOUT = 750, /* ms */
66 TIS_LONG_TIMEOUT = 2000, /* 2 sec */
69 struct tpm_info {
70 unsigned long start;
71 unsigned long len;
72 unsigned int irq;
75 static struct tpm_info tis_default_info = {
76 .start = TIS_MEM_BASE,
77 .len = TIS_MEM_LEN,
78 .irq = 0,
81 /* Some timeout values are needed before it is known whether the chip is
82 * TPM 1.0 or TPM 2.0.
84 #define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
85 #define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
86 #define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
87 #define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
89 #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
90 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
91 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
92 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
93 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
94 #define TPM_STS(l) (0x0018 | ((l) << 12))
95 #define TPM_STS3(l) (0x001b | ((l) << 12))
96 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
98 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
99 #define TPM_RID(l) (0x0F04 | ((l) << 12))
101 struct priv_data {
102 bool irq_tested;
105 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
106 static int has_hid(struct acpi_device *dev, const char *hid)
108 struct acpi_hardware_id *id;
110 list_for_each_entry(id, &dev->pnp.ids, list)
111 if (!strcmp(hid, id->id))
112 return 1;
114 return 0;
117 static inline int is_itpm(struct acpi_device *dev)
119 return has_hid(dev, "INTC0102");
122 static inline int is_fifo(struct acpi_device *dev)
124 struct acpi_table_tpm2 *tbl;
125 acpi_status st;
127 /* TPM 1.2 FIFO */
128 if (!has_hid(dev, "MSFT0101"))
129 return 1;
131 st = acpi_get_table(ACPI_SIG_TPM2, 1,
132 (struct acpi_table_header **) &tbl);
133 if (ACPI_FAILURE(st)) {
134 dev_err(&dev->dev, "failed to get TPM2 ACPI table\n");
135 return 0;
138 if (le32_to_cpu(tbl->start_method) != TPM2_START_FIFO)
139 return 0;
141 /* TPM 2.0 FIFO */
142 return 1;
144 #else
145 static inline int is_itpm(struct acpi_device *dev)
147 return 0;
150 static inline int is_fifo(struct acpi_device *dev)
152 return 1;
154 #endif
156 /* Before we attempt to access the TPM we must see that the valid bit is set.
157 * The specification says that this bit is 0 at reset and remains 0 until the
158 * 'TPM has gone through its self test and initialization and has established
159 * correct values in the other bits.' */
160 static int wait_startup(struct tpm_chip *chip, int l)
162 unsigned long stop = jiffies + chip->vendor.timeout_a;
163 do {
164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
165 TPM_ACCESS_VALID)
166 return 0;
167 msleep(TPM_TIMEOUT);
168 } while (time_before(jiffies, stop));
169 return -1;
172 static int check_locality(struct tpm_chip *chip, int l)
174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
175 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
176 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
177 return chip->vendor.locality = l;
179 return -1;
182 static void release_locality(struct tpm_chip *chip, int l, int force)
184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
185 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
186 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
187 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
188 chip->vendor.iobase + TPM_ACCESS(l));
191 static int request_locality(struct tpm_chip *chip, int l)
193 unsigned long stop, timeout;
194 long rc;
196 if (check_locality(chip, l) >= 0)
197 return l;
199 iowrite8(TPM_ACCESS_REQUEST_USE,
200 chip->vendor.iobase + TPM_ACCESS(l));
202 stop = jiffies + chip->vendor.timeout_a;
204 if (chip->vendor.irq) {
205 again:
206 timeout = stop - jiffies;
207 if ((long)timeout <= 0)
208 return -1;
209 rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
210 (check_locality
211 (chip, l) >= 0),
212 timeout);
213 if (rc > 0)
214 return l;
215 if (rc == -ERESTARTSYS && freezing(current)) {
216 clear_thread_flag(TIF_SIGPENDING);
217 goto again;
219 } else {
220 /* wait for burstcount */
221 do {
222 if (check_locality(chip, l) >= 0)
223 return l;
224 msleep(TPM_TIMEOUT);
226 while (time_before(jiffies, stop));
228 return -1;
231 static u8 tpm_tis_status(struct tpm_chip *chip)
233 return ioread8(chip->vendor.iobase +
234 TPM_STS(chip->vendor.locality));
237 static void tpm_tis_ready(struct tpm_chip *chip)
239 /* this causes the current command to be aborted */
240 iowrite8(TPM_STS_COMMAND_READY,
241 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
244 static int get_burstcount(struct tpm_chip *chip)
246 unsigned long stop;
247 int burstcnt;
249 /* wait for burstcount */
250 /* which timeout value, spec has 2 answers (c & d) */
251 stop = jiffies + chip->vendor.timeout_d;
252 do {
253 burstcnt = ioread8(chip->vendor.iobase +
254 TPM_STS(chip->vendor.locality) + 1);
255 burstcnt += ioread8(chip->vendor.iobase +
256 TPM_STS(chip->vendor.locality) +
257 2) << 8;
258 if (burstcnt)
259 return burstcnt;
260 msleep(TPM_TIMEOUT);
261 } while (time_before(jiffies, stop));
262 return -EBUSY;
265 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
267 int size = 0, burstcnt;
268 while (size < count &&
269 wait_for_tpm_stat(chip,
270 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
271 chip->vendor.timeout_c,
272 &chip->vendor.read_queue, true)
273 == 0) {
274 burstcnt = get_burstcount(chip);
275 for (; burstcnt > 0 && size < count; burstcnt--)
276 buf[size++] = ioread8(chip->vendor.iobase +
277 TPM_DATA_FIFO(chip->vendor.
278 locality));
280 return size;
283 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
285 int size = 0;
286 int status;
287 u32 expected;
289 if (count < TPM_HEADER_SIZE) {
290 size = -EIO;
291 goto out;
294 /* read first 10 bytes, including tag, paramsize, and result */
295 if ((size =
296 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
297 dev_err(&chip->dev, "Unable to read header\n");
298 goto out;
301 expected = be32_to_cpu(*(__be32 *) (buf + 2));
302 if (expected > count || expected < TPM_HEADER_SIZE) {
303 size = -EIO;
304 goto out;
307 if ((size +=
308 recv_data(chip, &buf[TPM_HEADER_SIZE],
309 expected - TPM_HEADER_SIZE)) < expected) {
310 dev_err(&chip->dev, "Unable to read remainder of result\n");
311 size = -ETIME;
312 goto out;
315 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
316 &chip->vendor.int_queue, false);
317 status = tpm_tis_status(chip);
318 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
319 dev_err(&chip->dev, "Error left over data\n");
320 size = -EIO;
321 goto out;
324 out:
325 tpm_tis_ready(chip);
326 release_locality(chip, chip->vendor.locality, 0);
327 return size;
330 static bool itpm;
331 module_param(itpm, bool, 0444);
332 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
335 * If interrupts are used (signaled by an irq set in the vendor structure)
336 * tpm.c can skip polling for the data to be available as the interrupt is
337 * waited for here
339 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
341 int rc, status, burstcnt;
342 size_t count = 0;
344 if (request_locality(chip, 0) < 0)
345 return -EBUSY;
347 status = tpm_tis_status(chip);
348 if ((status & TPM_STS_COMMAND_READY) == 0) {
349 tpm_tis_ready(chip);
350 if (wait_for_tpm_stat
351 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
352 &chip->vendor.int_queue, false) < 0) {
353 rc = -ETIME;
354 goto out_err;
358 while (count < len - 1) {
359 burstcnt = get_burstcount(chip);
360 for (; burstcnt > 0 && count < len - 1; burstcnt--) {
361 iowrite8(buf[count], chip->vendor.iobase +
362 TPM_DATA_FIFO(chip->vendor.locality));
363 count++;
366 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
367 &chip->vendor.int_queue, false);
368 status = tpm_tis_status(chip);
369 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
370 rc = -EIO;
371 goto out_err;
375 /* write last byte */
376 iowrite8(buf[count],
377 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
378 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
379 &chip->vendor.int_queue, false);
380 status = tpm_tis_status(chip);
381 if ((status & TPM_STS_DATA_EXPECT) != 0) {
382 rc = -EIO;
383 goto out_err;
386 return 0;
388 out_err:
389 tpm_tis_ready(chip);
390 release_locality(chip, chip->vendor.locality, 0);
391 return rc;
394 static void disable_interrupts(struct tpm_chip *chip)
396 u32 intmask;
398 intmask =
399 ioread32(chip->vendor.iobase +
400 TPM_INT_ENABLE(chip->vendor.locality));
401 intmask &= ~TPM_GLOBAL_INT_ENABLE;
402 iowrite32(intmask,
403 chip->vendor.iobase +
404 TPM_INT_ENABLE(chip->vendor.locality));
405 devm_free_irq(&chip->dev, chip->vendor.irq, chip);
406 chip->vendor.irq = 0;
410 * If interrupts are used (signaled by an irq set in the vendor structure)
411 * tpm.c can skip polling for the data to be available as the interrupt is
412 * waited for here
414 static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
416 int rc;
417 u32 ordinal;
418 unsigned long dur;
420 rc = tpm_tis_send_data(chip, buf, len);
421 if (rc < 0)
422 return rc;
424 /* go and do it */
425 iowrite8(TPM_STS_GO,
426 chip->vendor.iobase + TPM_STS(chip->vendor.locality));
428 if (chip->vendor.irq) {
429 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
431 if (chip->flags & TPM_CHIP_FLAG_TPM2)
432 dur = tpm2_calc_ordinal_duration(chip, ordinal);
433 else
434 dur = tpm_calc_ordinal_duration(chip, ordinal);
436 if (wait_for_tpm_stat
437 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
438 &chip->vendor.read_queue, false) < 0) {
439 rc = -ETIME;
440 goto out_err;
443 return len;
444 out_err:
445 tpm_tis_ready(chip);
446 release_locality(chip, chip->vendor.locality, 0);
447 return rc;
450 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
452 int rc, irq;
453 struct priv_data *priv = chip->vendor.priv;
455 if (!chip->vendor.irq || priv->irq_tested)
456 return tpm_tis_send_main(chip, buf, len);
458 /* Verify receipt of the expected IRQ */
459 irq = chip->vendor.irq;
460 chip->vendor.irq = 0;
461 rc = tpm_tis_send_main(chip, buf, len);
462 chip->vendor.irq = irq;
463 if (!priv->irq_tested)
464 msleep(1);
465 if (!priv->irq_tested) {
466 disable_interrupts(chip);
467 dev_err(&chip->dev,
468 FW_BUG "TPM interrupt not working, polling instead\n");
470 priv->irq_tested = true;
471 return rc;
474 struct tis_vendor_timeout_override {
475 u32 did_vid;
476 unsigned long timeout_us[4];
479 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
480 /* Atmel 3204 */
481 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
482 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
485 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
486 unsigned long *timeout_cap)
488 int i;
489 u32 did_vid;
491 did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
493 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
494 if (vendor_timeout_overrides[i].did_vid != did_vid)
495 continue;
496 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
497 sizeof(vendor_timeout_overrides[i].timeout_us));
498 return true;
501 return false;
505 * Early probing for iTPM with STS_DATA_EXPECT flaw.
506 * Try sending command without itpm flag set and if that
507 * fails, repeat with itpm flag set.
509 static int probe_itpm(struct tpm_chip *chip)
511 int rc = 0;
512 u8 cmd_getticks[] = {
513 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
514 0x00, 0x00, 0x00, 0xf1
516 size_t len = sizeof(cmd_getticks);
517 bool rem_itpm = itpm;
518 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
520 /* probe only iTPMS */
521 if (vendor != TPM_VID_INTEL)
522 return 0;
524 itpm = false;
526 rc = tpm_tis_send_data(chip, cmd_getticks, len);
527 if (rc == 0)
528 goto out;
530 tpm_tis_ready(chip);
531 release_locality(chip, chip->vendor.locality, 0);
533 itpm = true;
535 rc = tpm_tis_send_data(chip, cmd_getticks, len);
536 if (rc == 0) {
537 dev_info(&chip->dev, "Detected an iTPM.\n");
538 rc = 1;
539 } else
540 rc = -EFAULT;
542 out:
543 itpm = rem_itpm;
544 tpm_tis_ready(chip);
545 release_locality(chip, chip->vendor.locality, 0);
547 return rc;
550 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
552 switch (chip->vendor.manufacturer_id) {
553 case TPM_VID_WINBOND:
554 return ((status == TPM_STS_VALID) ||
555 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
556 case TPM_VID_STM:
557 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
558 default:
559 return (status == TPM_STS_COMMAND_READY);
563 static const struct tpm_class_ops tpm_tis = {
564 .status = tpm_tis_status,
565 .recv = tpm_tis_recv,
566 .send = tpm_tis_send,
567 .cancel = tpm_tis_ready,
568 .update_timeouts = tpm_tis_update_timeouts,
569 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
570 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
571 .req_canceled = tpm_tis_req_canceled,
574 static irqreturn_t tis_int_probe(int irq, void *dev_id)
576 struct tpm_chip *chip = dev_id;
577 u32 interrupt;
579 interrupt = ioread32(chip->vendor.iobase +
580 TPM_INT_STATUS(chip->vendor.locality));
582 if (interrupt == 0)
583 return IRQ_NONE;
585 chip->vendor.probed_irq = irq;
587 /* Clear interrupts handled with TPM_EOI */
588 iowrite32(interrupt,
589 chip->vendor.iobase +
590 TPM_INT_STATUS(chip->vendor.locality));
591 return IRQ_HANDLED;
594 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
596 struct tpm_chip *chip = dev_id;
597 u32 interrupt;
598 int i;
600 interrupt = ioread32(chip->vendor.iobase +
601 TPM_INT_STATUS(chip->vendor.locality));
603 if (interrupt == 0)
604 return IRQ_NONE;
606 ((struct priv_data *)chip->vendor.priv)->irq_tested = true;
607 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
608 wake_up_interruptible(&chip->vendor.read_queue);
609 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
610 for (i = 0; i < 5; i++)
611 if (check_locality(chip, i) >= 0)
612 break;
613 if (interrupt &
614 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
615 TPM_INTF_CMD_READY_INT))
616 wake_up_interruptible(&chip->vendor.int_queue);
618 /* Clear interrupts handled with TPM_EOI */
619 iowrite32(interrupt,
620 chip->vendor.iobase +
621 TPM_INT_STATUS(chip->vendor.locality));
622 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
623 return IRQ_HANDLED;
626 static bool interrupts = true;
627 module_param(interrupts, bool, 0444);
628 MODULE_PARM_DESC(interrupts, "Enable interrupts");
630 static void tpm_tis_remove(struct tpm_chip *chip)
632 if (chip->flags & TPM_CHIP_FLAG_TPM2)
633 tpm2_shutdown(chip, TPM2_SU_CLEAR);
635 iowrite32(~TPM_GLOBAL_INT_ENABLE &
636 ioread32(chip->vendor.iobase +
637 TPM_INT_ENABLE(chip->vendor.
638 locality)),
639 chip->vendor.iobase +
640 TPM_INT_ENABLE(chip->vendor.locality));
641 release_locality(chip, chip->vendor.locality, 1);
644 static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
645 acpi_handle acpi_dev_handle)
647 u32 vendor, intfcaps, intmask;
648 int rc, i, irq_s, irq_e, probe;
649 int irq_r = -1;
650 struct tpm_chip *chip;
651 struct priv_data *priv;
653 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
654 if (priv == NULL)
655 return -ENOMEM;
657 chip = tpmm_chip_alloc(dev, &tpm_tis);
658 if (IS_ERR(chip))
659 return PTR_ERR(chip);
661 chip->vendor.priv = priv;
662 #ifdef CONFIG_ACPI
663 chip->acpi_dev_handle = acpi_dev_handle;
664 #endif
666 chip->vendor.iobase = devm_ioremap(dev, tpm_info->start, tpm_info->len);
667 if (!chip->vendor.iobase)
668 return -EIO;
670 /* Maximum timeouts */
671 chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX;
672 chip->vendor.timeout_b = TIS_TIMEOUT_B_MAX;
673 chip->vendor.timeout_c = TIS_TIMEOUT_C_MAX;
674 chip->vendor.timeout_d = TIS_TIMEOUT_D_MAX;
676 if (wait_startup(chip, 0) != 0) {
677 rc = -ENODEV;
678 goto out_err;
681 if (request_locality(chip, 0) != 0) {
682 rc = -ENODEV;
683 goto out_err;
686 rc = tpm2_probe(chip);
687 if (rc)
688 goto out_err;
690 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
691 chip->vendor.manufacturer_id = vendor;
693 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
694 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
695 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
697 if (!itpm) {
698 probe = probe_itpm(chip);
699 if (probe < 0) {
700 rc = -ENODEV;
701 goto out_err;
703 itpm = !!probe;
706 if (itpm)
707 dev_info(dev, "Intel iTPM workaround enabled\n");
710 /* Figure out the capabilities */
711 intfcaps =
712 ioread32(chip->vendor.iobase +
713 TPM_INTF_CAPS(chip->vendor.locality));
714 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
715 intfcaps);
716 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
717 dev_dbg(dev, "\tBurst Count Static\n");
718 if (intfcaps & TPM_INTF_CMD_READY_INT)
719 dev_dbg(dev, "\tCommand Ready Int Support\n");
720 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
721 dev_dbg(dev, "\tInterrupt Edge Falling\n");
722 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
723 dev_dbg(dev, "\tInterrupt Edge Rising\n");
724 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
725 dev_dbg(dev, "\tInterrupt Level Low\n");
726 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
727 dev_dbg(dev, "\tInterrupt Level High\n");
728 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
729 dev_dbg(dev, "\tLocality Change Int Support\n");
730 if (intfcaps & TPM_INTF_STS_VALID_INT)
731 dev_dbg(dev, "\tSts Valid Int Support\n");
732 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
733 dev_dbg(dev, "\tData Avail Int Support\n");
735 /* INTERRUPT Setup */
736 init_waitqueue_head(&chip->vendor.read_queue);
737 init_waitqueue_head(&chip->vendor.int_queue);
739 intmask =
740 ioread32(chip->vendor.iobase +
741 TPM_INT_ENABLE(chip->vendor.locality));
743 intmask |= TPM_INTF_CMD_READY_INT
744 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
745 | TPM_INTF_STS_VALID_INT;
747 iowrite32(intmask,
748 chip->vendor.iobase +
749 TPM_INT_ENABLE(chip->vendor.locality));
750 if (interrupts)
751 chip->vendor.irq = tpm_info->irq;
752 if (interrupts && !chip->vendor.irq) {
753 irq_s =
754 ioread8(chip->vendor.iobase +
755 TPM_INT_VECTOR(chip->vendor.locality));
756 irq_r = irq_s;
757 if (irq_s) {
758 irq_e = irq_s;
759 } else {
760 irq_s = 3;
761 irq_e = 15;
764 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
765 iowrite8(i, chip->vendor.iobase +
766 TPM_INT_VECTOR(chip->vendor.locality));
767 if (devm_request_irq
768 (dev, i, tis_int_probe, IRQF_SHARED,
769 chip->devname, chip) != 0) {
770 dev_info(&chip->dev,
771 "Unable to request irq: %d for probe\n",
773 continue;
776 /* Clear all existing */
777 iowrite32(ioread32
778 (chip->vendor.iobase +
779 TPM_INT_STATUS(chip->vendor.locality)),
780 chip->vendor.iobase +
781 TPM_INT_STATUS(chip->vendor.locality));
783 /* Turn on */
784 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
785 chip->vendor.iobase +
786 TPM_INT_ENABLE(chip->vendor.locality));
788 chip->vendor.probed_irq = 0;
790 /* Generate Interrupts */
791 if (chip->flags & TPM_CHIP_FLAG_TPM2)
792 tpm2_gen_interrupt(chip);
793 else
794 tpm_gen_interrupt(chip);
796 chip->vendor.irq = chip->vendor.probed_irq;
798 /* free_irq will call into tis_int_probe;
799 clear all irqs we haven't seen while doing
800 tpm_gen_interrupt */
801 iowrite32(ioread32
802 (chip->vendor.iobase +
803 TPM_INT_STATUS(chip->vendor.locality)),
804 chip->vendor.iobase +
805 TPM_INT_STATUS(chip->vendor.locality));
807 /* Turn off */
808 iowrite32(intmask,
809 chip->vendor.iobase +
810 TPM_INT_ENABLE(chip->vendor.locality));
812 devm_free_irq(dev, i, chip);
815 if (chip->vendor.irq) {
816 iowrite8(chip->vendor.irq,
817 chip->vendor.iobase +
818 TPM_INT_VECTOR(chip->vendor.locality));
819 if (devm_request_irq
820 (dev, chip->vendor.irq, tis_int_handler, IRQF_SHARED,
821 chip->devname, chip) != 0) {
822 dev_info(&chip->dev,
823 "Unable to request irq: %d for use\n",
824 chip->vendor.irq);
825 chip->vendor.irq = 0;
826 } else {
827 /* Clear all existing */
828 iowrite32(ioread32
829 (chip->vendor.iobase +
830 TPM_INT_STATUS(chip->vendor.locality)),
831 chip->vendor.iobase +
832 TPM_INT_STATUS(chip->vendor.locality));
834 /* Turn on */
835 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
836 chip->vendor.iobase +
837 TPM_INT_ENABLE(chip->vendor.locality));
839 } else if (irq_r != -1)
840 iowrite8(irq_r, chip->vendor.iobase +
841 TPM_INT_VECTOR(chip->vendor.locality));
843 if (chip->flags & TPM_CHIP_FLAG_TPM2) {
844 chip->vendor.timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A);
845 chip->vendor.timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B);
846 chip->vendor.timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C);
847 chip->vendor.timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D);
848 chip->vendor.duration[TPM_SHORT] =
849 msecs_to_jiffies(TPM2_DURATION_SHORT);
850 chip->vendor.duration[TPM_MEDIUM] =
851 msecs_to_jiffies(TPM2_DURATION_MEDIUM);
852 chip->vendor.duration[TPM_LONG] =
853 msecs_to_jiffies(TPM2_DURATION_LONG);
855 rc = tpm2_do_selftest(chip);
856 if (rc == TPM2_RC_INITIALIZE) {
857 dev_warn(dev, "Firmware has not started TPM\n");
858 rc = tpm2_startup(chip, TPM2_SU_CLEAR);
859 if (!rc)
860 rc = tpm2_do_selftest(chip);
863 if (rc) {
864 dev_err(dev, "TPM self test failed\n");
865 if (rc > 0)
866 rc = -ENODEV;
867 goto out_err;
869 } else {
870 if (tpm_get_timeouts(chip)) {
871 dev_err(dev, "Could not get TPM timeouts and durations\n");
872 rc = -ENODEV;
873 goto out_err;
876 if (tpm_do_selftest(chip)) {
877 dev_err(dev, "TPM self test failed\n");
878 rc = -ENODEV;
879 goto out_err;
883 return tpm_chip_register(chip);
884 out_err:
885 tpm_tis_remove(chip);
886 return rc;
889 #ifdef CONFIG_PM_SLEEP
890 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
892 u32 intmask;
894 /* reenable interrupts that device may have lost or
895 BIOS/firmware may have disabled */
896 iowrite8(chip->vendor.irq, chip->vendor.iobase +
897 TPM_INT_VECTOR(chip->vendor.locality));
899 intmask =
900 ioread32(chip->vendor.iobase +
901 TPM_INT_ENABLE(chip->vendor.locality));
903 intmask |= TPM_INTF_CMD_READY_INT
904 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
905 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
907 iowrite32(intmask,
908 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
911 static int tpm_tis_resume(struct device *dev)
913 struct tpm_chip *chip = dev_get_drvdata(dev);
914 int ret;
916 if (chip->vendor.irq)
917 tpm_tis_reenable_interrupts(chip);
919 ret = tpm_pm_resume(dev);
920 if (ret)
921 return ret;
923 /* TPM 1.2 requires self-test on resume. This function actually returns
924 * an error code but for unknown reason it isn't handled.
926 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
927 tpm_do_selftest(chip);
929 return 0;
931 #endif
933 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
935 #ifdef CONFIG_PNP
936 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
937 const struct pnp_device_id *pnp_id)
939 struct tpm_info tpm_info = tis_default_info;
940 acpi_handle acpi_dev_handle = NULL;
942 tpm_info.start = pnp_mem_start(pnp_dev, 0);
943 tpm_info.len = pnp_mem_len(pnp_dev, 0);
945 if (pnp_irq_valid(pnp_dev, 0))
946 tpm_info.irq = pnp_irq(pnp_dev, 0);
947 else
948 interrupts = false;
950 #ifdef CONFIG_ACPI
951 if (pnp_acpi_device(pnp_dev)) {
952 if (is_itpm(pnp_acpi_device(pnp_dev)))
953 itpm = true;
955 acpi_dev_handle = pnp_acpi_device(pnp_dev)->handle;
957 #endif
959 return tpm_tis_init(&pnp_dev->dev, &tpm_info, acpi_dev_handle);
962 static struct pnp_device_id tpm_pnp_tbl[] = {
963 {"PNP0C31", 0}, /* TPM */
964 {"ATM1200", 0}, /* Atmel */
965 {"IFX0102", 0}, /* Infineon */
966 {"BCM0101", 0}, /* Broadcom */
967 {"BCM0102", 0}, /* Broadcom */
968 {"NSC1200", 0}, /* National */
969 {"ICO0102", 0}, /* Intel */
970 /* Add new here */
971 {"", 0}, /* User Specified */
972 {"", 0} /* Terminator */
974 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
976 static void tpm_tis_pnp_remove(struct pnp_dev *dev)
978 struct tpm_chip *chip = pnp_get_drvdata(dev);
980 tpm_chip_unregister(chip);
981 tpm_tis_remove(chip);
984 static struct pnp_driver tis_pnp_driver = {
985 .name = "tpm_tis",
986 .id_table = tpm_pnp_tbl,
987 .probe = tpm_tis_pnp_init,
988 .remove = tpm_tis_pnp_remove,
989 .driver = {
990 .pm = &tpm_tis_pm,
994 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
995 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
996 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
997 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
998 #endif
1000 #ifdef CONFIG_ACPI
1001 static int tpm_check_resource(struct acpi_resource *ares, void *data)
1003 struct tpm_info *tpm_info = (struct tpm_info *) data;
1004 struct resource res;
1006 if (acpi_dev_resource_interrupt(ares, 0, &res)) {
1007 tpm_info->irq = res.start;
1008 } else if (acpi_dev_resource_memory(ares, &res)) {
1009 tpm_info->start = res.start;
1010 tpm_info->len = resource_size(&res);
1013 return 1;
1016 static int tpm_tis_acpi_init(struct acpi_device *acpi_dev)
1018 struct list_head resources;
1019 struct tpm_info tpm_info = tis_default_info;
1020 int ret;
1022 if (!is_fifo(acpi_dev))
1023 return -ENODEV;
1025 INIT_LIST_HEAD(&resources);
1026 ret = acpi_dev_get_resources(acpi_dev, &resources, tpm_check_resource,
1027 &tpm_info);
1028 if (ret < 0)
1029 return ret;
1031 acpi_dev_free_resource_list(&resources);
1033 if (!tpm_info.irq)
1034 interrupts = false;
1036 if (is_itpm(acpi_dev))
1037 itpm = true;
1039 return tpm_tis_init(&acpi_dev->dev, &tpm_info, acpi_dev->handle);
1042 static int tpm_tis_acpi_remove(struct acpi_device *dev)
1044 struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
1046 tpm_chip_unregister(chip);
1047 tpm_tis_remove(chip);
1049 return 0;
1052 static struct acpi_device_id tpm_acpi_tbl[] = {
1053 {"MSFT0101", 0}, /* TPM 2.0 */
1054 /* Add new here */
1055 {"", 0}, /* User Specified */
1056 {"", 0} /* Terminator */
1058 MODULE_DEVICE_TABLE(acpi, tpm_acpi_tbl);
1060 static struct acpi_driver tis_acpi_driver = {
1061 .name = "tpm_tis",
1062 .ids = tpm_acpi_tbl,
1063 .ops = {
1064 .add = tpm_tis_acpi_init,
1065 .remove = tpm_tis_acpi_remove,
1067 .drv = {
1068 .pm = &tpm_tis_pm,
1071 #endif
1073 static struct platform_driver tis_drv = {
1074 .driver = {
1075 .name = "tpm_tis",
1076 .pm = &tpm_tis_pm,
1080 static struct platform_device *pdev;
1082 static bool force;
1083 module_param(force, bool, 0444);
1084 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
1085 static int __init init_tis(void)
1087 int rc;
1088 #ifdef CONFIG_PNP
1089 if (!force) {
1090 rc = pnp_register_driver(&tis_pnp_driver);
1091 if (rc)
1092 return rc;
1094 #endif
1095 #ifdef CONFIG_ACPI
1096 if (!force) {
1097 rc = acpi_bus_register_driver(&tis_acpi_driver);
1098 if (rc) {
1099 #ifdef CONFIG_PNP
1100 pnp_unregister_driver(&tis_pnp_driver);
1101 #endif
1102 return rc;
1105 #endif
1106 if (!force)
1107 return 0;
1109 rc = platform_driver_register(&tis_drv);
1110 if (rc < 0)
1111 return rc;
1112 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0);
1113 if (IS_ERR(pdev)) {
1114 rc = PTR_ERR(pdev);
1115 goto err_dev;
1117 rc = tpm_tis_init(&pdev->dev, &tis_default_info, NULL);
1118 if (rc)
1119 goto err_init;
1120 return 0;
1121 err_init:
1122 platform_device_unregister(pdev);
1123 err_dev:
1124 platform_driver_unregister(&tis_drv);
1125 return rc;
1128 static void __exit cleanup_tis(void)
1130 struct tpm_chip *chip;
1131 #if defined(CONFIG_PNP) || defined(CONFIG_ACPI)
1132 if (!force) {
1133 #ifdef CONFIG_ACPI
1134 acpi_bus_unregister_driver(&tis_acpi_driver);
1135 #endif
1136 #ifdef CONFIG_PNP
1137 pnp_unregister_driver(&tis_pnp_driver);
1138 #endif
1139 return;
1141 #endif
1142 chip = dev_get_drvdata(&pdev->dev);
1143 tpm_chip_unregister(chip);
1144 tpm_tis_remove(chip);
1145 platform_device_unregister(pdev);
1146 platform_driver_unregister(&tis_drv);
1149 module_init(init_tis);
1150 module_exit(cleanup_tis);
1151 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1152 MODULE_DESCRIPTION("TPM Driver");
1153 MODULE_VERSION("2.0");
1154 MODULE_LICENSE("GPL");