2 * Universal Flash Storage Host controller driver Core
4 * This code is based on drivers/scsi/ufs/ufshcd.c
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
46 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
49 /* UIC command timeout, unit: ms */
50 #define UIC_CMD_TIMEOUT 500
52 /* NOP OUT retries waiting for NOP IN response */
53 #define NOP_OUT_RETRIES 10
54 /* Timeout after 30 msecs if NOP OUT hangs without response */
55 #define NOP_OUT_TIMEOUT 30 /* msecs */
57 /* Query request retries */
58 #define QUERY_REQ_RETRIES 10
59 /* Query request timeout */
60 #define QUERY_REQ_TIMEOUT 30 /* msec */
62 /* Task management command timeout */
63 #define TM_CMD_TIMEOUT 100 /* msecs */
65 /* maximum number of link-startup retries */
66 #define DME_LINKSTARTUP_RETRIES 3
68 /* maximum number of reset retries before giving up */
69 #define MAX_HOST_RESET_RETRIES 5
71 /* Expose the flag value from utp_upiu_query.value */
72 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
74 /* Interrupt aggregation default timeout, unit: 40us */
75 #define INT_AGGR_DEF_TO 0x02
77 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
81 _ret = ufshcd_enable_vreg(_dev, _vreg); \
83 _ret = ufshcd_disable_vreg(_dev, _vreg); \
87 static u32 ufs_query_desc_max_size
[] = {
88 QUERY_DESC_DEVICE_MAX_SIZE
,
89 QUERY_DESC_CONFIGURAION_MAX_SIZE
,
90 QUERY_DESC_UNIT_MAX_SIZE
,
91 QUERY_DESC_RFU_MAX_SIZE
,
92 QUERY_DESC_INTERCONNECT_MAX_SIZE
,
93 QUERY_DESC_STRING_MAX_SIZE
,
94 QUERY_DESC_RFU_MAX_SIZE
,
95 QUERY_DESC_GEOMETRY_MAZ_SIZE
,
96 QUERY_DESC_POWER_MAX_SIZE
,
97 QUERY_DESC_RFU_MAX_SIZE
,
101 UFSHCD_MAX_CHANNEL
= 0,
103 UFSHCD_CMD_PER_LUN
= 32,
104 UFSHCD_CAN_QUEUE
= 32,
111 UFSHCD_STATE_OPERATIONAL
,
114 /* UFSHCD error handling flags */
116 UFSHCD_EH_IN_PROGRESS
= (1 << 0),
119 /* UFSHCD UIC layer error flags */
121 UFSHCD_UIC_DL_PA_INIT_ERROR
= (1 << 0), /* Data link layer error */
122 UFSHCD_UIC_NL_ERROR
= (1 << 1), /* Network layer error */
123 UFSHCD_UIC_TL_ERROR
= (1 << 2), /* Transport Layer error */
124 UFSHCD_UIC_DME_ERROR
= (1 << 3), /* DME error */
127 /* Interrupt configuration options */
134 #define ufshcd_set_eh_in_progress(h) \
135 (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
136 #define ufshcd_eh_in_progress(h) \
137 (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
138 #define ufshcd_clear_eh_in_progress(h) \
139 (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
141 #define ufshcd_set_ufs_dev_active(h) \
142 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
143 #define ufshcd_set_ufs_dev_sleep(h) \
144 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
145 #define ufshcd_set_ufs_dev_poweroff(h) \
146 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
147 #define ufshcd_is_ufs_dev_active(h) \
148 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
149 #define ufshcd_is_ufs_dev_sleep(h) \
150 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
151 #define ufshcd_is_ufs_dev_poweroff(h) \
152 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
154 static struct ufs_pm_lvl_states ufs_pm_lvl_states
[] = {
155 {UFS_ACTIVE_PWR_MODE
, UIC_LINK_ACTIVE_STATE
},
156 {UFS_ACTIVE_PWR_MODE
, UIC_LINK_HIBERN8_STATE
},
157 {UFS_SLEEP_PWR_MODE
, UIC_LINK_ACTIVE_STATE
},
158 {UFS_SLEEP_PWR_MODE
, UIC_LINK_HIBERN8_STATE
},
159 {UFS_POWERDOWN_PWR_MODE
, UIC_LINK_HIBERN8_STATE
},
160 {UFS_POWERDOWN_PWR_MODE
, UIC_LINK_OFF_STATE
},
163 static inline enum ufs_dev_pwr_mode
164 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl
)
166 return ufs_pm_lvl_states
[lvl
].dev_state
;
169 static inline enum uic_link_state
170 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl
)
172 return ufs_pm_lvl_states
[lvl
].link_state
;
175 static void ufshcd_tmc_handler(struct ufs_hba
*hba
);
176 static void ufshcd_async_scan(void *data
, async_cookie_t cookie
);
177 static int ufshcd_reset_and_restore(struct ufs_hba
*hba
);
178 static int ufshcd_clear_tm_cmd(struct ufs_hba
*hba
, int tag
);
179 static void ufshcd_hba_exit(struct ufs_hba
*hba
);
180 static int ufshcd_probe_hba(struct ufs_hba
*hba
);
181 static int __ufshcd_setup_clocks(struct ufs_hba
*hba
, bool on
,
183 static int ufshcd_setup_clocks(struct ufs_hba
*hba
, bool on
);
184 static int ufshcd_uic_hibern8_exit(struct ufs_hba
*hba
);
185 static int ufshcd_uic_hibern8_enter(struct ufs_hba
*hba
);
186 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba
*hba
);
187 static int ufshcd_host_reset_and_restore(struct ufs_hba
*hba
);
188 static irqreturn_t
ufshcd_intr(int irq
, void *__hba
);
189 static int ufshcd_config_pwr_mode(struct ufs_hba
*hba
,
190 struct ufs_pa_layer_attr
*desired_pwr_mode
);
191 static int ufshcd_change_power_mode(struct ufs_hba
*hba
,
192 struct ufs_pa_layer_attr
*pwr_mode
);
194 static inline int ufshcd_enable_irq(struct ufs_hba
*hba
)
198 if (!hba
->is_irq_enabled
) {
199 ret
= request_irq(hba
->irq
, ufshcd_intr
, IRQF_SHARED
, UFSHCD
,
202 dev_err(hba
->dev
, "%s: request_irq failed, ret=%d\n",
204 hba
->is_irq_enabled
= true;
210 static inline void ufshcd_disable_irq(struct ufs_hba
*hba
)
212 if (hba
->is_irq_enabled
) {
213 free_irq(hba
->irq
, hba
);
214 hba
->is_irq_enabled
= false;
219 * ufshcd_wait_for_register - wait for register value to change
220 * @hba - per-adapter interface
221 * @reg - mmio register offset
222 * @mask - mask to apply to read register value
223 * @val - wait condition
224 * @interval_us - polling interval in microsecs
225 * @timeout_ms - timeout in millisecs
227 * Returns -ETIMEDOUT on error, zero on success
229 static int ufshcd_wait_for_register(struct ufs_hba
*hba
, u32 reg
, u32 mask
,
230 u32 val
, unsigned long interval_us
, unsigned long timeout_ms
)
233 unsigned long timeout
= jiffies
+ msecs_to_jiffies(timeout_ms
);
235 /* ignore bits that we don't intend to wait on */
238 while ((ufshcd_readl(hba
, reg
) & mask
) != val
) {
239 /* wakeup within 50us of expiry */
240 usleep_range(interval_us
, interval_us
+ 50);
242 if (time_after(jiffies
, timeout
)) {
243 if ((ufshcd_readl(hba
, reg
) & mask
) != val
)
253 * ufshcd_get_intr_mask - Get the interrupt bit mask
254 * @hba - Pointer to adapter instance
256 * Returns interrupt bit mask per version
258 static inline u32
ufshcd_get_intr_mask(struct ufs_hba
*hba
)
260 if (hba
->ufs_version
== UFSHCI_VERSION_10
)
261 return INTERRUPT_MASK_ALL_VER_10
;
263 return INTERRUPT_MASK_ALL_VER_11
;
267 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
268 * @hba - Pointer to adapter instance
270 * Returns UFSHCI version supported by the controller
272 static inline u32
ufshcd_get_ufs_version(struct ufs_hba
*hba
)
274 if (hba
->quirks
& UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION
)
275 return ufshcd_vops_get_ufs_hci_version(hba
);
277 return ufshcd_readl(hba
, REG_UFS_VERSION
);
281 * ufshcd_is_device_present - Check if any device connected to
282 * the host controller
283 * @hba: pointer to adapter instance
285 * Returns 1 if device present, 0 if no device detected
287 static inline int ufshcd_is_device_present(struct ufs_hba
*hba
)
289 return (ufshcd_readl(hba
, REG_CONTROLLER_STATUS
) &
290 DEVICE_PRESENT
) ? 1 : 0;
294 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
295 * @lrb: pointer to local command reference block
297 * This function is used to get the OCS field from UTRD
298 * Returns the OCS field in the UTRD
300 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb
*lrbp
)
302 return le32_to_cpu(lrbp
->utr_descriptor_ptr
->header
.dword_2
) & MASK_OCS
;
306 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
307 * @task_req_descp: pointer to utp_task_req_desc structure
309 * This function is used to get the OCS field from UTMRD
310 * Returns the OCS field in the UTMRD
313 ufshcd_get_tmr_ocs(struct utp_task_req_desc
*task_req_descp
)
315 return le32_to_cpu(task_req_descp
->header
.dword_2
) & MASK_OCS
;
319 * ufshcd_get_tm_free_slot - get a free slot for task management request
320 * @hba: per adapter instance
321 * @free_slot: pointer to variable with available slot value
323 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
324 * Returns 0 if free slot is not available, else return 1 with tag value
327 static bool ufshcd_get_tm_free_slot(struct ufs_hba
*hba
, int *free_slot
)
336 tag
= find_first_zero_bit(&hba
->tm_slots_in_use
, hba
->nutmrs
);
337 if (tag
>= hba
->nutmrs
)
339 } while (test_and_set_bit_lock(tag
, &hba
->tm_slots_in_use
));
347 static inline void ufshcd_put_tm_slot(struct ufs_hba
*hba
, int slot
)
349 clear_bit_unlock(slot
, &hba
->tm_slots_in_use
);
353 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
354 * @hba: per adapter instance
355 * @pos: position of the bit to be cleared
357 static inline void ufshcd_utrl_clear(struct ufs_hba
*hba
, u32 pos
)
359 ufshcd_writel(hba
, ~(1 << pos
), REG_UTP_TRANSFER_REQ_LIST_CLEAR
);
363 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
364 * @reg: Register value of host controller status
366 * Returns integer, 0 on Success and positive value if failed
368 static inline int ufshcd_get_lists_status(u32 reg
)
371 * The mask 0xFF is for the following HCS register bits
381 return (((reg
) & (0xFF)) >> 1) ^ (0x07);
385 * ufshcd_get_uic_cmd_result - Get the UIC command result
386 * @hba: Pointer to adapter instance
388 * This function gets the result of UIC command completion
389 * Returns 0 on success, non zero value on error
391 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba
*hba
)
393 return ufshcd_readl(hba
, REG_UIC_COMMAND_ARG_2
) &
394 MASK_UIC_COMMAND_RESULT
;
398 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
399 * @hba: Pointer to adapter instance
401 * This function gets UIC command argument3
402 * Returns 0 on success, non zero value on error
404 static inline u32
ufshcd_get_dme_attr_val(struct ufs_hba
*hba
)
406 return ufshcd_readl(hba
, REG_UIC_COMMAND_ARG_3
);
410 * ufshcd_get_req_rsp - returns the TR response transaction type
411 * @ucd_rsp_ptr: pointer to response UPIU
414 ufshcd_get_req_rsp(struct utp_upiu_rsp
*ucd_rsp_ptr
)
416 return be32_to_cpu(ucd_rsp_ptr
->header
.dword_0
) >> 24;
420 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
421 * @ucd_rsp_ptr: pointer to response UPIU
423 * This function gets the response status and scsi_status from response UPIU
424 * Returns the response result code.
427 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp
*ucd_rsp_ptr
)
429 return be32_to_cpu(ucd_rsp_ptr
->header
.dword_1
) & MASK_RSP_UPIU_RESULT
;
433 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
435 * @ucd_rsp_ptr: pointer to response UPIU
437 * Return the data segment length.
439 static inline unsigned int
440 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp
*ucd_rsp_ptr
)
442 return be32_to_cpu(ucd_rsp_ptr
->header
.dword_2
) &
443 MASK_RSP_UPIU_DATA_SEG_LEN
;
447 * ufshcd_is_exception_event - Check if the device raised an exception event
448 * @ucd_rsp_ptr: pointer to response UPIU
450 * The function checks if the device raised an exception event indicated in
451 * the Device Information field of response UPIU.
453 * Returns true if exception is raised, false otherwise.
455 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp
*ucd_rsp_ptr
)
457 return be32_to_cpu(ucd_rsp_ptr
->header
.dword_2
) &
458 MASK_RSP_EXCEPTION_EVENT
? true : false;
462 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
463 * @hba: per adapter instance
466 ufshcd_reset_intr_aggr(struct ufs_hba
*hba
)
468 ufshcd_writel(hba
, INT_AGGR_ENABLE
|
469 INT_AGGR_COUNTER_AND_TIMER_RESET
,
470 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL
);
474 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
475 * @hba: per adapter instance
476 * @cnt: Interrupt aggregation counter threshold
477 * @tmout: Interrupt aggregation timeout value
480 ufshcd_config_intr_aggr(struct ufs_hba
*hba
, u8 cnt
, u8 tmout
)
482 ufshcd_writel(hba
, INT_AGGR_ENABLE
| INT_AGGR_PARAM_WRITE
|
483 INT_AGGR_COUNTER_THLD_VAL(cnt
) |
484 INT_AGGR_TIMEOUT_VAL(tmout
),
485 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL
);
489 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
490 * @hba: per adapter instance
492 static inline void ufshcd_disable_intr_aggr(struct ufs_hba
*hba
)
494 ufshcd_writel(hba
, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL
);
498 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
499 * When run-stop registers are set to 1, it indicates the
500 * host controller that it can process the requests
501 * @hba: per adapter instance
503 static void ufshcd_enable_run_stop_reg(struct ufs_hba
*hba
)
505 ufshcd_writel(hba
, UTP_TASK_REQ_LIST_RUN_STOP_BIT
,
506 REG_UTP_TASK_REQ_LIST_RUN_STOP
);
507 ufshcd_writel(hba
, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT
,
508 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP
);
512 * ufshcd_hba_start - Start controller initialization sequence
513 * @hba: per adapter instance
515 static inline void ufshcd_hba_start(struct ufs_hba
*hba
)
517 ufshcd_writel(hba
, CONTROLLER_ENABLE
, REG_CONTROLLER_ENABLE
);
521 * ufshcd_is_hba_active - Get controller state
522 * @hba: per adapter instance
524 * Returns zero if controller is active, 1 otherwise
526 static inline int ufshcd_is_hba_active(struct ufs_hba
*hba
)
528 return (ufshcd_readl(hba
, REG_CONTROLLER_ENABLE
) & 0x1) ? 0 : 1;
531 static void ufshcd_ungate_work(struct work_struct
*work
)
535 struct ufs_hba
*hba
= container_of(work
, struct ufs_hba
,
536 clk_gating
.ungate_work
);
538 cancel_delayed_work_sync(&hba
->clk_gating
.gate_work
);
540 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
541 if (hba
->clk_gating
.state
== CLKS_ON
) {
542 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
546 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
547 ufshcd_setup_clocks(hba
, true);
549 /* Exit from hibern8 */
550 if (ufshcd_can_hibern8_during_gating(hba
)) {
551 /* Prevent gating in this path */
552 hba
->clk_gating
.is_suspended
= true;
553 if (ufshcd_is_link_hibern8(hba
)) {
554 ret
= ufshcd_uic_hibern8_exit(hba
);
556 dev_err(hba
->dev
, "%s: hibern8 exit failed %d\n",
559 ufshcd_set_link_active(hba
);
561 hba
->clk_gating
.is_suspended
= false;
564 if (ufshcd_is_clkscaling_enabled(hba
))
565 devfreq_resume_device(hba
->devfreq
);
566 scsi_unblock_requests(hba
->host
);
570 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
571 * Also, exit from hibern8 mode and set the link as active.
572 * @hba: per adapter instance
573 * @async: This indicates whether caller should ungate clocks asynchronously.
575 int ufshcd_hold(struct ufs_hba
*hba
, bool async
)
581 if (!ufshcd_is_clkgating_allowed(hba
))
583 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
584 hba
->clk_gating
.active_reqs
++;
587 switch (hba
->clk_gating
.state
) {
590 * Wait for the ungate work to complete if in progress.
591 * Though the clocks may be in ON state, the link could
592 * still be in hibner8 state if hibern8 is allowed
593 * during clock gating.
594 * Make sure we exit hibern8 state also in addition to
597 if (ufshcd_can_hibern8_during_gating(hba
) &&
598 ufshcd_is_link_hibern8(hba
)) {
601 hba
->clk_gating
.active_reqs
--;
604 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
605 flush_result
= flush_work(&hba
->clk_gating
.ungate_work
);
606 if (hba
->clk_gating
.is_suspended
&& !flush_result
)
608 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
613 if (cancel_delayed_work(&hba
->clk_gating
.gate_work
)) {
614 hba
->clk_gating
.state
= CLKS_ON
;
618 * If we here, it means gating work is either done or
619 * currently running. Hence, fall through to cancel gating
620 * work and to enable clocks.
623 scsi_block_requests(hba
->host
);
624 hba
->clk_gating
.state
= REQ_CLKS_ON
;
625 schedule_work(&hba
->clk_gating
.ungate_work
);
627 * fall through to check if we should wait for this
628 * work to be done or not.
633 hba
->clk_gating
.active_reqs
--;
637 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
638 flush_work(&hba
->clk_gating
.ungate_work
);
639 /* Make sure state is CLKS_ON before returning */
640 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
643 dev_err(hba
->dev
, "%s: clk gating is in invalid state %d\n",
644 __func__
, hba
->clk_gating
.state
);
647 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
651 EXPORT_SYMBOL_GPL(ufshcd_hold
);
653 static void ufshcd_gate_work(struct work_struct
*work
)
655 struct ufs_hba
*hba
= container_of(work
, struct ufs_hba
,
656 clk_gating
.gate_work
.work
);
659 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
660 if (hba
->clk_gating
.is_suspended
) {
661 hba
->clk_gating
.state
= CLKS_ON
;
665 if (hba
->clk_gating
.active_reqs
666 || hba
->ufshcd_state
!= UFSHCD_STATE_OPERATIONAL
667 || hba
->lrb_in_use
|| hba
->outstanding_tasks
668 || hba
->active_uic_cmd
|| hba
->uic_async_done
)
671 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
673 /* put the link into hibern8 mode before turning off clocks */
674 if (ufshcd_can_hibern8_during_gating(hba
)) {
675 if (ufshcd_uic_hibern8_enter(hba
)) {
676 hba
->clk_gating
.state
= CLKS_ON
;
679 ufshcd_set_link_hibern8(hba
);
682 if (ufshcd_is_clkscaling_enabled(hba
)) {
683 devfreq_suspend_device(hba
->devfreq
);
684 hba
->clk_scaling
.window_start_t
= 0;
687 if (!ufshcd_is_link_active(hba
))
688 ufshcd_setup_clocks(hba
, false);
690 /* If link is active, device ref_clk can't be switched off */
691 __ufshcd_setup_clocks(hba
, false, true);
694 * In case you are here to cancel this work the gating state
695 * would be marked as REQ_CLKS_ON. In this case keep the state
696 * as REQ_CLKS_ON which would anyway imply that clocks are off
697 * and a request to turn them on is pending. By doing this way,
698 * we keep the state machine in tact and this would ultimately
699 * prevent from doing cancel work multiple times when there are
700 * new requests arriving before the current cancel work is done.
702 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
703 if (hba
->clk_gating
.state
== REQ_CLKS_OFF
)
704 hba
->clk_gating
.state
= CLKS_OFF
;
707 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
712 /* host lock must be held before calling this variant */
713 static void __ufshcd_release(struct ufs_hba
*hba
)
715 if (!ufshcd_is_clkgating_allowed(hba
))
718 hba
->clk_gating
.active_reqs
--;
720 if (hba
->clk_gating
.active_reqs
|| hba
->clk_gating
.is_suspended
721 || hba
->ufshcd_state
!= UFSHCD_STATE_OPERATIONAL
722 || hba
->lrb_in_use
|| hba
->outstanding_tasks
723 || hba
->active_uic_cmd
|| hba
->uic_async_done
)
726 hba
->clk_gating
.state
= REQ_CLKS_OFF
;
727 schedule_delayed_work(&hba
->clk_gating
.gate_work
,
728 msecs_to_jiffies(hba
->clk_gating
.delay_ms
));
731 void ufshcd_release(struct ufs_hba
*hba
)
735 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
736 __ufshcd_release(hba
);
737 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
739 EXPORT_SYMBOL_GPL(ufshcd_release
);
741 static ssize_t
ufshcd_clkgate_delay_show(struct device
*dev
,
742 struct device_attribute
*attr
, char *buf
)
744 struct ufs_hba
*hba
= dev_get_drvdata(dev
);
746 return snprintf(buf
, PAGE_SIZE
, "%lu\n", hba
->clk_gating
.delay_ms
);
749 static ssize_t
ufshcd_clkgate_delay_store(struct device
*dev
,
750 struct device_attribute
*attr
, const char *buf
, size_t count
)
752 struct ufs_hba
*hba
= dev_get_drvdata(dev
);
753 unsigned long flags
, value
;
755 if (kstrtoul(buf
, 0, &value
))
758 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
759 hba
->clk_gating
.delay_ms
= value
;
760 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
764 static void ufshcd_init_clk_gating(struct ufs_hba
*hba
)
766 if (!ufshcd_is_clkgating_allowed(hba
))
769 hba
->clk_gating
.delay_ms
= 150;
770 INIT_DELAYED_WORK(&hba
->clk_gating
.gate_work
, ufshcd_gate_work
);
771 INIT_WORK(&hba
->clk_gating
.ungate_work
, ufshcd_ungate_work
);
773 hba
->clk_gating
.delay_attr
.show
= ufshcd_clkgate_delay_show
;
774 hba
->clk_gating
.delay_attr
.store
= ufshcd_clkgate_delay_store
;
775 sysfs_attr_init(&hba
->clk_gating
.delay_attr
.attr
);
776 hba
->clk_gating
.delay_attr
.attr
.name
= "clkgate_delay_ms";
777 hba
->clk_gating
.delay_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
778 if (device_create_file(hba
->dev
, &hba
->clk_gating
.delay_attr
))
779 dev_err(hba
->dev
, "Failed to create sysfs for clkgate_delay\n");
782 static void ufshcd_exit_clk_gating(struct ufs_hba
*hba
)
784 if (!ufshcd_is_clkgating_allowed(hba
))
786 device_remove_file(hba
->dev
, &hba
->clk_gating
.delay_attr
);
787 cancel_work_sync(&hba
->clk_gating
.ungate_work
);
788 cancel_delayed_work_sync(&hba
->clk_gating
.gate_work
);
791 /* Must be called with host lock acquired */
792 static void ufshcd_clk_scaling_start_busy(struct ufs_hba
*hba
)
794 if (!ufshcd_is_clkscaling_enabled(hba
))
797 if (!hba
->clk_scaling
.is_busy_started
) {
798 hba
->clk_scaling
.busy_start_t
= ktime_get();
799 hba
->clk_scaling
.is_busy_started
= true;
803 static void ufshcd_clk_scaling_update_busy(struct ufs_hba
*hba
)
805 struct ufs_clk_scaling
*scaling
= &hba
->clk_scaling
;
807 if (!ufshcd_is_clkscaling_enabled(hba
))
810 if (!hba
->outstanding_reqs
&& scaling
->is_busy_started
) {
811 scaling
->tot_busy_t
+= ktime_to_us(ktime_sub(ktime_get(),
812 scaling
->busy_start_t
));
813 scaling
->busy_start_t
= ktime_set(0, 0);
814 scaling
->is_busy_started
= false;
818 * ufshcd_send_command - Send SCSI or device management commands
819 * @hba: per adapter instance
820 * @task_tag: Task tag of the command
823 void ufshcd_send_command(struct ufs_hba
*hba
, unsigned int task_tag
)
825 ufshcd_clk_scaling_start_busy(hba
);
826 __set_bit(task_tag
, &hba
->outstanding_reqs
);
827 ufshcd_writel(hba
, 1 << task_tag
, REG_UTP_TRANSFER_REQ_DOOR_BELL
);
831 * ufshcd_copy_sense_data - Copy sense data in case of check condition
832 * @lrb - pointer to local reference block
834 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb
*lrbp
)
837 if (lrbp
->sense_buffer
&&
838 ufshcd_get_rsp_upiu_data_seg_len(lrbp
->ucd_rsp_ptr
)) {
841 len
= be16_to_cpu(lrbp
->ucd_rsp_ptr
->sr
.sense_data_len
);
842 len_to_copy
= min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH
, len
);
844 memcpy(lrbp
->sense_buffer
,
845 lrbp
->ucd_rsp_ptr
->sr
.sense_data
,
846 min_t(int, len_to_copy
, SCSI_SENSE_BUFFERSIZE
));
851 * ufshcd_copy_query_response() - Copy the Query Response and the data
853 * @hba: per adapter instance
854 * @lrb - pointer to local reference block
857 int ufshcd_copy_query_response(struct ufs_hba
*hba
, struct ufshcd_lrb
*lrbp
)
859 struct ufs_query_res
*query_res
= &hba
->dev_cmd
.query
.response
;
861 memcpy(&query_res
->upiu_res
, &lrbp
->ucd_rsp_ptr
->qr
, QUERY_OSF_SIZE
);
863 /* Get the descriptor */
864 if (hba
->dev_cmd
.query
.descriptor
&&
865 lrbp
->ucd_rsp_ptr
->qr
.opcode
== UPIU_QUERY_OPCODE_READ_DESC
) {
866 u8
*descp
= (u8
*)lrbp
->ucd_rsp_ptr
+
867 GENERAL_UPIU_REQUEST_SIZE
;
871 /* data segment length */
872 resp_len
= be32_to_cpu(lrbp
->ucd_rsp_ptr
->header
.dword_2
) &
873 MASK_QUERY_DATA_SEG_LEN
;
874 buf_len
= be16_to_cpu(
875 hba
->dev_cmd
.query
.request
.upiu_req
.length
);
876 if (likely(buf_len
>= resp_len
)) {
877 memcpy(hba
->dev_cmd
.query
.descriptor
, descp
, resp_len
);
880 "%s: Response size is bigger than buffer",
890 * ufshcd_hba_capabilities - Read controller capabilities
891 * @hba: per adapter instance
893 static inline void ufshcd_hba_capabilities(struct ufs_hba
*hba
)
895 hba
->capabilities
= ufshcd_readl(hba
, REG_CONTROLLER_CAPABILITIES
);
897 /* nutrs and nutmrs are 0 based values */
898 hba
->nutrs
= (hba
->capabilities
& MASK_TRANSFER_REQUESTS_SLOTS
) + 1;
900 ((hba
->capabilities
& MASK_TASK_MANAGEMENT_REQUEST_SLOTS
) >> 16) + 1;
904 * ufshcd_ready_for_uic_cmd - Check if controller is ready
905 * to accept UIC commands
906 * @hba: per adapter instance
907 * Return true on success, else false
909 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba
*hba
)
911 if (ufshcd_readl(hba
, REG_CONTROLLER_STATUS
) & UIC_COMMAND_READY
)
918 * ufshcd_get_upmcrs - Get the power mode change request status
919 * @hba: Pointer to adapter instance
921 * This function gets the UPMCRS field of HCS register
922 * Returns value of UPMCRS field
924 static inline u8
ufshcd_get_upmcrs(struct ufs_hba
*hba
)
926 return (ufshcd_readl(hba
, REG_CONTROLLER_STATUS
) >> 8) & 0x7;
930 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
931 * @hba: per adapter instance
932 * @uic_cmd: UIC command
934 * Mutex must be held.
937 ufshcd_dispatch_uic_cmd(struct ufs_hba
*hba
, struct uic_command
*uic_cmd
)
939 WARN_ON(hba
->active_uic_cmd
);
941 hba
->active_uic_cmd
= uic_cmd
;
944 ufshcd_writel(hba
, uic_cmd
->argument1
, REG_UIC_COMMAND_ARG_1
);
945 ufshcd_writel(hba
, uic_cmd
->argument2
, REG_UIC_COMMAND_ARG_2
);
946 ufshcd_writel(hba
, uic_cmd
->argument3
, REG_UIC_COMMAND_ARG_3
);
949 ufshcd_writel(hba
, uic_cmd
->command
& COMMAND_OPCODE_MASK
,
954 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
955 * @hba: per adapter instance
956 * @uic_command: UIC command
958 * Must be called with mutex held.
959 * Returns 0 only if success.
962 ufshcd_wait_for_uic_cmd(struct ufs_hba
*hba
, struct uic_command
*uic_cmd
)
967 if (wait_for_completion_timeout(&uic_cmd
->done
,
968 msecs_to_jiffies(UIC_CMD_TIMEOUT
)))
969 ret
= uic_cmd
->argument2
& MASK_UIC_COMMAND_RESULT
;
973 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
974 hba
->active_uic_cmd
= NULL
;
975 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
981 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
982 * @hba: per adapter instance
983 * @uic_cmd: UIC command
985 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
986 * with mutex held and host_lock locked.
987 * Returns 0 only if success.
990 __ufshcd_send_uic_cmd(struct ufs_hba
*hba
, struct uic_command
*uic_cmd
)
992 if (!ufshcd_ready_for_uic_cmd(hba
)) {
994 "Controller not ready to accept UIC commands\n");
998 init_completion(&uic_cmd
->done
);
1000 ufshcd_dispatch_uic_cmd(hba
, uic_cmd
);
1006 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1007 * @hba: per adapter instance
1008 * @uic_cmd: UIC command
1010 * Returns 0 only if success.
1013 ufshcd_send_uic_cmd(struct ufs_hba
*hba
, struct uic_command
*uic_cmd
)
1016 unsigned long flags
;
1018 ufshcd_hold(hba
, false);
1019 mutex_lock(&hba
->uic_cmd_mutex
);
1020 ufshcd_add_delay_before_dme_cmd(hba
);
1022 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1023 ret
= __ufshcd_send_uic_cmd(hba
, uic_cmd
);
1024 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1026 ret
= ufshcd_wait_for_uic_cmd(hba
, uic_cmd
);
1028 mutex_unlock(&hba
->uic_cmd_mutex
);
1030 ufshcd_release(hba
);
1035 * ufshcd_map_sg - Map scatter-gather list to prdt
1036 * @lrbp - pointer to local reference block
1038 * Returns 0 in case of success, non-zero value in case of failure
1040 static int ufshcd_map_sg(struct ufshcd_lrb
*lrbp
)
1042 struct ufshcd_sg_entry
*prd_table
;
1043 struct scatterlist
*sg
;
1044 struct scsi_cmnd
*cmd
;
1049 sg_segments
= scsi_dma_map(cmd
);
1050 if (sg_segments
< 0)
1054 lrbp
->utr_descriptor_ptr
->prd_table_length
=
1055 cpu_to_le16((u16
) (sg_segments
));
1057 prd_table
= (struct ufshcd_sg_entry
*)lrbp
->ucd_prdt_ptr
;
1059 scsi_for_each_sg(cmd
, sg
, sg_segments
, i
) {
1061 cpu_to_le32(((u32
) sg_dma_len(sg
))-1);
1062 prd_table
[i
].base_addr
=
1063 cpu_to_le32(lower_32_bits(sg
->dma_address
));
1064 prd_table
[i
].upper_addr
=
1065 cpu_to_le32(upper_32_bits(sg
->dma_address
));
1068 lrbp
->utr_descriptor_ptr
->prd_table_length
= 0;
1075 * ufshcd_enable_intr - enable interrupts
1076 * @hba: per adapter instance
1077 * @intrs: interrupt bits
1079 static void ufshcd_enable_intr(struct ufs_hba
*hba
, u32 intrs
)
1081 u32 set
= ufshcd_readl(hba
, REG_INTERRUPT_ENABLE
);
1083 if (hba
->ufs_version
== UFSHCI_VERSION_10
) {
1085 rw
= set
& INTERRUPT_MASK_RW_VER_10
;
1086 set
= rw
| ((set
^ intrs
) & intrs
);
1091 ufshcd_writel(hba
, set
, REG_INTERRUPT_ENABLE
);
1095 * ufshcd_disable_intr - disable interrupts
1096 * @hba: per adapter instance
1097 * @intrs: interrupt bits
1099 static void ufshcd_disable_intr(struct ufs_hba
*hba
, u32 intrs
)
1101 u32 set
= ufshcd_readl(hba
, REG_INTERRUPT_ENABLE
);
1103 if (hba
->ufs_version
== UFSHCI_VERSION_10
) {
1105 rw
= (set
& INTERRUPT_MASK_RW_VER_10
) &
1106 ~(intrs
& INTERRUPT_MASK_RW_VER_10
);
1107 set
= rw
| ((set
& intrs
) & ~INTERRUPT_MASK_RW_VER_10
);
1113 ufshcd_writel(hba
, set
, REG_INTERRUPT_ENABLE
);
1117 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
1118 * descriptor according to request
1119 * @lrbp: pointer to local reference block
1120 * @upiu_flags: flags required in the header
1121 * @cmd_dir: requests data direction
1123 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb
*lrbp
,
1124 u32
*upiu_flags
, enum dma_data_direction cmd_dir
)
1126 struct utp_transfer_req_desc
*req_desc
= lrbp
->utr_descriptor_ptr
;
1130 if (cmd_dir
== DMA_FROM_DEVICE
) {
1131 data_direction
= UTP_DEVICE_TO_HOST
;
1132 *upiu_flags
= UPIU_CMD_FLAGS_READ
;
1133 } else if (cmd_dir
== DMA_TO_DEVICE
) {
1134 data_direction
= UTP_HOST_TO_DEVICE
;
1135 *upiu_flags
= UPIU_CMD_FLAGS_WRITE
;
1137 data_direction
= UTP_NO_DATA_TRANSFER
;
1138 *upiu_flags
= UPIU_CMD_FLAGS_NONE
;
1141 dword_0
= data_direction
| (lrbp
->command_type
1142 << UPIU_COMMAND_TYPE_OFFSET
);
1144 dword_0
|= UTP_REQ_DESC_INT_CMD
;
1146 /* Transfer request descriptor header fields */
1147 req_desc
->header
.dword_0
= cpu_to_le32(dword_0
);
1150 * assigning invalid value for command status. Controller
1151 * updates OCS on command completion, with the command
1154 req_desc
->header
.dword_2
=
1155 cpu_to_le32(OCS_INVALID_COMMAND_STATUS
);
1159 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
1161 * @lrbp - local reference block pointer
1162 * @upiu_flags - flags
1165 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb
*lrbp
, u32 upiu_flags
)
1167 struct utp_upiu_req
*ucd_req_ptr
= lrbp
->ucd_req_ptr
;
1169 /* command descriptor fields */
1170 ucd_req_ptr
->header
.dword_0
= UPIU_HEADER_DWORD(
1171 UPIU_TRANSACTION_COMMAND
, upiu_flags
,
1172 lrbp
->lun
, lrbp
->task_tag
);
1173 ucd_req_ptr
->header
.dword_1
= UPIU_HEADER_DWORD(
1174 UPIU_COMMAND_SET_TYPE_SCSI
, 0, 0, 0);
1176 /* Total EHS length and Data segment length will be zero */
1177 ucd_req_ptr
->header
.dword_2
= 0;
1179 ucd_req_ptr
->sc
.exp_data_transfer_len
=
1180 cpu_to_be32(lrbp
->cmd
->sdb
.length
);
1182 memcpy(ucd_req_ptr
->sc
.cdb
, lrbp
->cmd
->cmnd
,
1183 (min_t(unsigned short, lrbp
->cmd
->cmd_len
, MAX_CDB_SIZE
)));
1187 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
1190 * @lrbp: local reference block pointer
1191 * @upiu_flags: flags
1193 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba
*hba
,
1194 struct ufshcd_lrb
*lrbp
, u32 upiu_flags
)
1196 struct utp_upiu_req
*ucd_req_ptr
= lrbp
->ucd_req_ptr
;
1197 struct ufs_query
*query
= &hba
->dev_cmd
.query
;
1198 u16 len
= be16_to_cpu(query
->request
.upiu_req
.length
);
1199 u8
*descp
= (u8
*)lrbp
->ucd_req_ptr
+ GENERAL_UPIU_REQUEST_SIZE
;
1201 /* Query request header */
1202 ucd_req_ptr
->header
.dword_0
= UPIU_HEADER_DWORD(
1203 UPIU_TRANSACTION_QUERY_REQ
, upiu_flags
,
1204 lrbp
->lun
, lrbp
->task_tag
);
1205 ucd_req_ptr
->header
.dword_1
= UPIU_HEADER_DWORD(
1206 0, query
->request
.query_func
, 0, 0);
1208 /* Data segment length */
1209 ucd_req_ptr
->header
.dword_2
= UPIU_HEADER_DWORD(
1210 0, 0, len
>> 8, (u8
)len
);
1212 /* Copy the Query Request buffer as is */
1213 memcpy(&ucd_req_ptr
->qr
, &query
->request
.upiu_req
,
1216 /* Copy the Descriptor */
1217 if (query
->request
.upiu_req
.opcode
== UPIU_QUERY_OPCODE_WRITE_DESC
)
1218 memcpy(descp
, query
->descriptor
, len
);
1222 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb
*lrbp
)
1224 struct utp_upiu_req
*ucd_req_ptr
= lrbp
->ucd_req_ptr
;
1226 memset(ucd_req_ptr
, 0, sizeof(struct utp_upiu_req
));
1228 /* command descriptor fields */
1229 ucd_req_ptr
->header
.dword_0
=
1231 UPIU_TRANSACTION_NOP_OUT
, 0, 0, lrbp
->task_tag
);
1235 * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
1236 * @hba - per adapter instance
1237 * @lrb - pointer to local reference block
1239 static int ufshcd_compose_upiu(struct ufs_hba
*hba
, struct ufshcd_lrb
*lrbp
)
1244 switch (lrbp
->command_type
) {
1245 case UTP_CMD_TYPE_SCSI
:
1246 if (likely(lrbp
->cmd
)) {
1247 ufshcd_prepare_req_desc_hdr(lrbp
, &upiu_flags
,
1248 lrbp
->cmd
->sc_data_direction
);
1249 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp
, upiu_flags
);
1254 case UTP_CMD_TYPE_DEV_MANAGE
:
1255 ufshcd_prepare_req_desc_hdr(lrbp
, &upiu_flags
, DMA_NONE
);
1256 if (hba
->dev_cmd
.type
== DEV_CMD_TYPE_QUERY
)
1257 ufshcd_prepare_utp_query_req_upiu(
1258 hba
, lrbp
, upiu_flags
);
1259 else if (hba
->dev_cmd
.type
== DEV_CMD_TYPE_NOP
)
1260 ufshcd_prepare_utp_nop_upiu(lrbp
);
1264 case UTP_CMD_TYPE_UFS
:
1265 /* For UFS native command implementation */
1267 dev_err(hba
->dev
, "%s: UFS native command are not supported\n",
1272 dev_err(hba
->dev
, "%s: unknown command type: 0x%x\n",
1273 __func__
, lrbp
->command_type
);
1275 } /* end of switch */
1281 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1282 * @scsi_lun: scsi LUN id
1284 * Returns UPIU LUN id
1286 static inline u8
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun
)
1288 if (scsi_is_wlun(scsi_lun
))
1289 return (scsi_lun
& UFS_UPIU_MAX_UNIT_NUM_ID
)
1292 return scsi_lun
& UFS_UPIU_MAX_UNIT_NUM_ID
;
1296 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
1297 * @scsi_lun: UPIU W-LUN id
1299 * Returns SCSI W-LUN id
1301 static inline u16
ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id
)
1303 return (upiu_wlun_id
& ~UFS_UPIU_WLUN_ID
) | SCSI_W_LUN_BASE
;
1307 * ufshcd_queuecommand - main entry point for SCSI requests
1308 * @cmd: command from SCSI Midlayer
1309 * @done: call back function
1311 * Returns 0 for success, non-zero in case of failure
1313 static int ufshcd_queuecommand(struct Scsi_Host
*host
, struct scsi_cmnd
*cmd
)
1315 struct ufshcd_lrb
*lrbp
;
1316 struct ufs_hba
*hba
;
1317 unsigned long flags
;
1321 hba
= shost_priv(host
);
1323 tag
= cmd
->request
->tag
;
1325 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1326 switch (hba
->ufshcd_state
) {
1327 case UFSHCD_STATE_OPERATIONAL
:
1329 case UFSHCD_STATE_RESET
:
1330 err
= SCSI_MLQUEUE_HOST_BUSY
;
1332 case UFSHCD_STATE_ERROR
:
1333 set_host_byte(cmd
, DID_ERROR
);
1334 cmd
->scsi_done(cmd
);
1337 dev_WARN_ONCE(hba
->dev
, 1, "%s: invalid state %d\n",
1338 __func__
, hba
->ufshcd_state
);
1339 set_host_byte(cmd
, DID_BAD_TARGET
);
1340 cmd
->scsi_done(cmd
);
1343 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1345 /* acquire the tag to make sure device cmds don't use it */
1346 if (test_and_set_bit_lock(tag
, &hba
->lrb_in_use
)) {
1348 * Dev manage command in progress, requeue the command.
1349 * Requeuing the command helps in cases where the request *may*
1350 * find different tag instead of waiting for dev manage command
1353 err
= SCSI_MLQUEUE_HOST_BUSY
;
1357 err
= ufshcd_hold(hba
, true);
1359 err
= SCSI_MLQUEUE_HOST_BUSY
;
1360 clear_bit_unlock(tag
, &hba
->lrb_in_use
);
1363 WARN_ON(hba
->clk_gating
.state
!= CLKS_ON
);
1365 lrbp
= &hba
->lrb
[tag
];
1369 lrbp
->sense_bufflen
= SCSI_SENSE_BUFFERSIZE
;
1370 lrbp
->sense_buffer
= cmd
->sense_buffer
;
1371 lrbp
->task_tag
= tag
;
1372 lrbp
->lun
= ufshcd_scsi_to_upiu_lun(cmd
->device
->lun
);
1373 lrbp
->intr_cmd
= !ufshcd_is_intr_aggr_allowed(hba
) ? true : false;
1374 lrbp
->command_type
= UTP_CMD_TYPE_SCSI
;
1376 /* form UPIU before issuing the command */
1377 ufshcd_compose_upiu(hba
, lrbp
);
1378 err
= ufshcd_map_sg(lrbp
);
1380 ufshcd_release(hba
);
1382 clear_bit_unlock(tag
, &hba
->lrb_in_use
);
1386 /* issue command to the controller */
1387 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1388 ufshcd_send_command(hba
, tag
);
1390 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1395 static int ufshcd_compose_dev_cmd(struct ufs_hba
*hba
,
1396 struct ufshcd_lrb
*lrbp
, enum dev_cmd_type cmd_type
, int tag
)
1399 lrbp
->sense_bufflen
= 0;
1400 lrbp
->sense_buffer
= NULL
;
1401 lrbp
->task_tag
= tag
;
1402 lrbp
->lun
= 0; /* device management cmd is not specific to any LUN */
1403 lrbp
->command_type
= UTP_CMD_TYPE_DEV_MANAGE
;
1404 lrbp
->intr_cmd
= true; /* No interrupt aggregation */
1405 hba
->dev_cmd
.type
= cmd_type
;
1407 return ufshcd_compose_upiu(hba
, lrbp
);
1411 ufshcd_clear_cmd(struct ufs_hba
*hba
, int tag
)
1414 unsigned long flags
;
1415 u32 mask
= 1 << tag
;
1417 /* clear outstanding transaction before retry */
1418 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1419 ufshcd_utrl_clear(hba
, tag
);
1420 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1423 * wait for for h/w to clear corresponding bit in door-bell.
1424 * max. wait is 1 sec.
1426 err
= ufshcd_wait_for_register(hba
,
1427 REG_UTP_TRANSFER_REQ_DOOR_BELL
,
1428 mask
, ~mask
, 1000, 1000);
1434 ufshcd_check_query_response(struct ufs_hba
*hba
, struct ufshcd_lrb
*lrbp
)
1436 struct ufs_query_res
*query_res
= &hba
->dev_cmd
.query
.response
;
1438 /* Get the UPIU response */
1439 query_res
->response
= ufshcd_get_rsp_upiu_result(lrbp
->ucd_rsp_ptr
) >>
1440 UPIU_RSP_CODE_OFFSET
;
1441 return query_res
->response
;
1445 * ufshcd_dev_cmd_completion() - handles device management command responses
1446 * @hba: per adapter instance
1447 * @lrbp: pointer to local reference block
1450 ufshcd_dev_cmd_completion(struct ufs_hba
*hba
, struct ufshcd_lrb
*lrbp
)
1455 resp
= ufshcd_get_req_rsp(lrbp
->ucd_rsp_ptr
);
1458 case UPIU_TRANSACTION_NOP_IN
:
1459 if (hba
->dev_cmd
.type
!= DEV_CMD_TYPE_NOP
) {
1461 dev_err(hba
->dev
, "%s: unexpected response %x\n",
1465 case UPIU_TRANSACTION_QUERY_RSP
:
1466 err
= ufshcd_check_query_response(hba
, lrbp
);
1468 err
= ufshcd_copy_query_response(hba
, lrbp
);
1470 case UPIU_TRANSACTION_REJECT_UPIU
:
1471 /* TODO: handle Reject UPIU Response */
1473 dev_err(hba
->dev
, "%s: Reject UPIU not fully implemented\n",
1478 dev_err(hba
->dev
, "%s: Invalid device management cmd response: %x\n",
1486 static int ufshcd_wait_for_dev_cmd(struct ufs_hba
*hba
,
1487 struct ufshcd_lrb
*lrbp
, int max_timeout
)
1490 unsigned long time_left
;
1491 unsigned long flags
;
1493 time_left
= wait_for_completion_timeout(hba
->dev_cmd
.complete
,
1494 msecs_to_jiffies(max_timeout
));
1496 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1497 hba
->dev_cmd
.complete
= NULL
;
1498 if (likely(time_left
)) {
1499 err
= ufshcd_get_tr_ocs(lrbp
);
1501 err
= ufshcd_dev_cmd_completion(hba
, lrbp
);
1503 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1507 if (!ufshcd_clear_cmd(hba
, lrbp
->task_tag
))
1508 /* sucessfully cleared the command, retry if needed */
1516 * ufshcd_get_dev_cmd_tag - Get device management command tag
1517 * @hba: per-adapter instance
1518 * @tag: pointer to variable with available slot value
1520 * Get a free slot and lock it until device management command
1523 * Returns false if free slot is unavailable for locking, else
1524 * return true with tag value in @tag.
1526 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba
*hba
, int *tag_out
)
1536 tmp
= ~hba
->lrb_in_use
;
1537 tag
= find_last_bit(&tmp
, hba
->nutrs
);
1538 if (tag
>= hba
->nutrs
)
1540 } while (test_and_set_bit_lock(tag
, &hba
->lrb_in_use
));
1548 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba
*hba
, int tag
)
1550 clear_bit_unlock(tag
, &hba
->lrb_in_use
);
1554 * ufshcd_exec_dev_cmd - API for sending device management requests
1556 * @cmd_type - specifies the type (NOP, Query...)
1557 * @timeout - time in seconds
1559 * NOTE: Since there is only one available tag for device management commands,
1560 * it is expected you hold the hba->dev_cmd.lock mutex.
1562 static int ufshcd_exec_dev_cmd(struct ufs_hba
*hba
,
1563 enum dev_cmd_type cmd_type
, int timeout
)
1565 struct ufshcd_lrb
*lrbp
;
1568 struct completion wait
;
1569 unsigned long flags
;
1572 * Get free slot, sleep if slots are unavailable.
1573 * Even though we use wait_event() which sleeps indefinitely,
1574 * the maximum wait time is bounded by SCSI request timeout.
1576 wait_event(hba
->dev_cmd
.tag_wq
, ufshcd_get_dev_cmd_tag(hba
, &tag
));
1578 init_completion(&wait
);
1579 lrbp
= &hba
->lrb
[tag
];
1581 err
= ufshcd_compose_dev_cmd(hba
, lrbp
, cmd_type
, tag
);
1585 hba
->dev_cmd
.complete
= &wait
;
1587 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1588 ufshcd_send_command(hba
, tag
);
1589 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1591 err
= ufshcd_wait_for_dev_cmd(hba
, lrbp
, timeout
);
1594 ufshcd_put_dev_cmd_tag(hba
, tag
);
1595 wake_up(&hba
->dev_cmd
.tag_wq
);
1600 * ufshcd_init_query() - init the query response and request parameters
1601 * @hba: per-adapter instance
1602 * @request: address of the request pointer to be initialized
1603 * @response: address of the response pointer to be initialized
1604 * @opcode: operation to perform
1605 * @idn: flag idn to access
1606 * @index: LU number to access
1607 * @selector: query/flag/descriptor further identification
1609 static inline void ufshcd_init_query(struct ufs_hba
*hba
,
1610 struct ufs_query_req
**request
, struct ufs_query_res
**response
,
1611 enum query_opcode opcode
, u8 idn
, u8 index
, u8 selector
)
1613 *request
= &hba
->dev_cmd
.query
.request
;
1614 *response
= &hba
->dev_cmd
.query
.response
;
1615 memset(*request
, 0, sizeof(struct ufs_query_req
));
1616 memset(*response
, 0, sizeof(struct ufs_query_res
));
1617 (*request
)->upiu_req
.opcode
= opcode
;
1618 (*request
)->upiu_req
.idn
= idn
;
1619 (*request
)->upiu_req
.index
= index
;
1620 (*request
)->upiu_req
.selector
= selector
;
1624 * ufshcd_query_flag() - API function for sending flag query requests
1625 * hba: per-adapter instance
1626 * query_opcode: flag query to perform
1627 * idn: flag idn to access
1628 * flag_res: the flag value after the query request completes
1630 * Returns 0 for success, non-zero in case of failure
1632 static int ufshcd_query_flag(struct ufs_hba
*hba
, enum query_opcode opcode
,
1633 enum flag_idn idn
, bool *flag_res
)
1635 struct ufs_query_req
*request
= NULL
;
1636 struct ufs_query_res
*response
= NULL
;
1637 int err
, index
= 0, selector
= 0;
1641 ufshcd_hold(hba
, false);
1642 mutex_lock(&hba
->dev_cmd
.lock
);
1643 ufshcd_init_query(hba
, &request
, &response
, opcode
, idn
, index
,
1647 case UPIU_QUERY_OPCODE_SET_FLAG
:
1648 case UPIU_QUERY_OPCODE_CLEAR_FLAG
:
1649 case UPIU_QUERY_OPCODE_TOGGLE_FLAG
:
1650 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST
;
1652 case UPIU_QUERY_OPCODE_READ_FLAG
:
1653 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_READ_REQUEST
;
1655 /* No dummy reads */
1656 dev_err(hba
->dev
, "%s: Invalid argument for read request\n",
1664 "%s: Expected query flag opcode but got = %d\n",
1670 err
= ufshcd_exec_dev_cmd(hba
, DEV_CMD_TYPE_QUERY
, QUERY_REQ_TIMEOUT
);
1674 "%s: Sending flag query for idn %d failed, err = %d\n",
1675 __func__
, idn
, err
);
1680 *flag_res
= (be32_to_cpu(response
->upiu_res
.value
) &
1681 MASK_QUERY_UPIU_FLAG_LOC
) & 0x1;
1684 mutex_unlock(&hba
->dev_cmd
.lock
);
1685 ufshcd_release(hba
);
1690 * ufshcd_query_attr - API function for sending attribute requests
1691 * hba: per-adapter instance
1692 * opcode: attribute opcode
1693 * idn: attribute idn to access
1694 * index: index field
1695 * selector: selector field
1696 * attr_val: the attribute value after the query request completes
1698 * Returns 0 for success, non-zero in case of failure
1700 static int ufshcd_query_attr(struct ufs_hba
*hba
, enum query_opcode opcode
,
1701 enum attr_idn idn
, u8 index
, u8 selector
, u32
*attr_val
)
1703 struct ufs_query_req
*request
= NULL
;
1704 struct ufs_query_res
*response
= NULL
;
1709 ufshcd_hold(hba
, false);
1711 dev_err(hba
->dev
, "%s: attribute value required for opcode 0x%x\n",
1717 mutex_lock(&hba
->dev_cmd
.lock
);
1718 ufshcd_init_query(hba
, &request
, &response
, opcode
, idn
, index
,
1722 case UPIU_QUERY_OPCODE_WRITE_ATTR
:
1723 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST
;
1724 request
->upiu_req
.value
= cpu_to_be32(*attr_val
);
1726 case UPIU_QUERY_OPCODE_READ_ATTR
:
1727 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_READ_REQUEST
;
1730 dev_err(hba
->dev
, "%s: Expected query attr opcode but got = 0x%.2x\n",
1736 err
= ufshcd_exec_dev_cmd(hba
, DEV_CMD_TYPE_QUERY
, QUERY_REQ_TIMEOUT
);
1739 dev_err(hba
->dev
, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1740 __func__
, opcode
, idn
, err
);
1744 *attr_val
= be32_to_cpu(response
->upiu_res
.value
);
1747 mutex_unlock(&hba
->dev_cmd
.lock
);
1749 ufshcd_release(hba
);
1754 * ufshcd_query_descriptor - API function for sending descriptor requests
1755 * hba: per-adapter instance
1756 * opcode: attribute opcode
1757 * idn: attribute idn to access
1758 * index: index field
1759 * selector: selector field
1760 * desc_buf: the buffer that contains the descriptor
1761 * buf_len: length parameter passed to the device
1763 * Returns 0 for success, non-zero in case of failure.
1764 * The buf_len parameter will contain, on return, the length parameter
1765 * received on the response.
1767 static int ufshcd_query_descriptor(struct ufs_hba
*hba
,
1768 enum query_opcode opcode
, enum desc_idn idn
, u8 index
,
1769 u8 selector
, u8
*desc_buf
, int *buf_len
)
1771 struct ufs_query_req
*request
= NULL
;
1772 struct ufs_query_res
*response
= NULL
;
1777 ufshcd_hold(hba
, false);
1779 dev_err(hba
->dev
, "%s: descriptor buffer required for opcode 0x%x\n",
1785 if (*buf_len
<= QUERY_DESC_MIN_SIZE
|| *buf_len
> QUERY_DESC_MAX_SIZE
) {
1786 dev_err(hba
->dev
, "%s: descriptor buffer size (%d) is out of range\n",
1787 __func__
, *buf_len
);
1792 mutex_lock(&hba
->dev_cmd
.lock
);
1793 ufshcd_init_query(hba
, &request
, &response
, opcode
, idn
, index
,
1795 hba
->dev_cmd
.query
.descriptor
= desc_buf
;
1796 request
->upiu_req
.length
= cpu_to_be16(*buf_len
);
1799 case UPIU_QUERY_OPCODE_WRITE_DESC
:
1800 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST
;
1802 case UPIU_QUERY_OPCODE_READ_DESC
:
1803 request
->query_func
= UPIU_QUERY_FUNC_STANDARD_READ_REQUEST
;
1807 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
1813 err
= ufshcd_exec_dev_cmd(hba
, DEV_CMD_TYPE_QUERY
, QUERY_REQ_TIMEOUT
);
1816 dev_err(hba
->dev
, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1817 __func__
, opcode
, idn
, err
);
1821 *buf_len
= be16_to_cpu(response
->upiu_res
.length
);
1824 hba
->dev_cmd
.query
.descriptor
= NULL
;
1825 mutex_unlock(&hba
->dev_cmd
.lock
);
1827 ufshcd_release(hba
);
1832 * ufshcd_read_desc_param - read the specified descriptor parameter
1833 * @hba: Pointer to adapter instance
1834 * @desc_id: descriptor idn value
1835 * @desc_index: descriptor index
1836 * @param_offset: offset of the parameter to read
1837 * @param_read_buf: pointer to buffer where parameter would be read
1838 * @param_size: sizeof(param_read_buf)
1840 * Return 0 in case of success, non-zero otherwise
1842 static int ufshcd_read_desc_param(struct ufs_hba
*hba
,
1843 enum desc_idn desc_id
,
1852 bool is_kmalloc
= true;
1855 if (desc_id
>= QUERY_DESC_IDN_MAX
)
1858 buff_len
= ufs_query_desc_max_size
[desc_id
];
1859 if ((param_offset
+ param_size
) > buff_len
)
1862 if (!param_offset
&& (param_size
== buff_len
)) {
1863 /* memory space already available to hold full descriptor */
1864 desc_buf
= param_read_buf
;
1867 /* allocate memory to hold full descriptor */
1868 desc_buf
= kmalloc(buff_len
, GFP_KERNEL
);
1873 ret
= ufshcd_query_descriptor(hba
, UPIU_QUERY_OPCODE_READ_DESC
,
1874 desc_id
, desc_index
, 0, desc_buf
,
1877 if (ret
|| (buff_len
< ufs_query_desc_max_size
[desc_id
]) ||
1878 (desc_buf
[QUERY_DESC_LENGTH_OFFSET
] !=
1879 ufs_query_desc_max_size
[desc_id
])
1880 || (desc_buf
[QUERY_DESC_DESC_TYPE_OFFSET
] != desc_id
)) {
1881 dev_err(hba
->dev
, "%s: Failed reading descriptor. desc_id %d param_offset %d buff_len %d ret %d",
1882 __func__
, desc_id
, param_offset
, buff_len
, ret
);
1890 memcpy(param_read_buf
, &desc_buf
[param_offset
], param_size
);
1897 static inline int ufshcd_read_desc(struct ufs_hba
*hba
,
1898 enum desc_idn desc_id
,
1903 return ufshcd_read_desc_param(hba
, desc_id
, desc_index
, 0, buf
, size
);
1906 static inline int ufshcd_read_power_desc(struct ufs_hba
*hba
,
1910 return ufshcd_read_desc(hba
, QUERY_DESC_IDN_POWER
, 0, buf
, size
);
1914 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
1915 * @hba: Pointer to adapter instance
1917 * @param_offset: offset of the parameter to read
1918 * @param_read_buf: pointer to buffer where parameter would be read
1919 * @param_size: sizeof(param_read_buf)
1921 * Return 0 in case of success, non-zero otherwise
1923 static inline int ufshcd_read_unit_desc_param(struct ufs_hba
*hba
,
1925 enum unit_desc_param param_offset
,
1930 * Unit descriptors are only available for general purpose LUs (LUN id
1931 * from 0 to 7) and RPMB Well known LU.
1933 if (lun
!= UFS_UPIU_RPMB_WLUN
&& (lun
>= UFS_UPIU_MAX_GENERAL_LUN
))
1936 return ufshcd_read_desc_param(hba
, QUERY_DESC_IDN_UNIT
, lun
,
1937 param_offset
, param_read_buf
, param_size
);
1941 * ufshcd_memory_alloc - allocate memory for host memory space data structures
1942 * @hba: per adapter instance
1944 * 1. Allocate DMA memory for Command Descriptor array
1945 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
1946 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
1947 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
1949 * 4. Allocate memory for local reference block(lrb).
1951 * Returns 0 for success, non-zero in case of failure
1953 static int ufshcd_memory_alloc(struct ufs_hba
*hba
)
1955 size_t utmrdl_size
, utrdl_size
, ucdl_size
;
1957 /* Allocate memory for UTP command descriptors */
1958 ucdl_size
= (sizeof(struct utp_transfer_cmd_desc
) * hba
->nutrs
);
1959 hba
->ucdl_base_addr
= dmam_alloc_coherent(hba
->dev
,
1961 &hba
->ucdl_dma_addr
,
1965 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
1966 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
1967 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
1968 * be aligned to 128 bytes as well
1970 if (!hba
->ucdl_base_addr
||
1971 WARN_ON(hba
->ucdl_dma_addr
& (PAGE_SIZE
- 1))) {
1973 "Command Descriptor Memory allocation failed\n");
1978 * Allocate memory for UTP Transfer descriptors
1979 * UFSHCI requires 1024 byte alignment of UTRD
1981 utrdl_size
= (sizeof(struct utp_transfer_req_desc
) * hba
->nutrs
);
1982 hba
->utrdl_base_addr
= dmam_alloc_coherent(hba
->dev
,
1984 &hba
->utrdl_dma_addr
,
1986 if (!hba
->utrdl_base_addr
||
1987 WARN_ON(hba
->utrdl_dma_addr
& (PAGE_SIZE
- 1))) {
1989 "Transfer Descriptor Memory allocation failed\n");
1994 * Allocate memory for UTP Task Management descriptors
1995 * UFSHCI requires 1024 byte alignment of UTMRD
1997 utmrdl_size
= sizeof(struct utp_task_req_desc
) * hba
->nutmrs
;
1998 hba
->utmrdl_base_addr
= dmam_alloc_coherent(hba
->dev
,
2000 &hba
->utmrdl_dma_addr
,
2002 if (!hba
->utmrdl_base_addr
||
2003 WARN_ON(hba
->utmrdl_dma_addr
& (PAGE_SIZE
- 1))) {
2005 "Task Management Descriptor Memory allocation failed\n");
2009 /* Allocate memory for local reference block */
2010 hba
->lrb
= devm_kzalloc(hba
->dev
,
2011 hba
->nutrs
* sizeof(struct ufshcd_lrb
),
2014 dev_err(hba
->dev
, "LRB Memory allocation failed\n");
2023 * ufshcd_host_memory_configure - configure local reference block with
2025 * @hba: per adapter instance
2027 * Configure Host memory space
2028 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
2030 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
2032 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
2033 * into local reference block.
2035 static void ufshcd_host_memory_configure(struct ufs_hba
*hba
)
2037 struct utp_transfer_cmd_desc
*cmd_descp
;
2038 struct utp_transfer_req_desc
*utrdlp
;
2039 dma_addr_t cmd_desc_dma_addr
;
2040 dma_addr_t cmd_desc_element_addr
;
2041 u16 response_offset
;
2046 utrdlp
= hba
->utrdl_base_addr
;
2047 cmd_descp
= hba
->ucdl_base_addr
;
2050 offsetof(struct utp_transfer_cmd_desc
, response_upiu
);
2052 offsetof(struct utp_transfer_cmd_desc
, prd_table
);
2054 cmd_desc_size
= sizeof(struct utp_transfer_cmd_desc
);
2055 cmd_desc_dma_addr
= hba
->ucdl_dma_addr
;
2057 for (i
= 0; i
< hba
->nutrs
; i
++) {
2058 /* Configure UTRD with command descriptor base address */
2059 cmd_desc_element_addr
=
2060 (cmd_desc_dma_addr
+ (cmd_desc_size
* i
));
2061 utrdlp
[i
].command_desc_base_addr_lo
=
2062 cpu_to_le32(lower_32_bits(cmd_desc_element_addr
));
2063 utrdlp
[i
].command_desc_base_addr_hi
=
2064 cpu_to_le32(upper_32_bits(cmd_desc_element_addr
));
2066 /* Response upiu and prdt offset should be in double words */
2067 utrdlp
[i
].response_upiu_offset
=
2068 cpu_to_le16((response_offset
>> 2));
2069 utrdlp
[i
].prd_table_offset
=
2070 cpu_to_le16((prdt_offset
>> 2));
2071 utrdlp
[i
].response_upiu_length
=
2072 cpu_to_le16(ALIGNED_UPIU_SIZE
>> 2);
2074 hba
->lrb
[i
].utr_descriptor_ptr
= (utrdlp
+ i
);
2075 hba
->lrb
[i
].ucd_req_ptr
=
2076 (struct utp_upiu_req
*)(cmd_descp
+ i
);
2077 hba
->lrb
[i
].ucd_rsp_ptr
=
2078 (struct utp_upiu_rsp
*)cmd_descp
[i
].response_upiu
;
2079 hba
->lrb
[i
].ucd_prdt_ptr
=
2080 (struct ufshcd_sg_entry
*)cmd_descp
[i
].prd_table
;
2085 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
2086 * @hba: per adapter instance
2088 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
2089 * in order to initialize the Unipro link startup procedure.
2090 * Once the Unipro links are up, the device connected to the controller
2093 * Returns 0 on success, non-zero value on failure
2095 static int ufshcd_dme_link_startup(struct ufs_hba
*hba
)
2097 struct uic_command uic_cmd
= {0};
2100 uic_cmd
.command
= UIC_CMD_DME_LINK_STARTUP
;
2102 ret
= ufshcd_send_uic_cmd(hba
, &uic_cmd
);
2105 "dme-link-startup: error code %d\n", ret
);
2109 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba
*hba
)
2111 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
2112 unsigned long min_sleep_time_us
;
2114 if (!(hba
->quirks
& UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS
))
2118 * last_dme_cmd_tstamp will be 0 only for 1st call to
2121 if (unlikely(!ktime_to_us(hba
->last_dme_cmd_tstamp
))) {
2122 min_sleep_time_us
= MIN_DELAY_BEFORE_DME_CMDS_US
;
2124 unsigned long delta
=
2125 (unsigned long) ktime_to_us(
2126 ktime_sub(ktime_get(),
2127 hba
->last_dme_cmd_tstamp
));
2129 if (delta
< MIN_DELAY_BEFORE_DME_CMDS_US
)
2131 MIN_DELAY_BEFORE_DME_CMDS_US
- delta
;
2133 return; /* no more delay required */
2136 /* allow sleep for extra 50us if needed */
2137 usleep_range(min_sleep_time_us
, min_sleep_time_us
+ 50);
2141 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
2142 * @hba: per adapter instance
2143 * @attr_sel: uic command argument1
2144 * @attr_set: attribute set type as uic command argument2
2145 * @mib_val: setting value as uic command argument3
2146 * @peer: indicate whether peer or local
2148 * Returns 0 on success, non-zero value on failure
2150 int ufshcd_dme_set_attr(struct ufs_hba
*hba
, u32 attr_sel
,
2151 u8 attr_set
, u32 mib_val
, u8 peer
)
2153 struct uic_command uic_cmd
= {0};
2154 static const char *const action
[] = {
2158 const char *set
= action
[!!peer
];
2161 uic_cmd
.command
= peer
?
2162 UIC_CMD_DME_PEER_SET
: UIC_CMD_DME_SET
;
2163 uic_cmd
.argument1
= attr_sel
;
2164 uic_cmd
.argument2
= UIC_ARG_ATTR_TYPE(attr_set
);
2165 uic_cmd
.argument3
= mib_val
;
2167 ret
= ufshcd_send_uic_cmd(hba
, &uic_cmd
);
2169 dev_err(hba
->dev
, "%s: attr-id 0x%x val 0x%x error code %d\n",
2170 set
, UIC_GET_ATTR_ID(attr_sel
), mib_val
, ret
);
2174 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr
);
2177 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
2178 * @hba: per adapter instance
2179 * @attr_sel: uic command argument1
2180 * @mib_val: the value of the attribute as returned by the UIC command
2181 * @peer: indicate whether peer or local
2183 * Returns 0 on success, non-zero value on failure
2185 int ufshcd_dme_get_attr(struct ufs_hba
*hba
, u32 attr_sel
,
2186 u32
*mib_val
, u8 peer
)
2188 struct uic_command uic_cmd
= {0};
2189 static const char *const action
[] = {
2193 const char *get
= action
[!!peer
];
2195 struct ufs_pa_layer_attr orig_pwr_info
;
2196 struct ufs_pa_layer_attr temp_pwr_info
;
2197 bool pwr_mode_change
= false;
2199 if (peer
&& (hba
->quirks
& UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE
)) {
2200 orig_pwr_info
= hba
->pwr_info
;
2201 temp_pwr_info
= orig_pwr_info
;
2203 if (orig_pwr_info
.pwr_tx
== FAST_MODE
||
2204 orig_pwr_info
.pwr_rx
== FAST_MODE
) {
2205 temp_pwr_info
.pwr_tx
= FASTAUTO_MODE
;
2206 temp_pwr_info
.pwr_rx
= FASTAUTO_MODE
;
2207 pwr_mode_change
= true;
2208 } else if (orig_pwr_info
.pwr_tx
== SLOW_MODE
||
2209 orig_pwr_info
.pwr_rx
== SLOW_MODE
) {
2210 temp_pwr_info
.pwr_tx
= SLOWAUTO_MODE
;
2211 temp_pwr_info
.pwr_rx
= SLOWAUTO_MODE
;
2212 pwr_mode_change
= true;
2214 if (pwr_mode_change
) {
2215 ret
= ufshcd_change_power_mode(hba
, &temp_pwr_info
);
2221 uic_cmd
.command
= peer
?
2222 UIC_CMD_DME_PEER_GET
: UIC_CMD_DME_GET
;
2223 uic_cmd
.argument1
= attr_sel
;
2225 ret
= ufshcd_send_uic_cmd(hba
, &uic_cmd
);
2227 dev_err(hba
->dev
, "%s: attr-id 0x%x error code %d\n",
2228 get
, UIC_GET_ATTR_ID(attr_sel
), ret
);
2233 *mib_val
= uic_cmd
.argument3
;
2235 if (peer
&& (hba
->quirks
& UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE
)
2237 ufshcd_change_power_mode(hba
, &orig_pwr_info
);
2241 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr
);
2244 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
2245 * state) and waits for it to take effect.
2247 * @hba: per adapter instance
2248 * @cmd: UIC command to execute
2250 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
2251 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
2252 * and device UniPro link and hence it's final completion would be indicated by
2253 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
2254 * addition to normal UIC command completion Status (UCCS). This function only
2255 * returns after the relevant status bits indicate the completion.
2257 * Returns 0 on success, non-zero value on failure
2259 static int ufshcd_uic_pwr_ctrl(struct ufs_hba
*hba
, struct uic_command
*cmd
)
2261 struct completion uic_async_done
;
2262 unsigned long flags
;
2266 mutex_lock(&hba
->uic_cmd_mutex
);
2267 init_completion(&uic_async_done
);
2268 ufshcd_add_delay_before_dme_cmd(hba
);
2270 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
2271 hba
->uic_async_done
= &uic_async_done
;
2272 ret
= __ufshcd_send_uic_cmd(hba
, cmd
);
2273 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
2276 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2277 cmd
->command
, cmd
->argument3
, ret
);
2280 ret
= ufshcd_wait_for_uic_cmd(hba
, cmd
);
2283 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2284 cmd
->command
, cmd
->argument3
, ret
);
2288 if (!wait_for_completion_timeout(hba
->uic_async_done
,
2289 msecs_to_jiffies(UIC_CMD_TIMEOUT
))) {
2291 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
2292 cmd
->command
, cmd
->argument3
);
2297 status
= ufshcd_get_upmcrs(hba
);
2298 if (status
!= PWR_LOCAL
) {
2300 "pwr ctrl cmd 0x%0x failed, host umpcrs:0x%x\n",
2301 cmd
->command
, status
);
2302 ret
= (status
!= PWR_OK
) ? status
: -1;
2305 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
2306 hba
->uic_async_done
= NULL
;
2307 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
2308 mutex_unlock(&hba
->uic_cmd_mutex
);
2314 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
2315 * using DME_SET primitives.
2316 * @hba: per adapter instance
2317 * @mode: powr mode value
2319 * Returns 0 on success, non-zero value on failure
2321 static int ufshcd_uic_change_pwr_mode(struct ufs_hba
*hba
, u8 mode
)
2323 struct uic_command uic_cmd
= {0};
2326 if (hba
->quirks
& UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP
) {
2327 ret
= ufshcd_dme_set(hba
,
2328 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP
, 0), 1);
2330 dev_err(hba
->dev
, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
2336 uic_cmd
.command
= UIC_CMD_DME_SET
;
2337 uic_cmd
.argument1
= UIC_ARG_MIB(PA_PWRMODE
);
2338 uic_cmd
.argument3
= mode
;
2339 ufshcd_hold(hba
, false);
2340 ret
= ufshcd_uic_pwr_ctrl(hba
, &uic_cmd
);
2341 ufshcd_release(hba
);
2347 static int ufshcd_uic_hibern8_enter(struct ufs_hba
*hba
)
2349 struct uic_command uic_cmd
= {0};
2351 uic_cmd
.command
= UIC_CMD_DME_HIBER_ENTER
;
2353 return ufshcd_uic_pwr_ctrl(hba
, &uic_cmd
);
2356 static int ufshcd_uic_hibern8_exit(struct ufs_hba
*hba
)
2358 struct uic_command uic_cmd
= {0};
2361 uic_cmd
.command
= UIC_CMD_DME_HIBER_EXIT
;
2362 ret
= ufshcd_uic_pwr_ctrl(hba
, &uic_cmd
);
2364 ufshcd_set_link_off(hba
);
2365 ret
= ufshcd_host_reset_and_restore(hba
);
2372 * ufshcd_init_pwr_info - setting the POR (power on reset)
2373 * values in hba power info
2374 * @hba: per-adapter instance
2376 static void ufshcd_init_pwr_info(struct ufs_hba
*hba
)
2378 hba
->pwr_info
.gear_rx
= UFS_PWM_G1
;
2379 hba
->pwr_info
.gear_tx
= UFS_PWM_G1
;
2380 hba
->pwr_info
.lane_rx
= 1;
2381 hba
->pwr_info
.lane_tx
= 1;
2382 hba
->pwr_info
.pwr_rx
= SLOWAUTO_MODE
;
2383 hba
->pwr_info
.pwr_tx
= SLOWAUTO_MODE
;
2384 hba
->pwr_info
.hs_rate
= 0;
2388 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
2389 * @hba: per-adapter instance
2391 static int ufshcd_get_max_pwr_mode(struct ufs_hba
*hba
)
2393 struct ufs_pa_layer_attr
*pwr_info
= &hba
->max_pwr_info
.info
;
2395 if (hba
->max_pwr_info
.is_valid
)
2398 pwr_info
->pwr_tx
= FASTAUTO_MODE
;
2399 pwr_info
->pwr_rx
= FASTAUTO_MODE
;
2400 pwr_info
->hs_rate
= PA_HS_MODE_B
;
2402 /* Get the connected lane count */
2403 ufshcd_dme_get(hba
, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES
),
2404 &pwr_info
->lane_rx
);
2405 ufshcd_dme_get(hba
, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES
),
2406 &pwr_info
->lane_tx
);
2408 if (!pwr_info
->lane_rx
|| !pwr_info
->lane_tx
) {
2409 dev_err(hba
->dev
, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
2417 * First, get the maximum gears of HS speed.
2418 * If a zero value, it means there is no HSGEAR capability.
2419 * Then, get the maximum gears of PWM speed.
2421 ufshcd_dme_get(hba
, UIC_ARG_MIB(PA_MAXRXHSGEAR
), &pwr_info
->gear_rx
);
2422 if (!pwr_info
->gear_rx
) {
2423 ufshcd_dme_get(hba
, UIC_ARG_MIB(PA_MAXRXPWMGEAR
),
2424 &pwr_info
->gear_rx
);
2425 if (!pwr_info
->gear_rx
) {
2426 dev_err(hba
->dev
, "%s: invalid max pwm rx gear read = %d\n",
2427 __func__
, pwr_info
->gear_rx
);
2430 pwr_info
->pwr_rx
= SLOWAUTO_MODE
;
2433 ufshcd_dme_peer_get(hba
, UIC_ARG_MIB(PA_MAXRXHSGEAR
),
2434 &pwr_info
->gear_tx
);
2435 if (!pwr_info
->gear_tx
) {
2436 ufshcd_dme_peer_get(hba
, UIC_ARG_MIB(PA_MAXRXPWMGEAR
),
2437 &pwr_info
->gear_tx
);
2438 if (!pwr_info
->gear_tx
) {
2439 dev_err(hba
->dev
, "%s: invalid max pwm tx gear read = %d\n",
2440 __func__
, pwr_info
->gear_tx
);
2443 pwr_info
->pwr_tx
= SLOWAUTO_MODE
;
2446 hba
->max_pwr_info
.is_valid
= true;
2450 static int ufshcd_change_power_mode(struct ufs_hba
*hba
,
2451 struct ufs_pa_layer_attr
*pwr_mode
)
2455 /* if already configured to the requested pwr_mode */
2456 if (pwr_mode
->gear_rx
== hba
->pwr_info
.gear_rx
&&
2457 pwr_mode
->gear_tx
== hba
->pwr_info
.gear_tx
&&
2458 pwr_mode
->lane_rx
== hba
->pwr_info
.lane_rx
&&
2459 pwr_mode
->lane_tx
== hba
->pwr_info
.lane_tx
&&
2460 pwr_mode
->pwr_rx
== hba
->pwr_info
.pwr_rx
&&
2461 pwr_mode
->pwr_tx
== hba
->pwr_info
.pwr_tx
&&
2462 pwr_mode
->hs_rate
== hba
->pwr_info
.hs_rate
) {
2463 dev_dbg(hba
->dev
, "%s: power already configured\n", __func__
);
2468 * Configure attributes for power mode change with below.
2469 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
2470 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
2473 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_RXGEAR
), pwr_mode
->gear_rx
);
2474 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_ACTIVERXDATALANES
),
2476 if (pwr_mode
->pwr_rx
== FASTAUTO_MODE
||
2477 pwr_mode
->pwr_rx
== FAST_MODE
)
2478 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_RXTERMINATION
), TRUE
);
2480 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_RXTERMINATION
), FALSE
);
2482 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_TXGEAR
), pwr_mode
->gear_tx
);
2483 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_ACTIVETXDATALANES
),
2485 if (pwr_mode
->pwr_tx
== FASTAUTO_MODE
||
2486 pwr_mode
->pwr_tx
== FAST_MODE
)
2487 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_TXTERMINATION
), TRUE
);
2489 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_TXTERMINATION
), FALSE
);
2491 if (pwr_mode
->pwr_rx
== FASTAUTO_MODE
||
2492 pwr_mode
->pwr_tx
== FASTAUTO_MODE
||
2493 pwr_mode
->pwr_rx
== FAST_MODE
||
2494 pwr_mode
->pwr_tx
== FAST_MODE
)
2495 ufshcd_dme_set(hba
, UIC_ARG_MIB(PA_HSSERIES
),
2498 ret
= ufshcd_uic_change_pwr_mode(hba
, pwr_mode
->pwr_rx
<< 4
2499 | pwr_mode
->pwr_tx
);
2503 "%s: power mode change failed %d\n", __func__
, ret
);
2505 ufshcd_vops_pwr_change_notify(hba
, POST_CHANGE
, NULL
,
2508 memcpy(&hba
->pwr_info
, pwr_mode
,
2509 sizeof(struct ufs_pa_layer_attr
));
2516 * ufshcd_config_pwr_mode - configure a new power mode
2517 * @hba: per-adapter instance
2518 * @desired_pwr_mode: desired power configuration
2520 static int ufshcd_config_pwr_mode(struct ufs_hba
*hba
,
2521 struct ufs_pa_layer_attr
*desired_pwr_mode
)
2523 struct ufs_pa_layer_attr final_params
= { 0 };
2526 ret
= ufshcd_vops_pwr_change_notify(hba
, PRE_CHANGE
,
2527 desired_pwr_mode
, &final_params
);
2530 memcpy(&final_params
, desired_pwr_mode
, sizeof(final_params
));
2532 ret
= ufshcd_change_power_mode(hba
, &final_params
);
2538 * ufshcd_complete_dev_init() - checks device readiness
2539 * hba: per-adapter instance
2541 * Set fDeviceInit flag and poll until device toggles it.
2543 static int ufshcd_complete_dev_init(struct ufs_hba
*hba
)
2545 int i
, retries
, err
= 0;
2548 for (retries
= QUERY_REQ_RETRIES
; retries
> 0; retries
--) {
2549 /* Set the fDeviceInit flag */
2550 err
= ufshcd_query_flag(hba
, UPIU_QUERY_OPCODE_SET_FLAG
,
2551 QUERY_FLAG_IDN_FDEVICEINIT
, NULL
);
2552 if (!err
|| err
== -ETIMEDOUT
)
2554 dev_dbg(hba
->dev
, "%s: error %d retrying\n", __func__
, err
);
2558 "%s setting fDeviceInit flag failed with error %d\n",
2563 /* poll for max. 100 iterations for fDeviceInit flag to clear */
2564 for (i
= 0; i
< 100 && !err
&& flag_res
; i
++) {
2565 for (retries
= QUERY_REQ_RETRIES
; retries
> 0; retries
--) {
2566 err
= ufshcd_query_flag(hba
,
2567 UPIU_QUERY_OPCODE_READ_FLAG
,
2568 QUERY_FLAG_IDN_FDEVICEINIT
, &flag_res
);
2569 if (!err
|| err
== -ETIMEDOUT
)
2571 dev_dbg(hba
->dev
, "%s: error %d retrying\n", __func__
,
2577 "%s reading fDeviceInit flag failed with error %d\n",
2581 "%s fDeviceInit was not cleared by the device\n",
2589 * ufshcd_make_hba_operational - Make UFS controller operational
2590 * @hba: per adapter instance
2592 * To bring UFS host controller to operational state,
2593 * 1. Enable required interrupts
2594 * 2. Configure interrupt aggregation
2595 * 3. Program UTRL and UTMRL base addres
2596 * 4. Configure run-stop-registers
2598 * Returns 0 on success, non-zero value on failure
2600 static int ufshcd_make_hba_operational(struct ufs_hba
*hba
)
2605 /* Enable required interrupts */
2606 ufshcd_enable_intr(hba
, UFSHCD_ENABLE_INTRS
);
2608 /* Configure interrupt aggregation */
2609 if (ufshcd_is_intr_aggr_allowed(hba
))
2610 ufshcd_config_intr_aggr(hba
, hba
->nutrs
- 1, INT_AGGR_DEF_TO
);
2612 ufshcd_disable_intr_aggr(hba
);
2614 /* Configure UTRL and UTMRL base address registers */
2615 ufshcd_writel(hba
, lower_32_bits(hba
->utrdl_dma_addr
),
2616 REG_UTP_TRANSFER_REQ_LIST_BASE_L
);
2617 ufshcd_writel(hba
, upper_32_bits(hba
->utrdl_dma_addr
),
2618 REG_UTP_TRANSFER_REQ_LIST_BASE_H
);
2619 ufshcd_writel(hba
, lower_32_bits(hba
->utmrdl_dma_addr
),
2620 REG_UTP_TASK_REQ_LIST_BASE_L
);
2621 ufshcd_writel(hba
, upper_32_bits(hba
->utmrdl_dma_addr
),
2622 REG_UTP_TASK_REQ_LIST_BASE_H
);
2625 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
2626 * DEI, HEI bits must be 0
2628 reg
= ufshcd_readl(hba
, REG_CONTROLLER_STATUS
);
2629 if (!(ufshcd_get_lists_status(reg
))) {
2630 ufshcd_enable_run_stop_reg(hba
);
2633 "Host controller not ready to process requests");
2643 * ufshcd_hba_enable - initialize the controller
2644 * @hba: per adapter instance
2646 * The controller resets itself and controller firmware initialization
2647 * sequence kicks off. When controller is ready it will set
2648 * the Host Controller Enable bit to 1.
2650 * Returns 0 on success, non-zero value on failure
2652 static int ufshcd_hba_enable(struct ufs_hba
*hba
)
2657 * msleep of 1 and 5 used in this function might result in msleep(20),
2658 * but it was necessary to send the UFS FPGA to reset mode during
2659 * development and testing of this driver. msleep can be changed to
2660 * mdelay and retry count can be reduced based on the controller.
2662 if (!ufshcd_is_hba_active(hba
)) {
2664 /* change controller state to "reset state" */
2665 ufshcd_hba_stop(hba
);
2668 * This delay is based on the testing done with UFS host
2669 * controller FPGA. The delay can be changed based on the
2670 * host controller used.
2675 /* UniPro link is disabled at this point */
2676 ufshcd_set_link_off(hba
);
2678 ufshcd_vops_hce_enable_notify(hba
, PRE_CHANGE
);
2680 /* start controller initialization sequence */
2681 ufshcd_hba_start(hba
);
2684 * To initialize a UFS host controller HCE bit must be set to 1.
2685 * During initialization the HCE bit value changes from 1->0->1.
2686 * When the host controller completes initialization sequence
2687 * it sets the value of HCE bit to 1. The same HCE bit is read back
2688 * to check if the controller has completed initialization sequence.
2689 * So without this delay the value HCE = 1, set in the previous
2690 * instruction might be read back.
2691 * This delay can be changed based on the controller.
2695 /* wait for the host controller to complete initialization */
2697 while (ufshcd_is_hba_active(hba
)) {
2702 "Controller enable failed\n");
2708 /* enable UIC related interrupts */
2709 ufshcd_enable_intr(hba
, UFSHCD_UIC_MASK
);
2711 ufshcd_vops_hce_enable_notify(hba
, POST_CHANGE
);
2716 static int ufshcd_disable_tx_lcc(struct ufs_hba
*hba
, bool peer
)
2718 int tx_lanes
, i
, err
= 0;
2721 ufshcd_dme_get(hba
, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES
),
2724 ufshcd_dme_peer_get(hba
, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES
),
2726 for (i
= 0; i
< tx_lanes
; i
++) {
2728 err
= ufshcd_dme_set(hba
,
2729 UIC_ARG_MIB_SEL(TX_LCC_ENABLE
,
2730 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i
)),
2733 err
= ufshcd_dme_peer_set(hba
,
2734 UIC_ARG_MIB_SEL(TX_LCC_ENABLE
,
2735 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i
)),
2738 dev_err(hba
->dev
, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
2739 __func__
, peer
, i
, err
);
2747 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba
*hba
)
2749 return ufshcd_disable_tx_lcc(hba
, true);
2753 * ufshcd_link_startup - Initialize unipro link startup
2754 * @hba: per adapter instance
2756 * Returns 0 for success, non-zero in case of failure
2758 static int ufshcd_link_startup(struct ufs_hba
*hba
)
2761 int retries
= DME_LINKSTARTUP_RETRIES
;
2764 ufshcd_vops_link_startup_notify(hba
, PRE_CHANGE
);
2766 ret
= ufshcd_dme_link_startup(hba
);
2768 /* check if device is detected by inter-connect layer */
2769 if (!ret
&& !ufshcd_is_device_present(hba
)) {
2770 dev_err(hba
->dev
, "%s: Device not present\n", __func__
);
2776 * DME link lost indication is only received when link is up,
2777 * but we can't be sure if the link is up until link startup
2778 * succeeds. So reset the local Uni-Pro and try again.
2780 if (ret
&& ufshcd_hba_enable(hba
))
2782 } while (ret
&& retries
--);
2785 /* failed to get the link up... retire */
2788 if (hba
->quirks
& UFSHCD_QUIRK_BROKEN_LCC
) {
2789 ret
= ufshcd_disable_device_tx_lcc(hba
);
2794 /* Include any host controller configuration via UIC commands */
2795 ret
= ufshcd_vops_link_startup_notify(hba
, POST_CHANGE
);
2799 ret
= ufshcd_make_hba_operational(hba
);
2802 dev_err(hba
->dev
, "link startup failed %d\n", ret
);
2807 * ufshcd_verify_dev_init() - Verify device initialization
2808 * @hba: per-adapter instance
2810 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
2811 * device Transport Protocol (UTP) layer is ready after a reset.
2812 * If the UTP layer at the device side is not initialized, it may
2813 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
2814 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
2816 static int ufshcd_verify_dev_init(struct ufs_hba
*hba
)
2821 ufshcd_hold(hba
, false);
2822 mutex_lock(&hba
->dev_cmd
.lock
);
2823 for (retries
= NOP_OUT_RETRIES
; retries
> 0; retries
--) {
2824 err
= ufshcd_exec_dev_cmd(hba
, DEV_CMD_TYPE_NOP
,
2827 if (!err
|| err
== -ETIMEDOUT
)
2830 dev_dbg(hba
->dev
, "%s: error %d retrying\n", __func__
, err
);
2832 mutex_unlock(&hba
->dev_cmd
.lock
);
2833 ufshcd_release(hba
);
2836 dev_err(hba
->dev
, "%s: NOP OUT failed %d\n", __func__
, err
);
2841 * ufshcd_set_queue_depth - set lun queue depth
2842 * @sdev: pointer to SCSI device
2844 * Read bLUQueueDepth value and activate scsi tagged command
2845 * queueing. For WLUN, queue depth is set to 1. For best-effort
2846 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
2847 * value that host can queue.
2849 static void ufshcd_set_queue_depth(struct scsi_device
*sdev
)
2853 struct ufs_hba
*hba
;
2855 hba
= shost_priv(sdev
->host
);
2857 lun_qdepth
= hba
->nutrs
;
2858 ret
= ufshcd_read_unit_desc_param(hba
,
2859 ufshcd_scsi_to_upiu_lun(sdev
->lun
),
2860 UNIT_DESC_PARAM_LU_Q_DEPTH
,
2862 sizeof(lun_qdepth
));
2864 /* Some WLUN doesn't support unit descriptor */
2865 if (ret
== -EOPNOTSUPP
)
2867 else if (!lun_qdepth
)
2868 /* eventually, we can figure out the real queue depth */
2869 lun_qdepth
= hba
->nutrs
;
2871 lun_qdepth
= min_t(int, lun_qdepth
, hba
->nutrs
);
2873 dev_dbg(hba
->dev
, "%s: activate tcq with queue depth %d\n",
2874 __func__
, lun_qdepth
);
2875 scsi_change_queue_depth(sdev
, lun_qdepth
);
2879 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
2880 * @hba: per-adapter instance
2881 * @lun: UFS device lun id
2882 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
2884 * Returns 0 in case of success and b_lu_write_protect status would be returned
2885 * @b_lu_write_protect parameter.
2886 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
2887 * Returns -EINVAL in case of invalid parameters passed to this function.
2889 static int ufshcd_get_lu_wp(struct ufs_hba
*hba
,
2891 u8
*b_lu_write_protect
)
2895 if (!b_lu_write_protect
)
2898 * According to UFS device spec, RPMB LU can't be write
2899 * protected so skip reading bLUWriteProtect parameter for
2900 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
2902 else if (lun
>= UFS_UPIU_MAX_GENERAL_LUN
)
2905 ret
= ufshcd_read_unit_desc_param(hba
,
2907 UNIT_DESC_PARAM_LU_WR_PROTECT
,
2909 sizeof(*b_lu_write_protect
));
2914 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
2916 * @hba: per-adapter instance
2917 * @sdev: pointer to SCSI device
2920 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba
*hba
,
2921 struct scsi_device
*sdev
)
2923 if (hba
->dev_info
.f_power_on_wp_en
&&
2924 !hba
->dev_info
.is_lu_power_on_wp
) {
2925 u8 b_lu_write_protect
;
2927 if (!ufshcd_get_lu_wp(hba
, ufshcd_scsi_to_upiu_lun(sdev
->lun
),
2928 &b_lu_write_protect
) &&
2929 (b_lu_write_protect
== UFS_LU_POWER_ON_WP
))
2930 hba
->dev_info
.is_lu_power_on_wp
= true;
2935 * ufshcd_slave_alloc - handle initial SCSI device configurations
2936 * @sdev: pointer to SCSI device
2940 static int ufshcd_slave_alloc(struct scsi_device
*sdev
)
2942 struct ufs_hba
*hba
;
2944 hba
= shost_priv(sdev
->host
);
2946 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
2947 sdev
->use_10_for_ms
= 1;
2949 /* allow SCSI layer to restart the device in case of errors */
2950 sdev
->allow_restart
= 1;
2952 /* REPORT SUPPORTED OPERATION CODES is not supported */
2953 sdev
->no_report_opcodes
= 1;
2955 /* WRITE_SAME command is not supported */
2956 sdev
->no_write_same
= 1;
2958 ufshcd_set_queue_depth(sdev
);
2960 ufshcd_get_lu_power_on_wp_status(hba
, sdev
);
2966 * ufshcd_change_queue_depth - change queue depth
2967 * @sdev: pointer to SCSI device
2968 * @depth: required depth to set
2970 * Change queue depth and make sure the max. limits are not crossed.
2972 static int ufshcd_change_queue_depth(struct scsi_device
*sdev
, int depth
)
2974 struct ufs_hba
*hba
= shost_priv(sdev
->host
);
2976 if (depth
> hba
->nutrs
)
2978 return scsi_change_queue_depth(sdev
, depth
);
2982 * ufshcd_slave_configure - adjust SCSI device configurations
2983 * @sdev: pointer to SCSI device
2985 static int ufshcd_slave_configure(struct scsi_device
*sdev
)
2987 struct request_queue
*q
= sdev
->request_queue
;
2989 blk_queue_update_dma_pad(q
, PRDT_DATA_BYTE_COUNT_PAD
- 1);
2990 blk_queue_max_segment_size(q
, PRDT_DATA_BYTE_COUNT_MAX
);
2996 * ufshcd_slave_destroy - remove SCSI device configurations
2997 * @sdev: pointer to SCSI device
2999 static void ufshcd_slave_destroy(struct scsi_device
*sdev
)
3001 struct ufs_hba
*hba
;
3003 hba
= shost_priv(sdev
->host
);
3004 /* Drop the reference as it won't be needed anymore */
3005 if (ufshcd_scsi_to_upiu_lun(sdev
->lun
) == UFS_UPIU_UFS_DEVICE_WLUN
) {
3006 unsigned long flags
;
3008 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3009 hba
->sdev_ufs_device
= NULL
;
3010 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3015 * ufshcd_task_req_compl - handle task management request completion
3016 * @hba: per adapter instance
3017 * @index: index of the completed request
3018 * @resp: task management service response
3020 * Returns non-zero value on error, zero on success
3022 static int ufshcd_task_req_compl(struct ufs_hba
*hba
, u32 index
, u8
*resp
)
3024 struct utp_task_req_desc
*task_req_descp
;
3025 struct utp_upiu_task_rsp
*task_rsp_upiup
;
3026 unsigned long flags
;
3030 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3032 /* Clear completed tasks from outstanding_tasks */
3033 __clear_bit(index
, &hba
->outstanding_tasks
);
3035 task_req_descp
= hba
->utmrdl_base_addr
;
3036 ocs_value
= ufshcd_get_tmr_ocs(&task_req_descp
[index
]);
3038 if (ocs_value
== OCS_SUCCESS
) {
3039 task_rsp_upiup
= (struct utp_upiu_task_rsp
*)
3040 task_req_descp
[index
].task_rsp_upiu
;
3041 task_result
= be32_to_cpu(task_rsp_upiup
->header
.dword_1
);
3042 task_result
= ((task_result
& MASK_TASK_RESPONSE
) >> 8);
3044 *resp
= (u8
)task_result
;
3046 dev_err(hba
->dev
, "%s: failed, ocs = 0x%x\n",
3047 __func__
, ocs_value
);
3049 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3055 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
3056 * @lrb: pointer to local reference block of completed command
3057 * @scsi_status: SCSI command status
3059 * Returns value base on SCSI command status
3062 ufshcd_scsi_cmd_status(struct ufshcd_lrb
*lrbp
, int scsi_status
)
3066 switch (scsi_status
) {
3067 case SAM_STAT_CHECK_CONDITION
:
3068 ufshcd_copy_sense_data(lrbp
);
3070 result
|= DID_OK
<< 16 |
3071 COMMAND_COMPLETE
<< 8 |
3074 case SAM_STAT_TASK_SET_FULL
:
3076 case SAM_STAT_TASK_ABORTED
:
3077 ufshcd_copy_sense_data(lrbp
);
3078 result
|= scsi_status
;
3081 result
|= DID_ERROR
<< 16;
3083 } /* end of switch */
3089 * ufshcd_transfer_rsp_status - Get overall status of the response
3090 * @hba: per adapter instance
3091 * @lrb: pointer to local reference block of completed command
3093 * Returns result of the command to notify SCSI midlayer
3096 ufshcd_transfer_rsp_status(struct ufs_hba
*hba
, struct ufshcd_lrb
*lrbp
)
3102 /* overall command status of utrd */
3103 ocs
= ufshcd_get_tr_ocs(lrbp
);
3107 result
= ufshcd_get_req_rsp(lrbp
->ucd_rsp_ptr
);
3110 case UPIU_TRANSACTION_RESPONSE
:
3112 * get the response UPIU result to extract
3113 * the SCSI command status
3115 result
= ufshcd_get_rsp_upiu_result(lrbp
->ucd_rsp_ptr
);
3118 * get the result based on SCSI status response
3119 * to notify the SCSI midlayer of the command status
3121 scsi_status
= result
& MASK_SCSI_STATUS
;
3122 result
= ufshcd_scsi_cmd_status(lrbp
, scsi_status
);
3124 if (ufshcd_is_exception_event(lrbp
->ucd_rsp_ptr
))
3125 schedule_work(&hba
->eeh_work
);
3127 case UPIU_TRANSACTION_REJECT_UPIU
:
3128 /* TODO: handle Reject UPIU Response */
3129 result
= DID_ERROR
<< 16;
3131 "Reject UPIU not fully implemented\n");
3134 result
= DID_ERROR
<< 16;
3136 "Unexpected request response code = %x\n",
3142 result
|= DID_ABORT
<< 16;
3144 case OCS_INVALID_COMMAND_STATUS
:
3145 result
|= DID_REQUEUE
<< 16;
3147 case OCS_INVALID_CMD_TABLE_ATTR
:
3148 case OCS_INVALID_PRDT_ATTR
:
3149 case OCS_MISMATCH_DATA_BUF_SIZE
:
3150 case OCS_MISMATCH_RESP_UPIU_SIZE
:
3151 case OCS_PEER_COMM_FAILURE
:
3152 case OCS_FATAL_ERROR
:
3154 result
|= DID_ERROR
<< 16;
3156 "OCS error from controller = %x\n", ocs
);
3158 } /* end of switch */
3164 * ufshcd_uic_cmd_compl - handle completion of uic command
3165 * @hba: per adapter instance
3166 * @intr_status: interrupt status generated by the controller
3168 static void ufshcd_uic_cmd_compl(struct ufs_hba
*hba
, u32 intr_status
)
3170 if ((intr_status
& UIC_COMMAND_COMPL
) && hba
->active_uic_cmd
) {
3171 hba
->active_uic_cmd
->argument2
|=
3172 ufshcd_get_uic_cmd_result(hba
);
3173 hba
->active_uic_cmd
->argument3
=
3174 ufshcd_get_dme_attr_val(hba
);
3175 complete(&hba
->active_uic_cmd
->done
);
3178 if ((intr_status
& UFSHCD_UIC_PWR_MASK
) && hba
->uic_async_done
)
3179 complete(hba
->uic_async_done
);
3183 * ufshcd_transfer_req_compl - handle SCSI and query command completion
3184 * @hba: per adapter instance
3186 static void ufshcd_transfer_req_compl(struct ufs_hba
*hba
)
3188 struct ufshcd_lrb
*lrbp
;
3189 struct scsi_cmnd
*cmd
;
3190 unsigned long completed_reqs
;
3195 /* Resetting interrupt aggregation counters first and reading the
3196 * DOOR_BELL afterward allows us to handle all the completed requests.
3197 * In order to prevent other interrupts starvation the DB is read once
3198 * after reset. The down side of this solution is the possibility of
3199 * false interrupt if device completes another request after resetting
3200 * aggregation and before reading the DB.
3202 if (ufshcd_is_intr_aggr_allowed(hba
))
3203 ufshcd_reset_intr_aggr(hba
);
3205 tr_doorbell
= ufshcd_readl(hba
, REG_UTP_TRANSFER_REQ_DOOR_BELL
);
3206 completed_reqs
= tr_doorbell
^ hba
->outstanding_reqs
;
3208 for_each_set_bit(index
, &completed_reqs
, hba
->nutrs
) {
3209 lrbp
= &hba
->lrb
[index
];
3212 result
= ufshcd_transfer_rsp_status(hba
, lrbp
);
3213 scsi_dma_unmap(cmd
);
3214 cmd
->result
= result
;
3215 /* Mark completed command as NULL in LRB */
3217 clear_bit_unlock(index
, &hba
->lrb_in_use
);
3218 /* Do not touch lrbp after scsi done */
3219 cmd
->scsi_done(cmd
);
3220 __ufshcd_release(hba
);
3221 } else if (lrbp
->command_type
== UTP_CMD_TYPE_DEV_MANAGE
) {
3222 if (hba
->dev_cmd
.complete
)
3223 complete(hba
->dev_cmd
.complete
);
3227 /* clear corresponding bits of completed commands */
3228 hba
->outstanding_reqs
^= completed_reqs
;
3230 ufshcd_clk_scaling_update_busy(hba
);
3232 /* we might have free'd some tags above */
3233 wake_up(&hba
->dev_cmd
.tag_wq
);
3237 * ufshcd_disable_ee - disable exception event
3238 * @hba: per-adapter instance
3239 * @mask: exception event to disable
3241 * Disables exception event in the device so that the EVENT_ALERT
3244 * Returns zero on success, non-zero error value on failure.
3246 static int ufshcd_disable_ee(struct ufs_hba
*hba
, u16 mask
)
3251 if (!(hba
->ee_ctrl_mask
& mask
))
3254 val
= hba
->ee_ctrl_mask
& ~mask
;
3255 val
&= 0xFFFF; /* 2 bytes */
3256 err
= ufshcd_query_attr(hba
, UPIU_QUERY_OPCODE_WRITE_ATTR
,
3257 QUERY_ATTR_IDN_EE_CONTROL
, 0, 0, &val
);
3259 hba
->ee_ctrl_mask
&= ~mask
;
3265 * ufshcd_enable_ee - enable exception event
3266 * @hba: per-adapter instance
3267 * @mask: exception event to enable
3269 * Enable corresponding exception event in the device to allow
3270 * device to alert host in critical scenarios.
3272 * Returns zero on success, non-zero error value on failure.
3274 static int ufshcd_enable_ee(struct ufs_hba
*hba
, u16 mask
)
3279 if (hba
->ee_ctrl_mask
& mask
)
3282 val
= hba
->ee_ctrl_mask
| mask
;
3283 val
&= 0xFFFF; /* 2 bytes */
3284 err
= ufshcd_query_attr(hba
, UPIU_QUERY_OPCODE_WRITE_ATTR
,
3285 QUERY_ATTR_IDN_EE_CONTROL
, 0, 0, &val
);
3287 hba
->ee_ctrl_mask
|= mask
;
3293 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
3294 * @hba: per-adapter instance
3296 * Allow device to manage background operations on its own. Enabling
3297 * this might lead to inconsistent latencies during normal data transfers
3298 * as the device is allowed to manage its own way of handling background
3301 * Returns zero on success, non-zero on failure.
3303 static int ufshcd_enable_auto_bkops(struct ufs_hba
*hba
)
3307 if (hba
->auto_bkops_enabled
)
3310 err
= ufshcd_query_flag(hba
, UPIU_QUERY_OPCODE_SET_FLAG
,
3311 QUERY_FLAG_IDN_BKOPS_EN
, NULL
);
3313 dev_err(hba
->dev
, "%s: failed to enable bkops %d\n",
3318 hba
->auto_bkops_enabled
= true;
3320 /* No need of URGENT_BKOPS exception from the device */
3321 err
= ufshcd_disable_ee(hba
, MASK_EE_URGENT_BKOPS
);
3323 dev_err(hba
->dev
, "%s: failed to disable exception event %d\n",
3330 * ufshcd_disable_auto_bkops - block device in doing background operations
3331 * @hba: per-adapter instance
3333 * Disabling background operations improves command response latency but
3334 * has drawback of device moving into critical state where the device is
3335 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
3336 * host is idle so that BKOPS are managed effectively without any negative
3339 * Returns zero on success, non-zero on failure.
3341 static int ufshcd_disable_auto_bkops(struct ufs_hba
*hba
)
3345 if (!hba
->auto_bkops_enabled
)
3349 * If host assisted BKOPs is to be enabled, make sure
3350 * urgent bkops exception is allowed.
3352 err
= ufshcd_enable_ee(hba
, MASK_EE_URGENT_BKOPS
);
3354 dev_err(hba
->dev
, "%s: failed to enable exception event %d\n",
3359 err
= ufshcd_query_flag(hba
, UPIU_QUERY_OPCODE_CLEAR_FLAG
,
3360 QUERY_FLAG_IDN_BKOPS_EN
, NULL
);
3362 dev_err(hba
->dev
, "%s: failed to disable bkops %d\n",
3364 ufshcd_disable_ee(hba
, MASK_EE_URGENT_BKOPS
);
3368 hba
->auto_bkops_enabled
= false;
3374 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
3375 * @hba: per adapter instance
3377 * After a device reset the device may toggle the BKOPS_EN flag
3378 * to default value. The s/w tracking variables should be updated
3379 * as well. This function would change the auto-bkops state based on
3380 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
3382 static void ufshcd_force_reset_auto_bkops(struct ufs_hba
*hba
)
3384 if (ufshcd_keep_autobkops_enabled_except_suspend(hba
)) {
3385 hba
->auto_bkops_enabled
= false;
3386 hba
->ee_ctrl_mask
|= MASK_EE_URGENT_BKOPS
;
3387 ufshcd_enable_auto_bkops(hba
);
3389 hba
->auto_bkops_enabled
= true;
3390 hba
->ee_ctrl_mask
&= ~MASK_EE_URGENT_BKOPS
;
3391 ufshcd_disable_auto_bkops(hba
);
3395 static inline int ufshcd_get_bkops_status(struct ufs_hba
*hba
, u32
*status
)
3397 return ufshcd_query_attr(hba
, UPIU_QUERY_OPCODE_READ_ATTR
,
3398 QUERY_ATTR_IDN_BKOPS_STATUS
, 0, 0, status
);
3402 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
3403 * @hba: per-adapter instance
3404 * @status: bkops_status value
3406 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
3407 * flag in the device to permit background operations if the device
3408 * bkops_status is greater than or equal to "status" argument passed to
3409 * this function, disable otherwise.
3411 * Returns 0 for success, non-zero in case of failure.
3413 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
3414 * to know whether auto bkops is enabled or disabled after this function
3415 * returns control to it.
3417 static int ufshcd_bkops_ctrl(struct ufs_hba
*hba
,
3418 enum bkops_status status
)
3421 u32 curr_status
= 0;
3423 err
= ufshcd_get_bkops_status(hba
, &curr_status
);
3425 dev_err(hba
->dev
, "%s: failed to get BKOPS status %d\n",
3428 } else if (curr_status
> BKOPS_STATUS_MAX
) {
3429 dev_err(hba
->dev
, "%s: invalid BKOPS status %d\n",
3430 __func__
, curr_status
);
3435 if (curr_status
>= status
)
3436 err
= ufshcd_enable_auto_bkops(hba
);
3438 err
= ufshcd_disable_auto_bkops(hba
);
3444 * ufshcd_urgent_bkops - handle urgent bkops exception event
3445 * @hba: per-adapter instance
3447 * Enable fBackgroundOpsEn flag in the device to permit background
3450 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
3451 * and negative error value for any other failure.
3453 static int ufshcd_urgent_bkops(struct ufs_hba
*hba
)
3455 return ufshcd_bkops_ctrl(hba
, BKOPS_STATUS_PERF_IMPACT
);
3458 static inline int ufshcd_get_ee_status(struct ufs_hba
*hba
, u32
*status
)
3460 return ufshcd_query_attr(hba
, UPIU_QUERY_OPCODE_READ_ATTR
,
3461 QUERY_ATTR_IDN_EE_STATUS
, 0, 0, status
);
3465 * ufshcd_exception_event_handler - handle exceptions raised by device
3466 * @work: pointer to work data
3468 * Read bExceptionEventStatus attribute from the device and handle the
3469 * exception event accordingly.
3471 static void ufshcd_exception_event_handler(struct work_struct
*work
)
3473 struct ufs_hba
*hba
;
3476 hba
= container_of(work
, struct ufs_hba
, eeh_work
);
3478 pm_runtime_get_sync(hba
->dev
);
3479 scsi_block_requests(hba
->host
);
3480 err
= ufshcd_get_ee_status(hba
, &status
);
3482 dev_err(hba
->dev
, "%s: failed to get exception status %d\n",
3487 status
&= hba
->ee_ctrl_mask
;
3488 if (status
& MASK_EE_URGENT_BKOPS
) {
3489 err
= ufshcd_urgent_bkops(hba
);
3491 dev_err(hba
->dev
, "%s: failed to handle urgent bkops %d\n",
3495 scsi_unblock_requests(hba
->host
);
3496 pm_runtime_put_sync(hba
->dev
);
3501 * ufshcd_err_handler - handle UFS errors that require s/w attention
3502 * @work: pointer to work structure
3504 static void ufshcd_err_handler(struct work_struct
*work
)
3506 struct ufs_hba
*hba
;
3507 unsigned long flags
;
3513 hba
= container_of(work
, struct ufs_hba
, eh_work
);
3515 pm_runtime_get_sync(hba
->dev
);
3516 ufshcd_hold(hba
, false);
3518 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3519 if (hba
->ufshcd_state
== UFSHCD_STATE_RESET
) {
3520 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3524 hba
->ufshcd_state
= UFSHCD_STATE_RESET
;
3525 ufshcd_set_eh_in_progress(hba
);
3527 /* Complete requests that have door-bell cleared by h/w */
3528 ufshcd_transfer_req_compl(hba
);
3529 ufshcd_tmc_handler(hba
);
3530 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3532 /* Clear pending transfer requests */
3533 for_each_set_bit(tag
, &hba
->outstanding_reqs
, hba
->nutrs
)
3534 if (ufshcd_clear_cmd(hba
, tag
))
3535 err_xfer
|= 1 << tag
;
3537 /* Clear pending task management requests */
3538 for_each_set_bit(tag
, &hba
->outstanding_tasks
, hba
->nutmrs
)
3539 if (ufshcd_clear_tm_cmd(hba
, tag
))
3542 /* Complete the requests that are cleared by s/w */
3543 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3544 ufshcd_transfer_req_compl(hba
);
3545 ufshcd_tmc_handler(hba
);
3546 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3548 /* Fatal errors need reset */
3549 if (err_xfer
|| err_tm
|| (hba
->saved_err
& INT_FATAL_ERRORS
) ||
3550 ((hba
->saved_err
& UIC_ERROR
) &&
3551 (hba
->saved_uic_err
& UFSHCD_UIC_DL_PA_INIT_ERROR
))) {
3552 err
= ufshcd_reset_and_restore(hba
);
3554 dev_err(hba
->dev
, "%s: reset and restore failed\n",
3556 hba
->ufshcd_state
= UFSHCD_STATE_ERROR
;
3559 * Inform scsi mid-layer that we did reset and allow to handle
3560 * Unit Attention properly.
3562 scsi_report_bus_reset(hba
->host
, 0);
3564 hba
->saved_uic_err
= 0;
3566 ufshcd_clear_eh_in_progress(hba
);
3569 scsi_unblock_requests(hba
->host
);
3570 ufshcd_release(hba
);
3571 pm_runtime_put_sync(hba
->dev
);
3575 * ufshcd_update_uic_error - check and set fatal UIC error flags.
3576 * @hba: per-adapter instance
3578 static void ufshcd_update_uic_error(struct ufs_hba
*hba
)
3582 /* PA_INIT_ERROR is fatal and needs UIC reset */
3583 reg
= ufshcd_readl(hba
, REG_UIC_ERROR_CODE_DATA_LINK_LAYER
);
3584 if (reg
& UIC_DATA_LINK_LAYER_ERROR_PA_INIT
)
3585 hba
->uic_error
|= UFSHCD_UIC_DL_PA_INIT_ERROR
;
3587 /* UIC NL/TL/DME errors needs software retry */
3588 reg
= ufshcd_readl(hba
, REG_UIC_ERROR_CODE_NETWORK_LAYER
);
3590 hba
->uic_error
|= UFSHCD_UIC_NL_ERROR
;
3592 reg
= ufshcd_readl(hba
, REG_UIC_ERROR_CODE_TRANSPORT_LAYER
);
3594 hba
->uic_error
|= UFSHCD_UIC_TL_ERROR
;
3596 reg
= ufshcd_readl(hba
, REG_UIC_ERROR_CODE_DME
);
3598 hba
->uic_error
|= UFSHCD_UIC_DME_ERROR
;
3600 dev_dbg(hba
->dev
, "%s: UIC error flags = 0x%08x\n",
3601 __func__
, hba
->uic_error
);
3605 * ufshcd_check_errors - Check for errors that need s/w attention
3606 * @hba: per-adapter instance
3608 static void ufshcd_check_errors(struct ufs_hba
*hba
)
3610 bool queue_eh_work
= false;
3612 if (hba
->errors
& INT_FATAL_ERRORS
)
3613 queue_eh_work
= true;
3615 if (hba
->errors
& UIC_ERROR
) {
3617 ufshcd_update_uic_error(hba
);
3619 queue_eh_work
= true;
3622 if (queue_eh_work
) {
3623 /* handle fatal errors only when link is functional */
3624 if (hba
->ufshcd_state
== UFSHCD_STATE_OPERATIONAL
) {
3625 /* block commands from scsi mid-layer */
3626 scsi_block_requests(hba
->host
);
3628 /* transfer error masks to sticky bits */
3629 hba
->saved_err
|= hba
->errors
;
3630 hba
->saved_uic_err
|= hba
->uic_error
;
3632 hba
->ufshcd_state
= UFSHCD_STATE_ERROR
;
3633 schedule_work(&hba
->eh_work
);
3637 * if (!queue_eh_work) -
3638 * Other errors are either non-fatal where host recovers
3639 * itself without s/w intervention or errors that will be
3640 * handled by the SCSI core layer.
3645 * ufshcd_tmc_handler - handle task management function completion
3646 * @hba: per adapter instance
3648 static void ufshcd_tmc_handler(struct ufs_hba
*hba
)
3652 tm_doorbell
= ufshcd_readl(hba
, REG_UTP_TASK_REQ_DOOR_BELL
);
3653 hba
->tm_condition
= tm_doorbell
^ hba
->outstanding_tasks
;
3654 wake_up(&hba
->tm_wq
);
3658 * ufshcd_sl_intr - Interrupt service routine
3659 * @hba: per adapter instance
3660 * @intr_status: contains interrupts generated by the controller
3662 static void ufshcd_sl_intr(struct ufs_hba
*hba
, u32 intr_status
)
3664 hba
->errors
= UFSHCD_ERROR_MASK
& intr_status
;
3666 ufshcd_check_errors(hba
);
3668 if (intr_status
& UFSHCD_UIC_MASK
)
3669 ufshcd_uic_cmd_compl(hba
, intr_status
);
3671 if (intr_status
& UTP_TASK_REQ_COMPL
)
3672 ufshcd_tmc_handler(hba
);
3674 if (intr_status
& UTP_TRANSFER_REQ_COMPL
)
3675 ufshcd_transfer_req_compl(hba
);
3679 * ufshcd_intr - Main interrupt service routine
3681 * @__hba: pointer to adapter instance
3683 * Returns IRQ_HANDLED - If interrupt is valid
3684 * IRQ_NONE - If invalid interrupt
3686 static irqreturn_t
ufshcd_intr(int irq
, void *__hba
)
3689 irqreturn_t retval
= IRQ_NONE
;
3690 struct ufs_hba
*hba
= __hba
;
3692 spin_lock(hba
->host
->host_lock
);
3693 intr_status
= ufshcd_readl(hba
, REG_INTERRUPT_STATUS
);
3696 ufshcd_writel(hba
, intr_status
, REG_INTERRUPT_STATUS
);
3697 ufshcd_sl_intr(hba
, intr_status
);
3698 retval
= IRQ_HANDLED
;
3700 spin_unlock(hba
->host
->host_lock
);
3704 static int ufshcd_clear_tm_cmd(struct ufs_hba
*hba
, int tag
)
3707 u32 mask
= 1 << tag
;
3708 unsigned long flags
;
3710 if (!test_bit(tag
, &hba
->outstanding_tasks
))
3713 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3714 ufshcd_writel(hba
, ~(1 << tag
), REG_UTP_TASK_REQ_LIST_CLEAR
);
3715 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3717 /* poll for max. 1 sec to clear door bell register by h/w */
3718 err
= ufshcd_wait_for_register(hba
,
3719 REG_UTP_TASK_REQ_DOOR_BELL
,
3720 mask
, 0, 1000, 1000);
3726 * ufshcd_issue_tm_cmd - issues task management commands to controller
3727 * @hba: per adapter instance
3728 * @lun_id: LUN ID to which TM command is sent
3729 * @task_id: task ID to which the TM command is applicable
3730 * @tm_function: task management function opcode
3731 * @tm_response: task management service response return value
3733 * Returns non-zero value on error, zero on success.
3735 static int ufshcd_issue_tm_cmd(struct ufs_hba
*hba
, int lun_id
, int task_id
,
3736 u8 tm_function
, u8
*tm_response
)
3738 struct utp_task_req_desc
*task_req_descp
;
3739 struct utp_upiu_task_req
*task_req_upiup
;
3740 struct Scsi_Host
*host
;
3741 unsigned long flags
;
3749 * Get free slot, sleep if slots are unavailable.
3750 * Even though we use wait_event() which sleeps indefinitely,
3751 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
3753 wait_event(hba
->tm_tag_wq
, ufshcd_get_tm_free_slot(hba
, &free_slot
));
3754 ufshcd_hold(hba
, false);
3756 spin_lock_irqsave(host
->host_lock
, flags
);
3757 task_req_descp
= hba
->utmrdl_base_addr
;
3758 task_req_descp
+= free_slot
;
3760 /* Configure task request descriptor */
3761 task_req_descp
->header
.dword_0
= cpu_to_le32(UTP_REQ_DESC_INT_CMD
);
3762 task_req_descp
->header
.dword_2
=
3763 cpu_to_le32(OCS_INVALID_COMMAND_STATUS
);
3765 /* Configure task request UPIU */
3767 (struct utp_upiu_task_req
*) task_req_descp
->task_req_upiu
;
3768 task_tag
= hba
->nutrs
+ free_slot
;
3769 task_req_upiup
->header
.dword_0
=
3770 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ
, 0,
3772 task_req_upiup
->header
.dword_1
=
3773 UPIU_HEADER_DWORD(0, tm_function
, 0, 0);
3775 * The host shall provide the same value for LUN field in the basic
3776 * header and for Input Parameter.
3778 task_req_upiup
->input_param1
= cpu_to_be32(lun_id
);
3779 task_req_upiup
->input_param2
= cpu_to_be32(task_id
);
3781 /* send command to the controller */
3782 __set_bit(free_slot
, &hba
->outstanding_tasks
);
3783 ufshcd_writel(hba
, 1 << free_slot
, REG_UTP_TASK_REQ_DOOR_BELL
);
3785 spin_unlock_irqrestore(host
->host_lock
, flags
);
3787 /* wait until the task management command is completed */
3788 err
= wait_event_timeout(hba
->tm_wq
,
3789 test_bit(free_slot
, &hba
->tm_condition
),
3790 msecs_to_jiffies(TM_CMD_TIMEOUT
));
3792 dev_err(hba
->dev
, "%s: task management cmd 0x%.2x timed-out\n",
3793 __func__
, tm_function
);
3794 if (ufshcd_clear_tm_cmd(hba
, free_slot
))
3795 dev_WARN(hba
->dev
, "%s: unable clear tm cmd (slot %d) after timeout\n",
3796 __func__
, free_slot
);
3799 err
= ufshcd_task_req_compl(hba
, free_slot
, tm_response
);
3802 clear_bit(free_slot
, &hba
->tm_condition
);
3803 ufshcd_put_tm_slot(hba
, free_slot
);
3804 wake_up(&hba
->tm_tag_wq
);
3806 ufshcd_release(hba
);
3811 * ufshcd_eh_device_reset_handler - device reset handler registered to
3813 * @cmd: SCSI command pointer
3815 * Returns SUCCESS/FAILED
3817 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd
*cmd
)
3819 struct Scsi_Host
*host
;
3820 struct ufs_hba
*hba
;
3825 struct ufshcd_lrb
*lrbp
;
3826 unsigned long flags
;
3828 host
= cmd
->device
->host
;
3829 hba
= shost_priv(host
);
3830 tag
= cmd
->request
->tag
;
3832 lrbp
= &hba
->lrb
[tag
];
3833 err
= ufshcd_issue_tm_cmd(hba
, lrbp
->lun
, 0, UFS_LOGICAL_RESET
, &resp
);
3834 if (err
|| resp
!= UPIU_TASK_MANAGEMENT_FUNC_COMPL
) {
3840 /* clear the commands that were pending for corresponding LUN */
3841 for_each_set_bit(pos
, &hba
->outstanding_reqs
, hba
->nutrs
) {
3842 if (hba
->lrb
[pos
].lun
== lrbp
->lun
) {
3843 err
= ufshcd_clear_cmd(hba
, pos
);
3848 spin_lock_irqsave(host
->host_lock
, flags
);
3849 ufshcd_transfer_req_compl(hba
);
3850 spin_unlock_irqrestore(host
->host_lock
, flags
);
3855 dev_err(hba
->dev
, "%s: failed with err %d\n", __func__
, err
);
3862 * ufshcd_abort - abort a specific command
3863 * @cmd: SCSI command pointer
3865 * Abort the pending command in device by sending UFS_ABORT_TASK task management
3866 * command, and in host controller by clearing the door-bell register. There can
3867 * be race between controller sending the command to the device while abort is
3868 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
3869 * really issued and then try to abort it.
3871 * Returns SUCCESS/FAILED
3873 static int ufshcd_abort(struct scsi_cmnd
*cmd
)
3875 struct Scsi_Host
*host
;
3876 struct ufs_hba
*hba
;
3877 unsigned long flags
;
3882 struct ufshcd_lrb
*lrbp
;
3885 host
= cmd
->device
->host
;
3886 hba
= shost_priv(host
);
3887 tag
= cmd
->request
->tag
;
3889 ufshcd_hold(hba
, false);
3890 /* If command is already aborted/completed, return SUCCESS */
3891 if (!(test_bit(tag
, &hba
->outstanding_reqs
)))
3894 reg
= ufshcd_readl(hba
, REG_UTP_TRANSFER_REQ_DOOR_BELL
);
3895 if (!(reg
& (1 << tag
))) {
3897 "%s: cmd was completed, but without a notifying intr, tag = %d",
3901 lrbp
= &hba
->lrb
[tag
];
3902 for (poll_cnt
= 100; poll_cnt
; poll_cnt
--) {
3903 err
= ufshcd_issue_tm_cmd(hba
, lrbp
->lun
, lrbp
->task_tag
,
3904 UFS_QUERY_TASK
, &resp
);
3905 if (!err
&& resp
== UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED
) {
3906 /* cmd pending in the device */
3908 } else if (!err
&& resp
== UPIU_TASK_MANAGEMENT_FUNC_COMPL
) {
3910 * cmd not pending in the device, check if it is
3913 reg
= ufshcd_readl(hba
, REG_UTP_TRANSFER_REQ_DOOR_BELL
);
3914 if (reg
& (1 << tag
)) {
3915 /* sleep for max. 200us to stabilize */
3916 usleep_range(100, 200);
3919 /* command completed already */
3923 err
= resp
; /* service response error */
3933 err
= ufshcd_issue_tm_cmd(hba
, lrbp
->lun
, lrbp
->task_tag
,
3934 UFS_ABORT_TASK
, &resp
);
3935 if (err
|| resp
!= UPIU_TASK_MANAGEMENT_FUNC_COMPL
) {
3937 err
= resp
; /* service response error */
3941 err
= ufshcd_clear_cmd(hba
, tag
);
3945 scsi_dma_unmap(cmd
);
3947 spin_lock_irqsave(host
->host_lock
, flags
);
3948 __clear_bit(tag
, &hba
->outstanding_reqs
);
3949 hba
->lrb
[tag
].cmd
= NULL
;
3950 spin_unlock_irqrestore(host
->host_lock
, flags
);
3952 clear_bit_unlock(tag
, &hba
->lrb_in_use
);
3953 wake_up(&hba
->dev_cmd
.tag_wq
);
3959 dev_err(hba
->dev
, "%s: failed with err %d\n", __func__
, err
);
3964 * This ufshcd_release() corresponds to the original scsi cmd that got
3965 * aborted here (as we won't get any IRQ for it).
3967 ufshcd_release(hba
);
3972 * ufshcd_host_reset_and_restore - reset and restore host controller
3973 * @hba: per-adapter instance
3975 * Note that host controller reset may issue DME_RESET to
3976 * local and remote (device) Uni-Pro stack and the attributes
3977 * are reset to default state.
3979 * Returns zero on success, non-zero on failure
3981 static int ufshcd_host_reset_and_restore(struct ufs_hba
*hba
)
3984 unsigned long flags
;
3986 /* Reset the host controller */
3987 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
3988 ufshcd_hba_stop(hba
);
3989 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
3991 err
= ufshcd_hba_enable(hba
);
3995 /* Establish the link again and restore the device */
3996 err
= ufshcd_probe_hba(hba
);
3998 if (!err
&& (hba
->ufshcd_state
!= UFSHCD_STATE_OPERATIONAL
))
4002 dev_err(hba
->dev
, "%s: Host init failed %d\n", __func__
, err
);
4008 * ufshcd_reset_and_restore - reset and re-initialize host/device
4009 * @hba: per-adapter instance
4011 * Reset and recover device, host and re-establish link. This
4012 * is helpful to recover the communication in fatal error conditions.
4014 * Returns zero on success, non-zero on failure
4016 static int ufshcd_reset_and_restore(struct ufs_hba
*hba
)
4019 unsigned long flags
;
4020 int retries
= MAX_HOST_RESET_RETRIES
;
4023 err
= ufshcd_host_reset_and_restore(hba
);
4024 } while (err
&& --retries
);
4027 * After reset the door-bell might be cleared, complete
4028 * outstanding requests in s/w here.
4030 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
4031 ufshcd_transfer_req_compl(hba
);
4032 ufshcd_tmc_handler(hba
);
4033 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4039 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
4040 * @cmd - SCSI command pointer
4042 * Returns SUCCESS/FAILED
4044 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd
*cmd
)
4047 unsigned long flags
;
4048 struct ufs_hba
*hba
;
4050 hba
= shost_priv(cmd
->device
->host
);
4052 ufshcd_hold(hba
, false);
4054 * Check if there is any race with fatal error handling.
4055 * If so, wait for it to complete. Even though fatal error
4056 * handling does reset and restore in some cases, don't assume
4057 * anything out of it. We are just avoiding race here.
4060 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
4061 if (!(work_pending(&hba
->eh_work
) ||
4062 hba
->ufshcd_state
== UFSHCD_STATE_RESET
))
4064 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4065 dev_dbg(hba
->dev
, "%s: reset in progress\n", __func__
);
4066 flush_work(&hba
->eh_work
);
4069 hba
->ufshcd_state
= UFSHCD_STATE_RESET
;
4070 ufshcd_set_eh_in_progress(hba
);
4071 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4073 err
= ufshcd_reset_and_restore(hba
);
4075 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
4078 hba
->ufshcd_state
= UFSHCD_STATE_OPERATIONAL
;
4081 hba
->ufshcd_state
= UFSHCD_STATE_ERROR
;
4083 ufshcd_clear_eh_in_progress(hba
);
4084 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4086 ufshcd_release(hba
);
4091 * ufshcd_get_max_icc_level - calculate the ICC level
4092 * @sup_curr_uA: max. current supported by the regulator
4093 * @start_scan: row at the desc table to start scan from
4094 * @buff: power descriptor buffer
4096 * Returns calculated max ICC level for specific regulator
4098 static u32
ufshcd_get_max_icc_level(int sup_curr_uA
, u32 start_scan
, char *buff
)
4105 for (i
= start_scan
; i
>= 0; i
--) {
4106 data
= be16_to_cpu(*((u16
*)(buff
+ 2*i
)));
4107 unit
= (data
& ATTR_ICC_LVL_UNIT_MASK
) >>
4108 ATTR_ICC_LVL_UNIT_OFFSET
;
4109 curr_uA
= data
& ATTR_ICC_LVL_VALUE_MASK
;
4111 case UFSHCD_NANO_AMP
:
4112 curr_uA
= curr_uA
/ 1000;
4114 case UFSHCD_MILI_AMP
:
4115 curr_uA
= curr_uA
* 1000;
4118 curr_uA
= curr_uA
* 1000 * 1000;
4120 case UFSHCD_MICRO_AMP
:
4124 if (sup_curr_uA
>= curr_uA
)
4129 pr_err("%s: Couldn't find valid icc_level = %d", __func__
, i
);
4136 * ufshcd_calc_icc_level - calculate the max ICC level
4137 * In case regulators are not initialized we'll return 0
4138 * @hba: per-adapter instance
4139 * @desc_buf: power descriptor buffer to extract ICC levels from.
4140 * @len: length of desc_buff
4142 * Returns calculated ICC level
4144 static u32
ufshcd_find_max_sup_active_icc_level(struct ufs_hba
*hba
,
4145 u8
*desc_buf
, int len
)
4149 if (!hba
->vreg_info
.vcc
|| !hba
->vreg_info
.vccq
||
4150 !hba
->vreg_info
.vccq2
) {
4152 "%s: Regulator capability was not set, actvIccLevel=%d",
4153 __func__
, icc_level
);
4157 if (hba
->vreg_info
.vcc
&& hba
->vreg_info
.vcc
->max_uA
)
4158 icc_level
= ufshcd_get_max_icc_level(
4159 hba
->vreg_info
.vcc
->max_uA
,
4160 POWER_DESC_MAX_ACTV_ICC_LVLS
- 1,
4161 &desc_buf
[PWR_DESC_ACTIVE_LVLS_VCC_0
]);
4163 if (hba
->vreg_info
.vccq
&& hba
->vreg_info
.vccq
->max_uA
)
4164 icc_level
= ufshcd_get_max_icc_level(
4165 hba
->vreg_info
.vccq
->max_uA
,
4167 &desc_buf
[PWR_DESC_ACTIVE_LVLS_VCCQ_0
]);
4169 if (hba
->vreg_info
.vccq2
&& hba
->vreg_info
.vccq2
->max_uA
)
4170 icc_level
= ufshcd_get_max_icc_level(
4171 hba
->vreg_info
.vccq2
->max_uA
,
4173 &desc_buf
[PWR_DESC_ACTIVE_LVLS_VCCQ2_0
]);
4178 static void ufshcd_init_icc_levels(struct ufs_hba
*hba
)
4181 int buff_len
= QUERY_DESC_POWER_MAX_SIZE
;
4182 u8 desc_buf
[QUERY_DESC_POWER_MAX_SIZE
];
4184 ret
= ufshcd_read_power_desc(hba
, desc_buf
, buff_len
);
4187 "%s: Failed reading power descriptor.len = %d ret = %d",
4188 __func__
, buff_len
, ret
);
4192 hba
->init_prefetch_data
.icc_level
=
4193 ufshcd_find_max_sup_active_icc_level(hba
,
4194 desc_buf
, buff_len
);
4195 dev_dbg(hba
->dev
, "%s: setting icc_level 0x%x",
4196 __func__
, hba
->init_prefetch_data
.icc_level
);
4198 ret
= ufshcd_query_attr(hba
, UPIU_QUERY_OPCODE_WRITE_ATTR
,
4199 QUERY_ATTR_IDN_ACTIVE_ICC_LVL
, 0, 0,
4200 &hba
->init_prefetch_data
.icc_level
);
4204 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
4205 __func__
, hba
->init_prefetch_data
.icc_level
, ret
);
4210 * ufshcd_scsi_add_wlus - Adds required W-LUs
4211 * @hba: per-adapter instance
4213 * UFS device specification requires the UFS devices to support 4 well known
4215 * "REPORT_LUNS" (address: 01h)
4216 * "UFS Device" (address: 50h)
4217 * "RPMB" (address: 44h)
4218 * "BOOT" (address: 30h)
4219 * UFS device's power management needs to be controlled by "POWER CONDITION"
4220 * field of SSU (START STOP UNIT) command. But this "power condition" field
4221 * will take effect only when its sent to "UFS device" well known logical unit
4222 * hence we require the scsi_device instance to represent this logical unit in
4223 * order for the UFS host driver to send the SSU command for power management.
4225 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
4226 * Block) LU so user space process can control this LU. User space may also
4227 * want to have access to BOOT LU.
4229 * This function adds scsi device instances for each of all well known LUs
4230 * (except "REPORT LUNS" LU).
4232 * Returns zero on success (all required W-LUs are added successfully),
4233 * non-zero error value on failure (if failed to add any of the required W-LU).
4235 static int ufshcd_scsi_add_wlus(struct ufs_hba
*hba
)
4238 struct scsi_device
*sdev_rpmb
;
4239 struct scsi_device
*sdev_boot
;
4241 hba
->sdev_ufs_device
= __scsi_add_device(hba
->host
, 0, 0,
4242 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN
), NULL
);
4243 if (IS_ERR(hba
->sdev_ufs_device
)) {
4244 ret
= PTR_ERR(hba
->sdev_ufs_device
);
4245 hba
->sdev_ufs_device
= NULL
;
4248 scsi_device_put(hba
->sdev_ufs_device
);
4250 sdev_boot
= __scsi_add_device(hba
->host
, 0, 0,
4251 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN
), NULL
);
4252 if (IS_ERR(sdev_boot
)) {
4253 ret
= PTR_ERR(sdev_boot
);
4254 goto remove_sdev_ufs_device
;
4256 scsi_device_put(sdev_boot
);
4258 sdev_rpmb
= __scsi_add_device(hba
->host
, 0, 0,
4259 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN
), NULL
);
4260 if (IS_ERR(sdev_rpmb
)) {
4261 ret
= PTR_ERR(sdev_rpmb
);
4262 goto remove_sdev_boot
;
4264 scsi_device_put(sdev_rpmb
);
4268 scsi_remove_device(sdev_boot
);
4269 remove_sdev_ufs_device
:
4270 scsi_remove_device(hba
->sdev_ufs_device
);
4276 * ufshcd_probe_hba - probe hba to detect device and initialize
4277 * @hba: per-adapter instance
4279 * Execute link-startup and verify device initialization
4281 static int ufshcd_probe_hba(struct ufs_hba
*hba
)
4285 ret
= ufshcd_link_startup(hba
);
4289 ufshcd_init_pwr_info(hba
);
4291 /* UniPro link is active now */
4292 ufshcd_set_link_active(hba
);
4294 ret
= ufshcd_verify_dev_init(hba
);
4298 ret
= ufshcd_complete_dev_init(hba
);
4302 /* UFS device is also active now */
4303 ufshcd_set_ufs_dev_active(hba
);
4304 ufshcd_force_reset_auto_bkops(hba
);
4305 hba
->ufshcd_state
= UFSHCD_STATE_OPERATIONAL
;
4306 hba
->wlun_dev_clr_ua
= true;
4308 if (ufshcd_get_max_pwr_mode(hba
)) {
4310 "%s: Failed getting max supported power mode\n",
4313 ret
= ufshcd_config_pwr_mode(hba
, &hba
->max_pwr_info
.info
);
4315 dev_err(hba
->dev
, "%s: Failed setting power mode, err = %d\n",
4320 * If we are in error handling context or in power management callbacks
4321 * context, no need to scan the host
4323 if (!ufshcd_eh_in_progress(hba
) && !hba
->pm_op_in_progress
) {
4326 /* clear any previous UFS device information */
4327 memset(&hba
->dev_info
, 0, sizeof(hba
->dev_info
));
4328 if (!ufshcd_query_flag(hba
, UPIU_QUERY_OPCODE_READ_FLAG
,
4329 QUERY_FLAG_IDN_PWR_ON_WPE
, &flag
))
4330 hba
->dev_info
.f_power_on_wp_en
= flag
;
4332 if (!hba
->is_init_prefetch
)
4333 ufshcd_init_icc_levels(hba
);
4335 /* Add required well known logical units to scsi mid layer */
4336 ret
= ufshcd_scsi_add_wlus(hba
);
4340 scsi_scan_host(hba
->host
);
4341 pm_runtime_put_sync(hba
->dev
);
4344 if (!hba
->is_init_prefetch
)
4345 hba
->is_init_prefetch
= true;
4347 /* Resume devfreq after UFS device is detected */
4348 if (ufshcd_is_clkscaling_enabled(hba
))
4349 devfreq_resume_device(hba
->devfreq
);
4353 * If we failed to initialize the device or the device is not
4354 * present, turn off the power/clocks etc.
4356 if (ret
&& !ufshcd_eh_in_progress(hba
) && !hba
->pm_op_in_progress
) {
4357 pm_runtime_put_sync(hba
->dev
);
4358 ufshcd_hba_exit(hba
);
4365 * ufshcd_async_scan - asynchronous execution for probing hba
4366 * @data: data pointer to pass to this function
4367 * @cookie: cookie data
4369 static void ufshcd_async_scan(void *data
, async_cookie_t cookie
)
4371 struct ufs_hba
*hba
= (struct ufs_hba
*)data
;
4373 ufshcd_probe_hba(hba
);
4376 static struct scsi_host_template ufshcd_driver_template
= {
4377 .module
= THIS_MODULE
,
4379 .proc_name
= UFSHCD
,
4380 .queuecommand
= ufshcd_queuecommand
,
4381 .slave_alloc
= ufshcd_slave_alloc
,
4382 .slave_configure
= ufshcd_slave_configure
,
4383 .slave_destroy
= ufshcd_slave_destroy
,
4384 .change_queue_depth
= ufshcd_change_queue_depth
,
4385 .eh_abort_handler
= ufshcd_abort
,
4386 .eh_device_reset_handler
= ufshcd_eh_device_reset_handler
,
4387 .eh_host_reset_handler
= ufshcd_eh_host_reset_handler
,
4389 .sg_tablesize
= SG_ALL
,
4390 .cmd_per_lun
= UFSHCD_CMD_PER_LUN
,
4391 .can_queue
= UFSHCD_CAN_QUEUE
,
4392 .max_host_blocked
= 1,
4393 .track_queue_depth
= 1,
4396 static int ufshcd_config_vreg_load(struct device
*dev
, struct ufs_vreg
*vreg
,
4405 * "set_load" operation shall be required on those regulators
4406 * which specifically configured current limitation. Otherwise
4407 * zero max_uA may cause unexpected behavior when regulator is
4408 * enabled or set as high power mode.
4413 ret
= regulator_set_load(vreg
->reg
, ua
);
4415 dev_err(dev
, "%s: %s set load (ua=%d) failed, err=%d\n",
4416 __func__
, vreg
->name
, ua
, ret
);
4422 static inline int ufshcd_config_vreg_lpm(struct ufs_hba
*hba
,
4423 struct ufs_vreg
*vreg
)
4425 return ufshcd_config_vreg_load(hba
->dev
, vreg
, UFS_VREG_LPM_LOAD_UA
);
4428 static inline int ufshcd_config_vreg_hpm(struct ufs_hba
*hba
,
4429 struct ufs_vreg
*vreg
)
4434 return ufshcd_config_vreg_load(hba
->dev
, vreg
, vreg
->max_uA
);
4437 static int ufshcd_config_vreg(struct device
*dev
,
4438 struct ufs_vreg
*vreg
, bool on
)
4441 struct regulator
*reg
;
4443 int min_uV
, uA_load
;
4450 if (regulator_count_voltages(reg
) > 0) {
4451 if (vreg
->min_uV
&& vreg
->max_uV
) {
4452 min_uV
= on
? vreg
->min_uV
: 0;
4453 ret
= regulator_set_voltage(reg
, min_uV
, vreg
->max_uV
);
4456 "%s: %s set voltage failed, err=%d\n",
4457 __func__
, name
, ret
);
4462 uA_load
= on
? vreg
->max_uA
: 0;
4463 ret
= ufshcd_config_vreg_load(dev
, vreg
, uA_load
);
4471 static int ufshcd_enable_vreg(struct device
*dev
, struct ufs_vreg
*vreg
)
4475 if (!vreg
|| vreg
->enabled
)
4478 ret
= ufshcd_config_vreg(dev
, vreg
, true);
4480 ret
= regulator_enable(vreg
->reg
);
4483 vreg
->enabled
= true;
4485 dev_err(dev
, "%s: %s enable failed, err=%d\n",
4486 __func__
, vreg
->name
, ret
);
4491 static int ufshcd_disable_vreg(struct device
*dev
, struct ufs_vreg
*vreg
)
4495 if (!vreg
|| !vreg
->enabled
)
4498 ret
= regulator_disable(vreg
->reg
);
4501 /* ignore errors on applying disable config */
4502 ufshcd_config_vreg(dev
, vreg
, false);
4503 vreg
->enabled
= false;
4505 dev_err(dev
, "%s: %s disable failed, err=%d\n",
4506 __func__
, vreg
->name
, ret
);
4512 static int ufshcd_setup_vreg(struct ufs_hba
*hba
, bool on
)
4515 struct device
*dev
= hba
->dev
;
4516 struct ufs_vreg_info
*info
= &hba
->vreg_info
;
4521 ret
= ufshcd_toggle_vreg(dev
, info
->vcc
, on
);
4525 ret
= ufshcd_toggle_vreg(dev
, info
->vccq
, on
);
4529 ret
= ufshcd_toggle_vreg(dev
, info
->vccq2
, on
);
4535 ufshcd_toggle_vreg(dev
, info
->vccq2
, false);
4536 ufshcd_toggle_vreg(dev
, info
->vccq
, false);
4537 ufshcd_toggle_vreg(dev
, info
->vcc
, false);
4542 static int ufshcd_setup_hba_vreg(struct ufs_hba
*hba
, bool on
)
4544 struct ufs_vreg_info
*info
= &hba
->vreg_info
;
4547 return ufshcd_toggle_vreg(hba
->dev
, info
->vdd_hba
, on
);
4552 static int ufshcd_get_vreg(struct device
*dev
, struct ufs_vreg
*vreg
)
4559 vreg
->reg
= devm_regulator_get(dev
, vreg
->name
);
4560 if (IS_ERR(vreg
->reg
)) {
4561 ret
= PTR_ERR(vreg
->reg
);
4562 dev_err(dev
, "%s: %s get failed, err=%d\n",
4563 __func__
, vreg
->name
, ret
);
4569 static int ufshcd_init_vreg(struct ufs_hba
*hba
)
4572 struct device
*dev
= hba
->dev
;
4573 struct ufs_vreg_info
*info
= &hba
->vreg_info
;
4578 ret
= ufshcd_get_vreg(dev
, info
->vcc
);
4582 ret
= ufshcd_get_vreg(dev
, info
->vccq
);
4586 ret
= ufshcd_get_vreg(dev
, info
->vccq2
);
4591 static int ufshcd_init_hba_vreg(struct ufs_hba
*hba
)
4593 struct ufs_vreg_info
*info
= &hba
->vreg_info
;
4596 return ufshcd_get_vreg(hba
->dev
, info
->vdd_hba
);
4601 static int __ufshcd_setup_clocks(struct ufs_hba
*hba
, bool on
,
4605 struct ufs_clk_info
*clki
;
4606 struct list_head
*head
= &hba
->clk_list_head
;
4607 unsigned long flags
;
4609 if (!head
|| list_empty(head
))
4612 list_for_each_entry(clki
, head
, list
) {
4613 if (!IS_ERR_OR_NULL(clki
->clk
)) {
4614 if (skip_ref_clk
&& !strcmp(clki
->name
, "ref_clk"))
4617 if (on
&& !clki
->enabled
) {
4618 ret
= clk_prepare_enable(clki
->clk
);
4620 dev_err(hba
->dev
, "%s: %s prepare enable failed, %d\n",
4621 __func__
, clki
->name
, ret
);
4624 } else if (!on
&& clki
->enabled
) {
4625 clk_disable_unprepare(clki
->clk
);
4628 dev_dbg(hba
->dev
, "%s: clk: %s %sabled\n", __func__
,
4629 clki
->name
, on
? "en" : "dis");
4633 ret
= ufshcd_vops_setup_clocks(hba
, on
);
4636 list_for_each_entry(clki
, head
, list
) {
4637 if (!IS_ERR_OR_NULL(clki
->clk
) && clki
->enabled
)
4638 clk_disable_unprepare(clki
->clk
);
4641 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
4642 hba
->clk_gating
.state
= CLKS_ON
;
4643 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4648 static int ufshcd_setup_clocks(struct ufs_hba
*hba
, bool on
)
4650 return __ufshcd_setup_clocks(hba
, on
, false);
4653 static int ufshcd_init_clocks(struct ufs_hba
*hba
)
4656 struct ufs_clk_info
*clki
;
4657 struct device
*dev
= hba
->dev
;
4658 struct list_head
*head
= &hba
->clk_list_head
;
4660 if (!head
|| list_empty(head
))
4663 list_for_each_entry(clki
, head
, list
) {
4667 clki
->clk
= devm_clk_get(dev
, clki
->name
);
4668 if (IS_ERR(clki
->clk
)) {
4669 ret
= PTR_ERR(clki
->clk
);
4670 dev_err(dev
, "%s: %s clk get failed, %d\n",
4671 __func__
, clki
->name
, ret
);
4675 if (clki
->max_freq
) {
4676 ret
= clk_set_rate(clki
->clk
, clki
->max_freq
);
4678 dev_err(hba
->dev
, "%s: %s clk set rate(%dHz) failed, %d\n",
4679 __func__
, clki
->name
,
4680 clki
->max_freq
, ret
);
4683 clki
->curr_freq
= clki
->max_freq
;
4685 dev_dbg(dev
, "%s: clk: %s, rate: %lu\n", __func__
,
4686 clki
->name
, clk_get_rate(clki
->clk
));
4692 static int ufshcd_variant_hba_init(struct ufs_hba
*hba
)
4699 err
= ufshcd_vops_init(hba
);
4703 err
= ufshcd_vops_setup_regulators(hba
, true);
4710 ufshcd_vops_exit(hba
);
4713 dev_err(hba
->dev
, "%s: variant %s init failed err %d\n",
4714 __func__
, ufshcd_get_var_name(hba
), err
);
4718 static void ufshcd_variant_hba_exit(struct ufs_hba
*hba
)
4723 ufshcd_vops_setup_clocks(hba
, false);
4725 ufshcd_vops_setup_regulators(hba
, false);
4727 ufshcd_vops_exit(hba
);
4730 static int ufshcd_hba_init(struct ufs_hba
*hba
)
4735 * Handle host controller power separately from the UFS device power
4736 * rails as it will help controlling the UFS host controller power
4737 * collapse easily which is different than UFS device power collapse.
4738 * Also, enable the host controller power before we go ahead with rest
4739 * of the initialization here.
4741 err
= ufshcd_init_hba_vreg(hba
);
4745 err
= ufshcd_setup_hba_vreg(hba
, true);
4749 err
= ufshcd_init_clocks(hba
);
4751 goto out_disable_hba_vreg
;
4753 err
= ufshcd_setup_clocks(hba
, true);
4755 goto out_disable_hba_vreg
;
4757 err
= ufshcd_init_vreg(hba
);
4759 goto out_disable_clks
;
4761 err
= ufshcd_setup_vreg(hba
, true);
4763 goto out_disable_clks
;
4765 err
= ufshcd_variant_hba_init(hba
);
4767 goto out_disable_vreg
;
4769 hba
->is_powered
= true;
4773 ufshcd_setup_vreg(hba
, false);
4775 ufshcd_setup_clocks(hba
, false);
4776 out_disable_hba_vreg
:
4777 ufshcd_setup_hba_vreg(hba
, false);
4782 static void ufshcd_hba_exit(struct ufs_hba
*hba
)
4784 if (hba
->is_powered
) {
4785 ufshcd_variant_hba_exit(hba
);
4786 ufshcd_setup_vreg(hba
, false);
4787 ufshcd_setup_clocks(hba
, false);
4788 ufshcd_setup_hba_vreg(hba
, false);
4789 hba
->is_powered
= false;
4794 ufshcd_send_request_sense(struct ufs_hba
*hba
, struct scsi_device
*sdp
)
4796 unsigned char cmd
[6] = {REQUEST_SENSE
,
4800 SCSI_SENSE_BUFFERSIZE
,
4805 buffer
= kzalloc(SCSI_SENSE_BUFFERSIZE
, GFP_KERNEL
);
4811 ret
= scsi_execute_req_flags(sdp
, cmd
, DMA_FROM_DEVICE
, buffer
,
4812 SCSI_SENSE_BUFFERSIZE
, NULL
,
4813 msecs_to_jiffies(1000), 3, NULL
, REQ_PM
);
4815 pr_err("%s: failed with err %d\n", __func__
, ret
);
4823 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
4825 * @hba: per adapter instance
4826 * @pwr_mode: device power mode to set
4828 * Returns 0 if requested power mode is set successfully
4829 * Returns non-zero if failed to set the requested power mode
4831 static int ufshcd_set_dev_pwr_mode(struct ufs_hba
*hba
,
4832 enum ufs_dev_pwr_mode pwr_mode
)
4834 unsigned char cmd
[6] = { START_STOP
};
4835 struct scsi_sense_hdr sshdr
;
4836 struct scsi_device
*sdp
;
4837 unsigned long flags
;
4840 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
4841 sdp
= hba
->sdev_ufs_device
;
4843 ret
= scsi_device_get(sdp
);
4844 if (!ret
&& !scsi_device_online(sdp
)) {
4846 scsi_device_put(sdp
);
4851 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
4857 * If scsi commands fail, the scsi mid-layer schedules scsi error-
4858 * handling, which would wait for host to be resumed. Since we know
4859 * we are functional while we are here, skip host resume in error
4862 hba
->host
->eh_noresume
= 1;
4863 if (hba
->wlun_dev_clr_ua
) {
4864 ret
= ufshcd_send_request_sense(hba
, sdp
);
4867 /* Unit attention condition is cleared now */
4868 hba
->wlun_dev_clr_ua
= false;
4871 cmd
[4] = pwr_mode
<< 4;
4874 * Current function would be generally called from the power management
4875 * callbacks hence set the REQ_PM flag so that it doesn't resume the
4876 * already suspended childs.
4878 ret
= scsi_execute_req_flags(sdp
, cmd
, DMA_NONE
, NULL
, 0, &sshdr
,
4879 START_STOP_TIMEOUT
, 0, NULL
, REQ_PM
);
4881 sdev_printk(KERN_WARNING
, sdp
,
4882 "START_STOP failed for power mode: %d, result %x\n",
4884 if (driver_byte(ret
) & DRIVER_SENSE
)
4885 scsi_print_sense_hdr(sdp
, NULL
, &sshdr
);
4889 hba
->curr_dev_pwr_mode
= pwr_mode
;
4891 scsi_device_put(sdp
);
4892 hba
->host
->eh_noresume
= 0;
4896 static int ufshcd_link_state_transition(struct ufs_hba
*hba
,
4897 enum uic_link_state req_link_state
,
4898 int check_for_bkops
)
4902 if (req_link_state
== hba
->uic_link_state
)
4905 if (req_link_state
== UIC_LINK_HIBERN8_STATE
) {
4906 ret
= ufshcd_uic_hibern8_enter(hba
);
4908 ufshcd_set_link_hibern8(hba
);
4913 * If autobkops is enabled, link can't be turned off because
4914 * turning off the link would also turn off the device.
4916 else if ((req_link_state
== UIC_LINK_OFF_STATE
) &&
4917 (!check_for_bkops
|| (check_for_bkops
&&
4918 !hba
->auto_bkops_enabled
))) {
4920 * Change controller state to "reset state" which
4921 * should also put the link in off/reset state
4923 ufshcd_hba_stop(hba
);
4925 * TODO: Check if we need any delay to make sure that
4926 * controller is reset
4928 ufshcd_set_link_off(hba
);
4935 static void ufshcd_vreg_set_lpm(struct ufs_hba
*hba
)
4938 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
4941 * If UFS device and link is in OFF state, all power supplies (VCC,
4942 * VCCQ, VCCQ2) can be turned off if power on write protect is not
4943 * required. If UFS link is inactive (Hibern8 or OFF state) and device
4944 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
4946 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
4947 * in low power state which would save some power.
4949 if (ufshcd_is_ufs_dev_poweroff(hba
) && ufshcd_is_link_off(hba
) &&
4950 !hba
->dev_info
.is_lu_power_on_wp
) {
4951 ufshcd_setup_vreg(hba
, false);
4952 } else if (!ufshcd_is_ufs_dev_active(hba
)) {
4953 ufshcd_toggle_vreg(hba
->dev
, hba
->vreg_info
.vcc
, false);
4954 if (!ufshcd_is_link_active(hba
)) {
4955 ufshcd_config_vreg_lpm(hba
, hba
->vreg_info
.vccq
);
4956 ufshcd_config_vreg_lpm(hba
, hba
->vreg_info
.vccq2
);
4961 static int ufshcd_vreg_set_hpm(struct ufs_hba
*hba
)
4965 if (ufshcd_is_ufs_dev_poweroff(hba
) && ufshcd_is_link_off(hba
) &&
4966 !hba
->dev_info
.is_lu_power_on_wp
) {
4967 ret
= ufshcd_setup_vreg(hba
, true);
4968 } else if (!ufshcd_is_ufs_dev_active(hba
)) {
4969 ret
= ufshcd_toggle_vreg(hba
->dev
, hba
->vreg_info
.vcc
, true);
4970 if (!ret
&& !ufshcd_is_link_active(hba
)) {
4971 ret
= ufshcd_config_vreg_hpm(hba
, hba
->vreg_info
.vccq
);
4974 ret
= ufshcd_config_vreg_hpm(hba
, hba
->vreg_info
.vccq2
);
4982 ufshcd_config_vreg_lpm(hba
, hba
->vreg_info
.vccq
);
4984 ufshcd_toggle_vreg(hba
->dev
, hba
->vreg_info
.vcc
, false);
4989 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba
*hba
)
4991 if (ufshcd_is_link_off(hba
))
4992 ufshcd_setup_hba_vreg(hba
, false);
4995 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba
*hba
)
4997 if (ufshcd_is_link_off(hba
))
4998 ufshcd_setup_hba_vreg(hba
, true);
5002 * ufshcd_suspend - helper function for suspend operations
5003 * @hba: per adapter instance
5004 * @pm_op: desired low power operation type
5006 * This function will try to put the UFS device and link into low power
5007 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
5008 * (System PM level).
5010 * If this function is called during shutdown, it will make sure that
5011 * both UFS device and UFS link is powered off.
5013 * NOTE: UFS device & link must be active before we enter in this function.
5015 * Returns 0 for success and non-zero for failure
5017 static int ufshcd_suspend(struct ufs_hba
*hba
, enum ufs_pm_op pm_op
)
5020 enum ufs_pm_level pm_lvl
;
5021 enum ufs_dev_pwr_mode req_dev_pwr_mode
;
5022 enum uic_link_state req_link_state
;
5024 hba
->pm_op_in_progress
= 1;
5025 if (!ufshcd_is_shutdown_pm(pm_op
)) {
5026 pm_lvl
= ufshcd_is_runtime_pm(pm_op
) ?
5027 hba
->rpm_lvl
: hba
->spm_lvl
;
5028 req_dev_pwr_mode
= ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl
);
5029 req_link_state
= ufs_get_pm_lvl_to_link_pwr_state(pm_lvl
);
5031 req_dev_pwr_mode
= UFS_POWERDOWN_PWR_MODE
;
5032 req_link_state
= UIC_LINK_OFF_STATE
;
5036 * If we can't transition into any of the low power modes
5037 * just gate the clocks.
5039 ufshcd_hold(hba
, false);
5040 hba
->clk_gating
.is_suspended
= true;
5042 if (req_dev_pwr_mode
== UFS_ACTIVE_PWR_MODE
&&
5043 req_link_state
== UIC_LINK_ACTIVE_STATE
) {
5047 if ((req_dev_pwr_mode
== hba
->curr_dev_pwr_mode
) &&
5048 (req_link_state
== hba
->uic_link_state
))
5051 /* UFS device & link must be active before we enter in this function */
5052 if (!ufshcd_is_ufs_dev_active(hba
) || !ufshcd_is_link_active(hba
)) {
5057 if (ufshcd_is_runtime_pm(pm_op
)) {
5058 if (ufshcd_can_autobkops_during_suspend(hba
)) {
5060 * The device is idle with no requests in the queue,
5061 * allow background operations if bkops status shows
5062 * that performance might be impacted.
5064 ret
= ufshcd_urgent_bkops(hba
);
5068 /* make sure that auto bkops is disabled */
5069 ufshcd_disable_auto_bkops(hba
);
5073 if ((req_dev_pwr_mode
!= hba
->curr_dev_pwr_mode
) &&
5074 ((ufshcd_is_runtime_pm(pm_op
) && !hba
->auto_bkops_enabled
) ||
5075 !ufshcd_is_runtime_pm(pm_op
))) {
5076 /* ensure that bkops is disabled */
5077 ufshcd_disable_auto_bkops(hba
);
5078 ret
= ufshcd_set_dev_pwr_mode(hba
, req_dev_pwr_mode
);
5083 ret
= ufshcd_link_state_transition(hba
, req_link_state
, 1);
5085 goto set_dev_active
;
5087 ufshcd_vreg_set_lpm(hba
);
5091 * The clock scaling needs access to controller registers. Hence, Wait
5092 * for pending clock scaling work to be done before clocks are
5095 if (ufshcd_is_clkscaling_enabled(hba
)) {
5096 devfreq_suspend_device(hba
->devfreq
);
5097 hba
->clk_scaling
.window_start_t
= 0;
5100 * Call vendor specific suspend callback. As these callbacks may access
5101 * vendor specific host controller register space call them before the
5102 * host clocks are ON.
5104 ret
= ufshcd_vops_suspend(hba
, pm_op
);
5106 goto set_link_active
;
5108 ret
= ufshcd_vops_setup_clocks(hba
, false);
5112 if (!ufshcd_is_link_active(hba
))
5113 ufshcd_setup_clocks(hba
, false);
5115 /* If link is active, device ref_clk can't be switched off */
5116 __ufshcd_setup_clocks(hba
, false, true);
5118 hba
->clk_gating
.state
= CLKS_OFF
;
5120 * Disable the host irq as host controller as there won't be any
5121 * host controller transaction expected till resume.
5123 ufshcd_disable_irq(hba
);
5124 /* Put the host controller in low power mode if possible */
5125 ufshcd_hba_vreg_set_lpm(hba
);
5129 ufshcd_vops_resume(hba
, pm_op
);
5131 ufshcd_vreg_set_hpm(hba
);
5132 if (ufshcd_is_link_hibern8(hba
) && !ufshcd_uic_hibern8_exit(hba
))
5133 ufshcd_set_link_active(hba
);
5134 else if (ufshcd_is_link_off(hba
))
5135 ufshcd_host_reset_and_restore(hba
);
5137 if (!ufshcd_set_dev_pwr_mode(hba
, UFS_ACTIVE_PWR_MODE
))
5138 ufshcd_disable_auto_bkops(hba
);
5140 hba
->clk_gating
.is_suspended
= false;
5141 ufshcd_release(hba
);
5143 hba
->pm_op_in_progress
= 0;
5148 * ufshcd_resume - helper function for resume operations
5149 * @hba: per adapter instance
5150 * @pm_op: runtime PM or system PM
5152 * This function basically brings the UFS device, UniPro link and controller
5155 * Returns 0 for success and non-zero for failure
5157 static int ufshcd_resume(struct ufs_hba
*hba
, enum ufs_pm_op pm_op
)
5160 enum uic_link_state old_link_state
;
5162 hba
->pm_op_in_progress
= 1;
5163 old_link_state
= hba
->uic_link_state
;
5165 ufshcd_hba_vreg_set_hpm(hba
);
5166 /* Make sure clocks are enabled before accessing controller */
5167 ret
= ufshcd_setup_clocks(hba
, true);
5171 /* enable the host irq as host controller would be active soon */
5172 ret
= ufshcd_enable_irq(hba
);
5174 goto disable_irq_and_vops_clks
;
5176 ret
= ufshcd_vreg_set_hpm(hba
);
5178 goto disable_irq_and_vops_clks
;
5181 * Call vendor specific resume callback. As these callbacks may access
5182 * vendor specific host controller register space call them when the
5183 * host clocks are ON.
5185 ret
= ufshcd_vops_resume(hba
, pm_op
);
5189 if (ufshcd_is_link_hibern8(hba
)) {
5190 ret
= ufshcd_uic_hibern8_exit(hba
);
5192 ufshcd_set_link_active(hba
);
5194 goto vendor_suspend
;
5195 } else if (ufshcd_is_link_off(hba
)) {
5196 ret
= ufshcd_host_reset_and_restore(hba
);
5198 * ufshcd_host_reset_and_restore() should have already
5199 * set the link state as active
5201 if (ret
|| !ufshcd_is_link_active(hba
))
5202 goto vendor_suspend
;
5205 if (!ufshcd_is_ufs_dev_active(hba
)) {
5206 ret
= ufshcd_set_dev_pwr_mode(hba
, UFS_ACTIVE_PWR_MODE
);
5208 goto set_old_link_state
;
5211 if (ufshcd_keep_autobkops_enabled_except_suspend(hba
))
5212 ufshcd_enable_auto_bkops(hba
);
5215 * If BKOPs operations are urgently needed at this moment then
5216 * keep auto-bkops enabled or else disable it.
5218 ufshcd_urgent_bkops(hba
);
5220 hba
->clk_gating
.is_suspended
= false;
5222 if (ufshcd_is_clkscaling_enabled(hba
))
5223 devfreq_resume_device(hba
->devfreq
);
5225 /* Schedule clock gating in case of no access to UFS device yet */
5226 ufshcd_release(hba
);
5230 ufshcd_link_state_transition(hba
, old_link_state
, 0);
5232 ufshcd_vops_suspend(hba
, pm_op
);
5234 ufshcd_vreg_set_lpm(hba
);
5235 disable_irq_and_vops_clks
:
5236 ufshcd_disable_irq(hba
);
5237 ufshcd_setup_clocks(hba
, false);
5239 hba
->pm_op_in_progress
= 0;
5244 * ufshcd_system_suspend - system suspend routine
5245 * @hba: per adapter instance
5246 * @pm_op: runtime PM or system PM
5248 * Check the description of ufshcd_suspend() function for more details.
5250 * Returns 0 for success and non-zero for failure
5252 int ufshcd_system_suspend(struct ufs_hba
*hba
)
5256 if (!hba
|| !hba
->is_powered
)
5259 if (pm_runtime_suspended(hba
->dev
)) {
5260 if (hba
->rpm_lvl
== hba
->spm_lvl
)
5262 * There is possibility that device may still be in
5263 * active state during the runtime suspend.
5265 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba
->spm_lvl
) ==
5266 hba
->curr_dev_pwr_mode
) && !hba
->auto_bkops_enabled
)
5270 * UFS device and/or UFS link low power states during runtime
5271 * suspend seems to be different than what is expected during
5272 * system suspend. Hence runtime resume the devic & link and
5273 * let the system suspend low power states to take effect.
5274 * TODO: If resume takes longer time, we might have optimize
5275 * it in future by not resuming everything if possible.
5277 ret
= ufshcd_runtime_resume(hba
);
5282 ret
= ufshcd_suspend(hba
, UFS_SYSTEM_PM
);
5285 hba
->is_sys_suspended
= true;
5288 EXPORT_SYMBOL(ufshcd_system_suspend
);
5291 * ufshcd_system_resume - system resume routine
5292 * @hba: per adapter instance
5294 * Returns 0 for success and non-zero for failure
5297 int ufshcd_system_resume(struct ufs_hba
*hba
)
5302 if (!hba
->is_powered
|| pm_runtime_suspended(hba
->dev
))
5304 * Let the runtime resume take care of resuming
5305 * if runtime suspended.
5309 return ufshcd_resume(hba
, UFS_SYSTEM_PM
);
5311 EXPORT_SYMBOL(ufshcd_system_resume
);
5314 * ufshcd_runtime_suspend - runtime suspend routine
5315 * @hba: per adapter instance
5317 * Check the description of ufshcd_suspend() function for more details.
5319 * Returns 0 for success and non-zero for failure
5321 int ufshcd_runtime_suspend(struct ufs_hba
*hba
)
5326 if (!hba
->is_powered
)
5329 return ufshcd_suspend(hba
, UFS_RUNTIME_PM
);
5331 EXPORT_SYMBOL(ufshcd_runtime_suspend
);
5334 * ufshcd_runtime_resume - runtime resume routine
5335 * @hba: per adapter instance
5337 * This function basically brings the UFS device, UniPro link and controller
5338 * to active state. Following operations are done in this function:
5340 * 1. Turn on all the controller related clocks
5341 * 2. Bring the UniPro link out of Hibernate state
5342 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
5344 * 4. If auto-bkops is enabled on the device, disable it.
5346 * So following would be the possible power state after this function return
5348 * S1: UFS device in Active state with VCC rail ON
5349 * UniPro link in Active state
5350 * All the UFS/UniPro controller clocks are ON
5352 * Returns 0 for success and non-zero for failure
5354 int ufshcd_runtime_resume(struct ufs_hba
*hba
)
5359 if (!hba
->is_powered
)
5362 return ufshcd_resume(hba
, UFS_RUNTIME_PM
);
5364 EXPORT_SYMBOL(ufshcd_runtime_resume
);
5366 int ufshcd_runtime_idle(struct ufs_hba
*hba
)
5370 EXPORT_SYMBOL(ufshcd_runtime_idle
);
5373 * ufshcd_shutdown - shutdown routine
5374 * @hba: per adapter instance
5376 * This function would power off both UFS device and UFS link.
5378 * Returns 0 always to allow force shutdown even in case of errors.
5380 int ufshcd_shutdown(struct ufs_hba
*hba
)
5384 if (!hba
->is_powered
)
5387 if (ufshcd_is_ufs_dev_poweroff(hba
) && ufshcd_is_link_off(hba
))
5390 if (pm_runtime_suspended(hba
->dev
)) {
5391 ret
= ufshcd_runtime_resume(hba
);
5396 ret
= ufshcd_suspend(hba
, UFS_SHUTDOWN_PM
);
5399 dev_err(hba
->dev
, "%s failed, err %d\n", __func__
, ret
);
5400 /* allow force shutdown even in case of errors */
5403 EXPORT_SYMBOL(ufshcd_shutdown
);
5406 * ufshcd_remove - de-allocate SCSI host and host memory space
5407 * data structure memory
5408 * @hba - per adapter instance
5410 void ufshcd_remove(struct ufs_hba
*hba
)
5412 scsi_remove_host(hba
->host
);
5413 /* disable interrupts */
5414 ufshcd_disable_intr(hba
, hba
->intr_mask
);
5415 ufshcd_hba_stop(hba
);
5417 ufshcd_exit_clk_gating(hba
);
5418 if (ufshcd_is_clkscaling_enabled(hba
))
5419 devfreq_remove_device(hba
->devfreq
);
5420 ufshcd_hba_exit(hba
);
5422 EXPORT_SYMBOL_GPL(ufshcd_remove
);
5425 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
5426 * @hba: pointer to Host Bus Adapter (HBA)
5428 void ufshcd_dealloc_host(struct ufs_hba
*hba
)
5430 scsi_host_put(hba
->host
);
5432 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host
);
5435 * ufshcd_set_dma_mask - Set dma mask based on the controller
5436 * addressing capability
5437 * @hba: per adapter instance
5439 * Returns 0 for success, non-zero for failure
5441 static int ufshcd_set_dma_mask(struct ufs_hba
*hba
)
5443 if (hba
->capabilities
& MASK_64_ADDRESSING_SUPPORT
) {
5444 if (!dma_set_mask_and_coherent(hba
->dev
, DMA_BIT_MASK(64)))
5447 return dma_set_mask_and_coherent(hba
->dev
, DMA_BIT_MASK(32));
5451 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
5452 * @dev: pointer to device handle
5453 * @hba_handle: driver private handle
5454 * Returns 0 on success, non-zero value on failure
5456 int ufshcd_alloc_host(struct device
*dev
, struct ufs_hba
**hba_handle
)
5458 struct Scsi_Host
*host
;
5459 struct ufs_hba
*hba
;
5464 "Invalid memory reference for dev is NULL\n");
5469 host
= scsi_host_alloc(&ufshcd_driver_template
,
5470 sizeof(struct ufs_hba
));
5472 dev_err(dev
, "scsi_host_alloc failed\n");
5476 hba
= shost_priv(host
);
5484 EXPORT_SYMBOL(ufshcd_alloc_host
);
5486 static int ufshcd_scale_clks(struct ufs_hba
*hba
, bool scale_up
)
5489 struct ufs_clk_info
*clki
;
5490 struct list_head
*head
= &hba
->clk_list_head
;
5492 if (!head
|| list_empty(head
))
5495 ret
= ufshcd_vops_clk_scale_notify(hba
, scale_up
, PRE_CHANGE
);
5499 list_for_each_entry(clki
, head
, list
) {
5500 if (!IS_ERR_OR_NULL(clki
->clk
)) {
5501 if (scale_up
&& clki
->max_freq
) {
5502 if (clki
->curr_freq
== clki
->max_freq
)
5504 ret
= clk_set_rate(clki
->clk
, clki
->max_freq
);
5506 dev_err(hba
->dev
, "%s: %s clk set rate(%dHz) failed, %d\n",
5507 __func__
, clki
->name
,
5508 clki
->max_freq
, ret
);
5511 clki
->curr_freq
= clki
->max_freq
;
5513 } else if (!scale_up
&& clki
->min_freq
) {
5514 if (clki
->curr_freq
== clki
->min_freq
)
5516 ret
= clk_set_rate(clki
->clk
, clki
->min_freq
);
5518 dev_err(hba
->dev
, "%s: %s clk set rate(%dHz) failed, %d\n",
5519 __func__
, clki
->name
,
5520 clki
->min_freq
, ret
);
5523 clki
->curr_freq
= clki
->min_freq
;
5526 dev_dbg(hba
->dev
, "%s: clk: %s, rate: %lu\n", __func__
,
5527 clki
->name
, clk_get_rate(clki
->clk
));
5530 ret
= ufshcd_vops_clk_scale_notify(hba
, scale_up
, POST_CHANGE
);
5536 static int ufshcd_devfreq_target(struct device
*dev
,
5537 unsigned long *freq
, u32 flags
)
5540 struct ufs_hba
*hba
= dev_get_drvdata(dev
);
5541 bool release_clk_hold
= false;
5542 unsigned long irq_flags
;
5544 if (!ufshcd_is_clkscaling_enabled(hba
))
5547 spin_lock_irqsave(hba
->host
->host_lock
, irq_flags
);
5548 if (ufshcd_eh_in_progress(hba
)) {
5549 spin_unlock_irqrestore(hba
->host
->host_lock
, irq_flags
);
5553 if (ufshcd_is_clkgating_allowed(hba
) &&
5554 (hba
->clk_gating
.state
!= CLKS_ON
)) {
5555 if (cancel_delayed_work(&hba
->clk_gating
.gate_work
)) {
5556 /* hold the vote until the scaling work is completed */
5557 hba
->clk_gating
.active_reqs
++;
5558 release_clk_hold
= true;
5559 hba
->clk_gating
.state
= CLKS_ON
;
5562 * Clock gating work seems to be running in parallel
5563 * hence skip scaling work to avoid deadlock between
5564 * current scaling work and gating work.
5566 spin_unlock_irqrestore(hba
->host
->host_lock
, irq_flags
);
5570 spin_unlock_irqrestore(hba
->host
->host_lock
, irq_flags
);
5572 if (*freq
== UINT_MAX
)
5573 err
= ufshcd_scale_clks(hba
, true);
5574 else if (*freq
== 0)
5575 err
= ufshcd_scale_clks(hba
, false);
5577 spin_lock_irqsave(hba
->host
->host_lock
, irq_flags
);
5578 if (release_clk_hold
)
5579 __ufshcd_release(hba
);
5580 spin_unlock_irqrestore(hba
->host
->host_lock
, irq_flags
);
5585 static int ufshcd_devfreq_get_dev_status(struct device
*dev
,
5586 struct devfreq_dev_status
*stat
)
5588 struct ufs_hba
*hba
= dev_get_drvdata(dev
);
5589 struct ufs_clk_scaling
*scaling
= &hba
->clk_scaling
;
5590 unsigned long flags
;
5592 if (!ufshcd_is_clkscaling_enabled(hba
))
5595 memset(stat
, 0, sizeof(*stat
));
5597 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
5598 if (!scaling
->window_start_t
)
5601 if (scaling
->is_busy_started
)
5602 scaling
->tot_busy_t
+= ktime_to_us(ktime_sub(ktime_get(),
5603 scaling
->busy_start_t
));
5605 stat
->total_time
= jiffies_to_usecs((long)jiffies
-
5606 (long)scaling
->window_start_t
);
5607 stat
->busy_time
= scaling
->tot_busy_t
;
5609 scaling
->window_start_t
= jiffies
;
5610 scaling
->tot_busy_t
= 0;
5612 if (hba
->outstanding_reqs
) {
5613 scaling
->busy_start_t
= ktime_get();
5614 scaling
->is_busy_started
= true;
5616 scaling
->busy_start_t
= ktime_set(0, 0);
5617 scaling
->is_busy_started
= false;
5619 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
5623 static struct devfreq_dev_profile ufs_devfreq_profile
= {
5625 .target
= ufshcd_devfreq_target
,
5626 .get_dev_status
= ufshcd_devfreq_get_dev_status
,
5630 * ufshcd_init - Driver initialization routine
5631 * @hba: per-adapter instance
5632 * @mmio_base: base register address
5633 * @irq: Interrupt line of device
5634 * Returns 0 on success, non-zero value on failure
5636 int ufshcd_init(struct ufs_hba
*hba
, void __iomem
*mmio_base
, unsigned int irq
)
5639 struct Scsi_Host
*host
= hba
->host
;
5640 struct device
*dev
= hba
->dev
;
5644 "Invalid memory reference for mmio_base is NULL\n");
5649 hba
->mmio_base
= mmio_base
;
5652 err
= ufshcd_hba_init(hba
);
5656 /* Read capabilities registers */
5657 ufshcd_hba_capabilities(hba
);
5659 /* Get UFS version supported by the controller */
5660 hba
->ufs_version
= ufshcd_get_ufs_version(hba
);
5662 /* Get Interrupt bit mask per version */
5663 hba
->intr_mask
= ufshcd_get_intr_mask(hba
);
5665 err
= ufshcd_set_dma_mask(hba
);
5667 dev_err(hba
->dev
, "set dma mask failed\n");
5671 /* Allocate memory for host memory space */
5672 err
= ufshcd_memory_alloc(hba
);
5674 dev_err(hba
->dev
, "Memory allocation failed\n");
5679 ufshcd_host_memory_configure(hba
);
5681 host
->can_queue
= hba
->nutrs
;
5682 host
->cmd_per_lun
= hba
->nutrs
;
5683 host
->max_id
= UFSHCD_MAX_ID
;
5684 host
->max_lun
= UFS_MAX_LUNS
;
5685 host
->max_channel
= UFSHCD_MAX_CHANNEL
;
5686 host
->unique_id
= host
->host_no
;
5687 host
->max_cmd_len
= MAX_CDB_SIZE
;
5689 hba
->max_pwr_info
.is_valid
= false;
5691 /* Initailize wait queue for task management */
5692 init_waitqueue_head(&hba
->tm_wq
);
5693 init_waitqueue_head(&hba
->tm_tag_wq
);
5695 /* Initialize work queues */
5696 INIT_WORK(&hba
->eh_work
, ufshcd_err_handler
);
5697 INIT_WORK(&hba
->eeh_work
, ufshcd_exception_event_handler
);
5699 /* Initialize UIC command mutex */
5700 mutex_init(&hba
->uic_cmd_mutex
);
5702 /* Initialize mutex for device management commands */
5703 mutex_init(&hba
->dev_cmd
.lock
);
5705 /* Initialize device management tag acquire wait queue */
5706 init_waitqueue_head(&hba
->dev_cmd
.tag_wq
);
5708 ufshcd_init_clk_gating(hba
);
5709 /* IRQ registration */
5710 err
= devm_request_irq(dev
, irq
, ufshcd_intr
, IRQF_SHARED
, UFSHCD
, hba
);
5712 dev_err(hba
->dev
, "request irq failed\n");
5715 hba
->is_irq_enabled
= true;
5718 err
= scsi_add_host(host
, hba
->dev
);
5720 dev_err(hba
->dev
, "scsi_add_host failed\n");
5724 /* Host controller enable */
5725 err
= ufshcd_hba_enable(hba
);
5727 dev_err(hba
->dev
, "Host controller enable failed\n");
5728 goto out_remove_scsi_host
;
5731 if (ufshcd_is_clkscaling_enabled(hba
)) {
5732 hba
->devfreq
= devfreq_add_device(dev
, &ufs_devfreq_profile
,
5733 "simple_ondemand", NULL
);
5734 if (IS_ERR(hba
->devfreq
)) {
5735 dev_err(hba
->dev
, "Unable to register with devfreq %ld\n",
5736 PTR_ERR(hba
->devfreq
));
5737 goto out_remove_scsi_host
;
5739 /* Suspend devfreq until the UFS device is detected */
5740 devfreq_suspend_device(hba
->devfreq
);
5741 hba
->clk_scaling
.window_start_t
= 0;
5744 /* Hold auto suspend until async scan completes */
5745 pm_runtime_get_sync(dev
);
5748 * The device-initialize-sequence hasn't been invoked yet.
5749 * Set the device to power-off state
5751 ufshcd_set_ufs_dev_poweroff(hba
);
5753 async_schedule(ufshcd_async_scan
, hba
);
5757 out_remove_scsi_host
:
5758 scsi_remove_host(hba
->host
);
5760 ufshcd_exit_clk_gating(hba
);
5762 hba
->is_irq_enabled
= false;
5763 ufshcd_hba_exit(hba
);
5767 EXPORT_SYMBOL_GPL(ufshcd_init
);
5769 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
5770 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
5771 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
5772 MODULE_LICENSE("GPL");
5773 MODULE_VERSION(UFSHCD_DRIVER_VERSION
);