2 * linux/arch/arm/mach-mmp/devices.c
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/init.h>
10 #include <linux/platform_device.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/delay.h>
15 #include <mach/irqs.h>
16 #include <mach/devices.h>
17 #include <mach/cputype.h>
18 #include <mach/regs-usb.h>
20 int __init
pxa_register_device(struct pxa_device_desc
*desc
,
21 void *data
, size_t size
)
23 struct platform_device
*pdev
;
24 struct resource res
[2 + MAX_RESOURCE_DMA
];
25 int i
, ret
= 0, nres
= 0;
27 pdev
= platform_device_alloc(desc
->drv_name
, desc
->id
);
31 pdev
->dev
.coherent_dma_mask
= DMA_BIT_MASK(32);
33 memset(res
, 0, sizeof(res
));
35 if (desc
->start
!= -1ul && desc
->size
> 0) {
36 res
[nres
].start
= desc
->start
;
37 res
[nres
].end
= desc
->start
+ desc
->size
- 1;
38 res
[nres
].flags
= IORESOURCE_MEM
;
42 if (desc
->irq
!= NO_IRQ
) {
43 res
[nres
].start
= desc
->irq
;
44 res
[nres
].end
= desc
->irq
;
45 res
[nres
].flags
= IORESOURCE_IRQ
;
49 for (i
= 0; i
< MAX_RESOURCE_DMA
; i
++, nres
++) {
50 if (desc
->dma
[i
] == 0)
53 res
[nres
].start
= desc
->dma
[i
];
54 res
[nres
].end
= desc
->dma
[i
];
55 res
[nres
].flags
= IORESOURCE_DMA
;
58 ret
= platform_device_add_resources(pdev
, res
, nres
);
60 platform_device_put(pdev
);
65 ret
= platform_device_add_data(pdev
, data
, size
);
67 platform_device_put(pdev
);
72 return platform_device_add(pdev
);
75 #if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET)
77 /*****************************************************************************
78 * The registers read/write routines
79 *****************************************************************************/
81 static unsigned int u2o_get(void __iomem
*base
, unsigned int offset
)
83 return readl_relaxed(base
+ offset
);
86 static void u2o_set(void __iomem
*base
, unsigned int offset
,
91 reg
= readl_relaxed(base
+ offset
);
93 writel_relaxed(reg
, base
+ offset
);
94 readl_relaxed(base
+ offset
);
97 static void u2o_clear(void __iomem
*base
, unsigned int offset
,
102 reg
= readl_relaxed(base
+ offset
);
104 writel_relaxed(reg
, base
+ offset
);
105 readl_relaxed(base
+ offset
);
108 static void u2o_write(void __iomem
*base
, unsigned int offset
,
111 writel_relaxed(value
, base
+ offset
);
112 readl_relaxed(base
+ offset
);
115 #if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV)
117 #if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168)
119 static DEFINE_MUTEX(phy_lock
);
120 static int phy_init_cnt
;
122 static int usb_phy_init_internal(void __iomem
*base
)
126 pr_info("Init usb phy!!!\n");
128 /* Initialize the USB PHY power */
129 if (cpu_is_pxa910()) {
130 u2o_set(base
, UTMI_CTRL
, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT
)
131 | (1<<UTMI_CTRL_PU_REF_SHIFT
));
134 u2o_set(base
, UTMI_CTRL
, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT
);
135 u2o_set(base
, UTMI_CTRL
, 1<<UTMI_CTRL_PWR_UP_SHIFT
);
137 /* UTMI_PLL settings */
138 u2o_clear(base
, UTMI_PLL
, UTMI_PLL_PLLVDD18_MASK
139 | UTMI_PLL_PLLVDD12_MASK
| UTMI_PLL_PLLCALI12_MASK
140 | UTMI_PLL_FBDIV_MASK
| UTMI_PLL_REFDIV_MASK
141 | UTMI_PLL_ICP_MASK
| UTMI_PLL_KVCO_MASK
);
143 u2o_set(base
, UTMI_PLL
, 0xee<<UTMI_PLL_FBDIV_SHIFT
144 | 0xb<<UTMI_PLL_REFDIV_SHIFT
| 3<<UTMI_PLL_PLLVDD18_SHIFT
145 | 3<<UTMI_PLL_PLLVDD12_SHIFT
| 3<<UTMI_PLL_PLLCALI12_SHIFT
146 | 1<<UTMI_PLL_ICP_SHIFT
| 3<<UTMI_PLL_KVCO_SHIFT
);
149 u2o_clear(base
, UTMI_TX
, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
150 | UTMI_TX_TXVDD12_MASK
| UTMI_TX_CK60_PHSEL_MASK
151 | UTMI_TX_IMPCAL_VTH_MASK
| UTMI_TX_REG_EXT_FS_RCAL_MASK
153 u2o_set(base
, UTMI_TX
, 3<<UTMI_TX_TXVDD12_SHIFT
154 | 4<<UTMI_TX_CK60_PHSEL_SHIFT
| 4<<UTMI_TX_IMPCAL_VTH_SHIFT
155 | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT
| 3<<UTMI_TX_AMP_SHIFT
);
158 u2o_clear(base
, UTMI_RX
, UTMI_RX_SQ_THRESH_MASK
159 | UTMI_REG_SQ_LENGTH_MASK
);
160 u2o_set(base
, UTMI_RX
, 7<<UTMI_RX_SQ_THRESH_SHIFT
161 | 2<<UTMI_REG_SQ_LENGTH_SHIFT
);
165 /* fixing Microsoft Altair board interface with NEC hub issue -
166 * Set UTMI_IVREF from 0x4a3 to 0x4bf */
167 u2o_write(base
, UTMI_IVREF
, 0x4bf);
169 /* toggle VCOCAL_START bit of UTMI_PLL */
171 u2o_set(base
, UTMI_PLL
, VCOCAL_START
);
173 u2o_clear(base
, UTMI_PLL
, VCOCAL_START
);
175 /* toggle REG_RCAL_START bit of UTMI_TX */
177 u2o_set(base
, UTMI_TX
, REG_RCAL_START
);
179 u2o_clear(base
, UTMI_TX
, REG_RCAL_START
);
182 /* Make sure PHY PLL is ready */
184 while ((u2o_get(base
, UTMI_PLL
) & PLL_READY
) == 0) {
188 printk(KERN_WARNING
"calibrate timeout, UTMI_PLL %x\n",
189 u2o_get(base
, UTMI_PLL
));
194 if (cpu_is_pxa168()) {
195 u2o_set(base
, UTMI_RESERVE
, 1 << 5);
196 /* Turn on UTMI PHY OTG extension */
197 u2o_write(base
, UTMI_OTG_ADDON
, 1);
203 static int usb_phy_deinit_internal(void __iomem
*base
)
205 pr_info("Deinit usb phy!!!\n");
208 u2o_clear(base
, UTMI_OTG_ADDON
, UTMI_OTG_ADDON_OTG_ON
);
210 u2o_clear(base
, UTMI_CTRL
, UTMI_CTRL_RXBUF_PDWN
);
211 u2o_clear(base
, UTMI_CTRL
, UTMI_CTRL_TXBUF_PDWN
);
212 u2o_clear(base
, UTMI_CTRL
, UTMI_CTRL_USB_CLK_EN
);
213 u2o_clear(base
, UTMI_CTRL
, 1<<UTMI_CTRL_PWR_UP_SHIFT
);
214 u2o_clear(base
, UTMI_CTRL
, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT
);
219 int pxa_usb_phy_init(void __iomem
*phy_reg
)
221 mutex_lock(&phy_lock
);
222 if (phy_init_cnt
++ == 0)
223 usb_phy_init_internal(phy_reg
);
224 mutex_unlock(&phy_lock
);
228 void pxa_usb_phy_deinit(void __iomem
*phy_reg
)
230 WARN_ON(phy_init_cnt
== 0);
232 mutex_lock(&phy_lock
);
233 if (--phy_init_cnt
== 0)
234 usb_phy_deinit_internal(phy_reg
);
235 mutex_unlock(&phy_lock
);
241 #ifdef CONFIG_USB_SUPPORT
242 static u64 usb_dma_mask
= ~(u32
)0;
244 #ifdef CONFIG_USB_MV_UDC
245 struct resource pxa168_u2o_resources
[] = {
248 .start
= PXA168_U2O_REGBASE
+ U2x_CAPREGS_OFFSET
,
249 .end
= PXA168_U2O_REGBASE
+ USB_REG_RANGE
,
250 .flags
= IORESOURCE_MEM
,
255 .start
= PXA168_U2O_PHYBASE
,
256 .end
= PXA168_U2O_PHYBASE
+ USB_PHY_RANGE
,
257 .flags
= IORESOURCE_MEM
,
261 .start
= IRQ_PXA168_USB1
,
262 .end
= IRQ_PXA168_USB1
,
263 .flags
= IORESOURCE_IRQ
,
267 struct platform_device pxa168_device_u2o
= {
270 .resource
= pxa168_u2o_resources
,
271 .num_resources
= ARRAY_SIZE(pxa168_u2o_resources
),
273 .dma_mask
= &usb_dma_mask
,
274 .coherent_dma_mask
= 0xffffffff,
277 #endif /* CONFIG_USB_MV_UDC */
279 #ifdef CONFIG_USB_EHCI_MV_U2O
280 struct resource pxa168_u2oehci_resources
[] = {
283 .start
= PXA168_U2O_REGBASE
+ U2x_CAPREGS_OFFSET
,
284 .end
= PXA168_U2O_REGBASE
+ USB_REG_RANGE
,
285 .flags
= IORESOURCE_MEM
,
290 .start
= PXA168_U2O_PHYBASE
,
291 .end
= PXA168_U2O_PHYBASE
+ USB_PHY_RANGE
,
292 .flags
= IORESOURCE_MEM
,
296 .start
= IRQ_PXA168_USB1
,
297 .end
= IRQ_PXA168_USB1
,
298 .flags
= IORESOURCE_IRQ
,
302 struct platform_device pxa168_device_u2oehci
= {
303 .name
= "pxa-u2oehci",
306 .dma_mask
= &usb_dma_mask
,
307 .coherent_dma_mask
= 0xffffffff,
310 .num_resources
= ARRAY_SIZE(pxa168_u2oehci_resources
),
311 .resource
= pxa168_u2oehci_resources
,
315 #if defined(CONFIG_USB_MV_OTG)
316 struct resource pxa168_u2ootg_resources
[] = {
319 .start
= PXA168_U2O_REGBASE
+ U2x_CAPREGS_OFFSET
,
320 .end
= PXA168_U2O_REGBASE
+ USB_REG_RANGE
,
321 .flags
= IORESOURCE_MEM
,
326 .start
= PXA168_U2O_PHYBASE
,
327 .end
= PXA168_U2O_PHYBASE
+ USB_PHY_RANGE
,
328 .flags
= IORESOURCE_MEM
,
332 .start
= IRQ_PXA168_USB1
,
333 .end
= IRQ_PXA168_USB1
,
334 .flags
= IORESOURCE_IRQ
,
338 struct platform_device pxa168_device_u2ootg
= {
342 .dma_mask
= &usb_dma_mask
,
343 .coherent_dma_mask
= 0xffffffff,
346 .num_resources
= ARRAY_SIZE(pxa168_u2ootg_resources
),
347 .resource
= pxa168_u2ootg_resources
,
349 #endif /* CONFIG_USB_MV_OTG */