xtensa: implement jump_label support
[linux/fpc-iii.git] / arch / arm / mach-s3c64xx / mach-crag6410-module.c
blob5aa472892465ad377f46eff786890bde573addb6
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Speyside modules for Cragganmore - board data probing
4 //
5 // Copyright 2011 Wolfson Microelectronics plc
6 // Mark Brown <broonie@opensource.wolfsonmicro.com>
8 #include <linux/export.h>
9 #include <linux/interrupt.h>
10 #include <linux/i2c.h>
11 #include <linux/spi/spi.h>
12 #include <linux/gpio/machine.h>
14 #include <linux/mfd/wm831x/irq.h>
15 #include <linux/mfd/wm831x/gpio.h>
16 #include <linux/mfd/wm8994/pdata.h>
17 #include <linux/mfd/arizona/pdata.h>
19 #include <linux/regulator/machine.h>
21 #include <sound/wm0010.h>
22 #include <sound/wm2200.h>
23 #include <sound/wm5100.h>
24 #include <sound/wm8996.h>
25 #include <sound/wm8962.h>
26 #include <sound/wm9081.h>
28 #include <linux/platform_data/spi-s3c64xx.h>
30 #include <plat/cpu.h>
31 #include <mach/irqs.h>
33 #include "crag6410.h"
35 static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
36 .line = S3C64XX_GPC(3),
39 static struct wm0010_pdata wm0010_pdata = {
40 .gpio_reset = S3C64XX_GPN(6),
41 .reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
44 static struct spi_board_info wm1253_devs[] = {
45 [0] = {
46 .modalias = "wm0010",
47 .max_speed_hz = 26 * 1000 * 1000,
48 .bus_num = 0,
49 .chip_select = 0,
50 .mode = SPI_MODE_0,
51 .irq = S3C_EINT(4),
52 .controller_data = &wm0010_spi_csinfo,
53 .platform_data = &wm0010_pdata,
57 static struct spi_board_info balblair_devs[] = {
58 [0] = {
59 .modalias = "wm0010",
60 .max_speed_hz = 26 * 1000 * 1000,
61 .bus_num = 0,
62 .chip_select = 0,
63 .mode = SPI_MODE_0,
64 .irq = S3C_EINT(4),
65 .controller_data = &wm0010_spi_csinfo,
66 .platform_data = &wm0010_pdata,
70 static struct wm5100_pdata wm5100_pdata = {
71 .ldo_ena = S3C64XX_GPN(7),
72 .irq_flags = IRQF_TRIGGER_HIGH,
73 .gpio_base = CODEC_GPIO_BASE,
75 .in_mode = {
76 WM5100_IN_DIFF,
77 WM5100_IN_DIFF,
78 WM5100_IN_DIFF,
79 WM5100_IN_SE,
82 .hp_pol = CODEC_GPIO_BASE + 3,
83 .jack_modes = {
84 { WM5100_MICDET_MICBIAS3, 0, 0 },
85 { WM5100_MICDET_MICBIAS2, 1, 1 },
88 .gpio_defaults = {
93 0x2, /* IRQ: CMOS output */
94 0x3, /* CLKOUT: CMOS output */
98 static struct wm8996_retune_mobile_config wm8996_retune[] = {
100 .name = "Sub LPF",
101 .rate = 48000,
102 .regs = {
103 0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
104 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
105 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
109 .name = "Sub HPF",
110 .rate = 48000,
111 .regs = {
112 0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
113 0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
114 0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
119 static struct wm8996_pdata wm8996_pdata __initdata = {
120 .ldo_ena = S3C64XX_GPN(7),
121 .gpio_base = CODEC_GPIO_BASE,
122 .micdet_def = 1,
123 .inl_mode = WM8996_DIFFERRENTIAL_1,
124 .inr_mode = WM8996_DIFFERRENTIAL_1,
126 .irq_flags = IRQF_TRIGGER_RISING,
128 .gpio_default = {
129 0x8001, /* GPIO1 == ADCLRCLK1 */
130 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
131 0x0141, /* GPIO3 == HP_SEL */
132 0x0002, /* GPIO4 == IRQ */
133 0x020e, /* GPIO5 == CLKOUT */
136 .retune_mobile_cfgs = wm8996_retune,
137 .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
140 static struct wm8962_pdata wm8962_pdata __initdata = {
141 .gpio_init = {
143 WM8962_GPIO_FN_OPCLK,
144 WM8962_GPIO_FN_DMICCLK,
146 0x8000 | WM8962_GPIO_FN_DMICDAT,
147 WM8962_GPIO_FN_IRQ, /* Open drain mode */
149 .in4_dc_measure = true,
152 static struct wm9081_pdata wm9081_pdata __initdata = {
153 .irq_high = false,
154 .irq_cmos = false,
157 static const struct i2c_board_info wm1254_devs[] = {
158 { I2C_BOARD_INFO("wm8996", 0x1a),
159 .platform_data = &wm8996_pdata,
160 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
162 { I2C_BOARD_INFO("wm9081", 0x6c),
163 .platform_data = &wm9081_pdata, },
166 static const struct i2c_board_info wm1255_devs[] = {
167 { I2C_BOARD_INFO("wm5100", 0x1a),
168 .platform_data = &wm5100_pdata,
169 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
171 { I2C_BOARD_INFO("wm9081", 0x6c),
172 .platform_data = &wm9081_pdata, },
175 static const struct i2c_board_info wm1259_devs[] = {
176 { I2C_BOARD_INFO("wm8962", 0x1a),
177 .platform_data = &wm8962_pdata,
178 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
182 static struct regulator_init_data wm8994_ldo1 = {
183 .supply_regulator = "WALLVDD",
186 static struct regulator_init_data wm8994_ldo2 = {
187 .supply_regulator = "WALLVDD",
190 static struct wm8994_pdata wm8994_pdata = {
191 .gpio_base = CODEC_GPIO_BASE,
192 .micb2_delay = 150,
193 .gpio_defaults = {
194 0x3, /* IRQ out, active high, CMOS */
196 .ldo = {
197 { .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
198 { .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
202 static const struct i2c_board_info wm1277_devs[] = {
203 { I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
204 .platform_data = &wm8994_pdata,
205 .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
209 static struct arizona_pdata wm5102_reva_pdata = {
210 .gpio_base = CODEC_GPIO_BASE,
211 .irq_flags = IRQF_TRIGGER_HIGH,
212 .micd_pol_gpio = CODEC_GPIO_BASE + 4,
213 .micd_rate = 6,
214 .gpio_defaults = {
215 [2] = 0x10000, /* AIF3TXLRCLK */
216 [3] = 0x4, /* OPCLK */
220 static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
221 .line = S3C64XX_GPN(5),
224 static struct spi_board_info wm5102_reva_spi_devs[] = {
225 [0] = {
226 .modalias = "wm5102",
227 .max_speed_hz = 10 * 1000 * 1000,
228 .bus_num = 0,
229 .chip_select = 1,
230 .mode = SPI_MODE_0,
231 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
232 WM831X_IRQ_GPIO_2,
233 .controller_data = &codec_spi_csinfo,
234 .platform_data = &wm5102_reva_pdata,
238 static struct gpiod_lookup_table wm5102_reva_gpiod_table = {
239 .dev_id = "spi0.1", /* SPI device name */
240 .table = {
241 GPIO_LOOKUP("GPION", 7,
242 "wlf,ldoena", GPIO_ACTIVE_HIGH),
243 { },
247 static struct arizona_pdata wm5102_pdata = {
248 .gpio_base = CODEC_GPIO_BASE,
249 .irq_flags = IRQF_TRIGGER_HIGH,
250 .micd_pol_gpio = CODEC_GPIO_BASE + 2,
251 .gpio_defaults = {
252 [2] = 0x10000, /* AIF3TXLRCLK */
253 [3] = 0x4, /* OPCLK */
257 static struct spi_board_info wm5102_spi_devs[] = {
258 [0] = {
259 .modalias = "wm5102",
260 .max_speed_hz = 10 * 1000 * 1000,
261 .bus_num = 0,
262 .chip_select = 1,
263 .mode = SPI_MODE_0,
264 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
265 WM831X_IRQ_GPIO_2,
266 .controller_data = &codec_spi_csinfo,
267 .platform_data = &wm5102_pdata,
271 static struct gpiod_lookup_table wm5102_gpiod_table = {
272 .dev_id = "spi0.1", /* SPI device name */
273 .table = {
274 GPIO_LOOKUP("GPION", 7,
275 "wlf,ldo1ena", GPIO_ACTIVE_HIGH),
276 { },
280 static struct spi_board_info wm5110_spi_devs[] = {
281 [0] = {
282 .modalias = "wm5110",
283 .max_speed_hz = 10 * 1000 * 1000,
284 .bus_num = 0,
285 .chip_select = 1,
286 .mode = SPI_MODE_0,
287 .irq = GLENFARCLAS_PMIC_IRQ_BASE +
288 WM831X_IRQ_GPIO_2,
289 .controller_data = &codec_spi_csinfo,
290 .platform_data = &wm5102_reva_pdata,
294 static const struct i2c_board_info wm6230_i2c_devs[] = {
295 { I2C_BOARD_INFO("wm9081", 0x6c),
296 .platform_data = &wm9081_pdata, },
299 static struct wm2200_pdata wm2200_pdata = {
300 .ldo_ena = S3C64XX_GPN(7),
301 .gpio_defaults = {
302 [2] = 0x0005, /* GPIO3 24.576MHz output clock */
306 static const struct i2c_board_info wm2200_i2c[] = {
307 { I2C_BOARD_INFO("wm2200", 0x3a),
308 .platform_data = &wm2200_pdata, },
311 static const struct {
312 u8 id;
313 u8 rev;
314 const char *name;
315 const struct i2c_board_info *i2c_devs;
316 int num_i2c_devs;
317 const struct spi_board_info *spi_devs;
318 int num_spi_devs;
319 } gf_mods[] = {
320 { .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
321 { .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
322 { .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
323 { .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
324 { .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
325 .spi_devs = wm5110_spi_devs,
326 .num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
327 { .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
328 { .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
329 { .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
330 { .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
331 { .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
332 { .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
333 { .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
334 .i2c_devs = wm6230_i2c_devs,
335 .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
336 { .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
337 { .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
338 { .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
339 .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
340 { .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
341 { .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
342 { .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
343 .spi_devs = balblair_devs,
344 .num_spi_devs = ARRAY_SIZE(balblair_devs) },
345 { .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
346 .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
347 { .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
348 .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
349 { .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
350 .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
351 { .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
352 { .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
353 .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
354 { .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
355 .spi_devs = wm5102_reva_spi_devs,
356 .num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
357 { .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
358 .spi_devs = wm5102_spi_devs,
359 .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
360 { .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
361 .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
364 static int wlf_gf_module_probe(struct i2c_client *i2c,
365 const struct i2c_device_id *i2c_id)
367 int ret, i, j, id, rev;
369 ret = i2c_smbus_read_byte_data(i2c, 0);
370 if (ret < 0) {
371 dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
372 return ret;
375 id = (ret & 0xfe) >> 2;
376 rev = ret & 0x3;
377 for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
378 if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff ||
379 rev == gf_mods[i].rev))
380 break;
382 gpiod_add_lookup_table(&wm5102_reva_gpiod_table);
383 gpiod_add_lookup_table(&wm5102_gpiod_table);
385 if (i < ARRAY_SIZE(gf_mods)) {
386 dev_info(&i2c->dev, "%s revision %d\n",
387 gf_mods[i].name, rev + 1);
389 for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
390 if (!i2c_new_device(i2c->adapter,
391 &(gf_mods[i].i2c_devs[j])))
392 dev_err(&i2c->dev,
393 "Failed to register dev: %d\n", ret);
396 spi_register_board_info(gf_mods[i].spi_devs,
397 gf_mods[i].num_spi_devs);
398 } else {
399 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
400 id, rev + 1);
403 return 0;
406 static const struct i2c_device_id wlf_gf_module_id[] = {
407 { "wlf-gf-module", 0 },
411 static struct i2c_driver wlf_gf_module_driver = {
412 .driver = {
413 .name = "wlf-gf-module"
415 .probe = wlf_gf_module_probe,
416 .id_table = wlf_gf_module_id,
419 static int __init wlf_gf_module_register(void)
421 if (!soc_is_s3c64xx())
422 return 0;
424 return i2c_add_driver(&wlf_gf_module_driver);
426 device_initcall(wlf_gf_module_register);