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KVM: fix cleanup_srcu_struct on vm destruction
[linux/fpc-iii.git] / arch / x86 / kvm / x86.c
blob322c2c5f9bc4a6b2b28b6e322c2e9b123b6574d9
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <linux/srcu.h>
42 #include <trace/events/kvm.h>
43 #undef TRACE_INCLUDE_FILE
44 #define CREATE_TRACE_POINTS
45 #include "trace.h"
46
47 #include <asm/debugreg.h>
48 #include <asm/uaccess.h>
49 #include <asm/msr.h>
50 #include <asm/desc.h>
51 #include <asm/mtrr.h>
52 #include <asm/mce.h>
53
54 #define MAX_IO_MSRS 256
55 #define CR0_RESERVED_BITS \
56 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
57 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
58 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
59 #define CR4_RESERVED_BITS \
60 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
61 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
62 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
64
65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66
67 #define KVM_MAX_MCE_BANKS 32
68 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
69
70 /* EFER defaults:
71 * - enable syscall per default because its emulated by KVM
72 * - enable LME and LMA per default on 64 bit KVM
73 */
74 #ifdef CONFIG_X86_64
75 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
76 #else
77 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85 struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 #define KVM_NR_SHARED_MSRS 16
94
95 struct kvm_shared_msrs_global {
96 int nr;
97 u32 msrs[KVM_NR_SHARED_MSRS];
98 };
99
100 struct kvm_shared_msrs {
101 struct user_return_notifier urn;
102 bool registered;
103 struct kvm_shared_msr_values {
104 u64 host;
105 u64 curr;
106 } values[KVM_NR_SHARED_MSRS];
107 };
108
109 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
110 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
111
112 struct kvm_stats_debugfs_item debugfs_entries[] = {
113 { "pf_fixed", VCPU_STAT(pf_fixed) },
114 { "pf_guest", VCPU_STAT(pf_guest) },
115 { "tlb_flush", VCPU_STAT(tlb_flush) },
116 { "invlpg", VCPU_STAT(invlpg) },
117 { "exits", VCPU_STAT(exits) },
118 { "io_exits", VCPU_STAT(io_exits) },
119 { "mmio_exits", VCPU_STAT(mmio_exits) },
120 { "signal_exits", VCPU_STAT(signal_exits) },
121 { "irq_window", VCPU_STAT(irq_window_exits) },
122 { "nmi_window", VCPU_STAT(nmi_window_exits) },
123 { "halt_exits", VCPU_STAT(halt_exits) },
124 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
125 { "hypercalls", VCPU_STAT(hypercalls) },
126 { "request_irq", VCPU_STAT(request_irq_exits) },
127 { "irq_exits", VCPU_STAT(irq_exits) },
128 { "host_state_reload", VCPU_STAT(host_state_reload) },
129 { "efer_reload", VCPU_STAT(efer_reload) },
130 { "fpu_reload", VCPU_STAT(fpu_reload) },
131 { "insn_emulation", VCPU_STAT(insn_emulation) },
132 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
133 { "irq_injections", VCPU_STAT(irq_injections) },
134 { "nmi_injections", VCPU_STAT(nmi_injections) },
135 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
136 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
137 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
138 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
139 { "mmu_flooded", VM_STAT(mmu_flooded) },
140 { "mmu_recycled", VM_STAT(mmu_recycled) },
141 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
142 { "mmu_unsync", VM_STAT(mmu_unsync) },
143 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
144 { "largepages", VM_STAT(lpages) },
145 { NULL }
146 };
147
148 static void kvm_on_user_return(struct user_return_notifier *urn)
149 {
150 unsigned slot;
151 struct kvm_shared_msrs *locals
152 = container_of(urn, struct kvm_shared_msrs, urn);
153 struct kvm_shared_msr_values *values;
154
155 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
156 values = &locals->values[slot];
157 if (values->host != values->curr) {
158 wrmsrl(shared_msrs_global.msrs[slot], values->host);
159 values->curr = values->host;
160 }
161 }
162 locals->registered = false;
163 user_return_notifier_unregister(urn);
164 }
165
166 static void shared_msr_update(unsigned slot, u32 msr)
167 {
168 struct kvm_shared_msrs *smsr;
169 u64 value;
170
171 smsr = &__get_cpu_var(shared_msrs);
172 /* only read, and nobody should modify it at this time,
173 * so don't need lock */
174 if (slot >= shared_msrs_global.nr) {
175 printk(KERN_ERR "kvm: invalid MSR slot!");
176 return;
177 }
178 rdmsrl_safe(msr, &value);
179 smsr->values[slot].host = value;
180 smsr->values[slot].curr = value;
181 }
182
183 void kvm_define_shared_msr(unsigned slot, u32 msr)
184 {
185 if (slot >= shared_msrs_global.nr)
186 shared_msrs_global.nr = slot + 1;
187 shared_msrs_global.msrs[slot] = msr;
188 /* we need ensured the shared_msr_global have been updated */
189 smp_wmb();
190 }
191 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
192
193 static void kvm_shared_msr_cpu_online(void)
194 {
195 unsigned i;
196
197 for (i = 0; i < shared_msrs_global.nr; ++i)
198 shared_msr_update(i, shared_msrs_global.msrs[i]);
199 }
200
201 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
202 {
203 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
204
205 if (((value ^ smsr->values[slot].curr) & mask) == 0)
206 return;
207 smsr->values[slot].curr = value;
208 wrmsrl(shared_msrs_global.msrs[slot], value);
209 if (!smsr->registered) {
210 smsr->urn.on_user_return = kvm_on_user_return;
211 user_return_notifier_register(&smsr->urn);
212 smsr->registered = true;
213 }
214 }
215 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
216
217 static void drop_user_return_notifiers(void *ignore)
218 {
219 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221 if (smsr->registered)
222 kvm_on_user_return(&smsr->urn);
223 }
224
225 unsigned long segment_base(u16 selector)
226 {
227 struct descriptor_table gdt;
228 struct desc_struct *d;
229 unsigned long table_base;
230 unsigned long v;
231
232 if (selector == 0)
233 return 0;
234
235 kvm_get_gdt(&gdt);
236 table_base = gdt.base;
237
238 if (selector & 4) { /* from ldt */
239 u16 ldt_selector = kvm_read_ldt();
240
241 table_base = segment_base(ldt_selector);
242 }
243 d = (struct desc_struct *)(table_base + (selector & ~7));
244 v = get_desc_base(d);
245 #ifdef CONFIG_X86_64
246 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
247 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
248 #endif
249 return v;
250 }
251 EXPORT_SYMBOL_GPL(segment_base);
252
253 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
254 {
255 if (irqchip_in_kernel(vcpu->kvm))
256 return vcpu->arch.apic_base;
257 else
258 return vcpu->arch.apic_base;
259 }
260 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
261
262 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
263 {
264 /* TODO: reserve bits check */
265 if (irqchip_in_kernel(vcpu->kvm))
266 kvm_lapic_set_base(vcpu, data);
267 else
268 vcpu->arch.apic_base = data;
269 }
270 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
271
272 #define EXCPT_BENIGN 0
273 #define EXCPT_CONTRIBUTORY 1
274 #define EXCPT_PF 2
275
276 static int exception_class(int vector)
277 {
278 switch (vector) {
279 case PF_VECTOR:
280 return EXCPT_PF;
281 case DE_VECTOR:
282 case TS_VECTOR:
283 case NP_VECTOR:
284 case SS_VECTOR:
285 case GP_VECTOR:
286 return EXCPT_CONTRIBUTORY;
287 default:
288 break;
289 }
290 return EXCPT_BENIGN;
291 }
292
293 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
294 unsigned nr, bool has_error, u32 error_code)
295 {
296 u32 prev_nr;
297 int class1, class2;
298
299 if (!vcpu->arch.exception.pending) {
300 queue:
301 vcpu->arch.exception.pending = true;
302 vcpu->arch.exception.has_error_code = has_error;
303 vcpu->arch.exception.nr = nr;
304 vcpu->arch.exception.error_code = error_code;
305 return;
306 }
307
308 /* to check exception */
309 prev_nr = vcpu->arch.exception.nr;
310 if (prev_nr == DF_VECTOR) {
311 /* triple fault -> shutdown */
312 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
313 return;
314 }
315 class1 = exception_class(prev_nr);
316 class2 = exception_class(nr);
317 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
318 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
319 /* generate double fault per SDM Table 5-5 */
320 vcpu->arch.exception.pending = true;
321 vcpu->arch.exception.has_error_code = true;
322 vcpu->arch.exception.nr = DF_VECTOR;
323 vcpu->arch.exception.error_code = 0;
324 } else
325 /* replace previous exception with a new one in a hope
326 that instruction re-execution will regenerate lost
327 exception */
328 goto queue;
329 }
330
331 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
332 {
333 kvm_multiple_exception(vcpu, nr, false, 0);
334 }
335 EXPORT_SYMBOL_GPL(kvm_queue_exception);
336
337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
338 u32 error_code)
339 {
340 ++vcpu->stat.pf_guest;
341 vcpu->arch.cr2 = addr;
342 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
343 }
344
345 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
346 {
347 vcpu->arch.nmi_pending = 1;
348 }
349 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
350
351 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
352 {
353 kvm_multiple_exception(vcpu, nr, true, error_code);
354 }
355 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
356
357 /*
358 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
359 * a #GP and return false.
360 */
361 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
362 {
363 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
364 return true;
365 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
366 return false;
367 }
368 EXPORT_SYMBOL_GPL(kvm_require_cpl);
369
370 /*
371 * Load the pae pdptrs. Return true is they are all valid.
372 */
373 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
374 {
375 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
376 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
377 int i;
378 int ret;
379 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
380
381 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
382 offset * sizeof(u64), sizeof(pdpte));
383 if (ret < 0) {
384 ret = 0;
385 goto out;
386 }
387 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
388 if (is_present_gpte(pdpte[i]) &&
389 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
390 ret = 0;
391 goto out;
392 }
393 }
394 ret = 1;
395
396 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
397 __set_bit(VCPU_EXREG_PDPTR,
398 (unsigned long *)&vcpu->arch.regs_avail);
399 __set_bit(VCPU_EXREG_PDPTR,
400 (unsigned long *)&vcpu->arch.regs_dirty);
401 out:
402
403 return ret;
404 }
405 EXPORT_SYMBOL_GPL(load_pdptrs);
406
407 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
408 {
409 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
410 bool changed = true;
411 int r;
412
413 if (is_long_mode(vcpu) || !is_pae(vcpu))
414 return false;
415
416 if (!test_bit(VCPU_EXREG_PDPTR,
417 (unsigned long *)&vcpu->arch.regs_avail))
418 return true;
419
420 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
421 if (r < 0)
422 goto out;
423 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
424 out:
425
426 return changed;
427 }
428
429 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
430 {
431 cr0 |= X86_CR0_ET;
432
433 if (cr0 & CR0_RESERVED_BITS) {
434 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
435 cr0, kvm_read_cr0(vcpu));
436 kvm_inject_gp(vcpu, 0);
437 return;
438 }
439
440 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
441 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
442 kvm_inject_gp(vcpu, 0);
443 return;
444 }
445
446 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
447 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
448 "and a clear PE flag\n");
449 kvm_inject_gp(vcpu, 0);
450 return;
451 }
452
453 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
454 #ifdef CONFIG_X86_64
455 if ((vcpu->arch.shadow_efer & EFER_LME)) {
456 int cs_db, cs_l;
457
458 if (!is_pae(vcpu)) {
459 printk(KERN_DEBUG "set_cr0: #GP, start paging "
460 "in long mode while PAE is disabled\n");
461 kvm_inject_gp(vcpu, 0);
462 return;
463 }
464 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
465 if (cs_l) {
466 printk(KERN_DEBUG "set_cr0: #GP, start paging "
467 "in long mode while CS.L == 1\n");
468 kvm_inject_gp(vcpu, 0);
469 return;
470
471 }
472 } else
473 #endif
474 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
475 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
476 "reserved bits\n");
477 kvm_inject_gp(vcpu, 0);
478 return;
479 }
480
481 }
482
483 kvm_x86_ops->set_cr0(vcpu, cr0);
484 vcpu->arch.cr0 = cr0;
485
486 kvm_mmu_reset_context(vcpu);
487 return;
488 }
489 EXPORT_SYMBOL_GPL(kvm_set_cr0);
490
491 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
492 {
493 kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0ful) | (msw & 0x0f));
494 }
495 EXPORT_SYMBOL_GPL(kvm_lmsw);
496
497 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
498 {
499 unsigned long old_cr4 = kvm_read_cr4(vcpu);
500 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
501
502 if (cr4 & CR4_RESERVED_BITS) {
503 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
504 kvm_inject_gp(vcpu, 0);
505 return;
506 }
507
508 if (is_long_mode(vcpu)) {
509 if (!(cr4 & X86_CR4_PAE)) {
510 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
511 "in long mode\n");
512 kvm_inject_gp(vcpu, 0);
513 return;
514 }
515 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
516 && ((cr4 ^ old_cr4) & pdptr_bits)
517 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
518 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
519 kvm_inject_gp(vcpu, 0);
520 return;
521 }
522
523 if (cr4 & X86_CR4_VMXE) {
524 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
525 kvm_inject_gp(vcpu, 0);
526 return;
527 }
528 kvm_x86_ops->set_cr4(vcpu, cr4);
529 vcpu->arch.cr4 = cr4;
530 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
531 kvm_mmu_reset_context(vcpu);
532 }
533 EXPORT_SYMBOL_GPL(kvm_set_cr4);
534
535 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
536 {
537 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
538 kvm_mmu_sync_roots(vcpu);
539 kvm_mmu_flush_tlb(vcpu);
540 return;
541 }
542
543 if (is_long_mode(vcpu)) {
544 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
545 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
546 kvm_inject_gp(vcpu, 0);
547 return;
548 }
549 } else {
550 if (is_pae(vcpu)) {
551 if (cr3 & CR3_PAE_RESERVED_BITS) {
552 printk(KERN_DEBUG
553 "set_cr3: #GP, reserved bits\n");
554 kvm_inject_gp(vcpu, 0);
555 return;
556 }
557 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
558 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
559 "reserved bits\n");
560 kvm_inject_gp(vcpu, 0);
561 return;
562 }
563 }
564 /*
565 * We don't check reserved bits in nonpae mode, because
566 * this isn't enforced, and VMware depends on this.
567 */
568 }
569
570 /*
571 * Does the new cr3 value map to physical memory? (Note, we
572 * catch an invalid cr3 even in real-mode, because it would
573 * cause trouble later on when we turn on paging anyway.)
574 *
575 * A real CPU would silently accept an invalid cr3 and would
576 * attempt to use it - with largely undefined (and often hard
577 * to debug) behavior on the guest side.
578 */
579 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
580 kvm_inject_gp(vcpu, 0);
581 else {
582 vcpu->arch.cr3 = cr3;
583 vcpu->arch.mmu.new_cr3(vcpu);
584 }
585 }
586 EXPORT_SYMBOL_GPL(kvm_set_cr3);
587
588 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
589 {
590 if (cr8 & CR8_RESERVED_BITS) {
591 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
592 kvm_inject_gp(vcpu, 0);
593 return;
594 }
595 if (irqchip_in_kernel(vcpu->kvm))
596 kvm_lapic_set_tpr(vcpu, cr8);
597 else
598 vcpu->arch.cr8 = cr8;
599 }
600 EXPORT_SYMBOL_GPL(kvm_set_cr8);
601
602 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
603 {
604 if (irqchip_in_kernel(vcpu->kvm))
605 return kvm_lapic_get_cr8(vcpu);
606 else
607 return vcpu->arch.cr8;
608 }
609 EXPORT_SYMBOL_GPL(kvm_get_cr8);
610
611 static inline u32 bit(int bitno)
612 {
613 return 1 << (bitno & 31);
614 }
615
616 /*
617 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
618 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
619 *
620 * This list is modified at module load time to reflect the
621 * capabilities of the host cpu. This capabilities test skips MSRs that are
622 * kvm-specific. Those are put in the beginning of the list.
623 */
624
625 #define KVM_SAVE_MSRS_BEGIN 5
626 static u32 msrs_to_save[] = {
627 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
628 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
629 HV_X64_MSR_APIC_ASSIST_PAGE,
630 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
631 MSR_K6_STAR,
632 #ifdef CONFIG_X86_64
633 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
634 #endif
635 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
636 };
637
638 static unsigned num_msrs_to_save;
639
640 static u32 emulated_msrs[] = {
641 MSR_IA32_MISC_ENABLE,
642 };
643
644 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
645 {
646 if (efer & efer_reserved_bits) {
647 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
648 efer);
649 kvm_inject_gp(vcpu, 0);
650 return;
651 }
652
653 if (is_paging(vcpu)
654 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
655 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
656 kvm_inject_gp(vcpu, 0);
657 return;
658 }
659
660 if (efer & EFER_FFXSR) {
661 struct kvm_cpuid_entry2 *feat;
662
663 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
664 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
665 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
666 kvm_inject_gp(vcpu, 0);
667 return;
668 }
669 }
670
671 if (efer & EFER_SVME) {
672 struct kvm_cpuid_entry2 *feat;
673
674 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
675 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
676 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
677 kvm_inject_gp(vcpu, 0);
678 return;
679 }
680 }
681
682 kvm_x86_ops->set_efer(vcpu, efer);
683
684 efer &= ~EFER_LMA;
685 efer |= vcpu->arch.shadow_efer & EFER_LMA;
686
687 vcpu->arch.shadow_efer = efer;
688
689 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
690 kvm_mmu_reset_context(vcpu);
691 }
692
693 void kvm_enable_efer_bits(u64 mask)
694 {
695 efer_reserved_bits &= ~mask;
696 }
697 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
698
699
700 /*
701 * Writes msr value into into the appropriate "register".
702 * Returns 0 on success, non-0 otherwise.
703 * Assumes vcpu_load() was already called.
704 */
705 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
706 {
707 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
708 }
709
710 /*
711 * Adapt set_msr() to msr_io()'s calling convention
712 */
713 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
714 {
715 return kvm_set_msr(vcpu, index, *data);
716 }
717
718 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
719 {
720 static int version;
721 struct pvclock_wall_clock wc;
722 struct timespec boot;
723
724 if (!wall_clock)
725 return;
726
727 version++;
728
729 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
730
731 /*
732 * The guest calculates current wall clock time by adding
733 * system time (updated by kvm_write_guest_time below) to the
734 * wall clock specified here. guest system time equals host
735 * system time for us, thus we must fill in host boot time here.
736 */
737 getboottime(&boot);
738
739 wc.sec = boot.tv_sec;
740 wc.nsec = boot.tv_nsec;
741 wc.version = version;
742
743 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
744
745 version++;
746 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
747 }
748
749 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
750 {
751 uint32_t quotient, remainder;
752
753 /* Don't try to replace with do_div(), this one calculates
754 * "(dividend << 32) / divisor" */
755 __asm__ ( "divl %4"
756 : "=a" (quotient), "=d" (remainder)
757 : "0" (0), "1" (dividend), "r" (divisor) );
758 return quotient;
759 }
760
761 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
762 {
763 uint64_t nsecs = 1000000000LL;
764 int32_t shift = 0;
765 uint64_t tps64;
766 uint32_t tps32;
767
768 tps64 = tsc_khz * 1000LL;
769 while (tps64 > nsecs*2) {
770 tps64 >>= 1;
771 shift--;
772 }
773
774 tps32 = (uint32_t)tps64;
775 while (tps32 <= (uint32_t)nsecs) {
776 tps32 <<= 1;
777 shift++;
778 }
779
780 hv_clock->tsc_shift = shift;
781 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
782
783 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
784 __func__, tsc_khz, hv_clock->tsc_shift,
785 hv_clock->tsc_to_system_mul);
786 }
787
788 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
789
790 static void kvm_write_guest_time(struct kvm_vcpu *v)
791 {
792 struct timespec ts;
793 unsigned long flags;
794 struct kvm_vcpu_arch *vcpu = &v->arch;
795 void *shared_kaddr;
796 unsigned long this_tsc_khz;
797
798 if ((!vcpu->time_page))
799 return;
800
801 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
802 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
803 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
804 vcpu->hv_clock_tsc_khz = this_tsc_khz;
805 }
806 put_cpu_var(cpu_tsc_khz);
807
808 /* Keep irq disabled to prevent changes to the clock */
809 local_irq_save(flags);
810 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
811 ktime_get_ts(&ts);
812 monotonic_to_bootbased(&ts);
813 local_irq_restore(flags);
814
815 /* With all the info we got, fill in the values */
816
817 vcpu->hv_clock.system_time = ts.tv_nsec +
818 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
819
820 /*
821 * The interface expects us to write an even number signaling that the
822 * update is finished. Since the guest won't see the intermediate
823 * state, we just increase by 2 at the end.
824 */
825 vcpu->hv_clock.version += 2;
826
827 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
828
829 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
830 sizeof(vcpu->hv_clock));
831
832 kunmap_atomic(shared_kaddr, KM_USER0);
833
834 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
835 }
836
837 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
838 {
839 struct kvm_vcpu_arch *vcpu = &v->arch;
840
841 if (!vcpu->time_page)
842 return 0;
843 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
844 return 1;
845 }
846
847 static bool msr_mtrr_valid(unsigned msr)
848 {
849 switch (msr) {
850 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
851 case MSR_MTRRfix64K_00000:
852 case MSR_MTRRfix16K_80000:
853 case MSR_MTRRfix16K_A0000:
854 case MSR_MTRRfix4K_C0000:
855 case MSR_MTRRfix4K_C8000:
856 case MSR_MTRRfix4K_D0000:
857 case MSR_MTRRfix4K_D8000:
858 case MSR_MTRRfix4K_E0000:
859 case MSR_MTRRfix4K_E8000:
860 case MSR_MTRRfix4K_F0000:
861 case MSR_MTRRfix4K_F8000:
862 case MSR_MTRRdefType:
863 case MSR_IA32_CR_PAT:
864 return true;
865 case 0x2f8:
866 return true;
867 }
868 return false;
869 }
870
871 static bool valid_pat_type(unsigned t)
872 {
873 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
874 }
875
876 static bool valid_mtrr_type(unsigned t)
877 {
878 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
879 }
880
881 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
882 {
883 int i;
884
885 if (!msr_mtrr_valid(msr))
886 return false;
887
888 if (msr == MSR_IA32_CR_PAT) {
889 for (i = 0; i < 8; i++)
890 if (!valid_pat_type((data >> (i * 8)) & 0xff))
891 return false;
892 return true;
893 } else if (msr == MSR_MTRRdefType) {
894 if (data & ~0xcff)
895 return false;
896 return valid_mtrr_type(data & 0xff);
897 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
898 for (i = 0; i < 8 ; i++)
899 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
900 return false;
901 return true;
902 }
903
904 /* variable MTRRs */
905 return valid_mtrr_type(data & 0xff);
906 }
907
908 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
909 {
910 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
911
912 if (!mtrr_valid(vcpu, msr, data))
913 return 1;
914
915 if (msr == MSR_MTRRdefType) {
916 vcpu->arch.mtrr_state.def_type = data;
917 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
918 } else if (msr == MSR_MTRRfix64K_00000)
919 p[0] = data;
920 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
921 p[1 + msr - MSR_MTRRfix16K_80000] = data;
922 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
923 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
924 else if (msr == MSR_IA32_CR_PAT)
925 vcpu->arch.pat = data;
926 else { /* Variable MTRRs */
927 int idx, is_mtrr_mask;
928 u64 *pt;
929
930 idx = (msr - 0x200) / 2;
931 is_mtrr_mask = msr - 0x200 - 2 * idx;
932 if (!is_mtrr_mask)
933 pt =
934 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
935 else
936 pt =
937 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
938 *pt = data;
939 }
940
941 kvm_mmu_reset_context(vcpu);
942 return 0;
943 }
944
945 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
946 {
947 u64 mcg_cap = vcpu->arch.mcg_cap;
948 unsigned bank_num = mcg_cap & 0xff;
949
950 switch (msr) {
951 case MSR_IA32_MCG_STATUS:
952 vcpu->arch.mcg_status = data;
953 break;
954 case MSR_IA32_MCG_CTL:
955 if (!(mcg_cap & MCG_CTL_P))
956 return 1;
957 if (data != 0 && data != ~(u64)0)
958 return -1;
959 vcpu->arch.mcg_ctl = data;
960 break;
961 default:
962 if (msr >= MSR_IA32_MC0_CTL &&
963 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
964 u32 offset = msr - MSR_IA32_MC0_CTL;
965 /* only 0 or all 1s can be written to IA32_MCi_CTL */
966 if ((offset & 0x3) == 0 &&
967 data != 0 && data != ~(u64)0)
968 return -1;
969 vcpu->arch.mce_banks[offset] = data;
970 break;
971 }
972 return 1;
973 }
974 return 0;
975 }
976
977 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
978 {
979 struct kvm *kvm = vcpu->kvm;
980 int lm = is_long_mode(vcpu);
981 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
982 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
983 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
984 : kvm->arch.xen_hvm_config.blob_size_32;
985 u32 page_num = data & ~PAGE_MASK;
986 u64 page_addr = data & PAGE_MASK;
987 u8 *page;
988 int r;
989
990 r = -E2BIG;
991 if (page_num >= blob_size)
992 goto out;
993 r = -ENOMEM;
994 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
995 if (!page)
996 goto out;
997 r = -EFAULT;
998 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
999 goto out_free;
1000 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1001 goto out_free;
1002 r = 0;
1003 out_free:
1004 kfree(page);
1005 out:
1006 return r;
1007 }
1008
1009 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1010 {
1011 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1012 }
1013
1014 static bool kvm_hv_msr_partition_wide(u32 msr)
1015 {
1016 bool r = false;
1017 switch (msr) {
1018 case HV_X64_MSR_GUEST_OS_ID:
1019 case HV_X64_MSR_HYPERCALL:
1020 r = true;
1021 break;
1022 }
1023
1024 return r;
1025 }
1026
1027 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1028 {
1029 struct kvm *kvm = vcpu->kvm;
1030
1031 switch (msr) {
1032 case HV_X64_MSR_GUEST_OS_ID:
1033 kvm->arch.hv_guest_os_id = data;
1034 /* setting guest os id to zero disables hypercall page */
1035 if (!kvm->arch.hv_guest_os_id)
1036 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1037 break;
1038 case HV_X64_MSR_HYPERCALL: {
1039 u64 gfn;
1040 unsigned long addr;
1041 u8 instructions[4];
1042
1043 /* if guest os id is not set hypercall should remain disabled */
1044 if (!kvm->arch.hv_guest_os_id)
1045 break;
1046 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1047 kvm->arch.hv_hypercall = data;
1048 break;
1049 }
1050 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1051 addr = gfn_to_hva(kvm, gfn);
1052 if (kvm_is_error_hva(addr))
1053 return 1;
1054 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1055 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1056 if (copy_to_user((void __user *)addr, instructions, 4))
1057 return 1;
1058 kvm->arch.hv_hypercall = data;
1059 break;
1060 }
1061 default:
1062 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1063 "data 0x%llx\n", msr, data);
1064 return 1;
1065 }
1066 return 0;
1067 }
1068
1069 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1070 {
1071 switch (msr) {
1072 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1073 unsigned long addr;
1074
1075 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1076 vcpu->arch.hv_vapic = data;
1077 break;
1078 }
1079 addr = gfn_to_hva(vcpu->kvm, data >>
1080 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1081 if (kvm_is_error_hva(addr))
1082 return 1;
1083 if (clear_user((void __user *)addr, PAGE_SIZE))
1084 return 1;
1085 vcpu->arch.hv_vapic = data;
1086 break;
1087 }
1088 case HV_X64_MSR_EOI:
1089 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1090 case HV_X64_MSR_ICR:
1091 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1092 case HV_X64_MSR_TPR:
1093 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1094 default:
1095 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1096 "data 0x%llx\n", msr, data);
1097 return 1;
1098 }
1099
1100 return 0;
1101 }
1102
1103 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1104 {
1105 switch (msr) {
1106 case MSR_EFER:
1107 set_efer(vcpu, data);
1108 break;
1109 case MSR_K7_HWCR:
1110 data &= ~(u64)0x40; /* ignore flush filter disable */
1111 if (data != 0) {
1112 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1113 data);
1114 return 1;
1115 }
1116 break;
1117 case MSR_FAM10H_MMIO_CONF_BASE:
1118 if (data != 0) {
1119 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1120 "0x%llx\n", data);
1121 return 1;
1122 }
1123 break;
1124 case MSR_AMD64_NB_CFG:
1125 break;
1126 case MSR_IA32_DEBUGCTLMSR:
1127 if (!data) {
1128 /* We support the non-activated case already */
1129 break;
1130 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1131 /* Values other than LBR and BTF are vendor-specific,
1132 thus reserved and should throw a #GP */
1133 return 1;
1134 }
1135 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1136 __func__, data);
1137 break;
1138 case MSR_IA32_UCODE_REV:
1139 case MSR_IA32_UCODE_WRITE:
1140 case MSR_VM_HSAVE_PA:
1141 case MSR_AMD64_PATCH_LOADER:
1142 break;
1143 case 0x200 ... 0x2ff:
1144 return set_msr_mtrr(vcpu, msr, data);
1145 case MSR_IA32_APICBASE:
1146 kvm_set_apic_base(vcpu, data);
1147 break;
1148 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1149 return kvm_x2apic_msr_write(vcpu, msr, data);
1150 case MSR_IA32_MISC_ENABLE:
1151 vcpu->arch.ia32_misc_enable_msr = data;
1152 break;
1153 case MSR_KVM_WALL_CLOCK:
1154 vcpu->kvm->arch.wall_clock = data;
1155 kvm_write_wall_clock(vcpu->kvm, data);
1156 break;
1157 case MSR_KVM_SYSTEM_TIME: {
1158 if (vcpu->arch.time_page) {
1159 kvm_release_page_dirty(vcpu->arch.time_page);
1160 vcpu->arch.time_page = NULL;
1161 }
1162
1163 vcpu->arch.time = data;
1164
1165 /* we verify if the enable bit is set... */
1166 if (!(data & 1))
1167 break;
1168
1169 /* ...but clean it before doing the actual write */
1170 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1171
1172 vcpu->arch.time_page =
1173 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1174
1175 if (is_error_page(vcpu->arch.time_page)) {
1176 kvm_release_page_clean(vcpu->arch.time_page);
1177 vcpu->arch.time_page = NULL;
1178 }
1179
1180 kvm_request_guest_time_update(vcpu);
1181 break;
1182 }
1183 case MSR_IA32_MCG_CTL:
1184 case MSR_IA32_MCG_STATUS:
1185 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1186 return set_msr_mce(vcpu, msr, data);
1187
1188 /* Performance counters are not protected by a CPUID bit,
1189 * so we should check all of them in the generic path for the sake of
1190 * cross vendor migration.
1191 * Writing a zero into the event select MSRs disables them,
1192 * which we perfectly emulate ;-). Any other value should be at least
1193 * reported, some guests depend on them.
1194 */
1195 case MSR_P6_EVNTSEL0:
1196 case MSR_P6_EVNTSEL1:
1197 case MSR_K7_EVNTSEL0:
1198 case MSR_K7_EVNTSEL1:
1199 case MSR_K7_EVNTSEL2:
1200 case MSR_K7_EVNTSEL3:
1201 if (data != 0)
1202 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1203 "0x%x data 0x%llx\n", msr, data);
1204 break;
1205 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1206 * so we ignore writes to make it happy.
1207 */
1208 case MSR_P6_PERFCTR0:
1209 case MSR_P6_PERFCTR1:
1210 case MSR_K7_PERFCTR0:
1211 case MSR_K7_PERFCTR1:
1212 case MSR_K7_PERFCTR2:
1213 case MSR_K7_PERFCTR3:
1214 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1215 "0x%x data 0x%llx\n", msr, data);
1216 break;
1217 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1218 if (kvm_hv_msr_partition_wide(msr)) {
1219 int r;
1220 mutex_lock(&vcpu->kvm->lock);
1221 r = set_msr_hyperv_pw(vcpu, msr, data);
1222 mutex_unlock(&vcpu->kvm->lock);
1223 return r;
1224 } else
1225 return set_msr_hyperv(vcpu, msr, data);
1226 break;
1227 default:
1228 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1229 return xen_hvm_config(vcpu, data);
1230 if (!ignore_msrs) {
1231 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1232 msr, data);
1233 return 1;
1234 } else {
1235 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1236 msr, data);
1237 break;
1238 }
1239 }
1240 return 0;
1241 }
1242 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1243
1244
1245 /*
1246 * Reads an msr value (of 'msr_index') into 'pdata'.
1247 * Returns 0 on success, non-0 otherwise.
1248 * Assumes vcpu_load() was already called.
1249 */
1250 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1251 {
1252 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1253 }
1254
1255 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1256 {
1257 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1258
1259 if (!msr_mtrr_valid(msr))
1260 return 1;
1261
1262 if (msr == MSR_MTRRdefType)
1263 *pdata = vcpu->arch.mtrr_state.def_type +
1264 (vcpu->arch.mtrr_state.enabled << 10);
1265 else if (msr == MSR_MTRRfix64K_00000)
1266 *pdata = p[0];
1267 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1268 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1269 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1270 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1271 else if (msr == MSR_IA32_CR_PAT)
1272 *pdata = vcpu->arch.pat;
1273 else { /* Variable MTRRs */
1274 int idx, is_mtrr_mask;
1275 u64 *pt;
1276
1277 idx = (msr - 0x200) / 2;
1278 is_mtrr_mask = msr - 0x200 - 2 * idx;
1279 if (!is_mtrr_mask)
1280 pt =
1281 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1282 else
1283 pt =
1284 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1285 *pdata = *pt;
1286 }
1287
1288 return 0;
1289 }
1290
1291 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1292 {
1293 u64 data;
1294 u64 mcg_cap = vcpu->arch.mcg_cap;
1295 unsigned bank_num = mcg_cap & 0xff;
1296
1297 switch (msr) {
1298 case MSR_IA32_P5_MC_ADDR:
1299 case MSR_IA32_P5_MC_TYPE:
1300 data = 0;
1301 break;
1302 case MSR_IA32_MCG_CAP:
1303 data = vcpu->arch.mcg_cap;
1304 break;
1305 case MSR_IA32_MCG_CTL:
1306 if (!(mcg_cap & MCG_CTL_P))
1307 return 1;
1308 data = vcpu->arch.mcg_ctl;
1309 break;
1310 case MSR_IA32_MCG_STATUS:
1311 data = vcpu->arch.mcg_status;
1312 break;
1313 default:
1314 if (msr >= MSR_IA32_MC0_CTL &&
1315 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316 u32 offset = msr - MSR_IA32_MC0_CTL;
1317 data = vcpu->arch.mce_banks[offset];
1318 break;
1319 }
1320 return 1;
1321 }
1322 *pdata = data;
1323 return 0;
1324 }
1325
1326 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1327 {
1328 u64 data = 0;
1329 struct kvm *kvm = vcpu->kvm;
1330
1331 switch (msr) {
1332 case HV_X64_MSR_GUEST_OS_ID:
1333 data = kvm->arch.hv_guest_os_id;
1334 break;
1335 case HV_X64_MSR_HYPERCALL:
1336 data = kvm->arch.hv_hypercall;
1337 break;
1338 default:
1339 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1340 return 1;
1341 }
1342
1343 *pdata = data;
1344 return 0;
1345 }
1346
1347 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1348 {
1349 u64 data = 0;
1350
1351 switch (msr) {
1352 case HV_X64_MSR_VP_INDEX: {
1353 int r;
1354 struct kvm_vcpu *v;
1355 kvm_for_each_vcpu(r, v, vcpu->kvm)
1356 if (v == vcpu)
1357 data = r;
1358 break;
1359 }
1360 case HV_X64_MSR_EOI:
1361 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1362 case HV_X64_MSR_ICR:
1363 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1364 case HV_X64_MSR_TPR:
1365 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1366 default:
1367 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1368 return 1;
1369 }
1370 *pdata = data;
1371 return 0;
1372 }
1373
1374 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1375 {
1376 u64 data;
1377
1378 switch (msr) {
1379 case MSR_IA32_PLATFORM_ID:
1380 case MSR_IA32_UCODE_REV:
1381 case MSR_IA32_EBL_CR_POWERON:
1382 case MSR_IA32_DEBUGCTLMSR:
1383 case MSR_IA32_LASTBRANCHFROMIP:
1384 case MSR_IA32_LASTBRANCHTOIP:
1385 case MSR_IA32_LASTINTFROMIP:
1386 case MSR_IA32_LASTINTTOIP:
1387 case MSR_K8_SYSCFG:
1388 case MSR_K7_HWCR:
1389 case MSR_VM_HSAVE_PA:
1390 case MSR_P6_PERFCTR0:
1391 case MSR_P6_PERFCTR1:
1392 case MSR_P6_EVNTSEL0:
1393 case MSR_P6_EVNTSEL1:
1394 case MSR_K7_EVNTSEL0:
1395 case MSR_K7_PERFCTR0:
1396 case MSR_K8_INT_PENDING_MSG:
1397 case MSR_AMD64_NB_CFG:
1398 case MSR_FAM10H_MMIO_CONF_BASE:
1399 data = 0;
1400 break;
1401 case MSR_MTRRcap:
1402 data = 0x500 | KVM_NR_VAR_MTRR;
1403 break;
1404 case 0x200 ... 0x2ff:
1405 return get_msr_mtrr(vcpu, msr, pdata);
1406 case 0xcd: /* fsb frequency */
1407 data = 3;
1408 break;
1409 case MSR_IA32_APICBASE:
1410 data = kvm_get_apic_base(vcpu);
1411 break;
1412 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1413 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1414 break;
1415 case MSR_IA32_MISC_ENABLE:
1416 data = vcpu->arch.ia32_misc_enable_msr;
1417 break;
1418 case MSR_IA32_PERF_STATUS:
1419 /* TSC increment by tick */
1420 data = 1000ULL;
1421 /* CPU multiplier */
1422 data |= (((uint64_t)4ULL) << 40);
1423 break;
1424 case MSR_EFER:
1425 data = vcpu->arch.shadow_efer;
1426 break;
1427 case MSR_KVM_WALL_CLOCK:
1428 data = vcpu->kvm->arch.wall_clock;
1429 break;
1430 case MSR_KVM_SYSTEM_TIME:
1431 data = vcpu->arch.time;
1432 break;
1433 case MSR_IA32_P5_MC_ADDR:
1434 case MSR_IA32_P5_MC_TYPE:
1435 case MSR_IA32_MCG_CAP:
1436 case MSR_IA32_MCG_CTL:
1437 case MSR_IA32_MCG_STATUS:
1438 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1439 return get_msr_mce(vcpu, msr, pdata);
1440 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1441 if (kvm_hv_msr_partition_wide(msr)) {
1442 int r;
1443 mutex_lock(&vcpu->kvm->lock);
1444 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1445 mutex_unlock(&vcpu->kvm->lock);
1446 return r;
1447 } else
1448 return get_msr_hyperv(vcpu, msr, pdata);
1449 break;
1450 default:
1451 if (!ignore_msrs) {
1452 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1453 return 1;
1454 } else {
1455 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1456 data = 0;
1457 }
1458 break;
1459 }
1460 *pdata = data;
1461 return 0;
1462 }
1463 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1464
1465 /*
1466 * Read or write a bunch of msrs. All parameters are kernel addresses.
1467 *
1468 * @return number of msrs set successfully.
1469 */
1470 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1471 struct kvm_msr_entry *entries,
1472 int (*do_msr)(struct kvm_vcpu *vcpu,
1473 unsigned index, u64 *data))
1474 {
1475 int i, idx;
1476
1477 vcpu_load(vcpu);
1478
1479 idx = srcu_read_lock(&vcpu->kvm->srcu);
1480 for (i = 0; i < msrs->nmsrs; ++i)
1481 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1482 break;
1483 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1484
1485 vcpu_put(vcpu);
1486
1487 return i;
1488 }
1489
1490 /*
1491 * Read or write a bunch of msrs. Parameters are user addresses.
1492 *
1493 * @return number of msrs set successfully.
1494 */
1495 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1496 int (*do_msr)(struct kvm_vcpu *vcpu,
1497 unsigned index, u64 *data),
1498 int writeback)
1499 {
1500 struct kvm_msrs msrs;
1501 struct kvm_msr_entry *entries;
1502 int r, n;
1503 unsigned size;
1504
1505 r = -EFAULT;
1506 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1507 goto out;
1508
1509 r = -E2BIG;
1510 if (msrs.nmsrs >= MAX_IO_MSRS)
1511 goto out;
1512
1513 r = -ENOMEM;
1514 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1515 entries = vmalloc(size);
1516 if (!entries)
1517 goto out;
1518
1519 r = -EFAULT;
1520 if (copy_from_user(entries, user_msrs->entries, size))
1521 goto out_free;
1522
1523 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1524 if (r < 0)
1525 goto out_free;
1526
1527 r = -EFAULT;
1528 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1529 goto out_free;
1530
1531 r = n;
1532
1533 out_free:
1534 vfree(entries);
1535 out:
1536 return r;
1537 }
1538
1539 int kvm_dev_ioctl_check_extension(long ext)
1540 {
1541 int r;
1542
1543 switch (ext) {
1544 case KVM_CAP_IRQCHIP:
1545 case KVM_CAP_HLT:
1546 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1547 case KVM_CAP_SET_TSS_ADDR:
1548 case KVM_CAP_EXT_CPUID:
1549 case KVM_CAP_CLOCKSOURCE:
1550 case KVM_CAP_PIT:
1551 case KVM_CAP_NOP_IO_DELAY:
1552 case KVM_CAP_MP_STATE:
1553 case KVM_CAP_SYNC_MMU:
1554 case KVM_CAP_REINJECT_CONTROL:
1555 case KVM_CAP_IRQ_INJECT_STATUS:
1556 case KVM_CAP_ASSIGN_DEV_IRQ:
1557 case KVM_CAP_IRQFD:
1558 case KVM_CAP_IOEVENTFD:
1559 case KVM_CAP_PIT2:
1560 case KVM_CAP_PIT_STATE2:
1561 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1562 case KVM_CAP_XEN_HVM:
1563 case KVM_CAP_ADJUST_CLOCK:
1564 case KVM_CAP_VCPU_EVENTS:
1565 case KVM_CAP_HYPERV:
1566 case KVM_CAP_HYPERV_VAPIC:
1567 case KVM_CAP_HYPERV_SPIN:
1568 r = 1;
1569 break;
1570 case KVM_CAP_COALESCED_MMIO:
1571 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1572 break;
1573 case KVM_CAP_VAPIC:
1574 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1575 break;
1576 case KVM_CAP_NR_VCPUS:
1577 r = KVM_MAX_VCPUS;
1578 break;
1579 case KVM_CAP_NR_MEMSLOTS:
1580 r = KVM_MEMORY_SLOTS;
1581 break;
1582 case KVM_CAP_PV_MMU: /* obsolete */
1583 r = 0;
1584 break;
1585 case KVM_CAP_IOMMU:
1586 r = iommu_found();
1587 break;
1588 case KVM_CAP_MCE:
1589 r = KVM_MAX_MCE_BANKS;
1590 break;
1591 default:
1592 r = 0;
1593 break;
1594 }
1595 return r;
1596
1597 }
1598
1599 long kvm_arch_dev_ioctl(struct file *filp,
1600 unsigned int ioctl, unsigned long arg)
1601 {
1602 void __user *argp = (void __user *)arg;
1603 long r;
1604
1605 switch (ioctl) {
1606 case KVM_GET_MSR_INDEX_LIST: {
1607 struct kvm_msr_list __user *user_msr_list = argp;
1608 struct kvm_msr_list msr_list;
1609 unsigned n;
1610
1611 r = -EFAULT;
1612 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1613 goto out;
1614 n = msr_list.nmsrs;
1615 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1616 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1617 goto out;
1618 r = -E2BIG;
1619 if (n < msr_list.nmsrs)
1620 goto out;
1621 r = -EFAULT;
1622 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1623 num_msrs_to_save * sizeof(u32)))
1624 goto out;
1625 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1626 &emulated_msrs,
1627 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1628 goto out;
1629 r = 0;
1630 break;
1631 }
1632 case KVM_GET_SUPPORTED_CPUID: {
1633 struct kvm_cpuid2 __user *cpuid_arg = argp;
1634 struct kvm_cpuid2 cpuid;
1635
1636 r = -EFAULT;
1637 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1638 goto out;
1639 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1640 cpuid_arg->entries);
1641 if (r)
1642 goto out;
1643
1644 r = -EFAULT;
1645 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1646 goto out;
1647 r = 0;
1648 break;
1649 }
1650 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1651 u64 mce_cap;
1652
1653 mce_cap = KVM_MCE_CAP_SUPPORTED;
1654 r = -EFAULT;
1655 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1656 goto out;
1657 r = 0;
1658 break;
1659 }
1660 default:
1661 r = -EINVAL;
1662 }
1663 out:
1664 return r;
1665 }
1666
1667 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1668 {
1669 kvm_x86_ops->vcpu_load(vcpu, cpu);
1670 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1671 unsigned long khz = cpufreq_quick_get(cpu);
1672 if (!khz)
1673 khz = tsc_khz;
1674 per_cpu(cpu_tsc_khz, cpu) = khz;
1675 }
1676 kvm_request_guest_time_update(vcpu);
1677 }
1678
1679 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1680 {
1681 kvm_put_guest_fpu(vcpu);
1682 kvm_x86_ops->vcpu_put(vcpu);
1683 }
1684
1685 static int is_efer_nx(void)
1686 {
1687 unsigned long long efer = 0;
1688
1689 rdmsrl_safe(MSR_EFER, &efer);
1690 return efer & EFER_NX;
1691 }
1692
1693 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1694 {
1695 int i;
1696 struct kvm_cpuid_entry2 *e, *entry;
1697
1698 entry = NULL;
1699 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1700 e = &vcpu->arch.cpuid_entries[i];
1701 if (e->function == 0x80000001) {
1702 entry = e;
1703 break;
1704 }
1705 }
1706 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1707 entry->edx &= ~(1 << 20);
1708 printk(KERN_INFO "kvm: guest NX capability removed\n");
1709 }
1710 }
1711
1712 /* when an old userspace process fills a new kernel module */
1713 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1714 struct kvm_cpuid *cpuid,
1715 struct kvm_cpuid_entry __user *entries)
1716 {
1717 int r, i;
1718 struct kvm_cpuid_entry *cpuid_entries;
1719
1720 r = -E2BIG;
1721 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1722 goto out;
1723 r = -ENOMEM;
1724 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1725 if (!cpuid_entries)
1726 goto out;
1727 r = -EFAULT;
1728 if (copy_from_user(cpuid_entries, entries,
1729 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1730 goto out_free;
1731 for (i = 0; i < cpuid->nent; i++) {
1732 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1733 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1734 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1735 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1736 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1737 vcpu->arch.cpuid_entries[i].index = 0;
1738 vcpu->arch.cpuid_entries[i].flags = 0;
1739 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1740 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1741 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1742 }
1743 vcpu->arch.cpuid_nent = cpuid->nent;
1744 cpuid_fix_nx_cap(vcpu);
1745 r = 0;
1746 kvm_apic_set_version(vcpu);
1747 kvm_x86_ops->cpuid_update(vcpu);
1748
1749 out_free:
1750 vfree(cpuid_entries);
1751 out:
1752 return r;
1753 }
1754
1755 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1756 struct kvm_cpuid2 *cpuid,
1757 struct kvm_cpuid_entry2 __user *entries)
1758 {
1759 int r;
1760
1761 r = -E2BIG;
1762 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1763 goto out;
1764 r = -EFAULT;
1765 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1766 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1767 goto out;
1768 vcpu->arch.cpuid_nent = cpuid->nent;
1769 kvm_apic_set_version(vcpu);
1770 kvm_x86_ops->cpuid_update(vcpu);
1771 return 0;
1772
1773 out:
1774 return r;
1775 }
1776
1777 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1778 struct kvm_cpuid2 *cpuid,
1779 struct kvm_cpuid_entry2 __user *entries)
1780 {
1781 int r;
1782
1783 r = -E2BIG;
1784 if (cpuid->nent < vcpu->arch.cpuid_nent)
1785 goto out;
1786 r = -EFAULT;
1787 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1788 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1789 goto out;
1790 return 0;
1791
1792 out:
1793 cpuid->nent = vcpu->arch.cpuid_nent;
1794 return r;
1795 }
1796
1797 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1798 u32 index)
1799 {
1800 entry->function = function;
1801 entry->index = index;
1802 cpuid_count(entry->function, entry->index,
1803 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1804 entry->flags = 0;
1805 }
1806
1807 #define F(x) bit(X86_FEATURE_##x)
1808
1809 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1810 u32 index, int *nent, int maxnent)
1811 {
1812 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1813 #ifdef CONFIG_X86_64
1814 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
1815 ? F(GBPAGES) : 0;
1816 unsigned f_lm = F(LM);
1817 #else
1818 unsigned f_gbpages = 0;
1819 unsigned f_lm = 0;
1820 #endif
1821 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
1822
1823 /* cpuid 1.edx */
1824 const u32 kvm_supported_word0_x86_features =
1825 F(FPU) | F(VME) | F(DE) | F(PSE) |
1826 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1827 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1828 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1829 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1830 0 /* Reserved, DS, ACPI */ | F(MMX) |
1831 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1832 0 /* HTT, TM, Reserved, PBE */;
1833 /* cpuid 0x80000001.edx */
1834 const u32 kvm_supported_word1_x86_features =
1835 F(FPU) | F(VME) | F(DE) | F(PSE) |
1836 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1837 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1838 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1839 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1840 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1841 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
1842 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1843 /* cpuid 1.ecx */
1844 const u32 kvm_supported_word4_x86_features =
1845 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1846 0 /* DS-CPL, VMX, SMX, EST */ |
1847 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1848 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1849 0 /* Reserved, DCA */ | F(XMM4_1) |
1850 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1851 0 /* Reserved, XSAVE, OSXSAVE */;
1852 /* cpuid 0x80000001.ecx */
1853 const u32 kvm_supported_word6_x86_features =
1854 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1855 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1856 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1857 0 /* SKINIT */ | 0 /* WDT */;
1858
1859 /* all calls to cpuid_count() should be made on the same cpu */
1860 get_cpu();
1861 do_cpuid_1_ent(entry, function, index);
1862 ++*nent;
1863
1864 switch (function) {
1865 case 0:
1866 entry->eax = min(entry->eax, (u32)0xb);
1867 break;
1868 case 1:
1869 entry->edx &= kvm_supported_word0_x86_features;
1870 entry->ecx &= kvm_supported_word4_x86_features;
1871 /* we support x2apic emulation even if host does not support
1872 * it since we emulate x2apic in software */
1873 entry->ecx |= F(X2APIC);
1874 break;
1875 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1876 * may return different values. This forces us to get_cpu() before
1877 * issuing the first command, and also to emulate this annoying behavior
1878 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1879 case 2: {
1880 int t, times = entry->eax & 0xff;
1881
1882 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1883 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1884 for (t = 1; t < times && *nent < maxnent; ++t) {
1885 do_cpuid_1_ent(&entry[t], function, 0);
1886 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1887 ++*nent;
1888 }
1889 break;
1890 }
1891 /* function 4 and 0xb have additional index. */
1892 case 4: {
1893 int i, cache_type;
1894
1895 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1896 /* read more entries until cache_type is zero */
1897 for (i = 1; *nent < maxnent; ++i) {
1898 cache_type = entry[i - 1].eax & 0x1f;
1899 if (!cache_type)
1900 break;
1901 do_cpuid_1_ent(&entry[i], function, i);
1902 entry[i].flags |=
1903 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1904 ++*nent;
1905 }
1906 break;
1907 }
1908 case 0xb: {
1909 int i, level_type;
1910
1911 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1912 /* read more entries until level_type is zero */
1913 for (i = 1; *nent < maxnent; ++i) {
1914 level_type = entry[i - 1].ecx & 0xff00;
1915 if (!level_type)
1916 break;
1917 do_cpuid_1_ent(&entry[i], function, i);
1918 entry[i].flags |=
1919 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1920 ++*nent;
1921 }
1922 break;
1923 }
1924 case 0x80000000:
1925 entry->eax = min(entry->eax, 0x8000001a);
1926 break;
1927 case 0x80000001:
1928 entry->edx &= kvm_supported_word1_x86_features;
1929 entry->ecx &= kvm_supported_word6_x86_features;
1930 break;
1931 }
1932 put_cpu();
1933 }
1934
1935 #undef F
1936
1937 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1938 struct kvm_cpuid_entry2 __user *entries)
1939 {
1940 struct kvm_cpuid_entry2 *cpuid_entries;
1941 int limit, nent = 0, r = -E2BIG;
1942 u32 func;
1943
1944 if (cpuid->nent < 1)
1945 goto out;
1946 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1947 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1948 r = -ENOMEM;
1949 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1950 if (!cpuid_entries)
1951 goto out;
1952
1953 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1954 limit = cpuid_entries[0].eax;
1955 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1956 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1957 &nent, cpuid->nent);
1958 r = -E2BIG;
1959 if (nent >= cpuid->nent)
1960 goto out_free;
1961
1962 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1963 limit = cpuid_entries[nent - 1].eax;
1964 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1965 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1966 &nent, cpuid->nent);
1967 r = -E2BIG;
1968 if (nent >= cpuid->nent)
1969 goto out_free;
1970
1971 r = -EFAULT;
1972 if (copy_to_user(entries, cpuid_entries,
1973 nent * sizeof(struct kvm_cpuid_entry2)))
1974 goto out_free;
1975 cpuid->nent = nent;
1976 r = 0;
1977
1978 out_free:
1979 vfree(cpuid_entries);
1980 out:
1981 return r;
1982 }
1983
1984 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1985 struct kvm_lapic_state *s)
1986 {
1987 vcpu_load(vcpu);
1988 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1989 vcpu_put(vcpu);
1990
1991 return 0;
1992 }
1993
1994 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1995 struct kvm_lapic_state *s)
1996 {
1997 vcpu_load(vcpu);
1998 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1999 kvm_apic_post_state_restore(vcpu);
2000 update_cr8_intercept(vcpu);
2001 vcpu_put(vcpu);
2002
2003 return 0;
2004 }
2005
2006 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2007 struct kvm_interrupt *irq)
2008 {
2009 if (irq->irq < 0 || irq->irq >= 256)
2010 return -EINVAL;
2011 if (irqchip_in_kernel(vcpu->kvm))
2012 return -ENXIO;
2013 vcpu_load(vcpu);
2014
2015 kvm_queue_interrupt(vcpu, irq->irq, false);
2016
2017 vcpu_put(vcpu);
2018
2019 return 0;
2020 }
2021
2022 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2023 {
2024 vcpu_load(vcpu);
2025 kvm_inject_nmi(vcpu);
2026 vcpu_put(vcpu);
2027
2028 return 0;
2029 }
2030
2031 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2032 struct kvm_tpr_access_ctl *tac)
2033 {
2034 if (tac->flags)
2035 return -EINVAL;
2036 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2037 return 0;
2038 }
2039
2040 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2041 u64 mcg_cap)
2042 {
2043 int r;
2044 unsigned bank_num = mcg_cap & 0xff, bank;
2045
2046 r = -EINVAL;
2047 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2048 goto out;
2049 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2050 goto out;
2051 r = 0;
2052 vcpu->arch.mcg_cap = mcg_cap;
2053 /* Init IA32_MCG_CTL to all 1s */
2054 if (mcg_cap & MCG_CTL_P)
2055 vcpu->arch.mcg_ctl = ~(u64)0;
2056 /* Init IA32_MCi_CTL to all 1s */
2057 for (bank = 0; bank < bank_num; bank++)
2058 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2059 out:
2060 return r;
2061 }
2062
2063 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2064 struct kvm_x86_mce *mce)
2065 {
2066 u64 mcg_cap = vcpu->arch.mcg_cap;
2067 unsigned bank_num = mcg_cap & 0xff;
2068 u64 *banks = vcpu->arch.mce_banks;
2069
2070 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2071 return -EINVAL;
2072 /*
2073 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2074 * reporting is disabled
2075 */
2076 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2077 vcpu->arch.mcg_ctl != ~(u64)0)
2078 return 0;
2079 banks += 4 * mce->bank;
2080 /*
2081 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2082 * reporting is disabled for the bank
2083 */
2084 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2085 return 0;
2086 if (mce->status & MCI_STATUS_UC) {
2087 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2088 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2089 printk(KERN_DEBUG "kvm: set_mce: "
2090 "injects mce exception while "
2091 "previous one is in progress!\n");
2092 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2093 return 0;
2094 }
2095 if (banks[1] & MCI_STATUS_VAL)
2096 mce->status |= MCI_STATUS_OVER;
2097 banks[2] = mce->addr;
2098 banks[3] = mce->misc;
2099 vcpu->arch.mcg_status = mce->mcg_status;
2100 banks[1] = mce->status;
2101 kvm_queue_exception(vcpu, MC_VECTOR);
2102 } else if (!(banks[1] & MCI_STATUS_VAL)
2103 || !(banks[1] & MCI_STATUS_UC)) {
2104 if (banks[1] & MCI_STATUS_VAL)
2105 mce->status |= MCI_STATUS_OVER;
2106 banks[2] = mce->addr;
2107 banks[3] = mce->misc;
2108 banks[1] = mce->status;
2109 } else
2110 banks[1] |= MCI_STATUS_OVER;
2111 return 0;
2112 }
2113
2114 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2115 struct kvm_vcpu_events *events)
2116 {
2117 vcpu_load(vcpu);
2118
2119 events->exception.injected = vcpu->arch.exception.pending;
2120 events->exception.nr = vcpu->arch.exception.nr;
2121 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2122 events->exception.error_code = vcpu->arch.exception.error_code;
2123
2124 events->interrupt.injected = vcpu->arch.interrupt.pending;
2125 events->interrupt.nr = vcpu->arch.interrupt.nr;
2126 events->interrupt.soft = vcpu->arch.interrupt.soft;
2127
2128 events->nmi.injected = vcpu->arch.nmi_injected;
2129 events->nmi.pending = vcpu->arch.nmi_pending;
2130 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2131
2132 events->sipi_vector = vcpu->arch.sipi_vector;
2133
2134 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2135 | KVM_VCPUEVENT_VALID_SIPI_VECTOR);
2136
2137 vcpu_put(vcpu);
2138 }
2139
2140 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2141 struct kvm_vcpu_events *events)
2142 {
2143 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2144 | KVM_VCPUEVENT_VALID_SIPI_VECTOR))
2145 return -EINVAL;
2146
2147 vcpu_load(vcpu);
2148
2149 vcpu->arch.exception.pending = events->exception.injected;
2150 vcpu->arch.exception.nr = events->exception.nr;
2151 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2152 vcpu->arch.exception.error_code = events->exception.error_code;
2153
2154 vcpu->arch.interrupt.pending = events->interrupt.injected;
2155 vcpu->arch.interrupt.nr = events->interrupt.nr;
2156 vcpu->arch.interrupt.soft = events->interrupt.soft;
2157 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2158 kvm_pic_clear_isr_ack(vcpu->kvm);
2159
2160 vcpu->arch.nmi_injected = events->nmi.injected;
2161 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2162 vcpu->arch.nmi_pending = events->nmi.pending;
2163 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2164
2165 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2166 vcpu->arch.sipi_vector = events->sipi_vector;
2167
2168 vcpu_put(vcpu);
2169
2170 return 0;
2171 }
2172
2173 long kvm_arch_vcpu_ioctl(struct file *filp,
2174 unsigned int ioctl, unsigned long arg)
2175 {
2176 struct kvm_vcpu *vcpu = filp->private_data;
2177 void __user *argp = (void __user *)arg;
2178 int r;
2179 struct kvm_lapic_state *lapic = NULL;
2180
2181 switch (ioctl) {
2182 case KVM_GET_LAPIC: {
2183 r = -EINVAL;
2184 if (!vcpu->arch.apic)
2185 goto out;
2186 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2187
2188 r = -ENOMEM;
2189 if (!lapic)
2190 goto out;
2191 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
2192 if (r)
2193 goto out;
2194 r = -EFAULT;
2195 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
2196 goto out;
2197 r = 0;
2198 break;
2199 }
2200 case KVM_SET_LAPIC: {
2201 r = -EINVAL;
2202 if (!vcpu->arch.apic)
2203 goto out;
2204 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2205 r = -ENOMEM;
2206 if (!lapic)
2207 goto out;
2208 r = -EFAULT;
2209 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
2210 goto out;
2211 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
2212 if (r)
2213 goto out;
2214 r = 0;
2215 break;
2216 }
2217 case KVM_INTERRUPT: {
2218 struct kvm_interrupt irq;
2219
2220 r = -EFAULT;
2221 if (copy_from_user(&irq, argp, sizeof irq))
2222 goto out;
2223 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2224 if (r)
2225 goto out;
2226 r = 0;
2227 break;
2228 }
2229 case KVM_NMI: {
2230 r = kvm_vcpu_ioctl_nmi(vcpu);
2231 if (r)
2232 goto out;
2233 r = 0;
2234 break;
2235 }
2236 case KVM_SET_CPUID: {
2237 struct kvm_cpuid __user *cpuid_arg = argp;
2238 struct kvm_cpuid cpuid;
2239
2240 r = -EFAULT;
2241 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2242 goto out;
2243 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2244 if (r)
2245 goto out;
2246 break;
2247 }
2248 case KVM_SET_CPUID2: {
2249 struct kvm_cpuid2 __user *cpuid_arg = argp;
2250 struct kvm_cpuid2 cpuid;
2251
2252 r = -EFAULT;
2253 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2254 goto out;
2255 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2256 cpuid_arg->entries);
2257 if (r)
2258 goto out;
2259 break;
2260 }
2261 case KVM_GET_CPUID2: {
2262 struct kvm_cpuid2 __user *cpuid_arg = argp;
2263 struct kvm_cpuid2 cpuid;
2264
2265 r = -EFAULT;
2266 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2267 goto out;
2268 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2269 cpuid_arg->entries);
2270 if (r)
2271 goto out;
2272 r = -EFAULT;
2273 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2274 goto out;
2275 r = 0;
2276 break;
2277 }
2278 case KVM_GET_MSRS:
2279 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2280 break;
2281 case KVM_SET_MSRS:
2282 r = msr_io(vcpu, argp, do_set_msr, 0);
2283 break;
2284 case KVM_TPR_ACCESS_REPORTING: {
2285 struct kvm_tpr_access_ctl tac;
2286
2287 r = -EFAULT;
2288 if (copy_from_user(&tac, argp, sizeof tac))
2289 goto out;
2290 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2291 if (r)
2292 goto out;
2293 r = -EFAULT;
2294 if (copy_to_user(argp, &tac, sizeof tac))
2295 goto out;
2296 r = 0;
2297 break;
2298 };
2299 case KVM_SET_VAPIC_ADDR: {
2300 struct kvm_vapic_addr va;
2301
2302 r = -EINVAL;
2303 if (!irqchip_in_kernel(vcpu->kvm))
2304 goto out;
2305 r = -EFAULT;
2306 if (copy_from_user(&va, argp, sizeof va))
2307 goto out;
2308 r = 0;
2309 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2310 break;
2311 }
2312 case KVM_X86_SETUP_MCE: {
2313 u64 mcg_cap;
2314
2315 r = -EFAULT;
2316 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2317 goto out;
2318 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2319 break;
2320 }
2321 case KVM_X86_SET_MCE: {
2322 struct kvm_x86_mce mce;
2323
2324 r = -EFAULT;
2325 if (copy_from_user(&mce, argp, sizeof mce))
2326 goto out;
2327 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2328 break;
2329 }
2330 case KVM_GET_VCPU_EVENTS: {
2331 struct kvm_vcpu_events events;
2332
2333 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2334
2335 r = -EFAULT;
2336 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2337 break;
2338 r = 0;
2339 break;
2340 }
2341 case KVM_SET_VCPU_EVENTS: {
2342 struct kvm_vcpu_events events;
2343
2344 r = -EFAULT;
2345 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2346 break;
2347
2348 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2349 break;
2350 }
2351 default:
2352 r = -EINVAL;
2353 }
2354 out:
2355 kfree(lapic);
2356 return r;
2357 }
2358
2359 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2360 {
2361 int ret;
2362
2363 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2364 return -1;
2365 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2366 return ret;
2367 }
2368
2369 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2370 u64 ident_addr)
2371 {
2372 kvm->arch.ept_identity_map_addr = ident_addr;
2373 return 0;
2374 }
2375
2376 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2377 u32 kvm_nr_mmu_pages)
2378 {
2379 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2380 return -EINVAL;
2381
2382 mutex_lock(&kvm->slots_lock);
2383 spin_lock(&kvm->mmu_lock);
2384
2385 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2386 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2387
2388 spin_unlock(&kvm->mmu_lock);
2389 mutex_unlock(&kvm->slots_lock);
2390 return 0;
2391 }
2392
2393 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2394 {
2395 return kvm->arch.n_alloc_mmu_pages;
2396 }
2397
2398 gfn_t unalias_gfn_instantiation(struct kvm *kvm, gfn_t gfn)
2399 {
2400 int i;
2401 struct kvm_mem_alias *alias;
2402 struct kvm_mem_aliases *aliases;
2403
2404 aliases = rcu_dereference(kvm->arch.aliases);
2405
2406 for (i = 0; i < aliases->naliases; ++i) {
2407 alias = &aliases->aliases[i];
2408 if (alias->flags & KVM_ALIAS_INVALID)
2409 continue;
2410 if (gfn >= alias->base_gfn
2411 && gfn < alias->base_gfn + alias->npages)
2412 return alias->target_gfn + gfn - alias->base_gfn;
2413 }
2414 return gfn;
2415 }
2416
2417 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2418 {
2419 int i;
2420 struct kvm_mem_alias *alias;
2421 struct kvm_mem_aliases *aliases;
2422
2423 aliases = rcu_dereference(kvm->arch.aliases);
2424
2425 for (i = 0; i < aliases->naliases; ++i) {
2426 alias = &aliases->aliases[i];
2427 if (gfn >= alias->base_gfn
2428 && gfn < alias->base_gfn + alias->npages)
2429 return alias->target_gfn + gfn - alias->base_gfn;
2430 }
2431 return gfn;
2432 }
2433
2434 /*
2435 * Set a new alias region. Aliases map a portion of physical memory into
2436 * another portion. This is useful for memory windows, for example the PC
2437 * VGA region.
2438 */
2439 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2440 struct kvm_memory_alias *alias)
2441 {
2442 int r, n;
2443 struct kvm_mem_alias *p;
2444 struct kvm_mem_aliases *aliases, *old_aliases;
2445
2446 r = -EINVAL;
2447 /* General sanity checks */
2448 if (alias->memory_size & (PAGE_SIZE - 1))
2449 goto out;
2450 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2451 goto out;
2452 if (alias->slot >= KVM_ALIAS_SLOTS)
2453 goto out;
2454 if (alias->guest_phys_addr + alias->memory_size
2455 < alias->guest_phys_addr)
2456 goto out;
2457 if (alias->target_phys_addr + alias->memory_size
2458 < alias->target_phys_addr)
2459 goto out;
2460
2461 r = -ENOMEM;
2462 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2463 if (!aliases)
2464 goto out;
2465
2466 mutex_lock(&kvm->slots_lock);
2467
2468 /* invalidate any gfn reference in case of deletion/shrinking */
2469 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2470 aliases->aliases[alias->slot].flags |= KVM_ALIAS_INVALID;
2471 old_aliases = kvm->arch.aliases;
2472 rcu_assign_pointer(kvm->arch.aliases, aliases);
2473 synchronize_srcu_expedited(&kvm->srcu);
2474 kvm_mmu_zap_all(kvm);
2475 kfree(old_aliases);
2476
2477 r = -ENOMEM;
2478 aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
2479 if (!aliases)
2480 goto out_unlock;
2481
2482 memcpy(aliases, kvm->arch.aliases, sizeof(struct kvm_mem_aliases));
2483
2484 p = &aliases->aliases[alias->slot];
2485 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2486 p->npages = alias->memory_size >> PAGE_SHIFT;
2487 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2488 p->flags &= ~(KVM_ALIAS_INVALID);
2489
2490 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2491 if (aliases->aliases[n - 1].npages)
2492 break;
2493 aliases->naliases = n;
2494
2495 old_aliases = kvm->arch.aliases;
2496 rcu_assign_pointer(kvm->arch.aliases, aliases);
2497 synchronize_srcu_expedited(&kvm->srcu);
2498 kfree(old_aliases);
2499 r = 0;
2500
2501 out_unlock:
2502 mutex_unlock(&kvm->slots_lock);
2503 out:
2504 return r;
2505 }
2506
2507 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2508 {
2509 int r;
2510
2511 r = 0;
2512 switch (chip->chip_id) {
2513 case KVM_IRQCHIP_PIC_MASTER:
2514 memcpy(&chip->chip.pic,
2515 &pic_irqchip(kvm)->pics[0],
2516 sizeof(struct kvm_pic_state));
2517 break;
2518 case KVM_IRQCHIP_PIC_SLAVE:
2519 memcpy(&chip->chip.pic,
2520 &pic_irqchip(kvm)->pics[1],
2521 sizeof(struct kvm_pic_state));
2522 break;
2523 case KVM_IRQCHIP_IOAPIC:
2524 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2525 break;
2526 default:
2527 r = -EINVAL;
2528 break;
2529 }
2530 return r;
2531 }
2532
2533 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2534 {
2535 int r;
2536
2537 r = 0;
2538 switch (chip->chip_id) {
2539 case KVM_IRQCHIP_PIC_MASTER:
2540 spin_lock(&pic_irqchip(kvm)->lock);
2541 memcpy(&pic_irqchip(kvm)->pics[0],
2542 &chip->chip.pic,
2543 sizeof(struct kvm_pic_state));
2544 spin_unlock(&pic_irqchip(kvm)->lock);
2545 break;
2546 case KVM_IRQCHIP_PIC_SLAVE:
2547 spin_lock(&pic_irqchip(kvm)->lock);
2548 memcpy(&pic_irqchip(kvm)->pics[1],
2549 &chip->chip.pic,
2550 sizeof(struct kvm_pic_state));
2551 spin_unlock(&pic_irqchip(kvm)->lock);
2552 break;
2553 case KVM_IRQCHIP_IOAPIC:
2554 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2555 break;
2556 default:
2557 r = -EINVAL;
2558 break;
2559 }
2560 kvm_pic_update_irq(pic_irqchip(kvm));
2561 return r;
2562 }
2563
2564 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2565 {
2566 int r = 0;
2567
2568 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2569 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2570 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2571 return r;
2572 }
2573
2574 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2575 {
2576 int r = 0;
2577
2578 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2579 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2580 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2581 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2582 return r;
2583 }
2584
2585 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2586 {
2587 int r = 0;
2588
2589 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2590 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2591 sizeof(ps->channels));
2592 ps->flags = kvm->arch.vpit->pit_state.flags;
2593 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2594 return r;
2595 }
2596
2597 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2598 {
2599 int r = 0, start = 0;
2600 u32 prev_legacy, cur_legacy;
2601 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2602 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2603 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2604 if (!prev_legacy && cur_legacy)
2605 start = 1;
2606 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2607 sizeof(kvm->arch.vpit->pit_state.channels));
2608 kvm->arch.vpit->pit_state.flags = ps->flags;
2609 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2610 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2611 return r;
2612 }
2613
2614 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2615 struct kvm_reinject_control *control)
2616 {
2617 if (!kvm->arch.vpit)
2618 return -ENXIO;
2619 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2620 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2621 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2622 return 0;
2623 }
2624
2625 /*
2626 * Get (and clear) the dirty memory log for a memory slot.
2627 */
2628 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2629 struct kvm_dirty_log *log)
2630 {
2631 int r, n, i;
2632 struct kvm_memory_slot *memslot;
2633 unsigned long is_dirty = 0;
2634 unsigned long *dirty_bitmap = NULL;
2635
2636 mutex_lock(&kvm->slots_lock);
2637
2638 r = -EINVAL;
2639 if (log->slot >= KVM_MEMORY_SLOTS)
2640 goto out;
2641
2642 memslot = &kvm->memslots->memslots[log->slot];
2643 r = -ENOENT;
2644 if (!memslot->dirty_bitmap)
2645 goto out;
2646
2647 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2648
2649 r = -ENOMEM;
2650 dirty_bitmap = vmalloc(n);
2651 if (!dirty_bitmap)
2652 goto out;
2653 memset(dirty_bitmap, 0, n);
2654
2655 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2656 is_dirty = memslot->dirty_bitmap[i];
2657
2658 /* If nothing is dirty, don't bother messing with page tables. */
2659 if (is_dirty) {
2660 struct kvm_memslots *slots, *old_slots;
2661
2662 spin_lock(&kvm->mmu_lock);
2663 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2664 spin_unlock(&kvm->mmu_lock);
2665
2666 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2667 if (!slots)
2668 goto out_free;
2669
2670 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2671 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2672
2673 old_slots = kvm->memslots;
2674 rcu_assign_pointer(kvm->memslots, slots);
2675 synchronize_srcu_expedited(&kvm->srcu);
2676 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
2677 kfree(old_slots);
2678 }
2679
2680 r = 0;
2681 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
2682 r = -EFAULT;
2683 out_free:
2684 vfree(dirty_bitmap);
2685 out:
2686 mutex_unlock(&kvm->slots_lock);
2687 return r;
2688 }
2689
2690 long kvm_arch_vm_ioctl(struct file *filp,
2691 unsigned int ioctl, unsigned long arg)
2692 {
2693 struct kvm *kvm = filp->private_data;
2694 void __user *argp = (void __user *)arg;
2695 int r = -ENOTTY;
2696 /*
2697 * This union makes it completely explicit to gcc-3.x
2698 * that these two variables' stack usage should be
2699 * combined, not added together.
2700 */
2701 union {
2702 struct kvm_pit_state ps;
2703 struct kvm_pit_state2 ps2;
2704 struct kvm_memory_alias alias;
2705 struct kvm_pit_config pit_config;
2706 } u;
2707
2708 switch (ioctl) {
2709 case KVM_SET_TSS_ADDR:
2710 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2711 if (r < 0)
2712 goto out;
2713 break;
2714 case KVM_SET_IDENTITY_MAP_ADDR: {
2715 u64 ident_addr;
2716
2717 r = -EFAULT;
2718 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2719 goto out;
2720 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2721 if (r < 0)
2722 goto out;
2723 break;
2724 }
2725 case KVM_SET_MEMORY_REGION: {
2726 struct kvm_memory_region kvm_mem;
2727 struct kvm_userspace_memory_region kvm_userspace_mem;
2728
2729 r = -EFAULT;
2730 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2731 goto out;
2732 kvm_userspace_mem.slot = kvm_mem.slot;
2733 kvm_userspace_mem.flags = kvm_mem.flags;
2734 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2735 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2736 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2737 if (r)
2738 goto out;
2739 break;
2740 }
2741 case KVM_SET_NR_MMU_PAGES:
2742 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2743 if (r)
2744 goto out;
2745 break;
2746 case KVM_GET_NR_MMU_PAGES:
2747 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2748 break;
2749 case KVM_SET_MEMORY_ALIAS:
2750 r = -EFAULT;
2751 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2752 goto out;
2753 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2754 if (r)
2755 goto out;
2756 break;
2757 case KVM_CREATE_IRQCHIP: {
2758 struct kvm_pic *vpic;
2759
2760 mutex_lock(&kvm->lock);
2761 r = -EEXIST;
2762 if (kvm->arch.vpic)
2763 goto create_irqchip_unlock;
2764 r = -ENOMEM;
2765 vpic = kvm_create_pic(kvm);
2766 if (vpic) {
2767 r = kvm_ioapic_init(kvm);
2768 if (r) {
2769 kfree(vpic);
2770 goto create_irqchip_unlock;
2771 }
2772 } else
2773 goto create_irqchip_unlock;
2774 smp_wmb();
2775 kvm->arch.vpic = vpic;
2776 smp_wmb();
2777 r = kvm_setup_default_irq_routing(kvm);
2778 if (r) {
2779 mutex_lock(&kvm->irq_lock);
2780 kfree(kvm->arch.vpic);
2781 kfree(kvm->arch.vioapic);
2782 kvm->arch.vpic = NULL;
2783 kvm->arch.vioapic = NULL;
2784 mutex_unlock(&kvm->irq_lock);
2785 }
2786 create_irqchip_unlock:
2787 mutex_unlock(&kvm->lock);
2788 break;
2789 }
2790 case KVM_CREATE_PIT:
2791 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2792 goto create_pit;
2793 case KVM_CREATE_PIT2:
2794 r = -EFAULT;
2795 if (copy_from_user(&u.pit_config, argp,
2796 sizeof(struct kvm_pit_config)))
2797 goto out;
2798 create_pit:
2799 mutex_lock(&kvm->slots_lock);
2800 r = -EEXIST;
2801 if (kvm->arch.vpit)
2802 goto create_pit_unlock;
2803 r = -ENOMEM;
2804 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2805 if (kvm->arch.vpit)
2806 r = 0;
2807 create_pit_unlock:
2808 mutex_unlock(&kvm->slots_lock);
2809 break;
2810 case KVM_IRQ_LINE_STATUS:
2811 case KVM_IRQ_LINE: {
2812 struct kvm_irq_level irq_event;
2813
2814 r = -EFAULT;
2815 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2816 goto out;
2817 if (irqchip_in_kernel(kvm)) {
2818 __s32 status;
2819 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2820 irq_event.irq, irq_event.level);
2821 if (ioctl == KVM_IRQ_LINE_STATUS) {
2822 irq_event.status = status;
2823 if (copy_to_user(argp, &irq_event,
2824 sizeof irq_event))
2825 goto out;
2826 }
2827 r = 0;
2828 }
2829 break;
2830 }
2831 case KVM_GET_IRQCHIP: {
2832 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2833 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2834
2835 r = -ENOMEM;
2836 if (!chip)
2837 goto out;
2838 r = -EFAULT;
2839 if (copy_from_user(chip, argp, sizeof *chip))
2840 goto get_irqchip_out;
2841 r = -ENXIO;
2842 if (!irqchip_in_kernel(kvm))
2843 goto get_irqchip_out;
2844 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2845 if (r)
2846 goto get_irqchip_out;
2847 r = -EFAULT;
2848 if (copy_to_user(argp, chip, sizeof *chip))
2849 goto get_irqchip_out;
2850 r = 0;
2851 get_irqchip_out:
2852 kfree(chip);
2853 if (r)
2854 goto out;
2855 break;
2856 }
2857 case KVM_SET_IRQCHIP: {
2858 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2859 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2860
2861 r = -ENOMEM;
2862 if (!chip)
2863 goto out;
2864 r = -EFAULT;
2865 if (copy_from_user(chip, argp, sizeof *chip))
2866 goto set_irqchip_out;
2867 r = -ENXIO;
2868 if (!irqchip_in_kernel(kvm))
2869 goto set_irqchip_out;
2870 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2871 if (r)
2872 goto set_irqchip_out;
2873 r = 0;
2874 set_irqchip_out:
2875 kfree(chip);
2876 if (r)
2877 goto out;
2878 break;
2879 }
2880 case KVM_GET_PIT: {
2881 r = -EFAULT;
2882 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2883 goto out;
2884 r = -ENXIO;
2885 if (!kvm->arch.vpit)
2886 goto out;
2887 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2888 if (r)
2889 goto out;
2890 r = -EFAULT;
2891 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2892 goto out;
2893 r = 0;
2894 break;
2895 }
2896 case KVM_SET_PIT: {
2897 r = -EFAULT;
2898 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2899 goto out;
2900 r = -ENXIO;
2901 if (!kvm->arch.vpit)
2902 goto out;
2903 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2904 if (r)
2905 goto out;
2906 r = 0;
2907 break;
2908 }
2909 case KVM_GET_PIT2: {
2910 r = -ENXIO;
2911 if (!kvm->arch.vpit)
2912 goto out;
2913 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2914 if (r)
2915 goto out;
2916 r = -EFAULT;
2917 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2918 goto out;
2919 r = 0;
2920 break;
2921 }
2922 case KVM_SET_PIT2: {
2923 r = -EFAULT;
2924 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2925 goto out;
2926 r = -ENXIO;
2927 if (!kvm->arch.vpit)
2928 goto out;
2929 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2930 if (r)
2931 goto out;
2932 r = 0;
2933 break;
2934 }
2935 case KVM_REINJECT_CONTROL: {
2936 struct kvm_reinject_control control;
2937 r = -EFAULT;
2938 if (copy_from_user(&control, argp, sizeof(control)))
2939 goto out;
2940 r = kvm_vm_ioctl_reinject(kvm, &control);
2941 if (r)
2942 goto out;
2943 r = 0;
2944 break;
2945 }
2946 case KVM_XEN_HVM_CONFIG: {
2947 r = -EFAULT;
2948 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2949 sizeof(struct kvm_xen_hvm_config)))
2950 goto out;
2951 r = -EINVAL;
2952 if (kvm->arch.xen_hvm_config.flags)
2953 goto out;
2954 r = 0;
2955 break;
2956 }
2957 case KVM_SET_CLOCK: {
2958 struct timespec now;
2959 struct kvm_clock_data user_ns;
2960 u64 now_ns;
2961 s64 delta;
2962
2963 r = -EFAULT;
2964 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2965 goto out;
2966
2967 r = -EINVAL;
2968 if (user_ns.flags)
2969 goto out;
2970
2971 r = 0;
2972 ktime_get_ts(&now);
2973 now_ns = timespec_to_ns(&now);
2974 delta = user_ns.clock - now_ns;
2975 kvm->arch.kvmclock_offset = delta;
2976 break;
2977 }
2978 case KVM_GET_CLOCK: {
2979 struct timespec now;
2980 struct kvm_clock_data user_ns;
2981 u64 now_ns;
2982
2983 ktime_get_ts(&now);
2984 now_ns = timespec_to_ns(&now);
2985 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2986 user_ns.flags = 0;
2987
2988 r = -EFAULT;
2989 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2990 goto out;
2991 r = 0;
2992 break;
2993 }
2994
2995 default:
2996 ;
2997 }
2998 out:
2999 return r;
3000 }
3001
3002 static void kvm_init_msr_list(void)
3003 {
3004 u32 dummy[2];
3005 unsigned i, j;
3006
3007 /* skip the first msrs in the list. KVM-specific */
3008 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3009 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3010 continue;
3011 if (j < i)
3012 msrs_to_save[j] = msrs_to_save[i];
3013 j++;
3014 }
3015 num_msrs_to_save = j;
3016 }
3017
3018 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3019 const void *v)
3020 {
3021 if (vcpu->arch.apic &&
3022 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3023 return 0;
3024
3025 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3026 }
3027
3028 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3029 {
3030 if (vcpu->arch.apic &&
3031 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3032 return 0;
3033
3034 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3035 }
3036
3037 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3038 struct kvm_vcpu *vcpu)
3039 {
3040 void *data = val;
3041 int r = X86EMUL_CONTINUE;
3042
3043 while (bytes) {
3044 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3045 unsigned offset = addr & (PAGE_SIZE-1);
3046 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3047 int ret;
3048
3049 if (gpa == UNMAPPED_GVA) {
3050 r = X86EMUL_PROPAGATE_FAULT;
3051 goto out;
3052 }
3053 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3054 if (ret < 0) {
3055 r = X86EMUL_UNHANDLEABLE;
3056 goto out;
3057 }
3058
3059 bytes -= toread;
3060 data += toread;
3061 addr += toread;
3062 }
3063 out:
3064 return r;
3065 }
3066
3067 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
3068 struct kvm_vcpu *vcpu)
3069 {
3070 void *data = val;
3071 int r = X86EMUL_CONTINUE;
3072
3073 while (bytes) {
3074 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3075 unsigned offset = addr & (PAGE_SIZE-1);
3076 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3077 int ret;
3078
3079 if (gpa == UNMAPPED_GVA) {
3080 r = X86EMUL_PROPAGATE_FAULT;
3081 goto out;
3082 }
3083 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3084 if (ret < 0) {
3085 r = X86EMUL_UNHANDLEABLE;
3086 goto out;
3087 }
3088
3089 bytes -= towrite;
3090 data += towrite;
3091 addr += towrite;
3092 }
3093 out:
3094 return r;
3095 }
3096
3097
3098 static int emulator_read_emulated(unsigned long addr,
3099 void *val,
3100 unsigned int bytes,
3101 struct kvm_vcpu *vcpu)
3102 {
3103 gpa_t gpa;
3104
3105 if (vcpu->mmio_read_completed) {
3106 memcpy(val, vcpu->mmio_data, bytes);
3107 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3108 vcpu->mmio_phys_addr, *(u64 *)val);
3109 vcpu->mmio_read_completed = 0;
3110 return X86EMUL_CONTINUE;
3111 }
3112
3113 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3114
3115 /* For APIC access vmexit */
3116 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3117 goto mmio;
3118
3119 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
3120 == X86EMUL_CONTINUE)
3121 return X86EMUL_CONTINUE;
3122 if (gpa == UNMAPPED_GVA)
3123 return X86EMUL_PROPAGATE_FAULT;
3124
3125 mmio:
3126 /*
3127 * Is this MMIO handled locally?
3128 */
3129 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3130 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3131 return X86EMUL_CONTINUE;
3132 }
3133
3134 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3135
3136 vcpu->mmio_needed = 1;
3137 vcpu->mmio_phys_addr = gpa;
3138 vcpu->mmio_size = bytes;
3139 vcpu->mmio_is_write = 0;
3140
3141 return X86EMUL_UNHANDLEABLE;
3142 }
3143
3144 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3145 const void *val, int bytes)
3146 {
3147 int ret;
3148
3149 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3150 if (ret < 0)
3151 return 0;
3152 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3153 return 1;
3154 }
3155
3156 static int emulator_write_emulated_onepage(unsigned long addr,
3157 const void *val,
3158 unsigned int bytes,
3159 struct kvm_vcpu *vcpu)
3160 {
3161 gpa_t gpa;
3162
3163 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3164
3165 if (gpa == UNMAPPED_GVA) {
3166 kvm_inject_page_fault(vcpu, addr, 2);
3167 return X86EMUL_PROPAGATE_FAULT;
3168 }
3169
3170 /* For APIC access vmexit */
3171 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3172 goto mmio;
3173
3174 if (emulator_write_phys(vcpu, gpa, val, bytes))
3175 return X86EMUL_CONTINUE;
3176
3177 mmio:
3178 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3179 /*
3180 * Is this MMIO handled locally?
3181 */
3182 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3183 return X86EMUL_CONTINUE;
3184
3185 vcpu->mmio_needed = 1;
3186 vcpu->mmio_phys_addr = gpa;
3187 vcpu->mmio_size = bytes;
3188 vcpu->mmio_is_write = 1;
3189 memcpy(vcpu->mmio_data, val, bytes);
3190
3191 return X86EMUL_CONTINUE;
3192 }
3193
3194 int emulator_write_emulated(unsigned long addr,
3195 const void *val,
3196 unsigned int bytes,
3197 struct kvm_vcpu *vcpu)
3198 {
3199 /* Crossing a page boundary? */
3200 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3201 int rc, now;
3202
3203 now = -addr & ~PAGE_MASK;
3204 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
3205 if (rc != X86EMUL_CONTINUE)
3206 return rc;
3207 addr += now;
3208 val += now;
3209 bytes -= now;
3210 }
3211 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
3212 }
3213 EXPORT_SYMBOL_GPL(emulator_write_emulated);
3214
3215 static int emulator_cmpxchg_emulated(unsigned long addr,
3216 const void *old,
3217 const void *new,
3218 unsigned int bytes,
3219 struct kvm_vcpu *vcpu)
3220 {
3221 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3222 #ifndef CONFIG_X86_64
3223 /* guests cmpxchg8b have to be emulated atomically */
3224 if (bytes == 8) {
3225 gpa_t gpa;
3226 struct page *page;
3227 char *kaddr;
3228 u64 val;
3229
3230 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
3231
3232 if (gpa == UNMAPPED_GVA ||
3233 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3234 goto emul_write;
3235
3236 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3237 goto emul_write;
3238
3239 val = *(u64 *)new;
3240
3241 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3242
3243 kaddr = kmap_atomic(page, KM_USER0);
3244 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
3245 kunmap_atomic(kaddr, KM_USER0);
3246 kvm_release_page_dirty(page);
3247 }
3248 emul_write:
3249 #endif
3250
3251 return emulator_write_emulated(addr, new, bytes, vcpu);
3252 }
3253
3254 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3255 {
3256 return kvm_x86_ops->get_segment_base(vcpu, seg);
3257 }
3258
3259 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3260 {
3261 kvm_mmu_invlpg(vcpu, address);
3262 return X86EMUL_CONTINUE;
3263 }
3264
3265 int emulate_clts(struct kvm_vcpu *vcpu)
3266 {
3267 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3268 return X86EMUL_CONTINUE;
3269 }
3270
3271 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3272 {
3273 struct kvm_vcpu *vcpu = ctxt->vcpu;
3274
3275 switch (dr) {
3276 case 0 ... 3:
3277 *dest = kvm_x86_ops->get_dr(vcpu, dr);
3278 return X86EMUL_CONTINUE;
3279 default:
3280 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
3281 return X86EMUL_UNHANDLEABLE;
3282 }
3283 }
3284
3285 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3286 {
3287 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
3288 int exception;
3289
3290 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
3291 if (exception) {
3292 /* FIXME: better handling */
3293 return X86EMUL_UNHANDLEABLE;
3294 }
3295 return X86EMUL_CONTINUE;
3296 }
3297
3298 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
3299 {
3300 u8 opcodes[4];
3301 unsigned long rip = kvm_rip_read(vcpu);
3302 unsigned long rip_linear;
3303
3304 if (!printk_ratelimit())
3305 return;
3306
3307 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3308
3309 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
3310
3311 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3312 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3313 }
3314 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3315
3316 static struct x86_emulate_ops emulate_ops = {
3317 .read_std = kvm_read_guest_virt,
3318 .read_emulated = emulator_read_emulated,
3319 .write_emulated = emulator_write_emulated,
3320 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3321 };
3322
3323 static void cache_all_regs(struct kvm_vcpu *vcpu)
3324 {
3325 kvm_register_read(vcpu, VCPU_REGS_RAX);
3326 kvm_register_read(vcpu, VCPU_REGS_RSP);
3327 kvm_register_read(vcpu, VCPU_REGS_RIP);
3328 vcpu->arch.regs_dirty = ~0;
3329 }
3330
3331 int emulate_instruction(struct kvm_vcpu *vcpu,
3332 unsigned long cr2,
3333 u16 error_code,
3334 int emulation_type)
3335 {
3336 int r, shadow_mask;
3337 struct decode_cache *c;
3338 struct kvm_run *run = vcpu->run;
3339
3340 kvm_clear_exception_queue(vcpu);
3341 vcpu->arch.mmio_fault_cr2 = cr2;
3342 /*
3343 * TODO: fix emulate.c to use guest_read/write_register
3344 * instead of direct ->regs accesses, can save hundred cycles
3345 * on Intel for instructions that don't read/change RSP, for
3346 * for example.
3347 */
3348 cache_all_regs(vcpu);
3349
3350 vcpu->mmio_is_write = 0;
3351 vcpu->arch.pio.string = 0;
3352
3353 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3354 int cs_db, cs_l;
3355 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3356
3357 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3358 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3359 vcpu->arch.emulate_ctxt.mode =
3360 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3361 ? X86EMUL_MODE_REAL : cs_l
3362 ? X86EMUL_MODE_PROT64 : cs_db
3363 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3364
3365 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3366
3367 /* Only allow emulation of specific instructions on #UD
3368 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3369 c = &vcpu->arch.emulate_ctxt.decode;
3370 if (emulation_type & EMULTYPE_TRAP_UD) {
3371 if (!c->twobyte)
3372 return EMULATE_FAIL;
3373 switch (c->b) {
3374 case 0x01: /* VMMCALL */
3375 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3376 return EMULATE_FAIL;
3377 break;
3378 case 0x34: /* sysenter */
3379 case 0x35: /* sysexit */
3380 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3381 return EMULATE_FAIL;
3382 break;
3383 case 0x05: /* syscall */
3384 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3385 return EMULATE_FAIL;
3386 break;
3387 default:
3388 return EMULATE_FAIL;
3389 }
3390
3391 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3392 return EMULATE_FAIL;
3393 }
3394
3395 ++vcpu->stat.insn_emulation;
3396 if (r) {
3397 ++vcpu->stat.insn_emulation_fail;
3398 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3399 return EMULATE_DONE;
3400 return EMULATE_FAIL;
3401 }
3402 }
3403
3404 if (emulation_type & EMULTYPE_SKIP) {
3405 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3406 return EMULATE_DONE;
3407 }
3408
3409 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3410 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3411
3412 if (r == 0)
3413 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3414
3415 if (vcpu->arch.pio.string)
3416 return EMULATE_DO_MMIO;
3417
3418 if ((r || vcpu->mmio_is_write) && run) {
3419 run->exit_reason = KVM_EXIT_MMIO;
3420 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3421 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3422 run->mmio.len = vcpu->mmio_size;
3423 run->mmio.is_write = vcpu->mmio_is_write;
3424 }
3425
3426 if (r) {
3427 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3428 return EMULATE_DONE;
3429 if (!vcpu->mmio_needed) {
3430 kvm_report_emulation_failure(vcpu, "mmio");
3431 return EMULATE_FAIL;
3432 }
3433 return EMULATE_DO_MMIO;
3434 }
3435
3436 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3437
3438 if (vcpu->mmio_is_write) {
3439 vcpu->mmio_needed = 0;
3440 return EMULATE_DO_MMIO;
3441 }
3442
3443 return EMULATE_DONE;
3444 }
3445 EXPORT_SYMBOL_GPL(emulate_instruction);
3446
3447 static int pio_copy_data(struct kvm_vcpu *vcpu)
3448 {
3449 void *p = vcpu->arch.pio_data;
3450 gva_t q = vcpu->arch.pio.guest_gva;
3451 unsigned bytes;
3452 int ret;
3453
3454 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3455 if (vcpu->arch.pio.in)
3456 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
3457 else
3458 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
3459 return ret;
3460 }
3461
3462 int complete_pio(struct kvm_vcpu *vcpu)
3463 {
3464 struct kvm_pio_request *io = &vcpu->arch.pio;
3465 long delta;
3466 int r;
3467 unsigned long val;
3468
3469 if (!io->string) {
3470 if (io->in) {
3471 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3472 memcpy(&val, vcpu->arch.pio_data, io->size);
3473 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3474 }
3475 } else {
3476 if (io->in) {
3477 r = pio_copy_data(vcpu);
3478 if (r)
3479 return r;
3480 }
3481
3482 delta = 1;
3483 if (io->rep) {
3484 delta *= io->cur_count;
3485 /*
3486 * The size of the register should really depend on
3487 * current address size.
3488 */
3489 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3490 val -= delta;
3491 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3492 }
3493 if (io->down)
3494 delta = -delta;
3495 delta *= io->size;
3496 if (io->in) {
3497 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3498 val += delta;
3499 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3500 } else {
3501 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3502 val += delta;
3503 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3504 }
3505 }
3506
3507 io->count -= io->cur_count;
3508 io->cur_count = 0;
3509
3510 return 0;
3511 }
3512
3513 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3514 {
3515 /* TODO: String I/O for in kernel device */
3516 int r;
3517
3518 if (vcpu->arch.pio.in)
3519 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3520 vcpu->arch.pio.size, pd);
3521 else
3522 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3523 vcpu->arch.pio.port, vcpu->arch.pio.size,
3524 pd);
3525 return r;
3526 }
3527
3528 static int pio_string_write(struct kvm_vcpu *vcpu)
3529 {
3530 struct kvm_pio_request *io = &vcpu->arch.pio;
3531 void *pd = vcpu->arch.pio_data;
3532 int i, r = 0;
3533
3534 for (i = 0; i < io->cur_count; i++) {
3535 if (kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3536 io->port, io->size, pd)) {
3537 r = -EOPNOTSUPP;
3538 break;
3539 }
3540 pd += io->size;
3541 }
3542 return r;
3543 }
3544
3545 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3546 {
3547 unsigned long val;
3548
3549 vcpu->run->exit_reason = KVM_EXIT_IO;
3550 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3551 vcpu->run->io.size = vcpu->arch.pio.size = size;
3552 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3553 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3554 vcpu->run->io.port = vcpu->arch.pio.port = port;
3555 vcpu->arch.pio.in = in;
3556 vcpu->arch.pio.string = 0;
3557 vcpu->arch.pio.down = 0;
3558 vcpu->arch.pio.rep = 0;
3559
3560 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3561 size, 1);
3562
3563 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3564 memcpy(vcpu->arch.pio_data, &val, 4);
3565
3566 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3567 complete_pio(vcpu);
3568 return 1;
3569 }
3570 return 0;
3571 }
3572 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3573
3574 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3575 int size, unsigned long count, int down,
3576 gva_t address, int rep, unsigned port)
3577 {
3578 unsigned now, in_page;
3579 int ret = 0;
3580
3581 vcpu->run->exit_reason = KVM_EXIT_IO;
3582 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3583 vcpu->run->io.size = vcpu->arch.pio.size = size;
3584 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3585 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3586 vcpu->run->io.port = vcpu->arch.pio.port = port;
3587 vcpu->arch.pio.in = in;
3588 vcpu->arch.pio.string = 1;
3589 vcpu->arch.pio.down = down;
3590 vcpu->arch.pio.rep = rep;
3591
3592 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3593 size, count);
3594
3595 if (!count) {
3596 kvm_x86_ops->skip_emulated_instruction(vcpu);
3597 return 1;
3598 }
3599
3600 if (!down)
3601 in_page = PAGE_SIZE - offset_in_page(address);
3602 else
3603 in_page = offset_in_page(address) + size;
3604 now = min(count, (unsigned long)in_page / size);
3605 if (!now)
3606 now = 1;
3607 if (down) {
3608 /*
3609 * String I/O in reverse. Yuck. Kill the guest, fix later.
3610 */
3611 pr_unimpl(vcpu, "guest string pio down\n");
3612 kvm_inject_gp(vcpu, 0);
3613 return 1;
3614 }
3615 vcpu->run->io.count = now;
3616 vcpu->arch.pio.cur_count = now;
3617
3618 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3619 kvm_x86_ops->skip_emulated_instruction(vcpu);
3620
3621 vcpu->arch.pio.guest_gva = address;
3622
3623 if (!vcpu->arch.pio.in) {
3624 /* string PIO write */
3625 ret = pio_copy_data(vcpu);
3626 if (ret == X86EMUL_PROPAGATE_FAULT) {
3627 kvm_inject_gp(vcpu, 0);
3628 return 1;
3629 }
3630 if (ret == 0 && !pio_string_write(vcpu)) {
3631 complete_pio(vcpu);
3632 if (vcpu->arch.pio.count == 0)
3633 ret = 1;
3634 }
3635 }
3636 /* no string PIO read support yet */
3637
3638 return ret;
3639 }
3640 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3641
3642 static void bounce_off(void *info)
3643 {
3644 /* nothing */
3645 }
3646
3647 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3648 void *data)
3649 {
3650 struct cpufreq_freqs *freq = data;
3651 struct kvm *kvm;
3652 struct kvm_vcpu *vcpu;
3653 int i, send_ipi = 0;
3654
3655 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3656 return 0;
3657 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3658 return 0;
3659 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3660
3661 spin_lock(&kvm_lock);
3662 list_for_each_entry(kvm, &vm_list, vm_list) {
3663 kvm_for_each_vcpu(i, vcpu, kvm) {
3664 if (vcpu->cpu != freq->cpu)
3665 continue;
3666 if (!kvm_request_guest_time_update(vcpu))
3667 continue;
3668 if (vcpu->cpu != smp_processor_id())
3669 send_ipi++;
3670 }
3671 }
3672 spin_unlock(&kvm_lock);
3673
3674 if (freq->old < freq->new && send_ipi) {
3675 /*
3676 * We upscale the frequency. Must make the guest
3677 * doesn't see old kvmclock values while running with
3678 * the new frequency, otherwise we risk the guest sees
3679 * time go backwards.
3680 *
3681 * In case we update the frequency for another cpu
3682 * (which might be in guest context) send an interrupt
3683 * to kick the cpu out of guest context. Next time
3684 * guest context is entered kvmclock will be updated,
3685 * so the guest will not see stale values.
3686 */
3687 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3688 }
3689 return 0;
3690 }
3691
3692 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3693 .notifier_call = kvmclock_cpufreq_notifier
3694 };
3695
3696 static void kvm_timer_init(void)
3697 {
3698 int cpu;
3699
3700 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3701 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3702 CPUFREQ_TRANSITION_NOTIFIER);
3703 for_each_online_cpu(cpu) {
3704 unsigned long khz = cpufreq_get(cpu);
3705 if (!khz)
3706 khz = tsc_khz;
3707 per_cpu(cpu_tsc_khz, cpu) = khz;
3708 }
3709 } else {
3710 for_each_possible_cpu(cpu)
3711 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3712 }
3713 }
3714
3715 int kvm_arch_init(void *opaque)
3716 {
3717 int r;
3718 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3719
3720 if (kvm_x86_ops) {
3721 printk(KERN_ERR "kvm: already loaded the other module\n");
3722 r = -EEXIST;
3723 goto out;
3724 }
3725
3726 if (!ops->cpu_has_kvm_support()) {
3727 printk(KERN_ERR "kvm: no hardware support\n");
3728 r = -EOPNOTSUPP;
3729 goto out;
3730 }
3731 if (ops->disabled_by_bios()) {
3732 printk(KERN_ERR "kvm: disabled by bios\n");
3733 r = -EOPNOTSUPP;
3734 goto out;
3735 }
3736
3737 r = kvm_mmu_module_init();
3738 if (r)
3739 goto out;
3740
3741 kvm_init_msr_list();
3742
3743 kvm_x86_ops = ops;
3744 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3745 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3746 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3747 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3748
3749 kvm_timer_init();
3750
3751 return 0;
3752
3753 out:
3754 return r;
3755 }
3756
3757 void kvm_arch_exit(void)
3758 {
3759 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3760 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3761 CPUFREQ_TRANSITION_NOTIFIER);
3762 kvm_x86_ops = NULL;
3763 kvm_mmu_module_exit();
3764 }
3765
3766 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3767 {
3768 ++vcpu->stat.halt_exits;
3769 if (irqchip_in_kernel(vcpu->kvm)) {
3770 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3771 return 1;
3772 } else {
3773 vcpu->run->exit_reason = KVM_EXIT_HLT;
3774 return 0;
3775 }
3776 }
3777 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3778
3779 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3780 unsigned long a1)
3781 {
3782 if (is_long_mode(vcpu))
3783 return a0;
3784 else
3785 return a0 | ((gpa_t)a1 << 32);
3786 }
3787
3788 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
3789 {
3790 u64 param, ingpa, outgpa, ret;
3791 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
3792 bool fast, longmode;
3793 int cs_db, cs_l;
3794
3795 /*
3796 * hypercall generates UD from non zero cpl and real mode
3797 * per HYPER-V spec
3798 */
3799 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
3800 !kvm_read_cr0_bits(vcpu, X86_CR0_PE)) {
3801 kvm_queue_exception(vcpu, UD_VECTOR);
3802 return 0;
3803 }
3804
3805 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3806 longmode = is_long_mode(vcpu) && cs_l == 1;
3807
3808 if (!longmode) {
3809 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
3810 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
3811 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
3812 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
3813 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
3814 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
3815 }
3816 #ifdef CONFIG_X86_64
3817 else {
3818 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
3819 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
3820 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
3821 }
3822 #endif
3823
3824 code = param & 0xffff;
3825 fast = (param >> 16) & 0x1;
3826 rep_cnt = (param >> 32) & 0xfff;
3827 rep_idx = (param >> 48) & 0xfff;
3828
3829 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
3830
3831 switch (code) {
3832 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
3833 kvm_vcpu_on_spin(vcpu);
3834 break;
3835 default:
3836 res = HV_STATUS_INVALID_HYPERCALL_CODE;
3837 break;
3838 }
3839
3840 ret = res | (((u64)rep_done & 0xfff) << 32);
3841 if (longmode) {
3842 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3843 } else {
3844 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
3845 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
3846 }
3847
3848 return 1;
3849 }
3850
3851 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3852 {
3853 unsigned long nr, a0, a1, a2, a3, ret;
3854 int r = 1;
3855
3856 if (kvm_hv_hypercall_enabled(vcpu->kvm))
3857 return kvm_hv_hypercall(vcpu);
3858
3859 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3860 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3861 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3862 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3863 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3864
3865 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3866
3867 if (!is_long_mode(vcpu)) {
3868 nr &= 0xFFFFFFFF;
3869 a0 &= 0xFFFFFFFF;
3870 a1 &= 0xFFFFFFFF;
3871 a2 &= 0xFFFFFFFF;
3872 a3 &= 0xFFFFFFFF;
3873 }
3874
3875 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3876 ret = -KVM_EPERM;
3877 goto out;
3878 }
3879
3880 switch (nr) {
3881 case KVM_HC_VAPIC_POLL_IRQ:
3882 ret = 0;
3883 break;
3884 case KVM_HC_MMU_OP:
3885 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3886 break;
3887 default:
3888 ret = -KVM_ENOSYS;
3889 break;
3890 }
3891 out:
3892 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3893 ++vcpu->stat.hypercalls;
3894 return r;
3895 }
3896 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3897
3898 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3899 {
3900 char instruction[3];
3901 int ret = 0;
3902 unsigned long rip = kvm_rip_read(vcpu);
3903
3904
3905 /*
3906 * Blow out the MMU to ensure that no other VCPU has an active mapping
3907 * to ensure that the updated hypercall appears atomically across all
3908 * VCPUs.
3909 */
3910 kvm_mmu_zap_all(vcpu->kvm);
3911
3912 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3913 if (emulator_write_emulated(rip, instruction, 3, vcpu)
3914 != X86EMUL_CONTINUE)
3915 ret = -EFAULT;
3916
3917 return ret;
3918 }
3919
3920 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3921 {
3922 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3923 }
3924
3925 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3926 {
3927 struct descriptor_table dt = { limit, base };
3928
3929 kvm_x86_ops->set_gdt(vcpu, &dt);
3930 }
3931
3932 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3933 {
3934 struct descriptor_table dt = { limit, base };
3935
3936 kvm_x86_ops->set_idt(vcpu, &dt);
3937 }
3938
3939 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3940 unsigned long *rflags)
3941 {
3942 kvm_lmsw(vcpu, msw);
3943 *rflags = kvm_get_rflags(vcpu);
3944 }
3945
3946 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3947 {
3948 unsigned long value;
3949
3950 switch (cr) {
3951 case 0:
3952 value = kvm_read_cr0(vcpu);
3953 break;
3954 case 2:
3955 value = vcpu->arch.cr2;
3956 break;
3957 case 3:
3958 value = vcpu->arch.cr3;
3959 break;
3960 case 4:
3961 value = kvm_read_cr4(vcpu);
3962 break;
3963 case 8:
3964 value = kvm_get_cr8(vcpu);
3965 break;
3966 default:
3967 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3968 return 0;
3969 }
3970
3971 return value;
3972 }
3973
3974 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3975 unsigned long *rflags)
3976 {
3977 switch (cr) {
3978 case 0:
3979 kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3980 *rflags = kvm_get_rflags(vcpu);
3981 break;
3982 case 2:
3983 vcpu->arch.cr2 = val;
3984 break;
3985 case 3:
3986 kvm_set_cr3(vcpu, val);
3987 break;
3988 case 4:
3989 kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3990 break;
3991 case 8:
3992 kvm_set_cr8(vcpu, val & 0xfUL);
3993 break;
3994 default:
3995 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3996 }
3997 }
3998
3999 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4000 {
4001 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4002 int j, nent = vcpu->arch.cpuid_nent;
4003
4004 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4005 /* when no next entry is found, the current entry[i] is reselected */
4006 for (j = i + 1; ; j = (j + 1) % nent) {
4007 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4008 if (ej->function == e->function) {
4009 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4010 return j;
4011 }
4012 }
4013 return 0; /* silence gcc, even though control never reaches here */
4014 }
4015
4016 /* find an entry with matching function, matching index (if needed), and that
4017 * should be read next (if it's stateful) */
4018 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4019 u32 function, u32 index)
4020 {
4021 if (e->function != function)
4022 return 0;
4023 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4024 return 0;
4025 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4026 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4027 return 0;
4028 return 1;
4029 }
4030
4031 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4032 u32 function, u32 index)
4033 {
4034 int i;
4035 struct kvm_cpuid_entry2 *best = NULL;
4036
4037 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4038 struct kvm_cpuid_entry2 *e;
4039
4040 e = &vcpu->arch.cpuid_entries[i];
4041 if (is_matching_cpuid_entry(e, function, index)) {
4042 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4043 move_to_next_stateful_cpuid_entry(vcpu, i);
4044 best = e;
4045 break;
4046 }
4047 /*
4048 * Both basic or both extended?
4049 */
4050 if (((e->function ^ function) & 0x80000000) == 0)
4051 if (!best || e->function > best->function)
4052 best = e;
4053 }
4054 return best;
4055 }
4056 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4057
4058 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4059 {
4060 struct kvm_cpuid_entry2 *best;
4061
4062 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4063 if (best)
4064 return best->eax & 0xff;
4065 return 36;
4066 }
4067
4068 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4069 {
4070 u32 function, index;
4071 struct kvm_cpuid_entry2 *best;
4072
4073 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4074 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4075 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4076 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4077 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4078 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4079 best = kvm_find_cpuid_entry(vcpu, function, index);
4080 if (best) {
4081 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4082 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4083 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4084 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4085 }
4086 kvm_x86_ops->skip_emulated_instruction(vcpu);
4087 trace_kvm_cpuid(function,
4088 kvm_register_read(vcpu, VCPU_REGS_RAX),
4089 kvm_register_read(vcpu, VCPU_REGS_RBX),
4090 kvm_register_read(vcpu, VCPU_REGS_RCX),
4091 kvm_register_read(vcpu, VCPU_REGS_RDX));
4092 }
4093 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4094
4095 /*
4096 * Check if userspace requested an interrupt window, and that the
4097 * interrupt window is open.
4098 *
4099 * No need to exit to userspace if we already have an interrupt queued.
4100 */
4101 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4102 {
4103 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4104 vcpu->run->request_interrupt_window &&
4105 kvm_arch_interrupt_allowed(vcpu));
4106 }
4107
4108 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4109 {
4110 struct kvm_run *kvm_run = vcpu->run;
4111
4112 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4113 kvm_run->cr8 = kvm_get_cr8(vcpu);
4114 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4115 if (irqchip_in_kernel(vcpu->kvm))
4116 kvm_run->ready_for_interrupt_injection = 1;
4117 else
4118 kvm_run->ready_for_interrupt_injection =
4119 kvm_arch_interrupt_allowed(vcpu) &&
4120 !kvm_cpu_has_interrupt(vcpu) &&
4121 !kvm_event_needs_reinjection(vcpu);
4122 }
4123
4124 static void vapic_enter(struct kvm_vcpu *vcpu)
4125 {
4126 struct kvm_lapic *apic = vcpu->arch.apic;
4127 struct page *page;
4128
4129 if (!apic || !apic->vapic_addr)
4130 return;
4131
4132 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4133
4134 vcpu->arch.apic->vapic_page = page;
4135 }
4136
4137 static void vapic_exit(struct kvm_vcpu *vcpu)
4138 {
4139 struct kvm_lapic *apic = vcpu->arch.apic;
4140 int idx;
4141
4142 if (!apic || !apic->vapic_addr)
4143 return;
4144
4145 idx = srcu_read_lock(&vcpu->kvm->srcu);
4146 kvm_release_page_dirty(apic->vapic_page);
4147 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4148 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4149 }
4150
4151 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4152 {
4153 int max_irr, tpr;
4154
4155 if (!kvm_x86_ops->update_cr8_intercept)
4156 return;
4157
4158 if (!vcpu->arch.apic)
4159 return;
4160
4161 if (!vcpu->arch.apic->vapic_addr)
4162 max_irr = kvm_lapic_find_highest_irr(vcpu);
4163 else
4164 max_irr = -1;
4165
4166 if (max_irr != -1)
4167 max_irr >>= 4;
4168
4169 tpr = kvm_lapic_get_cr8(vcpu);
4170
4171 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4172 }
4173
4174 static void inject_pending_event(struct kvm_vcpu *vcpu)
4175 {
4176 /* try to reinject previous events if any */
4177 if (vcpu->arch.exception.pending) {
4178 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4179 vcpu->arch.exception.has_error_code,
4180 vcpu->arch.exception.error_code);
4181 return;
4182 }
4183
4184 if (vcpu->arch.nmi_injected) {
4185 kvm_x86_ops->set_nmi(vcpu);
4186 return;
4187 }
4188
4189 if (vcpu->arch.interrupt.pending) {
4190 kvm_x86_ops->set_irq(vcpu);
4191 return;
4192 }
4193
4194 /* try to inject new event if pending */
4195 if (vcpu->arch.nmi_pending) {
4196 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4197 vcpu->arch.nmi_pending = false;
4198 vcpu->arch.nmi_injected = true;
4199 kvm_x86_ops->set_nmi(vcpu);
4200 }
4201 } else if (kvm_cpu_has_interrupt(vcpu)) {
4202 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4203 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4204 false);
4205 kvm_x86_ops->set_irq(vcpu);
4206 }
4207 }
4208 }
4209
4210 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4211 {
4212 int r;
4213 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4214 vcpu->run->request_interrupt_window;
4215
4216 if (vcpu->requests)
4217 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
4218 kvm_mmu_unload(vcpu);
4219
4220 r = kvm_mmu_reload(vcpu);
4221 if (unlikely(r))
4222 goto out;
4223
4224 if (vcpu->requests) {
4225 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
4226 __kvm_migrate_timers(vcpu);
4227 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
4228 kvm_write_guest_time(vcpu);
4229 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
4230 kvm_mmu_sync_roots(vcpu);
4231 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
4232 kvm_x86_ops->tlb_flush(vcpu);
4233 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
4234 &vcpu->requests)) {
4235 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4236 r = 0;
4237 goto out;
4238 }
4239 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
4240 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4241 r = 0;
4242 goto out;
4243 }
4244 if (test_and_clear_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests)) {
4245 vcpu->fpu_active = 0;
4246 kvm_x86_ops->fpu_deactivate(vcpu);
4247 }
4248 }
4249
4250 preempt_disable();
4251
4252 kvm_x86_ops->prepare_guest_switch(vcpu);
4253 kvm_load_guest_fpu(vcpu);
4254
4255 local_irq_disable();
4256
4257 clear_bit(KVM_REQ_KICK, &vcpu->requests);
4258 smp_mb__after_clear_bit();
4259
4260 if (vcpu->requests || need_resched() || signal_pending(current)) {
4261 set_bit(KVM_REQ_KICK, &vcpu->requests);
4262 local_irq_enable();
4263 preempt_enable();
4264 r = 1;
4265 goto out;
4266 }
4267
4268 inject_pending_event(vcpu);
4269
4270 /* enable NMI/IRQ window open exits if needed */
4271 if (vcpu->arch.nmi_pending)
4272 kvm_x86_ops->enable_nmi_window(vcpu);
4273 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4274 kvm_x86_ops->enable_irq_window(vcpu);
4275
4276 if (kvm_lapic_enabled(vcpu)) {
4277 update_cr8_intercept(vcpu);
4278 kvm_lapic_sync_to_vapic(vcpu);
4279 }
4280
4281 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4282
4283 kvm_guest_enter();
4284
4285 if (unlikely(vcpu->arch.switch_db_regs)) {
4286 set_debugreg(0, 7);
4287 set_debugreg(vcpu->arch.eff_db[0], 0);
4288 set_debugreg(vcpu->arch.eff_db[1], 1);
4289 set_debugreg(vcpu->arch.eff_db[2], 2);
4290 set_debugreg(vcpu->arch.eff_db[3], 3);
4291 }
4292
4293 trace_kvm_entry(vcpu->vcpu_id);
4294 kvm_x86_ops->run(vcpu);
4295
4296 /*
4297 * If the guest has used debug registers, at least dr7
4298 * will be disabled while returning to the host.
4299 * If we don't have active breakpoints in the host, we don't
4300 * care about the messed up debug address registers. But if
4301 * we have some of them active, restore the old state.
4302 */
4303 if (hw_breakpoint_active())
4304 hw_breakpoint_restore();
4305
4306 set_bit(KVM_REQ_KICK, &vcpu->requests);
4307 local_irq_enable();
4308
4309 ++vcpu->stat.exits;
4310
4311 /*
4312 * We must have an instruction between local_irq_enable() and
4313 * kvm_guest_exit(), so the timer interrupt isn't delayed by
4314 * the interrupt shadow. The stat.exits increment will do nicely.
4315 * But we need to prevent reordering, hence this barrier():
4316 */
4317 barrier();
4318
4319 kvm_guest_exit();
4320
4321 preempt_enable();
4322
4323 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4324
4325 /*
4326 * Profile KVM exit RIPs:
4327 */
4328 if (unlikely(prof_on == KVM_PROFILING)) {
4329 unsigned long rip = kvm_rip_read(vcpu);
4330 profile_hit(KVM_PROFILING, (void *)rip);
4331 }
4332
4333
4334 kvm_lapic_sync_from_vapic(vcpu);
4335
4336 r = kvm_x86_ops->handle_exit(vcpu);
4337 out:
4338 return r;
4339 }
4340
4341
4342 static int __vcpu_run(struct kvm_vcpu *vcpu)
4343 {
4344 int r;
4345 struct kvm *kvm = vcpu->kvm;
4346
4347 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4348 pr_debug("vcpu %d received sipi with vector # %x\n",
4349 vcpu->vcpu_id, vcpu->arch.sipi_vector);
4350 kvm_lapic_reset(vcpu);
4351 r = kvm_arch_vcpu_reset(vcpu);
4352 if (r)
4353 return r;
4354 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4355 }
4356
4357 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4358 vapic_enter(vcpu);
4359
4360 r = 1;
4361 while (r > 0) {
4362 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4363 r = vcpu_enter_guest(vcpu);
4364 else {
4365 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4366 kvm_vcpu_block(vcpu);
4367 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4368 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
4369 {
4370 switch(vcpu->arch.mp_state) {
4371 case KVM_MP_STATE_HALTED:
4372 vcpu->arch.mp_state =
4373 KVM_MP_STATE_RUNNABLE;
4374 case KVM_MP_STATE_RUNNABLE:
4375 break;
4376 case KVM_MP_STATE_SIPI_RECEIVED:
4377 default:
4378 r = -EINTR;
4379 break;
4380 }
4381 }
4382 }
4383
4384 if (r <= 0)
4385 break;
4386
4387 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4388 if (kvm_cpu_has_pending_timer(vcpu))
4389 kvm_inject_pending_timer_irqs(vcpu);
4390
4391 if (dm_request_for_irq_injection(vcpu)) {
4392 r = -EINTR;
4393 vcpu->run->exit_reason = KVM_EXIT_INTR;
4394 ++vcpu->stat.request_irq_exits;
4395 }
4396 if (signal_pending(current)) {
4397 r = -EINTR;
4398 vcpu->run->exit_reason = KVM_EXIT_INTR;
4399 ++vcpu->stat.signal_exits;
4400 }
4401 if (need_resched()) {
4402 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4403 kvm_resched(vcpu);
4404 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4405 }
4406 }
4407
4408 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4409 post_kvm_run_save(vcpu);
4410
4411 vapic_exit(vcpu);
4412
4413 return r;
4414 }
4415
4416 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4417 {
4418 int r;
4419 sigset_t sigsaved;
4420
4421 vcpu_load(vcpu);
4422
4423 if (vcpu->sigset_active)
4424 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4425
4426 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4427 kvm_vcpu_block(vcpu);
4428 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4429 r = -EAGAIN;
4430 goto out;
4431 }
4432
4433 /* re-sync apic's tpr */
4434 if (!irqchip_in_kernel(vcpu->kvm))
4435 kvm_set_cr8(vcpu, kvm_run->cr8);
4436
4437 if (vcpu->arch.pio.cur_count) {
4438 r = complete_pio(vcpu);
4439 if (r)
4440 goto out;
4441 }
4442 if (vcpu->mmio_needed) {
4443 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4444 vcpu->mmio_read_completed = 1;
4445 vcpu->mmio_needed = 0;
4446
4447 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4448 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4449 EMULTYPE_NO_DECODE);
4450 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4451 if (r == EMULATE_DO_MMIO) {
4452 /*
4453 * Read-modify-write. Back to userspace.
4454 */
4455 r = 0;
4456 goto out;
4457 }
4458 }
4459 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4460 kvm_register_write(vcpu, VCPU_REGS_RAX,
4461 kvm_run->hypercall.ret);
4462
4463 r = __vcpu_run(vcpu);
4464
4465 out:
4466 if (vcpu->sigset_active)
4467 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4468
4469 vcpu_put(vcpu);
4470 return r;
4471 }
4472
4473 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4474 {
4475 vcpu_load(vcpu);
4476
4477 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4478 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4479 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4480 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4481 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4482 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4483 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4484 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4485 #ifdef CONFIG_X86_64
4486 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4487 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4488 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4489 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4490 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4491 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4492 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4493 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4494 #endif
4495
4496 regs->rip = kvm_rip_read(vcpu);
4497 regs->rflags = kvm_get_rflags(vcpu);
4498
4499 vcpu_put(vcpu);
4500
4501 return 0;
4502 }
4503
4504 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4505 {
4506 vcpu_load(vcpu);
4507
4508 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4509 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4510 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4511 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4512 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4513 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4514 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4515 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4516 #ifdef CONFIG_X86_64
4517 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4518 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4519 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4520 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4521 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4522 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4523 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4524 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4525 #endif
4526
4527 kvm_rip_write(vcpu, regs->rip);
4528 kvm_set_rflags(vcpu, regs->rflags);
4529
4530 vcpu->arch.exception.pending = false;
4531
4532 vcpu_put(vcpu);
4533
4534 return 0;
4535 }
4536
4537 void kvm_get_segment(struct kvm_vcpu *vcpu,
4538 struct kvm_segment *var, int seg)
4539 {
4540 kvm_x86_ops->get_segment(vcpu, var, seg);
4541 }
4542
4543 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4544 {
4545 struct kvm_segment cs;
4546
4547 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4548 *db = cs.db;
4549 *l = cs.l;
4550 }
4551 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4552
4553 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4554 struct kvm_sregs *sregs)
4555 {
4556 struct descriptor_table dt;
4557
4558 vcpu_load(vcpu);
4559
4560 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4561 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4562 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4563 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4564 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4565 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4566
4567 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4568 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4569
4570 kvm_x86_ops->get_idt(vcpu, &dt);
4571 sregs->idt.limit = dt.limit;
4572 sregs->idt.base = dt.base;
4573 kvm_x86_ops->get_gdt(vcpu, &dt);
4574 sregs->gdt.limit = dt.limit;
4575 sregs->gdt.base = dt.base;
4576
4577 sregs->cr0 = kvm_read_cr0(vcpu);
4578 sregs->cr2 = vcpu->arch.cr2;
4579 sregs->cr3 = vcpu->arch.cr3;
4580 sregs->cr4 = kvm_read_cr4(vcpu);
4581 sregs->cr8 = kvm_get_cr8(vcpu);
4582 sregs->efer = vcpu->arch.shadow_efer;
4583 sregs->apic_base = kvm_get_apic_base(vcpu);
4584
4585 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4586
4587 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4588 set_bit(vcpu->arch.interrupt.nr,
4589 (unsigned long *)sregs->interrupt_bitmap);
4590
4591 vcpu_put(vcpu);
4592
4593 return 0;
4594 }
4595
4596 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4597 struct kvm_mp_state *mp_state)
4598 {
4599 vcpu_load(vcpu);
4600 mp_state->mp_state = vcpu->arch.mp_state;
4601 vcpu_put(vcpu);
4602 return 0;
4603 }
4604
4605 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4606 struct kvm_mp_state *mp_state)
4607 {
4608 vcpu_load(vcpu);
4609 vcpu->arch.mp_state = mp_state->mp_state;
4610 vcpu_put(vcpu);
4611 return 0;
4612 }
4613
4614 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4615 struct kvm_segment *var, int seg)
4616 {
4617 kvm_x86_ops->set_segment(vcpu, var, seg);
4618 }
4619
4620 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4621 struct kvm_segment *kvm_desct)
4622 {
4623 kvm_desct->base = get_desc_base(seg_desc);
4624 kvm_desct->limit = get_desc_limit(seg_desc);
4625 if (seg_desc->g) {
4626 kvm_desct->limit <<= 12;
4627 kvm_desct->limit |= 0xfff;
4628 }
4629 kvm_desct->selector = selector;
4630 kvm_desct->type = seg_desc->type;
4631 kvm_desct->present = seg_desc->p;
4632 kvm_desct->dpl = seg_desc->dpl;
4633 kvm_desct->db = seg_desc->d;
4634 kvm_desct->s = seg_desc->s;
4635 kvm_desct->l = seg_desc->l;
4636 kvm_desct->g = seg_desc->g;
4637 kvm_desct->avl = seg_desc->avl;
4638 if (!selector)
4639 kvm_desct->unusable = 1;
4640 else
4641 kvm_desct->unusable = 0;
4642 kvm_desct->padding = 0;
4643 }
4644
4645 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4646 u16 selector,
4647 struct descriptor_table *dtable)
4648 {
4649 if (selector & 1 << 2) {
4650 struct kvm_segment kvm_seg;
4651
4652 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4653
4654 if (kvm_seg.unusable)
4655 dtable->limit = 0;
4656 else
4657 dtable->limit = kvm_seg.limit;
4658 dtable->base = kvm_seg.base;
4659 }
4660 else
4661 kvm_x86_ops->get_gdt(vcpu, dtable);
4662 }
4663
4664 /* allowed just for 8 bytes segments */
4665 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4666 struct desc_struct *seg_desc)
4667 {
4668 struct descriptor_table dtable;
4669 u16 index = selector >> 3;
4670
4671 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4672
4673 if (dtable.limit < index * 8 + 7) {
4674 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4675 return 1;
4676 }
4677 return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4678 }
4679
4680 /* allowed just for 8 bytes segments */
4681 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4682 struct desc_struct *seg_desc)
4683 {
4684 struct descriptor_table dtable;
4685 u16 index = selector >> 3;
4686
4687 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4688
4689 if (dtable.limit < index * 8 + 7)
4690 return 1;
4691 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4692 }
4693
4694 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4695 struct desc_struct *seg_desc)
4696 {
4697 u32 base_addr = get_desc_base(seg_desc);
4698
4699 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4700 }
4701
4702 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4703 {
4704 struct kvm_segment kvm_seg;
4705
4706 kvm_get_segment(vcpu, &kvm_seg, seg);
4707 return kvm_seg.selector;
4708 }
4709
4710 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4711 u16 selector,
4712 struct kvm_segment *kvm_seg)
4713 {
4714 struct desc_struct seg_desc;
4715
4716 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4717 return 1;
4718 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4719 return 0;
4720 }
4721
4722 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4723 {
4724 struct kvm_segment segvar = {
4725 .base = selector << 4,
4726 .limit = 0xffff,
4727 .selector = selector,
4728 .type = 3,
4729 .present = 1,
4730 .dpl = 3,
4731 .db = 0,
4732 .s = 1,
4733 .l = 0,
4734 .g = 0,
4735 .avl = 0,
4736 .unusable = 0,
4737 };
4738 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4739 return 0;
4740 }
4741
4742 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4743 {
4744 return (seg != VCPU_SREG_LDTR) &&
4745 (seg != VCPU_SREG_TR) &&
4746 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4747 }
4748
4749 static void kvm_check_segment_descriptor(struct kvm_vcpu *vcpu, int seg,
4750 u16 selector)
4751 {
4752 /* NULL selector is not valid for CS and SS */
4753 if (seg == VCPU_SREG_CS || seg == VCPU_SREG_SS)
4754 if (!selector)
4755 kvm_queue_exception_e(vcpu, TS_VECTOR, selector >> 3);
4756 }
4757
4758 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4759 int type_bits, int seg)
4760 {
4761 struct kvm_segment kvm_seg;
4762
4763 if (is_vm86_segment(vcpu, seg) || !(kvm_read_cr0_bits(vcpu, X86_CR0_PE)))
4764 return kvm_load_realmode_segment(vcpu, selector, seg);
4765 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4766 return 1;
4767
4768 kvm_check_segment_descriptor(vcpu, seg, selector);
4769 kvm_seg.type |= type_bits;
4770
4771 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4772 seg != VCPU_SREG_LDTR)
4773 if (!kvm_seg.s)
4774 kvm_seg.unusable = 1;
4775
4776 kvm_set_segment(vcpu, &kvm_seg, seg);
4777 return 0;
4778 }
4779
4780 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4781 struct tss_segment_32 *tss)
4782 {
4783 tss->cr3 = vcpu->arch.cr3;
4784 tss->eip = kvm_rip_read(vcpu);
4785 tss->eflags = kvm_get_rflags(vcpu);
4786 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4787 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4788 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4789 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4790 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4791 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4792 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4793 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4794 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4795 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4796 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4797 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4798 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4799 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4800 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4801 }
4802
4803 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4804 struct tss_segment_32 *tss)
4805 {
4806 kvm_set_cr3(vcpu, tss->cr3);
4807
4808 kvm_rip_write(vcpu, tss->eip);
4809 kvm_set_rflags(vcpu, tss->eflags | 2);
4810
4811 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4812 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4813 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4814 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4815 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4816 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4817 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4818 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4819
4820 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4821 return 1;
4822
4823 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4824 return 1;
4825
4826 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4827 return 1;
4828
4829 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4830 return 1;
4831
4832 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4833 return 1;
4834
4835 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4836 return 1;
4837
4838 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4839 return 1;
4840 return 0;
4841 }
4842
4843 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4844 struct tss_segment_16 *tss)
4845 {
4846 tss->ip = kvm_rip_read(vcpu);
4847 tss->flag = kvm_get_rflags(vcpu);
4848 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4849 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4850 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4851 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4852 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4853 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4854 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4855 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4856
4857 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4858 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4859 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4860 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4861 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4862 }
4863
4864 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4865 struct tss_segment_16 *tss)
4866 {
4867 kvm_rip_write(vcpu, tss->ip);
4868 kvm_set_rflags(vcpu, tss->flag | 2);
4869 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4870 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4871 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4872 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4873 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4874 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4875 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4876 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4877
4878 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4879 return 1;
4880
4881 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4882 return 1;
4883
4884 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4885 return 1;
4886
4887 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4888 return 1;
4889
4890 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4891 return 1;
4892 return 0;
4893 }
4894
4895 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4896 u16 old_tss_sel, u32 old_tss_base,
4897 struct desc_struct *nseg_desc)
4898 {
4899 struct tss_segment_16 tss_segment_16;
4900 int ret = 0;
4901
4902 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4903 sizeof tss_segment_16))
4904 goto out;
4905
4906 save_state_to_tss16(vcpu, &tss_segment_16);
4907
4908 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4909 sizeof tss_segment_16))
4910 goto out;
4911
4912 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4913 &tss_segment_16, sizeof tss_segment_16))
4914 goto out;
4915
4916 if (old_tss_sel != 0xffff) {
4917 tss_segment_16.prev_task_link = old_tss_sel;
4918
4919 if (kvm_write_guest(vcpu->kvm,
4920 get_tss_base_addr(vcpu, nseg_desc),
4921 &tss_segment_16.prev_task_link,
4922 sizeof tss_segment_16.prev_task_link))
4923 goto out;
4924 }
4925
4926 if (load_state_from_tss16(vcpu, &tss_segment_16))
4927 goto out;
4928
4929 ret = 1;
4930 out:
4931 return ret;
4932 }
4933
4934 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4935 u16 old_tss_sel, u32 old_tss_base,
4936 struct desc_struct *nseg_desc)
4937 {
4938 struct tss_segment_32 tss_segment_32;
4939 int ret = 0;
4940
4941 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4942 sizeof tss_segment_32))
4943 goto out;
4944
4945 save_state_to_tss32(vcpu, &tss_segment_32);
4946
4947 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4948 sizeof tss_segment_32))
4949 goto out;
4950
4951 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4952 &tss_segment_32, sizeof tss_segment_32))
4953 goto out;
4954
4955 if (old_tss_sel != 0xffff) {
4956 tss_segment_32.prev_task_link = old_tss_sel;
4957
4958 if (kvm_write_guest(vcpu->kvm,
4959 get_tss_base_addr(vcpu, nseg_desc),
4960 &tss_segment_32.prev_task_link,
4961 sizeof tss_segment_32.prev_task_link))
4962 goto out;
4963 }
4964
4965 if (load_state_from_tss32(vcpu, &tss_segment_32))
4966 goto out;
4967
4968 ret = 1;
4969 out:
4970 return ret;
4971 }
4972
4973 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4974 {
4975 struct kvm_segment tr_seg;
4976 struct desc_struct cseg_desc;
4977 struct desc_struct nseg_desc;
4978 int ret = 0;
4979 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4980 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4981
4982 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4983
4984 /* FIXME: Handle errors. Failure to read either TSS or their
4985 * descriptors should generate a pagefault.
4986 */
4987 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4988 goto out;
4989
4990 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4991 goto out;
4992
4993 if (reason != TASK_SWITCH_IRET) {
4994 int cpl;
4995
4996 cpl = kvm_x86_ops->get_cpl(vcpu);
4997 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4998 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4999 return 1;
5000 }
5001 }
5002
5003 if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
5004 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
5005 return 1;
5006 }
5007
5008 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
5009 cseg_desc.type &= ~(1 << 1); //clear the B flag
5010 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
5011 }
5012
5013 if (reason == TASK_SWITCH_IRET) {
5014 u32 eflags = kvm_get_rflags(vcpu);
5015 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
5016 }
5017
5018 /* set back link to prev task only if NT bit is set in eflags
5019 note that old_tss_sel is not used afetr this point */
5020 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
5021 old_tss_sel = 0xffff;
5022
5023 if (nseg_desc.type & 8)
5024 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
5025 old_tss_base, &nseg_desc);
5026 else
5027 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
5028 old_tss_base, &nseg_desc);
5029
5030 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
5031 u32 eflags = kvm_get_rflags(vcpu);
5032 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
5033 }
5034
5035 if (reason != TASK_SWITCH_IRET) {
5036 nseg_desc.type |= (1 << 1);
5037 save_guest_segment_descriptor(vcpu, tss_selector,
5038 &nseg_desc);
5039 }
5040
5041 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0(vcpu) | X86_CR0_TS);
5042 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
5043 tr_seg.type = 11;
5044 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
5045 out:
5046 return ret;
5047 }
5048 EXPORT_SYMBOL_GPL(kvm_task_switch);
5049
5050 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5051 struct kvm_sregs *sregs)
5052 {
5053 int mmu_reset_needed = 0;
5054 int pending_vec, max_bits;
5055 struct descriptor_table dt;
5056
5057 vcpu_load(vcpu);
5058
5059 dt.limit = sregs->idt.limit;
5060 dt.base = sregs->idt.base;
5061 kvm_x86_ops->set_idt(vcpu, &dt);
5062 dt.limit = sregs->gdt.limit;
5063 dt.base = sregs->gdt.base;
5064 kvm_x86_ops->set_gdt(vcpu, &dt);
5065
5066 vcpu->arch.cr2 = sregs->cr2;
5067 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5068 vcpu->arch.cr3 = sregs->cr3;
5069
5070 kvm_set_cr8(vcpu, sregs->cr8);
5071
5072 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
5073 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5074 kvm_set_apic_base(vcpu, sregs->apic_base);
5075
5076 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5077 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5078 vcpu->arch.cr0 = sregs->cr0;
5079
5080 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5081 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5082 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5083 load_pdptrs(vcpu, vcpu->arch.cr3);
5084 mmu_reset_needed = 1;
5085 }
5086
5087 if (mmu_reset_needed)
5088 kvm_mmu_reset_context(vcpu);
5089
5090 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5091 pending_vec = find_first_bit(
5092 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5093 if (pending_vec < max_bits) {
5094 kvm_queue_interrupt(vcpu, pending_vec, false);
5095 pr_debug("Set back pending irq %d\n", pending_vec);
5096 if (irqchip_in_kernel(vcpu->kvm))
5097 kvm_pic_clear_isr_ack(vcpu->kvm);
5098 }
5099
5100 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5101 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5102 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5103 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5104 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5105 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5106
5107 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5108 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5109
5110 update_cr8_intercept(vcpu);
5111
5112 /* Older userspace won't unhalt the vcpu on reset. */
5113 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5114 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5115 !(kvm_read_cr0_bits(vcpu, X86_CR0_PE)))
5116 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5117
5118 vcpu_put(vcpu);
5119
5120 return 0;
5121 }
5122
5123 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5124 struct kvm_guest_debug *dbg)
5125 {
5126 unsigned long rflags;
5127 int i, r;
5128
5129 vcpu_load(vcpu);
5130
5131 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5132 r = -EBUSY;
5133 if (vcpu->arch.exception.pending)
5134 goto unlock_out;
5135 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5136 kvm_queue_exception(vcpu, DB_VECTOR);
5137 else
5138 kvm_queue_exception(vcpu, BP_VECTOR);
5139 }
5140
5141 /*
5142 * Read rflags as long as potentially injected trace flags are still
5143 * filtered out.
5144 */
5145 rflags = kvm_get_rflags(vcpu);
5146
5147 vcpu->guest_debug = dbg->control;
5148 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5149 vcpu->guest_debug = 0;
5150
5151 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5152 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5153 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5154 vcpu->arch.switch_db_regs =
5155 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5156 } else {
5157 for (i = 0; i < KVM_NR_DB_REGS; i++)
5158 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5159 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5160 }
5161
5162 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5163 vcpu->arch.singlestep_cs =
5164 get_segment_selector(vcpu, VCPU_SREG_CS);
5165 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
5166 }
5167
5168 /*
5169 * Trigger an rflags update that will inject or remove the trace
5170 * flags.
5171 */
5172 kvm_set_rflags(vcpu, rflags);
5173
5174 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5175
5176 r = 0;
5177
5178 unlock_out:
5179 vcpu_put(vcpu);
5180
5181 return r;
5182 }
5183
5184 /*
5185 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
5186 * we have asm/x86/processor.h
5187 */
5188 struct fxsave {
5189 u16 cwd;
5190 u16 swd;
5191 u16 twd;
5192 u16 fop;
5193 u64 rip;
5194 u64 rdp;
5195 u32 mxcsr;
5196 u32 mxcsr_mask;
5197 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
5198 #ifdef CONFIG_X86_64
5199 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
5200 #else
5201 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
5202 #endif
5203 };
5204
5205 /*
5206 * Translate a guest virtual address to a guest physical address.
5207 */
5208 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5209 struct kvm_translation *tr)
5210 {
5211 unsigned long vaddr = tr->linear_address;
5212 gpa_t gpa;
5213 int idx;
5214
5215 vcpu_load(vcpu);
5216 idx = srcu_read_lock(&vcpu->kvm->srcu);
5217 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
5218 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5219 tr->physical_address = gpa;
5220 tr->valid = gpa != UNMAPPED_GVA;
5221 tr->writeable = 1;
5222 tr->usermode = 0;
5223 vcpu_put(vcpu);
5224
5225 return 0;
5226 }
5227
5228 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5229 {
5230 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5231
5232 vcpu_load(vcpu);
5233
5234 memcpy(fpu->fpr, fxsave->st_space, 128);
5235 fpu->fcw = fxsave->cwd;
5236 fpu->fsw = fxsave->swd;
5237 fpu->ftwx = fxsave->twd;
5238 fpu->last_opcode = fxsave->fop;
5239 fpu->last_ip = fxsave->rip;
5240 fpu->last_dp = fxsave->rdp;
5241 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5242
5243 vcpu_put(vcpu);
5244
5245 return 0;
5246 }
5247
5248 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5249 {
5250 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
5251
5252 vcpu_load(vcpu);
5253
5254 memcpy(fxsave->st_space, fpu->fpr, 128);
5255 fxsave->cwd = fpu->fcw;
5256 fxsave->swd = fpu->fsw;
5257 fxsave->twd = fpu->ftwx;
5258 fxsave->fop = fpu->last_opcode;
5259 fxsave->rip = fpu->last_ip;
5260 fxsave->rdp = fpu->last_dp;
5261 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5262
5263 vcpu_put(vcpu);
5264
5265 return 0;
5266 }
5267
5268 void fx_init(struct kvm_vcpu *vcpu)
5269 {
5270 unsigned after_mxcsr_mask;
5271
5272 /*
5273 * Touch the fpu the first time in non atomic context as if
5274 * this is the first fpu instruction the exception handler
5275 * will fire before the instruction returns and it'll have to
5276 * allocate ram with GFP_KERNEL.
5277 */
5278 if (!used_math())
5279 kvm_fx_save(&vcpu->arch.host_fx_image);
5280
5281 /* Initialize guest FPU by resetting ours and saving into guest's */
5282 preempt_disable();
5283 kvm_fx_save(&vcpu->arch.host_fx_image);
5284 kvm_fx_finit();
5285 kvm_fx_save(&vcpu->arch.guest_fx_image);
5286 kvm_fx_restore(&vcpu->arch.host_fx_image);
5287 preempt_enable();
5288
5289 vcpu->arch.cr0 |= X86_CR0_ET;
5290 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
5291 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
5292 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
5293 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
5294 }
5295 EXPORT_SYMBOL_GPL(fx_init);
5296
5297 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5298 {
5299 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
5300 return;
5301
5302 vcpu->guest_fpu_loaded = 1;
5303 kvm_fx_save(&vcpu->arch.host_fx_image);
5304 kvm_fx_restore(&vcpu->arch.guest_fx_image);
5305 }
5306 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
5307
5308 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5309 {
5310 if (!vcpu->guest_fpu_loaded)
5311 return;
5312
5313 vcpu->guest_fpu_loaded = 0;
5314 kvm_fx_save(&vcpu->arch.guest_fx_image);
5315 kvm_fx_restore(&vcpu->arch.host_fx_image);
5316 ++vcpu->stat.fpu_reload;
5317 set_bit(KVM_REQ_DEACTIVATE_FPU, &vcpu->requests);
5318 }
5319 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
5320
5321 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5322 {
5323 if (vcpu->arch.time_page) {
5324 kvm_release_page_dirty(vcpu->arch.time_page);
5325 vcpu->arch.time_page = NULL;
5326 }
5327
5328 kvm_x86_ops->vcpu_free(vcpu);
5329 }
5330
5331 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5332 unsigned int id)
5333 {
5334 return kvm_x86_ops->vcpu_create(kvm, id);
5335 }
5336
5337 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5338 {
5339 int r;
5340
5341 /* We do fxsave: this must be aligned. */
5342 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
5343
5344 vcpu->arch.mtrr_state.have_fixed = 1;
5345 vcpu_load(vcpu);
5346 r = kvm_arch_vcpu_reset(vcpu);
5347 if (r == 0)
5348 r = kvm_mmu_setup(vcpu);
5349 vcpu_put(vcpu);
5350 if (r < 0)
5351 goto free_vcpu;
5352
5353 return 0;
5354 free_vcpu:
5355 kvm_x86_ops->vcpu_free(vcpu);
5356 return r;
5357 }
5358
5359 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5360 {
5361 vcpu_load(vcpu);
5362 kvm_mmu_unload(vcpu);
5363 vcpu_put(vcpu);
5364
5365 kvm_x86_ops->vcpu_free(vcpu);
5366 }
5367
5368 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5369 {
5370 vcpu->arch.nmi_pending = false;
5371 vcpu->arch.nmi_injected = false;
5372
5373 vcpu->arch.switch_db_regs = 0;
5374 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5375 vcpu->arch.dr6 = DR6_FIXED_1;
5376 vcpu->arch.dr7 = DR7_FIXED_1;
5377
5378 return kvm_x86_ops->vcpu_reset(vcpu);
5379 }
5380
5381 int kvm_arch_hardware_enable(void *garbage)
5382 {
5383 /*
5384 * Since this may be called from a hotplug notifcation,
5385 * we can't get the CPU frequency directly.
5386 */
5387 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5388 int cpu = raw_smp_processor_id();
5389 per_cpu(cpu_tsc_khz, cpu) = 0;
5390 }
5391
5392 kvm_shared_msr_cpu_online();
5393
5394 return kvm_x86_ops->hardware_enable(garbage);
5395 }
5396
5397 void kvm_arch_hardware_disable(void *garbage)
5398 {
5399 kvm_x86_ops->hardware_disable(garbage);
5400 drop_user_return_notifiers(garbage);
5401 }
5402
5403 int kvm_arch_hardware_setup(void)
5404 {
5405 return kvm_x86_ops->hardware_setup();
5406 }
5407
5408 void kvm_arch_hardware_unsetup(void)
5409 {
5410 kvm_x86_ops->hardware_unsetup();
5411 }
5412
5413 void kvm_arch_check_processor_compat(void *rtn)
5414 {
5415 kvm_x86_ops->check_processor_compatibility(rtn);
5416 }
5417
5418 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5419 {
5420 struct page *page;
5421 struct kvm *kvm;
5422 int r;
5423
5424 BUG_ON(vcpu->kvm == NULL);
5425 kvm = vcpu->kvm;
5426
5427 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5428 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5429 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5430 else
5431 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5432
5433 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5434 if (!page) {
5435 r = -ENOMEM;
5436 goto fail;
5437 }
5438 vcpu->arch.pio_data = page_address(page);
5439
5440 r = kvm_mmu_create(vcpu);
5441 if (r < 0)
5442 goto fail_free_pio_data;
5443
5444 if (irqchip_in_kernel(kvm)) {
5445 r = kvm_create_lapic(vcpu);
5446 if (r < 0)
5447 goto fail_mmu_destroy;
5448 }
5449
5450 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5451 GFP_KERNEL);
5452 if (!vcpu->arch.mce_banks) {
5453 r = -ENOMEM;
5454 goto fail_free_lapic;
5455 }
5456 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5457
5458 return 0;
5459 fail_free_lapic:
5460 kvm_free_lapic(vcpu);
5461 fail_mmu_destroy:
5462 kvm_mmu_destroy(vcpu);
5463 fail_free_pio_data:
5464 free_page((unsigned long)vcpu->arch.pio_data);
5465 fail:
5466 return r;
5467 }
5468
5469 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5470 {
5471 int idx;
5472
5473 kfree(vcpu->arch.mce_banks);
5474 kvm_free_lapic(vcpu);
5475 idx = srcu_read_lock(&vcpu->kvm->srcu);
5476 kvm_mmu_destroy(vcpu);
5477 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5478 free_page((unsigned long)vcpu->arch.pio_data);
5479 }
5480
5481 struct kvm *kvm_arch_create_vm(void)
5482 {
5483 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5484
5485 if (!kvm)
5486 return ERR_PTR(-ENOMEM);
5487
5488 kvm->arch.aliases = kzalloc(sizeof(struct kvm_mem_aliases), GFP_KERNEL);
5489 if (!kvm->arch.aliases) {
5490 kfree(kvm);
5491 return ERR_PTR(-ENOMEM);
5492 }
5493
5494 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5495 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5496
5497 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5498 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5499
5500 rdtscll(kvm->arch.vm_init_tsc);
5501
5502 return kvm;
5503 }
5504
5505 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5506 {
5507 vcpu_load(vcpu);
5508 kvm_mmu_unload(vcpu);
5509 vcpu_put(vcpu);
5510 }
5511
5512 static void kvm_free_vcpus(struct kvm *kvm)
5513 {
5514 unsigned int i;
5515 struct kvm_vcpu *vcpu;
5516
5517 /*
5518 * Unpin any mmu pages first.
5519 */
5520 kvm_for_each_vcpu(i, vcpu, kvm)
5521 kvm_unload_vcpu_mmu(vcpu);
5522 kvm_for_each_vcpu(i, vcpu, kvm)
5523 kvm_arch_vcpu_free(vcpu);
5524
5525 mutex_lock(&kvm->lock);
5526 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5527 kvm->vcpus[i] = NULL;
5528
5529 atomic_set(&kvm->online_vcpus, 0);
5530 mutex_unlock(&kvm->lock);
5531 }
5532
5533 void kvm_arch_sync_events(struct kvm *kvm)
5534 {
5535 kvm_free_all_assigned_devices(kvm);
5536 }
5537
5538 void kvm_arch_destroy_vm(struct kvm *kvm)
5539 {
5540 kvm_iommu_unmap_guest(kvm);
5541 kvm_free_pit(kvm);
5542 kfree(kvm->arch.vpic);
5543 kfree(kvm->arch.vioapic);
5544 kvm_free_vcpus(kvm);
5545 kvm_free_physmem(kvm);
5546 if (kvm->arch.apic_access_page)
5547 put_page(kvm->arch.apic_access_page);
5548 if (kvm->arch.ept_identity_pagetable)
5549 put_page(kvm->arch.ept_identity_pagetable);
5550 cleanup_srcu_struct(&kvm->srcu);
5551 kfree(kvm->arch.aliases);
5552 kfree(kvm);
5553 }
5554
5555 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5556 struct kvm_memory_slot *memslot,
5557 struct kvm_memory_slot old,
5558 struct kvm_userspace_memory_region *mem,
5559 int user_alloc)
5560 {
5561 int npages = memslot->npages;
5562
5563 /*To keep backward compatibility with older userspace,
5564 *x86 needs to hanlde !user_alloc case.
5565 */
5566 if (!user_alloc) {
5567 if (npages && !old.rmap) {
5568 unsigned long userspace_addr;
5569
5570 down_write(&current->mm->mmap_sem);
5571 userspace_addr = do_mmap(NULL, 0,
5572 npages * PAGE_SIZE,
5573 PROT_READ | PROT_WRITE,
5574 MAP_PRIVATE | MAP_ANONYMOUS,
5575 0);
5576 up_write(&current->mm->mmap_sem);
5577
5578 if (IS_ERR((void *)userspace_addr))
5579 return PTR_ERR((void *)userspace_addr);
5580
5581 memslot->userspace_addr = userspace_addr;
5582 }
5583 }
5584
5585
5586 return 0;
5587 }
5588
5589 void kvm_arch_commit_memory_region(struct kvm *kvm,
5590 struct kvm_userspace_memory_region *mem,
5591 struct kvm_memory_slot old,
5592 int user_alloc)
5593 {
5594
5595 int npages = mem->memory_size >> PAGE_SHIFT;
5596
5597 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5598 int ret;
5599
5600 down_write(&current->mm->mmap_sem);
5601 ret = do_munmap(current->mm, old.userspace_addr,
5602 old.npages * PAGE_SIZE);
5603 up_write(&current->mm->mmap_sem);
5604 if (ret < 0)
5605 printk(KERN_WARNING
5606 "kvm_vm_ioctl_set_memory_region: "
5607 "failed to munmap memory\n");
5608 }
5609
5610 spin_lock(&kvm->mmu_lock);
5611 if (!kvm->arch.n_requested_mmu_pages) {
5612 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5613 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5614 }
5615
5616 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5617 spin_unlock(&kvm->mmu_lock);
5618 }
5619
5620 void kvm_arch_flush_shadow(struct kvm *kvm)
5621 {
5622 kvm_mmu_zap_all(kvm);
5623 kvm_reload_remote_mmus(kvm);
5624 }
5625
5626 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5627 {
5628 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5629 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5630 || vcpu->arch.nmi_pending ||
5631 (kvm_arch_interrupt_allowed(vcpu) &&
5632 kvm_cpu_has_interrupt(vcpu));
5633 }
5634
5635 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5636 {
5637 int me;
5638 int cpu = vcpu->cpu;
5639
5640 if (waitqueue_active(&vcpu->wq)) {
5641 wake_up_interruptible(&vcpu->wq);
5642 ++vcpu->stat.halt_wakeup;
5643 }
5644
5645 me = get_cpu();
5646 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5647 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5648 smp_send_reschedule(cpu);
5649 put_cpu();
5650 }
5651
5652 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5653 {
5654 return kvm_x86_ops->interrupt_allowed(vcpu);
5655 }
5656
5657 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5658 {
5659 unsigned long rflags;
5660
5661 rflags = kvm_x86_ops->get_rflags(vcpu);
5662 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5663 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5664 return rflags;
5665 }
5666 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5667
5668 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5669 {
5670 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5671 vcpu->arch.singlestep_cs ==
5672 get_segment_selector(vcpu, VCPU_SREG_CS) &&
5673 vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5674 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5675 kvm_x86_ops->set_rflags(vcpu, rflags);
5676 }
5677 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5678
5679 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
Linux with added FPC-III support