block: move down direct IO plugging
[linux/fpc-iii.git] / arch / arm / mach-integrator / pci.c
blob6c1667e728f563b7201c0794184c1685f4187c12
1 /*
2 * linux/arch/arm/mach-integrator/pci-integrator.c
4 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * PCI functions for Integrator
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/interrupt.h>
27 #include <linux/init.h>
29 #include <asm/mach/pci.h>
30 #include <asm/mach-types.h>
32 #include <mach/irqs.h>
34 /*
35 * A small note about bridges and interrupts. The DECchip 21050 (and
36 * later) adheres to the PCI-PCI bridge specification. This says that
37 * the interrupts on the other side of a bridge are swizzled in the
38 * following manner:
40 * Dev Interrupt Interrupt
41 * Pin on Pin on
42 * Device Connector
44 * 4 A A
45 * B B
46 * C C
47 * D D
49 * 5 A B
50 * B C
51 * C D
52 * D A
54 * 6 A C
55 * B D
56 * C A
57 * D B
59 * 7 A D
60 * B A
61 * C B
62 * D C
64 * Where A = pin 1, B = pin 2 and so on and pin=0 = default = A.
65 * Thus, each swizzle is ((pin-1) + (device#-4)) % 4
69 * This routine handles multiple bridges.
71 static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp)
73 if (*pinp == 0)
74 *pinp = 1;
76 return pci_common_swizzle(dev, pinp);
79 static int irq_tab[4] __initdata = {
80 IRQ_AP_PCIINT0, IRQ_AP_PCIINT1, IRQ_AP_PCIINT2, IRQ_AP_PCIINT3
84 * map the specified device/slot/pin to an IRQ. This works out such
85 * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
87 static int __init integrator_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
89 int intnr = ((slot - 9) + (pin - 1)) & 3;
91 return irq_tab[intnr];
94 extern void pci_v3_init(void *);
96 static struct hw_pci integrator_pci __initdata = {
97 .swizzle = integrator_swizzle,
98 .map_irq = integrator_map_irq,
99 .setup = pci_v3_setup,
100 .nr_controllers = 1,
101 .ops = &pci_v3_ops,
102 .preinit = pci_v3_preinit,
103 .postinit = pci_v3_postinit,
106 static int __init integrator_pci_init(void)
108 if (machine_is_integrator())
109 pci_common_init(&integrator_pci);
110 return 0;
113 subsys_initcall(integrator_pci_init);