1 /* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/memblock.h>
24 #include <asm/mach-types.h>
25 #include <asm/mach/arch.h>
26 #include <asm/hardware/gic.h>
27 #include <asm/setup.h>
29 #include <mach/board.h>
30 #include <mach/msm_iomap.h>
32 static void __init
msm8x60_fixup(struct tag
*tag
, char **cmdline
,
35 for (; tag
->hdr
.size
; tag
= tag_next(tag
))
36 if (tag
->hdr
.tag
== ATAG_MEM
&&
37 tag
->u
.mem
.start
== 0x40200000) {
38 tag
->u
.mem
.start
= 0x40000000;
39 tag
->u
.mem
.size
+= SZ_2M
;
43 static void __init
msm8x60_reserve(void)
45 memblock_remove(0x40000000, SZ_2M
);
48 static void __init
msm8x60_map_io(void)
54 static struct of_device_id msm_dt_gic_match
[] __initdata
= {
55 { .compatible
= "qcom,msm-8660-qgic", .data
= gic_of_init
},
60 static void __init
msm8x60_init_irq(void)
62 if (!of_have_populated_dt())
63 gic_init(0, GIC_PPI_START
, MSM_QGIC_DIST_BASE
,
64 (void *)MSM_QGIC_CPU_BASE
);
67 of_irq_init(msm_dt_gic_match
);
70 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
71 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE
+ GIC_DIST_CONFIG
+ 4);
73 /* RUMI does not adhere to GIC spec by enabling STIs by default.
74 * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
76 if (!machine_is_msm8x60_sim())
77 writel(0x0000FFFF, MSM_QGIC_DIST_BASE
+ GIC_DIST_ENABLE_SET
);
80 static void __init
msm8x60_init(void)
84 static void __init
msm8x60_init_late(void)
90 static struct of_dev_auxdata msm_auxdata_lookup
[] __initdata
= {
94 static void __init
msm8x60_dt_init(void)
96 if (of_machine_is_compatible("qcom,msm8660-surf")) {
97 printk(KERN_INFO
"Init surf UART registers\n");
98 msm8x60_init_uart12dm();
101 of_platform_populate(NULL
, of_default_bus_match_table
,
102 msm_auxdata_lookup
, NULL
);
105 static const char *msm8x60_fluid_match
[] __initdata
= {
106 "qcom,msm8660-fluid",
110 #endif /* CONFIG_OF */
112 MACHINE_START(MSM8X60_RUMI3
, "QCT MSM8X60 RUMI3")
113 .fixup
= msm8x60_fixup
,
114 .reserve
= msm8x60_reserve
,
115 .map_io
= msm8x60_map_io
,
116 .init_irq
= msm8x60_init_irq
,
117 .handle_irq
= gic_handle_irq
,
118 .init_machine
= msm8x60_init
,
119 .init_late
= msm8x60_init_late
,
123 MACHINE_START(MSM8X60_SURF
, "QCT MSM8X60 SURF")
124 .fixup
= msm8x60_fixup
,
125 .reserve
= msm8x60_reserve
,
126 .map_io
= msm8x60_map_io
,
127 .init_irq
= msm8x60_init_irq
,
128 .handle_irq
= gic_handle_irq
,
129 .init_machine
= msm8x60_init
,
130 .init_late
= msm8x60_init_late
,
134 MACHINE_START(MSM8X60_SIM
, "QCT MSM8X60 SIMULATOR")
135 .fixup
= msm8x60_fixup
,
136 .reserve
= msm8x60_reserve
,
137 .map_io
= msm8x60_map_io
,
138 .init_irq
= msm8x60_init_irq
,
139 .handle_irq
= gic_handle_irq
,
140 .init_machine
= msm8x60_init
,
141 .init_late
= msm8x60_init_late
,
145 MACHINE_START(MSM8X60_FFA
, "QCT MSM8X60 FFA")
146 .fixup
= msm8x60_fixup
,
147 .reserve
= msm8x60_reserve
,
148 .map_io
= msm8x60_map_io
,
149 .init_irq
= msm8x60_init_irq
,
150 .handle_irq
= gic_handle_irq
,
151 .init_machine
= msm8x60_init
,
152 .init_late
= msm8x60_init_late
,
157 /* TODO: General device tree support for all MSM. */
158 DT_MACHINE_START(MSM_DT
, "Qualcomm MSM (Flattened Device Tree)")
159 .map_io
= msm8x60_map_io
,
160 .init_irq
= msm8x60_init_irq
,
161 .init_machine
= msm8x60_dt_init
,
162 .init_late
= msm8x60_init_late
,
164 .dt_compat
= msm8x60_fluid_match
,
166 #endif /* CONFIG_OF */