block: move down direct IO plugging
[linux/fpc-iii.git] / arch / arm / mach-shmobile / smp-emev2.c
blob6a35c4a31e6caa9919a3d8d68d249d76e707c9fd
1 /*
2 * SMP support for Emma Mobile EV2
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 * Copyright (C) 2012 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/smp.h>
23 #include <linux/spinlock.h>
24 #include <linux/io.h>
25 #include <linux/delay.h>
26 #include <mach/common.h>
27 #include <mach/emev2.h>
28 #include <asm/smp_plat.h>
29 #include <asm/smp_scu.h>
30 #include <asm/hardware/gic.h>
31 #include <asm/cacheflush.h>
33 #define EMEV2_SCU_BASE 0x1e000000
35 static DEFINE_SPINLOCK(scu_lock);
36 static void __iomem *scu_base;
38 static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
40 unsigned long tmp;
42 /* we assume this code is running on a different cpu
43 * than the one that is changing coherency setting */
44 spin_lock(&scu_lock);
45 tmp = readl(scu_base + 8);
46 tmp &= ~clr;
47 tmp |= set;
48 writel(tmp, scu_base + 8);
49 spin_unlock(&scu_lock);
53 unsigned int __init emev2_get_core_count(void)
55 if (!scu_base) {
56 scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
57 emev2_clock_init(); /* need ioremapped SMU */
60 WARN_ON_ONCE(!scu_base);
62 return scu_base ? scu_get_core_count(scu_base) : 1;
65 int emev2_platform_cpu_kill(unsigned int cpu)
67 return 0; /* not supported yet */
70 void __cpuinit emev2_secondary_init(unsigned int cpu)
72 gic_secondary_init(0);
75 int __cpuinit emev2_boot_secondary(unsigned int cpu)
77 cpu = cpu_logical_map(cpu);
79 /* enable cache coherency */
80 modify_scu_cpu_psr(0, 3 << (cpu * 8));
82 /* Tell ROM loader about our vector (in headsmp.S) */
83 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
85 gic_raise_softirq(cpumask_of(cpu), 1);
86 return 0;
89 void __init emev2_smp_prepare_cpus(void)
91 int cpu = cpu_logical_map(0);
93 scu_enable(scu_base);
95 /* enable cache coherency on CPU0 */
96 modify_scu_cpu_psr(0, 3 << (cpu * 8));