1 #include "skeleton.dtsi"
5 compatible = "aspeed,ast2500";
8 interrupt-parent = <&vic>;
15 compatible = "arm,arm1176jzf-s";
22 compatible = "simple-bus";
27 fmc: flash-controller@1e620000 {
28 reg = < 0x1e620000 0xc4
29 0x20000000 0x10000000 >;
32 compatible = "aspeed,ast2500-fmc";
37 compatible = "jedec,spi-nor";
42 compatible = "jedec,spi-nor";
47 compatible = "jedec,spi-nor";
52 spi1: flash-controller@1e630000 {
53 reg = < 0x1e630000 0xc4
54 0x30000000 0x08000000 >;
57 compatible = "aspeed,ast2500-spi";
61 compatible = "jedec,spi-nor";
66 compatible = "jedec,spi-nor";
71 spi2: flash-controller@1e631000 {
72 reg = < 0x1e631000 0xc4
73 0x38000000 0x08000000 >;
76 compatible = "aspeed,ast2500-spi";
80 compatible = "jedec,spi-nor";
85 compatible = "jedec,spi-nor";
90 vic: interrupt-controller@1e6c0080 {
91 compatible = "aspeed,ast2400-vic";
93 #interrupt-cells = <1>;
94 valid-sources = <0xfefff7ff 0x0807ffff>;
95 reg = <0x1e6c0080 0x80>;
98 mac0: ethernet@1e660000 {
99 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
100 reg = <0x1e660000 0x180>;
105 mac1: ethernet@1e680000 {
106 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
107 reg = <0x1e680000 0x180>;
113 compatible = "simple-bus";
114 #address-cells = <1>;
118 syscon: syscon@1e6e2000 {
119 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
120 reg = <0x1e6e2000 0x1a8>;
121 #address-cells = <1>;
124 clk_clkin: clk_clkin@70 {
126 compatible = "aspeed,g5-clkin-clock", "fixed-clock";
128 clock-frequency = <24000000>;
131 clk_hpll: clk_hpll@24 {
133 compatible = "aspeed,g5-hpll-clock", "fixed-clock";
135 clocks = <&clk_clkin>;
136 clock-frequency = <792000000>;
139 clk_ahb: clk_ahb@70 {
141 compatible = "aspeed,g5-ahb-clock", "fixed-clock";
143 clocks = <&clk_hpll>;
144 clock-frequency = <198000000>;
147 clk_apb: clk_apb@08 {
149 compatible = "aspeed,g5-apb-clock", "fixed-clock";
151 clocks = <&clk_hpll>;
152 clock-frequency = <24750000>;
155 clk_uart: clk_uart@2c {
157 compatible = "aspeed,uart-clock", "fixed-clock";
159 clock-frequency = <24000000>;
163 compatible = "aspeed,g5-pinctrl";
164 aspeed,external-nodes = <&gfx &lhc>;
166 pinctrl_acpi_default: acpi_default {
171 pinctrl_adc0_default: adc0_default {
176 pinctrl_adc1_default: adc1_default {
181 pinctrl_adc10_default: adc10_default {
186 pinctrl_adc11_default: adc11_default {
191 pinctrl_adc12_default: adc12_default {
196 pinctrl_adc13_default: adc13_default {
201 pinctrl_adc14_default: adc14_default {
206 pinctrl_adc15_default: adc15_default {
211 pinctrl_adc2_default: adc2_default {
216 pinctrl_adc3_default: adc3_default {
221 pinctrl_adc4_default: adc4_default {
226 pinctrl_adc5_default: adc5_default {
231 pinctrl_adc6_default: adc6_default {
236 pinctrl_adc7_default: adc7_default {
241 pinctrl_adc8_default: adc8_default {
246 pinctrl_adc9_default: adc9_default {
251 pinctrl_bmcint_default: bmcint_default {
256 pinctrl_ddcclk_default: ddcclk_default {
261 pinctrl_ddcdat_default: ddcdat_default {
266 pinctrl_espi_default: espi_default {
271 pinctrl_fwspics1_default: fwspics1_default {
272 function = "FWSPICS1";
276 pinctrl_fwspics2_default: fwspics2_default {
277 function = "FWSPICS2";
281 pinctrl_gpid0_default: gpid0_default {
286 pinctrl_gpid2_default: gpid2_default {
291 pinctrl_gpid4_default: gpid4_default {
296 pinctrl_gpid6_default: gpid6_default {
301 pinctrl_gpie0_default: gpie0_default {
306 pinctrl_gpie2_default: gpie2_default {
311 pinctrl_gpie4_default: gpie4_default {
316 pinctrl_gpie6_default: gpie6_default {
321 pinctrl_i2c10_default: i2c10_default {
326 pinctrl_i2c11_default: i2c11_default {
331 pinctrl_i2c12_default: i2c12_default {
336 pinctrl_i2c13_default: i2c13_default {
341 pinctrl_i2c14_default: i2c14_default {
346 pinctrl_i2c3_default: i2c3_default {
351 pinctrl_i2c4_default: i2c4_default {
356 pinctrl_i2c5_default: i2c5_default {
361 pinctrl_i2c6_default: i2c6_default {
366 pinctrl_i2c7_default: i2c7_default {
371 pinctrl_i2c8_default: i2c8_default {
376 pinctrl_i2c9_default: i2c9_default {
381 pinctrl_lad0_default: lad0_default {
385 pinctrl_lad1_default: lad1_default {
390 pinctrl_lad2_default: lad2_default {
395 pinctrl_lad3_default: lad3_default {
400 pinctrl_lclk_default: lclk_default {
405 pinctrl_lframe_default: lframe_default {
410 pinctrl_lpchc_default: lpchc_default {
415 pinctrl_lpcpd_default: lpcpd_default {
420 pinctrl_lpcplus_default: lpcplus_default {
421 function = "LPCPLUS";
425 pinctrl_lpcpme_default: lpcpme_default {
430 pinctrl_lpcrst_default: lpcrst_default {
435 pinctrl_lpcsmi_default: lpcsmi_default {
440 pinctrl_lsirq_default: lsirq_default {
445 pinctrl_mac1link_default: mac1link_default {
446 function = "MAC1LINK";
450 pinctrl_mac2link_default: mac2link_default {
451 function = "MAC2LINK";
455 pinctrl_mdio1_default: mdio1_default {
460 pinctrl_mdio2_default: mdio2_default {
465 pinctrl_ncts1_default: ncts1_default {
470 pinctrl_ncts2_default: ncts2_default {
475 pinctrl_ncts3_default: ncts3_default {
480 pinctrl_ncts4_default: ncts4_default {
485 pinctrl_ndcd1_default: ndcd1_default {
490 pinctrl_ndcd2_default: ndcd2_default {
495 pinctrl_ndcd3_default: ndcd3_default {
500 pinctrl_ndcd4_default: ndcd4_default {
505 pinctrl_ndsr1_default: ndsr1_default {
510 pinctrl_ndsr2_default: ndsr2_default {
515 pinctrl_ndsr3_default: ndsr3_default {
520 pinctrl_ndsr4_default: ndsr4_default {
525 pinctrl_ndtr1_default: ndtr1_default {
530 pinctrl_ndtr2_default: ndtr2_default {
535 pinctrl_ndtr3_default: ndtr3_default {
540 pinctrl_ndtr4_default: ndtr4_default {
545 pinctrl_nri1_default: nri1_default {
550 pinctrl_nri2_default: nri2_default {
555 pinctrl_nri3_default: nri3_default {
560 pinctrl_nri4_default: nri4_default {
565 pinctrl_nrts1_default: nrts1_default {
570 pinctrl_nrts2_default: nrts2_default {
575 pinctrl_nrts3_default: nrts3_default {
580 pinctrl_nrts4_default: nrts4_default {
585 pinctrl_oscclk_default: oscclk_default {
590 pinctrl_pewake_default: pewake_default {
595 pinctrl_pnor_default: pnor_default {
600 pinctrl_pwm0_default: pwm0_default {
605 pinctrl_pwm1_default: pwm1_default {
610 pinctrl_pwm2_default: pwm2_default {
615 pinctrl_pwm3_default: pwm3_default {
620 pinctrl_pwm4_default: pwm4_default {
625 pinctrl_pwm5_default: pwm5_default {
630 pinctrl_pwm6_default: pwm6_default {
635 pinctrl_pwm7_default: pwm7_default {
640 pinctrl_rgmii1_default: rgmii1_default {
645 pinctrl_rgmii2_default: rgmii2_default {
650 pinctrl_rmii1_default: rmii1_default {
655 pinctrl_rmii2_default: rmii2_default {
660 pinctrl_rxd1_default: rxd1_default {
665 pinctrl_rxd2_default: rxd2_default {
670 pinctrl_rxd3_default: rxd3_default {
675 pinctrl_rxd4_default: rxd4_default {
680 pinctrl_salt1_default: salt1_default {
685 pinctrl_salt10_default: salt10_default {
690 pinctrl_salt11_default: salt11_default {
695 pinctrl_salt12_default: salt12_default {
700 pinctrl_salt13_default: salt13_default {
705 pinctrl_salt14_default: salt14_default {
710 pinctrl_salt2_default: salt2_default {
715 pinctrl_salt3_default: salt3_default {
720 pinctrl_salt4_default: salt4_default {
725 pinctrl_salt5_default: salt5_default {
730 pinctrl_salt6_default: salt6_default {
735 pinctrl_salt7_default: salt7_default {
740 pinctrl_salt8_default: salt8_default {
745 pinctrl_salt9_default: salt9_default {
750 pinctrl_scl1_default: scl1_default {
755 pinctrl_scl2_default: scl2_default {
760 pinctrl_sd1_default: sd1_default {
765 pinctrl_sd2_default: sd2_default {
770 pinctrl_sda1_default: sda1_default {
775 pinctrl_sda2_default: sda2_default {
780 pinctrl_sgps1_default: sgps1_default {
785 pinctrl_sgps2_default: sgps2_default {
790 pinctrl_sioonctrl_default: sioonctrl_default {
791 function = "SIOONCTRL";
792 groups = "SIOONCTRL";
795 pinctrl_siopbi_default: siopbi_default {
800 pinctrl_siopbo_default: siopbo_default {
805 pinctrl_siopwreq_default: siopwreq_default {
806 function = "SIOPWREQ";
810 pinctrl_siopwrgd_default: siopwrgd_default {
811 function = "SIOPWRGD";
815 pinctrl_sios3_default: sios3_default {
820 pinctrl_sios5_default: sios5_default {
825 pinctrl_siosci_default: siosci_default {
830 pinctrl_spi1_default: spi1_default {
835 pinctrl_spi1cs1_default: spi1cs1_default {
836 function = "SPI1CS1";
840 pinctrl_spi1debug_default: spi1debug_default {
841 function = "SPI1DEBUG";
842 groups = "SPI1DEBUG";
845 pinctrl_spi1passthru_default: spi1passthru_default {
846 function = "SPI1PASSTHRU";
847 groups = "SPI1PASSTHRU";
850 pinctrl_spi2ck_default: spi2ck_default {
855 pinctrl_spi2cs0_default: spi2cs0_default {
856 function = "SPI2CS0";
860 pinctrl_spi2cs1_default: spi2cs1_default {
861 function = "SPI2CS1";
865 pinctrl_spi2miso_default: spi2miso_default {
866 function = "SPI2MISO";
870 pinctrl_spi2mosi_default: spi2mosi_default {
871 function = "SPI2MOSI";
875 pinctrl_timer3_default: timer3_default {
880 pinctrl_timer4_default: timer4_default {
885 pinctrl_timer5_default: timer5_default {
890 pinctrl_timer6_default: timer6_default {
895 pinctrl_timer7_default: timer7_default {
900 pinctrl_timer8_default: timer8_default {
905 pinctrl_txd1_default: txd1_default {
910 pinctrl_txd2_default: txd2_default {
915 pinctrl_txd3_default: txd3_default {
920 pinctrl_txd4_default: txd4_default {
925 pinctrl_uart6_default: uart6_default {
930 pinctrl_usbcki_default: usbcki_default {
935 pinctrl_vgabiosrom_default: vgabiosrom_default {
936 function = "VGABIOSROM";
937 groups = "VGABIOSROM";
940 pinctrl_vgahs_default: vgahs_default {
945 pinctrl_vgavs_default: vgavs_default {
950 pinctrl_vpi24_default: vpi24_default {
955 pinctrl_vpo_default: vpo_default {
960 pinctrl_wdtrst1_default: wdtrst1_default {
961 function = "WDTRST1";
965 pinctrl_wdtrst2_default: wdtrst2_default {
966 function = "WDTRST2";
974 gfx: display@1e6e6000 {
975 compatible = "aspeed,ast2500-gfx", "syscon";
976 reg = <0x1e6e6000 0x1000>;
981 compatible = "mmio-sram";
982 reg = <0x1e720000 0x9000>; // 36K
985 gpio: gpio@1e780000 {
988 compatible = "aspeed,ast2500-gpio";
989 reg = <0x1e780000 0x1000>;
991 gpio-ranges = <&pinctrl 0 0 220>;
992 interrupt-controller;
995 timer: timer@1e782000 {
996 /* This timer is a Faraday FTTMR010 derivative */
997 compatible = "aspeed,ast2400-timer";
998 reg = <0x1e782000 0x90>;
999 interrupts = <16 17 18 35 36 37 38 39>;
1000 clocks = <&clk_apb>;
1001 clock-names = "PCLK";
1005 wdt1: wdt@1e785000 {
1006 compatible = "aspeed,ast2500-wdt";
1007 reg = <0x1e785000 0x20>;
1011 wdt2: wdt@1e785020 {
1012 compatible = "aspeed,ast2500-wdt";
1013 reg = <0x1e785020 0x20>;
1015 status = "disabled";
1018 wdt3: wdt@1e785040 {
1019 compatible = "aspeed,ast2500-wdt";
1020 reg = <0x1e785040 0x20>;
1021 status = "disabled";
1024 uart1: serial@1e783000 {
1025 compatible = "ns16550a";
1026 reg = <0x1e783000 0x1000>;
1029 clocks = <&clk_uart>;
1031 status = "disabled";
1035 compatible = "aspeed,ast2500-lpc", "simple-mfd";
1036 reg = <0x1e789000 0x1000>;
1038 #address-cells = <1>;
1040 ranges = <0 0x1e789000 0x1000>;
1042 lpc_bmc: lpc-bmc@0 {
1043 compatible = "aspeed,ast2500-lpc-bmc";
1047 lpc_host: lpc-host@80 {
1048 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
1051 #address-cells = <1>;
1053 ranges = <0 0x80 0x1e0>;
1058 compatible = "aspeed,ast2500-lhc";
1059 reg = <0x20 0x24 0x48 0x8>;
1064 uart2: serial@1e78d000 {
1065 compatible = "ns16550a";
1066 reg = <0x1e78d000 0x1000>;
1069 clocks = <&clk_uart>;
1071 status = "disabled";
1074 uart3: serial@1e78e000 {
1075 compatible = "ns16550a";
1076 reg = <0x1e78e000 0x1000>;
1079 clocks = <&clk_uart>;
1081 status = "disabled";
1084 uart4: serial@1e78f000 {
1085 compatible = "ns16550a";
1086 reg = <0x1e78f000 0x1000>;
1089 clocks = <&clk_uart>;
1091 status = "disabled";
1094 uart5: serial@1e784000 {
1095 compatible = "ns16550a";
1096 reg = <0x1e784000 0x1000>;
1099 clocks = <&clk_uart>;
1100 current-speed = <38400>;
1102 status = "disabled";
1105 uart6: serial@1e787000 {
1106 compatible = "ns16550a";
1107 reg = <0x1e787000 0x1000>;
1110 clocks = <&clk_uart>;
1112 status = "disabled";
1116 compatible = "aspeed,ast2500-adc";
1117 reg = <0x1e6e9000 0xb0>;
1118 clocks = <&clk_apb>;
1119 #io-channel-cells = <1>;
1120 status = "disabled";