2 * at91-cosino.dtsi - Device Tree file for Cosino core module
4 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
7 * Derived from at91sam9x5ek.dtsi by:
8 * Copyright (C) 2012 Atmel,
9 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
11 * Licensed under GPLv2 or later.
14 #include "at91sam9g35.dtsi"
17 model = "HCE Cosino core module";
18 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
21 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
25 reg = <0x20000000 0x8000000>;
30 clock-frequency = <32768>;
34 clock-frequency = <12000000>;
43 &pinctrl_mmc0_slot0_clk_cmd_dat0
44 &pinctrl_mmc0_slot0_dat1_3>;
49 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
53 dbgu: serial@fffff200 {
57 usart0: serial@f801c000 {
66 atmel,adc-ts-wires = <4>;
67 atmel,adc-ts-pressure-threshold = <10000>;
73 pinctrl_board_mmc0: mmc0-board {
75 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
86 pinctrl-0 = <&pinctrl_ebi_addr_nand
87 &pinctrl_ebi_data_0_7>;
88 pinctrl-names = "default";
91 nand_controller: nand-controller {
93 pinctrl-0 = <&pinctrl_nand_oe_we
96 pinctrl-names = "default";
99 reg = <0x3 0x0 0x800000>;
100 rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
101 cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
102 nand-bus-width = <8>;
103 nand-ecc-mode = "hw";
104 nand-ecc-strength = <4>;
105 nand-ecc-step-size = <512>;
107 label = "atmel_nand";
110 compatible = "fixed-partitions";
111 #address-cells = <1>;
115 label = "at91bootstrap";
121 reg = <0x40000 0x80000>;
125 label = "U-Boot Env";
126 reg = <0xc0000 0x140000>;
131 reg = <0x200000 0x600000>;
136 reg = <0x800000 0x0f800000>;