arch/arm/boot/dts/keystone-k2g-evm.dts

   1 /*
   2  * Device Tree Source for K2G EVM
   3  *
   4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 /dts-v1/;
  16
  17 #include "keystone-k2g.dtsi"
  18
  19 / {
  20         compatible =  "ti,k2g-evm", "ti,k2g", "ti,keystone";
  21         model = "Texas Instruments K2G General Purpose EVM";
  22
  23         memory@800000000 {
  24                 device_type = "memory";
  25                 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
  26         };
  27
  28         reserved-memory {
  29                 #address-cells = <2>;
  30                 #size-cells = <2>;
  31                 ranges;
  32
  33                 dsp_common_memory: dsp-common-memory@81f800000 {
  34                         compatible = "shared-dma-pool";
  35                         reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
  36                         reusable;
  37                         status = "okay";
  38                 };
  39         };
  40
  41         vcc3v3_dcin_reg: fixedregulator-vcc3v3-dcin {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "mmc0_fixed";
  44                 regulator-min-microvolt = <3300000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 regulator-always-on;
  47         };
  48 };
  49
  50 &k2g_pinctrl {
  51         uart0_pins: pinmux_uart0_pins {
  52                 pinctrl-single,pins = <
  53                         K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0)      /* uart0_rxd.uart0_rxd */
  54                         K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0)      /* uart0_txd.uart0_txd */
  55                 >;
  56         };
  57
  58         mmc0_pins: pinmux_mmc0_pins {
  59                 pinctrl-single,pins = <
  60                         K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_dat3.mmc0_dat3 */
  61                         K2G_CORE_IOPAD(0x1304) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_dat2.mmc0_dat2 */
  62                         K2G_CORE_IOPAD(0x1308) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_dat1.mmc0_dat1 */
  63                         K2G_CORE_IOPAD(0x130c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_dat0.mmc0_dat0 */
  64                         K2G_CORE_IOPAD(0x1310) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_clk.mmc0_clk */
  65                         K2G_CORE_IOPAD(0x1314) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2)        /* mmc0_cmd.mmc0_cmd */
  66                         K2G_CORE_IOPAD(0x12ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3)        /* mmc0_sdcd.gpio1_12 */
  67                 >;
  68         };
  69
  70         mmc1_pins: pinmux_mmc1_pins {
  71                 pinctrl-single,pins = <
  72                         K2G_CORE_IOPAD(0x10ec) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat7.mmc1_dat7 */
  73                         K2G_CORE_IOPAD(0x10f0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat6.mmc1_dat6 */
  74                         K2G_CORE_IOPAD(0x10f4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat5.mmc1_dat5 */
  75                         K2G_CORE_IOPAD(0x10f8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat4.mmc1_dat4 */
  76                         K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat3.mmc1_dat3 */
  77                         K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat2.mmc1_dat2 */
  78                         K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat1.mmc1_dat1 */
  79                         K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_dat0.mmc1_dat0 */
  80                         K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_clk.mmc1_clk */
  81                         K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0)        /* mmc1_cmd.mmc1_cmd */
  82                 >;
  83         };
  84 };
  85
  86 &uart0 {
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&uart0_pins>;
  89         status = "okay";
  90 };
  91
  92 &gpio1 {
  93         status = "okay";
  94 };
  95
  96 &mmc0 {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&mmc0_pins>;
  99         vmmc-supply = <&vcc3v3_dcin_reg>;
 100         cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
 101         status = "okay";
 102 };
 103
 104 &mmc1 {
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&mmc1_pins>;
 107         vmmc-supply = <&vcc3v3_dcin_reg>; /* VCC3V3_EMMC is connected to VCC3V3_DCIN */
 108         status = "okay";
 109 };
 110
 111 &dsp0 {
 112         memory-region = <&dsp_common_memory>;
 113         status = "okay";
 114 };