2 * Copyright 2014 Carlo Caione <carlo@caione.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public
20 * License along with this library; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 /include/ "skeleton.dtsi"
53 interrupt-parent = <&gic>;
55 L2: l2-cache-controller@c4200000 {
56 compatible = "arm,pl310-cache";
57 reg = <0xc4200000 0x1000>;
62 gic: interrupt-controller@c4301000 {
63 compatible = "arm,cortex-a9-gic";
64 reg = <0xc4301000 0x1000>,
67 #interrupt-cells = <3>;
71 compatible = "simple-bus";
77 compatible = "simple-bus";
78 reg = <0xc1100000 0x200000>;
81 ranges = <0x0 0xc1100000 0x200000>;
84 compatible = "amlogic,meson-rng";
89 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
91 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
96 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
98 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
103 compatible = "amlogic,meson6-i2c";
105 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
106 #address-cells = <1>;
112 compatible = "amlogic,meson-pwm";
119 compatible = "amlogic,meson-pwm";
126 compatible = "amlogic,meson-saradc";
128 #io-channel-cells = <1>;
129 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
133 uart_C: serial@8700 {
134 compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
136 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
141 compatible = "amlogic,meson6-i2c";
143 interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
144 #address-cells = <1>;
150 compatible = "amlogic,meson-mx-usb2-phy";
157 compatible = "amlogic,meson-mx-usb2-phy";
164 compatible = "amlogic,meson6-spifc";
166 #address-cells = <1>;
172 compatible = "amlogic,meson6-wdt";
174 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
178 compatible = "amlogic,meson6-timer";
180 interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
184 aobus: aobus@c8100000 {
185 compatible = "simple-bus";
186 reg = <0xc8100000 0x100000>;
187 #address-cells = <1>;
189 ranges = <0x0 0xc8100000 0x100000>;
191 ir_receiver: ir-receiver@480 {
192 compatible= "amlogic,meson6-ir";
194 interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>;
198 uart_AO: serial@4c0 {
199 compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
201 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
206 compatible = "amlogic,meson6-i2c";
208 interrupts = <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
209 #address-cells = <1>;
216 compatible = "snps,dwc2";
217 #address-cells = <1>;
219 reg = <0xc9040000 0x40000>;
220 interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>;
222 phy-names = "usb2-phy";
228 compatible = "snps,dwc2";
229 #address-cells = <1>;
231 reg = <0xc90c0000 0x40000>;
232 interrupts = <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
234 phy-names = "usb2-phy";
239 ethmac: ethernet@c9410000 {
240 compatible = "amlogic,meson6-dwmac", "snps,dwmac";
241 reg = <0xc9410000 0x10000
243 interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
244 interrupt-names = "macirq";
248 ahb_sram: sram@d9000000 {
249 compatible = "mmio-sram";
250 reg = <0xd9000000 0x20000>;
251 #address-cells = <1>;
253 ranges = <0 0xd9000000 0x20000>;