| blob | adb1c0998b813ef6df08e15bc722a9a4907f6444 |
1 /*
2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
3 */
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
8 / {
9 #address-cells = <1>;
10 #size-cells = <1>;
12 memory {
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
15 };
17 L2: l2-cache {
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
21 interrupts = <30>;
22 cache-unified;
23 cache-level = <2>;
24 cache-size = <131072>;
25 cache-sets = <512>;
26 cache-line-size = <32>;
27 /* At full speed latency must be >=2 */
28 arm,tag-latency = <8>;
29 arm,data-latency = <8 8>;
30 arm,dirty-latency = <8>;
31 };
33 mtu0: mtu@101e2000 {
34 /* Nomadik system timer */
35 compatible = "st,nomadik-mtu";
36 reg = <0x101e2000 0x1000>;
37 interrupt-parent = <&vica>;
38 interrupts = <4>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
41 };
43 mtu1: mtu@101e3000 {
44 /* Secondary timer */
45 reg = <0x101e3000 0x1000>;
46 interrupt-parent = <&vica>;
47 interrupts = <5>;
48 clocks = <&timclk>, <&pclk>;
49 clock-names = "timclk", "apb_pclk";
50 };
52 gpio0: gpio@101e4000 {
53 compatible = "st,nomadik-gpio";
54 reg = <0x101e4000 0x80>;
55 interrupt-parent = <&vica>;
56 interrupts = <6>;
57 interrupt-controller;
58 #interrupt-cells = <2>;
59 gpio-controller;
60 #gpio-cells = <2>;
61 gpio-bank = <0>;
62 gpio-ranges = <&pinctrl 0 0 32>;
63 clocks = <&pclk>;
64 };
66 gpio1: gpio@101e5000 {
67 compatible = "st,nomadik-gpio";
68 reg = <0x101e5000 0x80>;
69 interrupt-parent = <&vica>;
70 interrupts = <7>;
71 interrupt-controller;
72 #interrupt-cells = <2>;
73 gpio-controller;
74 #gpio-cells = <2>;
75 gpio-bank = <1>;
76 gpio-ranges = <&pinctrl 0 32 32>;
77 clocks = <&pclk>;
78 };
80 gpio2: gpio@101e6000 {
81 compatible = "st,nomadik-gpio";
82 reg = <0x101e6000 0x80>;
83 interrupt-parent = <&vica>;
84 interrupts = <8>;
85 interrupt-controller;
86 #interrupt-cells = <2>;
87 gpio-controller;
88 #gpio-cells = <2>;
89 gpio-bank = <2>;
90 gpio-ranges = <&pinctrl 0 64 32>;
91 clocks = <&pclk>;
92 };
94 gpio3: gpio@101e7000 {
95 compatible = "st,nomadik-gpio";
96 reg = <0x101e7000 0x80>;
97 ngpio = <28>;
98 interrupt-parent = <&vica>;
99 interrupts = <9>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
102 gpio-controller;
103 #gpio-cells = <2>;
104 gpio-bank = <3>;
105 gpio-ranges = <&pinctrl 0 96 28>;
106 clocks = <&pclk>;
107 };
109 pinctrl: pinctrl {
110 compatible = "stericsson,stn8815-pinctrl";
111 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
112 /* Pin configurations */
113 uart1 {
114 uart1_default_mux: uart1_mux {
115 u1_default_mux {
116 function = "u1";
117 groups = "u1_a_1";
118 };
119 };
120 };
121 mmcsd {
122 mmcsd_default_mux: mmcsd_mux {
123 mmcsd_default_mux {
124 function = "mmcsd";
125 groups = "mmcsd_a_1", "mmcsd_b_1";
126 };
127 };
128 mmcsd_default_mode: mmcsd_default {
129 mmcsd_default_cfg1 {
130 /*
131 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
132 * MCCMD, MCDAT3-0, MCMSFBCLK
133 */
134 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
135 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
136 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
137 ste,output = <2>;
138 };
139 };
140 };
141 i2c0 {
142 i2c0_default_mux: i2c0_mux {
143 i2c0_default_mux {
144 function = "i2c0";
145 groups = "i2c0_a_1";
146 };
147 };
148 i2c0_default_mode: i2c0_default {
149 i2c0_default_cfg {
150 pins = "GPIO62_D3", "GPIO63_D2";
151 ste,input = <0>;
152 };
153 };
154 };
155 i2c1 {
156 i2c1_default_mux: i2c1_mux {
157 i2c1_default_mux {
158 function = "i2c1";
159 groups = "i2c1_a_1";
160 };
161 };
162 i2c1_default_mode: i2c1_default {
163 i2c1_default_cfg {
164 pins = "GPIO53_L4", "GPIO54_L3";
165 ste,input = <0>;
166 };
167 };
168 };
169 clcd {
170 /*
171 * This should be activated to use the additional
172 * 8 lines for bits 16 thru 23 from the CLCD block.
173 */
174 clcd_24bit_mux: clcd_mux {
175 clcd_24bit_mux {
176 function = "clcd";
177 groups = "clcd_16_23_b_1";
178 };
179 };
180 };
181 };
183 /* Power Management Unit */
184 pmu: pmu@101e9000 {
185 compatible = "stericsson,nomadik-pmu", "syscon";
186 reg = <0x101e0000 0x1000>;
187 };
189 src: src@101e0000 {
190 compatible = "stericsson,nomadik-src";
191 reg = <0x101e0000 0x1000>;
193 /*
194 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
195 * that is parent of TIMCLK, PLL1 and PLL2
196 */
197 mxtal: mxtal@19.2M {
198 #clock-cells = <0>;
199 compatible = "fixed-clock";
200 clock-frequency = <19200000>;
201 };
203 /*
204 * The 2.4 MHz TIMCLK reference clock is active at
205 * boot time, this is actually the MXTALCLK @19.2 MHz
206 * divided by 8. This clock is used by the timers and
207 * watchdog. See page 105 ff.
208 */
209 timclk: timclk@2.4M {
210 #clock-cells = <0>;
211 compatible = "fixed-factor-clock";
212 clock-div = <8>;
213 clock-mult = <1>;
214 clocks = <&mxtal>;
215 };
217 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
218 pll1: pll1@0 {
219 #clock-cells = <0>;
220 compatible = "st,nomadik-pll-clock";
221 pll-id = <1>;
222 clocks = <&mxtal>;
223 };
225 /* HCLK divides the PLL1 with 1,2,3 or 4 */
226 hclk: hclk@0 {
227 #clock-cells = <0>;
228 compatible = "st,nomadik-hclk-clock";
229 clocks = <&pll1>;
230 };
231 /* The PCLK domain uses HCLK right off */
232 pclk: pclk@0 {
233 #clock-cells = <0>;
234 compatible = "fixed-factor-clock";
235 clock-div = <1>;
236 clock-mult = <1>;
237 clocks = <&hclk>;
238 };
240 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
241 pll2: pll2@0 {
242 #clock-cells = <0>;
243 compatible = "st,nomadik-pll-clock";
244 pll-id = <2>;
245 clocks = <&mxtal>;
246 };
247 clk216: clk216@216M {
248 #clock-cells = <0>;
249 compatible = "fixed-factor-clock";
250 clock-div = <4>;
251 clock-mult = <1>;
252 clocks = <&pll2>;
253 };
254 clk108: clk108@108M {
255 #clock-cells = <0>;
256 compatible = "fixed-factor-clock";
257 clock-div = <2>;
258 clock-mult = <1>;
259 clocks = <&clk216>;
260 };
261 clk72: clk72@72M {
262 #clock-cells = <0>;
263 compatible = "fixed-factor-clock";
264 /* The data sheet does not say how this is derived */
265 clock-div = <12>;
266 clock-mult = <1>;
267 clocks = <&pll2>;
268 };
269 clk48: clk48@48M {
270 #clock-cells = <0>;
271 compatible = "fixed-factor-clock";
272 /* The data sheet does not say how this is derived */
273 clock-div = <18>;
274 clock-mult = <1>;
275 clocks = <&pll2>;
276 };
277 clk27: clk27@27M {
278 #clock-cells = <0>;
279 compatible = "fixed-factor-clock";
280 clock-div = <4>;
281 clock-mult = <1>;
282 clocks = <&clk108>;
283 };
285 /* This apparently exists as well */
286 ulpiclk: ulpiclk@60M {
287 #clock-cells = <0>;
288 compatible = "fixed-clock";
289 clock-frequency = <60000000>;
290 };
292 /*
293 * IP AMBA bus clocks, driving the bus side of the
294 * peripheral clocking, clock gates.
295 */
297 hclkdma0: hclkdma0@48M {
298 #clock-cells = <0>;
299 compatible = "st,nomadik-src-clock";
300 clock-id = <0>;
301 clocks = <&hclk>;
302 };
303 hclksmc: hclksmc@48M {
304 #clock-cells = <0>;
305 compatible = "st,nomadik-src-clock";
306 clock-id = <1>;
307 clocks = <&hclk>;
308 };
309 hclksdram: hclksdram@48M {
310 #clock-cells = <0>;
311 compatible = "st,nomadik-src-clock";
312 clock-id = <2>;
313 clocks = <&hclk>;
314 };
315 hclkdma1: hclkdma1@48M {
316 #clock-cells = <0>;
317 compatible = "st,nomadik-src-clock";
318 clock-id = <3>;
319 clocks = <&hclk>;
320 };
321 hclkclcd: hclkclcd@48M {
322 #clock-cells = <0>;
323 compatible = "st,nomadik-src-clock";
324 clock-id = <4>;
325 clocks = <&hclk>;
326 };
327 pclkirda: pclkirda@48M {
328 #clock-cells = <0>;
329 compatible = "st,nomadik-src-clock";
330 clock-id = <5>;
331 clocks = <&pclk>;
332 };
333 pclkssp: pclkssp@48M {
334 #clock-cells = <0>;
335 compatible = "st,nomadik-src-clock";
336 clock-id = <6>;
337 clocks = <&pclk>;
338 };
339 pclkuart0: pclkuart0@48M {
340 #clock-cells = <0>;
341 compatible = "st,nomadik-src-clock";
342 clock-id = <7>;
343 clocks = <&pclk>;
344 };
345 pclksdi: pclksdi@48M {
346 #clock-cells = <0>;
347 compatible = "st,nomadik-src-clock";
348 clock-id = <8>;
349 clocks = <&pclk>;
350 };
351 pclki2c0: pclki2c0@48M {
352 #clock-cells = <0>;
353 compatible = "st,nomadik-src-clock";
354 clock-id = <9>;
355 clocks = <&pclk>;
356 };
357 pclki2c1: pclki2c1@48M {
358 #clock-cells = <0>;
359 compatible = "st,nomadik-src-clock";
360 clock-id = <10>;
361 clocks = <&pclk>;
362 };
363 pclkuart1: pclkuart1@48M {
364 #clock-cells = <0>;
365 compatible = "st,nomadik-src-clock";
366 clock-id = <11>;
367 clocks = <&pclk>;
368 };
369 pclkmsp0: pclkmsp0@48M {
370 #clock-cells = <0>;
371 compatible = "st,nomadik-src-clock";
372 clock-id = <12>;
373 clocks = <&pclk>;
374 };
375 hclkusb: hclkusb@48M {
376 #clock-cells = <0>;
377 compatible = "st,nomadik-src-clock";
378 clock-id = <13>;
379 clocks = <&hclk>;
380 };
381 hclkdif: hclkdif@48M {
382 #clock-cells = <0>;
383 compatible = "st,nomadik-src-clock";
384 clock-id = <14>;
385 clocks = <&hclk>;
386 };
387 hclksaa: hclksaa@48M {
388 #clock-cells = <0>;
389 compatible = "st,nomadik-src-clock";
390 clock-id = <15>;
391 clocks = <&hclk>;
392 };
393 hclksva: hclksva@48M {
394 #clock-cells = <0>;
395 compatible = "st,nomadik-src-clock";
396 clock-id = <16>;
397 clocks = <&hclk>;
398 };
399 pclkhsi: pclkhsi@48M {
400 #clock-cells = <0>;
401 compatible = "st,nomadik-src-clock";
402 clock-id = <17>;
403 clocks = <&pclk>;
404 };
405 pclkxti: pclkxti@48M {
406 #clock-cells = <0>;
407 compatible = "st,nomadik-src-clock";
408 clock-id = <18>;
409 clocks = <&pclk>;
410 };
411 pclkuart2: pclkuart2@48M {
412 #clock-cells = <0>;
413 compatible = "st,nomadik-src-clock";
414 clock-id = <19>;
415 clocks = <&pclk>;
416 };
417 pclkmsp1: pclkmsp1@48M {
418 #clock-cells = <0>;
419 compatible = "st,nomadik-src-clock";
420 clock-id = <20>;
421 clocks = <&pclk>;
422 };
423 pclkmsp2: pclkmsp2@48M {
424 #clock-cells = <0>;
425 compatible = "st,nomadik-src-clock";
426 clock-id = <21>;
427 clocks = <&pclk>;
428 };
429 pclkowm: pclkowm@48M {
430 #clock-cells = <0>;
431 compatible = "st,nomadik-src-clock";
432 clock-id = <22>;
433 clocks = <&pclk>;
434 };
435 hclkhpi: hclkhpi@48M {
436 #clock-cells = <0>;
437 compatible = "st,nomadik-src-clock";
438 clock-id = <23>;
439 clocks = <&hclk>;
440 };
441 pclkske: pclkske@48M {
442 #clock-cells = <0>;
443 compatible = "st,nomadik-src-clock";
444 clock-id = <24>;
445 clocks = <&pclk>;
446 };
447 pclkhsem: pclkhsem@48M {
448 #clock-cells = <0>;
449 compatible = "st,nomadik-src-clock";
450 clock-id = <25>;
451 clocks = <&pclk>;
452 };
453 hclk3d: hclk3d@48M {
454 #clock-cells = <0>;
455 compatible = "st,nomadik-src-clock";
456 clock-id = <26>;
457 clocks = <&hclk>;
458 };
459 hclkhash: hclkhash@48M {
460 #clock-cells = <0>;
461 compatible = "st,nomadik-src-clock";
462 clock-id = <27>;
463 clocks = <&hclk>;
464 };
465 hclkcryp: hclkcryp@48M {
466 #clock-cells = <0>;
467 compatible = "st,nomadik-src-clock";
468 clock-id = <28>;
469 clocks = <&hclk>;
470 };
471 pclkmshc: pclkmshc@48M {
472 #clock-cells = <0>;
473 compatible = "st,nomadik-src-clock";
474 clock-id = <29>;
475 clocks = <&pclk>;
476 };
477 hclkusbm: hclkusbm@48M {
478 #clock-cells = <0>;
479 compatible = "st,nomadik-src-clock";
480 clock-id = <30>;
481 clocks = <&hclk>;
482 };
483 hclkrng: hclkrng@48M {
484 #clock-cells = <0>;
485 compatible = "st,nomadik-src-clock";
486 clock-id = <31>;
487 clocks = <&hclk>;
488 };
490 /* IP kernel clocks */
491 clcdclk: clcdclk@0 {
492 #clock-cells = <0>;
493 compatible = "st,nomadik-src-clock";
494 clock-id = <36>;
495 clocks = <&clk72 &clk48>;
496 };
497 irdaclk: irdaclk@48M {
498 #clock-cells = <0>;
499 compatible = "st,nomadik-src-clock";
500 clock-id = <37>;
501 clocks = <&clk48>;
502 };
503 sspiclk: sspiclk@48M {
504 #clock-cells = <0>;
505 compatible = "st,nomadik-src-clock";
506 clock-id = <38>;
507 clocks = <&clk48>;
508 };
509 uart0clk: uart0clk@48M {
510 #clock-cells = <0>;
511 compatible = "st,nomadik-src-clock";
512 clock-id = <39>;
513 clocks = <&clk48>;
514 };
515 sdiclk: sdiclk@48M {
516 /* Also called MCCLK in some documents */
517 #clock-cells = <0>;
518 compatible = "st,nomadik-src-clock";
519 clock-id = <40>;
520 clocks = <&clk48>;
521 };
522 i2c0clk: i2c0clk@48M {
523 #clock-cells = <0>;
524 compatible = "st,nomadik-src-clock";
525 clock-id = <41>;
526 clocks = <&clk48>;
527 };
528 i2c1clk: i2c1clk@48M {
529 #clock-cells = <0>;
530 compatible = "st,nomadik-src-clock";
531 clock-id = <42>;
532 clocks = <&clk48>;
533 };
534 uart1clk: uart1clk@48M {
535 #clock-cells = <0>;
536 compatible = "st,nomadik-src-clock";
537 clock-id = <43>;
538 clocks = <&clk48>;
539 };
540 mspclk0: mspclk0@48M {
541 #clock-cells = <0>;
542 compatible = "st,nomadik-src-clock";
543 clock-id = <44>;
544 clocks = <&clk48>;
545 };
546 usbclk: usbclk@48M {
547 #clock-cells = <0>;
548 compatible = "st,nomadik-src-clock";
549 clock-id = <45>;
550 clocks = <&clk48>; /* 48 MHz not ULPI */
551 };
552 difclk: difclk@72M {
553 #clock-cells = <0>;
554 compatible = "st,nomadik-src-clock";
555 clock-id = <46>;
556 clocks = <&clk72>;
557 };
558 ipi2cclk: ipi2cclk@48M {
559 #clock-cells = <0>;
560 compatible = "st,nomadik-src-clock";
561 clock-id = <47>;
562 clocks = <&clk48>; /* Guess */
563 };
564 ipbmcclk: ipbmcclk@48M {
565 #clock-cells = <0>;
566 compatible = "st,nomadik-src-clock";
567 clock-id = <48>;
568 clocks = <&clk48>; /* Guess */
569 };
570 hsiclkrx: hsiclkrx@216M {
571 #clock-cells = <0>;
572 compatible = "st,nomadik-src-clock";
573 clock-id = <49>;
574 clocks = <&clk216>;
575 };
576 hsiclktx: hsiclktx@108M {
577 #clock-cells = <0>;
578 compatible = "st,nomadik-src-clock";
579 clock-id = <50>;
580 clocks = <&clk108>;
581 };
582 uart2clk: uart2clk@48M {
583 #clock-cells = <0>;
584 compatible = "st,nomadik-src-clock";
585 clock-id = <51>;
586 clocks = <&clk48>;
587 };
588 mspclk1: mspclk1@48M {
589 #clock-cells = <0>;
590 compatible = "st,nomadik-src-clock";
591 clock-id = <52>;
592 clocks = <&clk48>;
593 };
594 mspclk2: mspclk2@48M {
595 #clock-cells = <0>;
596 compatible = "st,nomadik-src-clock";
597 clock-id = <53>;
598 clocks = <&clk48>;
599 };
600 owmclk: owmclk@48M {
601 #clock-cells = <0>;
602 compatible = "st,nomadik-src-clock";
603 clock-id = <54>;
604 clocks = <&clk48>; /* Guess */
605 };
606 skeclk: skeclk@48M {
607 #clock-cells = <0>;
608 compatible = "st,nomadik-src-clock";
609 clock-id = <56>;
610 clocks = <&clk48>; /* Guess */
611 };
612 x3dclk: x3dclk@48M {
613 #clock-cells = <0>;
614 compatible = "st,nomadik-src-clock";
615 clock-id = <58>;
616 clocks = <&clk48>; /* Guess */
617 };
618 pclkmsp3: pclkmsp3@48M {
619 #clock-cells = <0>;
620 compatible = "st,nomadik-src-clock";
621 clock-id = <59>;
622 clocks = <&pclk>;
623 };
624 mspclk3: mspclk3@48M {
625 #clock-cells = <0>;
626 compatible = "st,nomadik-src-clock";
627 clock-id = <60>;
628 clocks = <&clk48>;
629 };
630 mshcclk: mshcclk@48M {
631 #clock-cells = <0>;
632 compatible = "st,nomadik-src-clock";
633 clock-id = <61>;
634 clocks = <&clk48>; /* Guess */
635 };
636 usbmclk: usbmclk@48M {
637 #clock-cells = <0>;
638 compatible = "st,nomadik-src-clock";
639 clock-id = <62>;
640 /* Stated as "48 MHz not ULPI clock" */
641 clocks = <&clk48>;
642 };
643 rngcclk: rngcclk@48M {
644 #clock-cells = <0>;
645 compatible = "st,nomadik-src-clock";
646 clock-id = <63>;
647 clocks = <&clk48>; /* Guess */
648 };
649 };
651 /* A NAND flash of 128 MiB */
652 fsmc: flash@40000000 {
653 compatible = "stericsson,fsmc-nand";
654 #address-cells = <1>;
655 #size-cells = <1>;
656 reg = <0x10100000 0x1000>, /* FSMC Register*/
657 <0x40000000 0x2000>, /* NAND Base DATA */
658 <0x41000000 0x2000>, /* NAND Base ADDR */
659 <0x40800000 0x2000>; /* NAND Base CMD */
660 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
661 clocks = <&hclksmc>;
662 status = "okay";
663 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
665 partition@0 {
666 label = "X-Loader(NAND)";
667 reg = <0x0 0x40000>;
668 };
669 partition@40000 {
670 label = "MemInit(NAND)";
671 reg = <0x40000 0x40000>;
672 };
673 partition@80000 {
674 label = "BootLoader(NAND)";
675 reg = <0x80000 0x200000>;
676 };
677 partition@280000 {
678 label = "Kernel zImage(NAND)";
679 reg = <0x280000 0x300000>;
680 };
681 partition@580000 {
682 label = "Root Filesystem(NAND)";
683 reg = <0x580000 0x1600000>;
684 };
685 partition@1b80000 {
686 label = "User Filesystem(NAND)";
687 reg = <0x1b80000 0x6480000>;
688 };
689 };
691 /* I2C0 connected to the STw4811 power management chip */
692 i2c0 {
693 compatible = "st,nomadik-i2c", "arm,primecell";
694 reg = <0x101f8000 0x1000>;
695 interrupt-parent = <&vica>;
696 interrupts = <20>;
697 clock-frequency = <100000>;
698 #address-cells = <1>;
699 #size-cells = <0>;
700 clocks = <&i2c0clk>, <&pclki2c0>;
701 clock-names = "mclk", "apb_pclk";
702 pinctrl-names = "default";
703 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
705 stw4811@2d {
706 compatible = "st,stw4811";
707 reg = <0x2d>;
708 vmmc_regulator: vmmc {
709 compatible = "st,stw481x-vmmc";
710 regulator-name = "VMMC";
711 regulator-min-microvolt = <1800000>;
712 regulator-max-microvolt = <3300000>;
713 };
714 };
715 };
717 /* I2C1 connected to various sensors */
718 i2c1 {
719 compatible = "st,nomadik-i2c", "arm,primecell";
720 reg = <0x101f7000 0x1000>;
721 interrupt-parent = <&vica>;
722 interrupts = <21>;
723 clock-frequency = <100000>;
724 #address-cells = <1>;
725 #size-cells = <0>;
726 clocks = <&i2c1clk>, <&pclki2c1>;
727 clock-names = "mclk", "apb_pclk";
728 pinctrl-names = "default";
729 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
731 camera@2d {
732 compatible = "st,camera";
733 reg = <0x10>;
734 };
735 stw5095@1a {
736 compatible = "st,stw5095";
737 reg = <0x1a>;
738 };
739 };
741 amba {
742 compatible = "simple-bus";
743 #address-cells = <1>;
744 #size-cells = <1>;
745 ranges;
747 clcd@10120000 {
748 compatible = "arm,pl110", "arm,primecell";
749 reg = <0x10120000 0x1000>;
750 interrupt-names = "combined";
751 interrupts = <14>;
752 clocks = <&clcdclk>, <&hclkclcd>;
753 clock-names = "clcdclk", "apb_pclk";
754 status = "disabled";
755 };
757 vica: intc@10140000 {
758 compatible = "arm,versatile-vic";
759 interrupt-controller;
760 #interrupt-cells = <1>;
761 reg = <0x10140000 0x20>;
762 };
764 vicb: intc@10140020 {
765 compatible = "arm,versatile-vic";
766 interrupt-controller;
767 #interrupt-cells = <1>;
768 reg = <0x10140020 0x20>;
769 };
771 uart0: uart@101fd000 {
772 compatible = "arm,pl011", "arm,primecell";
773 reg = <0x101fd000 0x1000>;
774 interrupt-parent = <&vica>;
775 interrupts = <12>;
776 clocks = <&uart0clk>, <&pclkuart0>;
777 clock-names = "uartclk", "apb_pclk";
778 status = "disabled";
779 dmas = <&dmac0 14 1>,
780 <&dmac0 15 1>;
781 dma-names = "rx", "tx";
782 };
784 uart1: uart@101fb000 {
785 compatible = "arm,pl011", "arm,primecell";
786 reg = <0x101fb000 0x1000>;
787 interrupt-parent = <&vica>;
788 interrupts = <17>;
789 clocks = <&uart1clk>, <&pclkuart1>;
790 clock-names = "uartclk", "apb_pclk";
791 pinctrl-names = "default";
792 pinctrl-0 = <&uart1_default_mux>;
793 dmas = <&dmac1 22 1>,
794 <&dmac1 23 1>;
795 dma-names = "rx", "tx";
796 };
798 uart2: uart@101f2000 {
799 compatible = "arm,pl011", "arm,primecell";
800 reg = <0x101f2000 0x1000>;
801 interrupt-parent = <&vica>;
802 interrupts = <28>;
803 clocks = <&uart2clk>, <&pclkuart2>;
804 clock-names = "uartclk", "apb_pclk";
805 status = "disabled";
806 dmas = <&dmac1 30 1>,
807 <&dmac1 31 1>;
808 dma-names = "rx", "tx";
809 };
811 rng: rng@101b0000 {
812 compatible = "arm,primecell";
813 reg = <0x101b0000 0x1000>;
814 clocks = <&rngcclk>, <&hclkrng>;
815 clock-names = "rng", "apb_pclk";
816 };
818 rtc: rtc@101e8000 {
819 compatible = "arm,pl031", "arm,primecell";
820 reg = <0x101e8000 0x1000>;
821 clocks = <&pclk>;
822 clock-names = "apb_pclk";
823 interrupt-parent = <&vica>;
824 interrupts = <10>;
825 };
827 mmcsd: sdi@101f6000 {
828 compatible = "arm,pl18x", "arm,primecell";
829 reg = <0x101f6000 0x1000>;
830 clocks = <&sdiclk>, <&pclksdi>;
831 clock-names = "mclk", "apb_pclk";
832 interrupt-parent = <&vica>;
833 interrupts = <22>;
834 max-frequency = <400000>;
835 bus-width = <4>;
836 cap-mmc-highspeed;
837 cap-sd-highspeed;
838 full-pwr-cycle;
839 /*
840 * The STw4811 circuit used with the Nomadik strictly
841 * requires that all of these signal direction pins be
842 * routed and used for its 4-bit levelshifter.
843 */
844 st,sig-dir-dat0;
845 st,sig-dir-dat2;
846 st,sig-dir-dat31;
847 st,sig-dir-cmd;
848 st,sig-pin-fbclk;
849 pinctrl-names = "default";
850 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
851 vmmc-supply = <&vmmc_regulator>;
852 };
854 dmac0: dma-controller@10130000 {
855 compatible = "arm,pl080", "arm,primecell";
856 reg = <0x10130000 0x1000>;
857 interrupt-parent = <&vica>;
858 interrupts = <15>;
859 clocks = <&hclkdma0>;
860 clock-names = "apb_pclk";
861 lli-bus-interface-ahb1;
862 lli-bus-interface-ahb2;
863 mem-bus-interface-ahb2;
864 memcpy-burst-size = <256>;
865 memcpy-bus-width = <32>;
866 #dma-cells = <2>;
867 };
868 dmac1: dma-controller@10150000 {
869 compatible = "arm,pl080", "arm,primecell";
870 reg = <0x10150000 0x1000>;
871 interrupt-parent = <&vica>;
872 interrupts = <13>;
873 clocks = <&hclkdma1>;
874 clock-names = "apb_pclk";
875 lli-bus-interface-ahb1;
876 lli-bus-interface-ahb2;
877 mem-bus-interface-ahb2;
878 memcpy-burst-size = <256>;
879 memcpy-bus-width = <32>;
880 #dma-cells = <2>;
881 };
882 };
883 };