rtnetlink: check DO_SETLINK_NOTIFY correctly in do_setlink
[linux/fpc-iii.git] / arch / powerpc / mm / hugetlbpage-book3e.c
blobbfe4e8526b2d560d2ce92e79cd708e68529bbfe5
1 /*
2 * PPC Huge TLB Page Support for Book3E MMU
4 * Copyright (C) 2009 David Gibson, IBM Corporation.
5 * Copyright (C) 2011 Becky Bruce, Freescale Semiconductor
7 */
8 #include <linux/mm.h>
9 #include <linux/hugetlb.h>
11 #include <asm/mmu.h>
13 #ifdef CONFIG_PPC_FSL_BOOK3E
14 #ifdef CONFIG_PPC64
15 static inline int tlb1_next(void)
17 struct paca_struct *paca = get_paca();
18 struct tlb_core_data *tcd;
19 int this, next;
21 tcd = paca->tcd_ptr;
22 this = tcd->esel_next;
24 next = this + 1;
25 if (next >= tcd->esel_max)
26 next = tcd->esel_first;
28 tcd->esel_next = next;
29 return this;
31 #else
32 static inline int tlb1_next(void)
34 int index, ncams;
36 ncams = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
38 index = this_cpu_read(next_tlbcam_idx);
40 /* Just round-robin the entries and wrap when we hit the end */
41 if (unlikely(index == ncams - 1))
42 __this_cpu_write(next_tlbcam_idx, tlbcam_index);
43 else
44 __this_cpu_inc(next_tlbcam_idx);
46 return index;
48 #endif /* !PPC64 */
49 #endif /* FSL */
51 static inline int mmu_get_tsize(int psize)
53 return mmu_psize_defs[psize].enc;
56 #if defined(CONFIG_PPC_FSL_BOOK3E) && defined(CONFIG_PPC64)
57 #include <asm/paca.h>
59 static inline void book3e_tlb_lock(void)
61 struct paca_struct *paca = get_paca();
62 unsigned long tmp;
63 int token = smp_processor_id() + 1;
66 * Besides being unnecessary in the absence of SMT, this
67 * check prevents trying to do lbarx/stbcx. on e5500 which
68 * doesn't implement either feature.
70 if (!cpu_has_feature(CPU_FTR_SMT))
71 return;
73 asm volatile("1: lbarx %0, 0, %1;"
74 "cmpwi %0, 0;"
75 "bne 2f;"
76 "stbcx. %2, 0, %1;"
77 "bne 1b;"
78 "b 3f;"
79 "2: lbzx %0, 0, %1;"
80 "cmpwi %0, 0;"
81 "bne 2b;"
82 "b 1b;"
83 "3:"
84 : "=&r" (tmp)
85 : "r" (&paca->tcd_ptr->lock), "r" (token)
86 : "memory");
89 static inline void book3e_tlb_unlock(void)
91 struct paca_struct *paca = get_paca();
93 if (!cpu_has_feature(CPU_FTR_SMT))
94 return;
96 isync();
97 paca->tcd_ptr->lock = 0;
99 #else
100 static inline void book3e_tlb_lock(void)
104 static inline void book3e_tlb_unlock(void)
107 #endif
109 static inline int book3e_tlb_exists(unsigned long ea, unsigned long pid)
111 int found = 0;
113 mtspr(SPRN_MAS6, pid << 16);
114 if (mmu_has_feature(MMU_FTR_USE_TLBRSRV)) {
115 asm volatile(
116 "li %0,0\n"
117 "tlbsx. 0,%1\n"
118 "bne 1f\n"
119 "li %0,1\n"
120 "1:\n"
121 : "=&r"(found) : "r"(ea));
122 } else {
123 asm volatile(
124 "tlbsx 0,%1\n"
125 "mfspr %0,0x271\n"
126 "srwi %0,%0,31\n"
127 : "=&r"(found) : "r"(ea));
130 return found;
133 void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
134 pte_t pte)
136 unsigned long mas1, mas2;
137 u64 mas7_3;
138 unsigned long psize, tsize, shift;
139 unsigned long flags;
140 struct mm_struct *mm;
142 #ifdef CONFIG_PPC_FSL_BOOK3E
143 int index;
144 #endif
146 if (unlikely(is_kernel_addr(ea)))
147 return;
149 mm = vma->vm_mm;
151 psize = vma_mmu_pagesize(vma);
152 shift = __ilog2(psize);
153 tsize = shift - 10;
155 * We can't be interrupted while we're setting up the MAS
156 * regusters or after we've confirmed that no tlb exists.
158 local_irq_save(flags);
160 book3e_tlb_lock();
162 if (unlikely(book3e_tlb_exists(ea, mm->context.id))) {
163 book3e_tlb_unlock();
164 local_irq_restore(flags);
165 return;
168 #ifdef CONFIG_PPC_FSL_BOOK3E
169 /* We have to use the CAM(TLB1) on FSL parts for hugepages */
170 index = tlb1_next();
171 mtspr(SPRN_MAS0, MAS0_ESEL(index) | MAS0_TLBSEL(1));
172 #endif
174 mas1 = MAS1_VALID | MAS1_TID(mm->context.id) | MAS1_TSIZE(tsize);
175 mas2 = ea & ~((1UL << shift) - 1);
176 mas2 |= (pte_val(pte) >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
177 mas7_3 = (u64)pte_pfn(pte) << PAGE_SHIFT;
178 mas7_3 |= (pte_val(pte) >> PTE_BAP_SHIFT) & MAS3_BAP_MASK;
179 if (!pte_dirty(pte))
180 mas7_3 &= ~(MAS3_SW|MAS3_UW);
182 mtspr(SPRN_MAS1, mas1);
183 mtspr(SPRN_MAS2, mas2);
185 if (mmu_has_feature(MMU_FTR_USE_PAIRED_MAS)) {
186 mtspr(SPRN_MAS7_MAS3, mas7_3);
187 } else {
188 if (mmu_has_feature(MMU_FTR_BIG_PHYS))
189 mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
190 mtspr(SPRN_MAS3, lower_32_bits(mas7_3));
193 asm volatile ("tlbwe");
195 book3e_tlb_unlock();
196 local_irq_restore(flags);
199 void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
201 struct hstate *hstate = hstate_file(vma->vm_file);
202 unsigned long tsize = huge_page_shift(hstate) - 10;
204 __flush_tlb_page(vma->vm_mm, vmaddr, tsize, 0);