drivers/misc/cardreader/alcor_pci.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de>
   4  *
   5  * Driver for Alcor Micro AU6601 and AU6621 controllers
   6  */
   7
   8 #include <linux/delay.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/io.h>
  11 #include <linux/irq.h>
  12 #include <linux/mfd/core.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pm.h>
  17
  18 #include <linux/alcor_pci.h>
  19
  20 #define DRV_NAME_ALCOR_PCI                      "alcor_pci"
  21
  22 static DEFINE_IDA(alcor_pci_idr);
  23
  24 static struct mfd_cell alcor_pci_cells[] = {
  25         [ALCOR_SD_CARD] = {
  26                 .name = DRV_NAME_ALCOR_PCI_SDMMC,
  27         },
  28         [ALCOR_MS_CARD] = {
  29                 .name = DRV_NAME_ALCOR_PCI_MS,
  30         },
  31 };
  32
  33 static const struct alcor_dev_cfg alcor_cfg = {
  34         .dma = 0,
  35 };
  36
  37 static const struct alcor_dev_cfg au6621_cfg = {
  38         .dma = 1,
  39 };
  40
  41 static const struct alcor_dev_cfg au6625_cfg = {
  42         .dma = 0,
  43 };
  44
  45 static const struct pci_device_id pci_ids[] = {
  46         { PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6601),
  47                 .driver_data = (kernel_ulong_t)&alcor_cfg },
  48         { PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6621),
  49                 .driver_data = (kernel_ulong_t)&au6621_cfg },
  50         { PCI_DEVICE(PCI_ID_ALCOR_MICRO, PCI_ID_AU6625),
  51                 .driver_data = (kernel_ulong_t)&au6625_cfg },
  52         {},
  53 };
  54 MODULE_DEVICE_TABLE(pci, pci_ids);
  55
  56 void alcor_write8(struct alcor_pci_priv *priv, u8 val, unsigned int addr)
  57 {
  58         writeb(val, priv->iobase + addr);
  59 }
  60 EXPORT_SYMBOL_GPL(alcor_write8);
  61
  62 void alcor_write16(struct alcor_pci_priv *priv, u16 val, unsigned int addr)
  63 {
  64         writew(val, priv->iobase + addr);
  65 }
  66 EXPORT_SYMBOL_GPL(alcor_write16);
  67
  68 void alcor_write32(struct alcor_pci_priv *priv, u32 val, unsigned int addr)
  69 {
  70         writel(val, priv->iobase + addr);
  71 }
  72 EXPORT_SYMBOL_GPL(alcor_write32);
  73
  74 void alcor_write32be(struct alcor_pci_priv *priv, u32 val, unsigned int addr)
  75 {
  76         iowrite32be(val, priv->iobase + addr);
  77 }
  78 EXPORT_SYMBOL_GPL(alcor_write32be);
  79
  80 u8 alcor_read8(struct alcor_pci_priv *priv, unsigned int addr)
  81 {
  82         return readb(priv->iobase + addr);
  83 }
  84 EXPORT_SYMBOL_GPL(alcor_read8);
  85
  86 u32 alcor_read32(struct alcor_pci_priv *priv, unsigned int addr)
  87 {
  88         return readl(priv->iobase + addr);
  89 }
  90 EXPORT_SYMBOL_GPL(alcor_read32);
  91
  92 u32 alcor_read32be(struct alcor_pci_priv *priv, unsigned int addr)
  93 {
  94         return ioread32be(priv->iobase + addr);
  95 }
  96 EXPORT_SYMBOL_GPL(alcor_read32be);
  97
  98 static int alcor_pci_find_cap_offset(struct alcor_pci_priv *priv,
  99                                      struct pci_dev *pci)
 100 {
 101         int where;
 102         u8 val8;
 103         u32 val32;
 104
 105         where = ALCOR_CAP_START_OFFSET;
 106         pci_read_config_byte(pci, where, &val8);
 107         if (!val8)
 108                 return 0;
 109
 110         where = (int)val8;
 111         while (1) {
 112                 pci_read_config_dword(pci, where, &val32);
 113                 if (val32 == 0xffffffff) {
 114                         dev_dbg(priv->dev, "find_cap_offset invalid value %x.\n",
 115                                 val32);
 116                         return 0;
 117                 }
 118
 119                 if ((val32 & 0xff) == 0x10) {
 120                         dev_dbg(priv->dev, "pcie cap offset: %x\n", where);
 121                         return where;
 122                 }
 123
 124                 if ((val32 & 0xff00) == 0x00) {
 125                         dev_dbg(priv->dev, "pci_find_cap_offset invalid value %x.\n",
 126                                 val32);
 127                         break;
 128                 }
 129                 where = (int)((val32 >> 8) & 0xff);
 130         }
 131
 132         return 0;
 133 }
 134
 135 static void alcor_pci_init_check_aspm(struct alcor_pci_priv *priv)
 136 {
 137         struct pci_dev *pci;
 138         int where;
 139         u32 val32;
 140
 141         priv->pdev_cap_off    = alcor_pci_find_cap_offset(priv, priv->pdev);
 142         priv->parent_cap_off = alcor_pci_find_cap_offset(priv,
 143                                                          priv->parent_pdev);
 144
 145         if ((priv->pdev_cap_off == 0) || (priv->parent_cap_off == 0)) {
 146                 dev_dbg(priv->dev, "pci_cap_off: %x, parent_cap_off: %x\n",
 147                         priv->pdev_cap_off, priv->parent_cap_off);
 148                 return;
 149         }
 150
 151         /* link capability */
 152         pci   = priv->pdev;
 153         where = priv->pdev_cap_off + ALCOR_PCIE_LINK_CAP_OFFSET;
 154         pci_read_config_dword(pci, where, &val32);
 155         priv->pdev_aspm_cap = (u8)(val32 >> 10) & 0x03;
 156
 157         pci   = priv->parent_pdev;
 158         where = priv->parent_cap_off + ALCOR_PCIE_LINK_CAP_OFFSET;
 159         pci_read_config_dword(pci, where, &val32);
 160         priv->parent_aspm_cap = (u8)(val32 >> 10) & 0x03;
 161
 162         if (priv->pdev_aspm_cap != priv->parent_aspm_cap) {
 163                 u8 aspm_cap;
 164
 165                 dev_dbg(priv->dev, "pdev_aspm_cap: %x, parent_aspm_cap: %x\n",
 166                         priv->pdev_aspm_cap, priv->parent_aspm_cap);
 167                 aspm_cap = priv->pdev_aspm_cap & priv->parent_aspm_cap;
 168                 priv->pdev_aspm_cap    = aspm_cap;
 169                 priv->parent_aspm_cap = aspm_cap;
 170         }
 171
 172         dev_dbg(priv->dev, "ext_config_dev_aspm: %x, pdev_aspm_cap: %x\n",
 173                 priv->ext_config_dev_aspm, priv->pdev_aspm_cap);
 174         priv->ext_config_dev_aspm &= priv->pdev_aspm_cap;
 175 }
 176
 177 static void alcor_pci_aspm_ctrl(struct alcor_pci_priv *priv, u8 aspm_enable)
 178 {
 179         struct pci_dev *pci;
 180         u8 aspm_ctrl, i;
 181         int where;
 182         u32 val32;
 183
 184         if ((!priv->pdev_cap_off) || (!priv->parent_cap_off)) {
 185                 dev_dbg(priv->dev, "pci_cap_off: %x, parent_cap_off: %x\n",
 186                         priv->pdev_cap_off, priv->parent_cap_off);
 187                 return;
 188         }
 189
 190         if (!priv->pdev_aspm_cap)
 191                 return;
 192
 193         aspm_ctrl = 0;
 194         if (aspm_enable) {
 195                 aspm_ctrl = priv->ext_config_dev_aspm;
 196
 197                 if (!aspm_ctrl) {
 198                         dev_dbg(priv->dev, "aspm_ctrl == 0\n");
 199                         return;
 200                 }
 201         }
 202
 203         for (i = 0; i < 2; i++) {
 204
 205                 if (i) {
 206                         pci   = priv->parent_pdev;
 207                         where = priv->parent_cap_off
 208                                 + ALCOR_PCIE_LINK_CTRL_OFFSET;
 209                 } else {
 210                         pci   = priv->pdev;
 211                         where = priv->pdev_cap_off
 212                                 + ALCOR_PCIE_LINK_CTRL_OFFSET;
 213                 }
 214
 215                 pci_read_config_dword(pci, where, &val32);
 216                 val32 &= (~0x03);
 217                 val32 |= (aspm_ctrl & priv->pdev_aspm_cap);
 218                 pci_write_config_byte(pci, where, (u8)val32);
 219         }
 220
 221 }
 222
 223 static inline void alcor_mask_sd_irqs(struct alcor_pci_priv *priv)
 224 {
 225         alcor_write32(priv, 0, AU6601_REG_INT_ENABLE);
 226 }
 227
 228 static inline void alcor_unmask_sd_irqs(struct alcor_pci_priv *priv)
 229 {
 230         alcor_write32(priv, AU6601_INT_CMD_MASK | AU6601_INT_DATA_MASK |
 231                   AU6601_INT_CARD_INSERT | AU6601_INT_CARD_REMOVE |
 232                   AU6601_INT_OVER_CURRENT_ERR,
 233                   AU6601_REG_INT_ENABLE);
 234 }
 235
 236 static inline void alcor_mask_ms_irqs(struct alcor_pci_priv *priv)
 237 {
 238         alcor_write32(priv, 0, AU6601_MS_INT_ENABLE);
 239 }
 240
 241 static inline void alcor_unmask_ms_irqs(struct alcor_pci_priv *priv)
 242 {
 243         alcor_write32(priv, 0x3d00fa, AU6601_MS_INT_ENABLE);
 244 }
 245
 246 static int alcor_pci_probe(struct pci_dev *pdev,
 247                            const struct pci_device_id *ent)
 248 {
 249         struct alcor_dev_cfg *cfg;
 250         struct alcor_pci_priv *priv;
 251         int ret, i, bar = 0;
 252
 253         cfg = (void *)ent->driver_data;
 254
 255         ret = pcim_enable_device(pdev);
 256         if (ret)
 257                 return ret;
 258
 259         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 260         if (!priv)
 261                 return -ENOMEM;
 262
 263         ret = ida_simple_get(&alcor_pci_idr, 0, 0, GFP_KERNEL);
 264         if (ret < 0)
 265                 return ret;
 266         priv->id = ret;
 267
 268         priv->pdev = pdev;
 269         priv->parent_pdev = pdev->bus->self;
 270         priv->dev = &pdev->dev;
 271         priv->cfg = cfg;
 272         priv->irq = pdev->irq;
 273
 274         ret = pci_request_regions(pdev, DRV_NAME_ALCOR_PCI);
 275         if (ret) {
 276                 dev_err(&pdev->dev, "Cannot request region\n");
 277                 return -ENOMEM;
 278         }
 279
 280         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
 281                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
 282                 ret = -ENODEV;
 283                 goto error_release_regions;
 284         }
 285
 286         priv->iobase = pcim_iomap(pdev, bar, 0);
 287         if (!priv->iobase) {
 288                 ret = -ENOMEM;
 289                 goto error_release_regions;
 290         }
 291
 292         /* make sure irqs are disabled */
 293         alcor_write32(priv, 0, AU6601_REG_INT_ENABLE);
 294         alcor_write32(priv, 0, AU6601_MS_INT_ENABLE);
 295
 296         ret = dma_set_mask_and_coherent(priv->dev, AU6601_SDMA_MASK);
 297         if (ret) {
 298                 dev_err(priv->dev, "Failed to set DMA mask\n");
 299                 goto error_release_regions;
 300         }
 301
 302         pci_set_master(pdev);
 303         pci_set_drvdata(pdev, priv);
 304         alcor_pci_init_check_aspm(priv);
 305
 306         for (i = 0; i < ARRAY_SIZE(alcor_pci_cells); i++) {
 307                 alcor_pci_cells[i].platform_data = priv;
 308                 alcor_pci_cells[i].pdata_size = sizeof(*priv);
 309         }
 310         ret = mfd_add_devices(&pdev->dev, priv->id, alcor_pci_cells,
 311                         ARRAY_SIZE(alcor_pci_cells), NULL, 0, NULL);
 312         if (ret < 0)
 313                 goto error_release_regions;
 314
 315         alcor_pci_aspm_ctrl(priv, 0);
 316
 317         return 0;
 318
 319 error_release_regions:
 320         pci_release_regions(pdev);
 321         return ret;
 322 }
 323
 324 static void alcor_pci_remove(struct pci_dev *pdev)
 325 {
 326         struct alcor_pci_priv *priv;
 327
 328         priv = pci_get_drvdata(pdev);
 329
 330         alcor_pci_aspm_ctrl(priv, 1);
 331
 332         mfd_remove_devices(&pdev->dev);
 333
 334         ida_simple_remove(&alcor_pci_idr, priv->id);
 335
 336         pci_release_regions(pdev);
 337         pci_set_drvdata(pdev, NULL);
 338 }
 339
 340 #ifdef CONFIG_PM_SLEEP
 341 static int alcor_suspend(struct device *dev)
 342 {
 343         struct alcor_pci_priv *priv = dev_get_drvdata(dev);
 344
 345         alcor_pci_aspm_ctrl(priv, 1);
 346         return 0;
 347 }
 348
 349 static int alcor_resume(struct device *dev)
 350 {
 351
 352         struct alcor_pci_priv *priv = dev_get_drvdata(dev);
 353
 354         alcor_pci_aspm_ctrl(priv, 0);
 355         return 0;
 356 }
 357 #endif /* CONFIG_PM_SLEEP */
 358
 359 static SIMPLE_DEV_PM_OPS(alcor_pci_pm_ops, alcor_suspend, alcor_resume);
 360
 361 static struct pci_driver alcor_driver = {
 362         .name   =       DRV_NAME_ALCOR_PCI,
 363         .id_table =     pci_ids,
 364         .probe  =       alcor_pci_probe,
 365         .remove =       alcor_pci_remove,
 366         .driver =       {
 367                 .pm     = &alcor_pci_pm_ops
 368         },
 369 };
 370
 371 module_pci_driver(alcor_driver);
 372
 373 MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
 374 MODULE_DESCRIPTION("PCI driver for Alcor Micro AU6601 Secure Digital Host Controller Interface");
 375 MODULE_LICENSE("GPL");