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i3c: Simplify i3c_device_match_id()
[linux/fpc-iii.git] / drivers / i3c / master.c
blob925e1ed18a2aaaae262a1200d35244d5675f7de5
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19
20 #include "internals.h"
21
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24
25 /**
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
28 *
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
36 *
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
39 * back.
40 */
41 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42 {
43 down_write(&bus->lock);
44 }
45
46 /**
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48 * operation
49 * @bus: I3C bus to release the lock on
50 *
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
53 * operations are.
54 */
55 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56 {
57 up_write(&bus->lock);
58 }
59
60 /**
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
63 *
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
69 *
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
75 */
76 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77 {
78 down_read(&bus->lock);
79 }
80
81 /**
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
84 *
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
87 * are.
88 */
89 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90 {
91 up_read(&bus->lock);
92 }
93
94 static struct i3c_master_controller *
95 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96 {
97 return container_of(i3cbus, struct i3c_master_controller, bus);
98 }
99
100 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101 {
102 return container_of(dev, struct i3c_master_controller, dev);
103 }
104
105 static const struct device_type i3c_device_type;
106
107 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108 {
109 struct i3c_master_controller *master;
110
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
113
114 master = dev_to_i3cmaster(dev);
115
116 return &master->bus;
117 }
118
119 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120 {
121 struct i3c_master_controller *master;
122
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
125
126 master = dev_to_i3cmaster(dev);
127
128 return master->this;
129 }
130
131 static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
133 char *buf)
134 {
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
137 ssize_t ret;
138
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
143
144 return ret;
145 }
146 static DEVICE_ATTR_RO(bcr);
147
148 static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
150 char *buf)
151 {
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
154 ssize_t ret;
155
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
160
161 return ret;
162 }
163 static DEVICE_ATTR_RO(dcr);
164
165 static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
167 char *buf)
168 {
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
171 ssize_t ret;
172
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
177
178 return ret;
179 }
180 static DEVICE_ATTR_RO(pid);
181
182 static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
184 char *buf)
185 {
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
188 ssize_t ret;
189
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
194
195 return ret;
196 }
197 static DEVICE_ATTR_RO(dynamic_address);
198
199 static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
201 };
202
203 static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
205 char *buf)
206 {
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
210 unsigned long caps;
211 int mode;
212
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
218 break;
219
220 if (!hdrcap_strings[mode])
221 continue;
222
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
225 if (ret < 0)
226 goto out;
227
228 offset += ret;
229 }
230
231 ret = sprintf(buf + offset, "\n");
232 if (ret < 0)
233 goto out;
234
235 ret = offset + ret;
236
237 out:
238 i3c_bus_normaluse_unlock(bus);
239
240 return ret;
241 }
242 static DEVICE_ATTR_RO(hdrcap);
243
244 static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
246 {
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
250
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258 manuf);
259
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
262 }
263 static DEVICE_ATTR_RO(modalias);
264
265 static struct attribute *i3c_device_attrs[] = {
266 &dev_attr_bcr.attr,
267 &dev_attr_dcr.attr,
268 &dev_attr_pid.attr,
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
271 &dev_attr_modalias.attr,
272 NULL,
273 };
274 ATTRIBUTE_GROUPS(i3c_device);
275
276 static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277 {
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
281
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289 devinfo.dcr, manuf);
290
291 return add_uevent_var(env,
292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 devinfo.dcr, manuf, part, ext);
294 }
295
296 static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
299 };
300
301 static int i3c_device_match(struct device *dev, struct device_driver *drv)
302 {
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
305
306 if (dev->type != &i3c_device_type)
307 return 0;
308
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312 return 1;
313
314 return 0;
315 }
316
317 static int i3c_device_probe(struct device *dev)
318 {
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321
322 return driver->probe(i3cdev);
323 }
324
325 static int i3c_device_remove(struct device *dev)
326 {
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
329 int ret;
330
331 ret = driver->remove(i3cdev);
332 if (ret)
333 return ret;
334
335 i3c_device_free_ibi(i3cdev);
336
337 return ret;
338 }
339
340 struct bus_type i3c_bus_type = {
341 .name = "i3c",
342 .match = i3c_device_match,
343 .probe = i3c_device_probe,
344 .remove = i3c_device_remove,
345 };
346
347 static enum i3c_addr_slot_status
348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
349 {
350 int status, bitpos = addr * 2;
351
352 if (addr > I2C_MAX_ADDR)
353 return I3C_ADDR_SLOT_RSVD;
354
355 status = bus->addrslots[bitpos / BITS_PER_LONG];
356 status >>= bitpos % BITS_PER_LONG;
357
358 return status & I3C_ADDR_SLOT_STATUS_MASK;
359 }
360
361 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
362 enum i3c_addr_slot_status status)
363 {
364 int bitpos = addr * 2;
365 unsigned long *ptr;
366
367 if (addr > I2C_MAX_ADDR)
368 return;
369
370 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
371 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
372 (bitpos % BITS_PER_LONG));
373 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
374 }
375
376 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
377 {
378 enum i3c_addr_slot_status status;
379
380 status = i3c_bus_get_addr_slot_status(bus, addr);
381
382 return status == I3C_ADDR_SLOT_FREE;
383 }
384
385 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
386 {
387 enum i3c_addr_slot_status status;
388 u8 addr;
389
390 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
391 status = i3c_bus_get_addr_slot_status(bus, addr);
392 if (status == I3C_ADDR_SLOT_FREE)
393 return addr;
394 }
395
396 return -ENOMEM;
397 }
398
399 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
400 {
401 int i;
402
403 /* Addresses 0 to 7 are reserved. */
404 for (i = 0; i < 8; i++)
405 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
406
407 /*
408 * Reserve broadcast address and all addresses that might collide
409 * with the broadcast address when facing a single bit error.
410 */
411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
412 I3C_ADDR_SLOT_RSVD);
413 for (i = 0; i < 7; i++)
414 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
415 I3C_ADDR_SLOT_RSVD);
416 }
417
418 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
419 {
420 mutex_lock(&i3c_core_lock);
421 idr_remove(&i3c_bus_idr, i3cbus->id);
422 mutex_unlock(&i3c_core_lock);
423 }
424
425 static int i3c_bus_init(struct i3c_bus *i3cbus)
426 {
427 int ret;
428
429 init_rwsem(&i3cbus->lock);
430 INIT_LIST_HEAD(&i3cbus->devs.i2c);
431 INIT_LIST_HEAD(&i3cbus->devs.i3c);
432 i3c_bus_init_addrslots(i3cbus);
433 i3cbus->mode = I3C_BUS_MODE_PURE;
434
435 mutex_lock(&i3c_core_lock);
436 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
437 mutex_unlock(&i3c_core_lock);
438
439 if (ret < 0)
440 return ret;
441
442 i3cbus->id = ret;
443
444 return 0;
445 }
446
447 static const char * const i3c_bus_mode_strings[] = {
448 [I3C_BUS_MODE_PURE] = "pure",
449 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
450 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
451 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
452 };
453
454 static ssize_t mode_show(struct device *dev,
455 struct device_attribute *da,
456 char *buf)
457 {
458 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
459 ssize_t ret;
460
461 i3c_bus_normaluse_lock(i3cbus);
462 if (i3cbus->mode < 0 ||
463 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
464 !i3c_bus_mode_strings[i3cbus->mode])
465 ret = sprintf(buf, "unknown\n");
466 else
467 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
468 i3c_bus_normaluse_unlock(i3cbus);
469
470 return ret;
471 }
472 static DEVICE_ATTR_RO(mode);
473
474 static ssize_t current_master_show(struct device *dev,
475 struct device_attribute *da,
476 char *buf)
477 {
478 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
479 ssize_t ret;
480
481 i3c_bus_normaluse_lock(i3cbus);
482 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
483 i3cbus->cur_master->info.pid);
484 i3c_bus_normaluse_unlock(i3cbus);
485
486 return ret;
487 }
488 static DEVICE_ATTR_RO(current_master);
489
490 static ssize_t i3c_scl_frequency_show(struct device *dev,
491 struct device_attribute *da,
492 char *buf)
493 {
494 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
495 ssize_t ret;
496
497 i3c_bus_normaluse_lock(i3cbus);
498 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
499 i3c_bus_normaluse_unlock(i3cbus);
500
501 return ret;
502 }
503 static DEVICE_ATTR_RO(i3c_scl_frequency);
504
505 static ssize_t i2c_scl_frequency_show(struct device *dev,
506 struct device_attribute *da,
507 char *buf)
508 {
509 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
510 ssize_t ret;
511
512 i3c_bus_normaluse_lock(i3cbus);
513 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
514 i3c_bus_normaluse_unlock(i3cbus);
515
516 return ret;
517 }
518 static DEVICE_ATTR_RO(i2c_scl_frequency);
519
520 static struct attribute *i3c_masterdev_attrs[] = {
521 &dev_attr_mode.attr,
522 &dev_attr_current_master.attr,
523 &dev_attr_i3c_scl_frequency.attr,
524 &dev_attr_i2c_scl_frequency.attr,
525 &dev_attr_bcr.attr,
526 &dev_attr_dcr.attr,
527 &dev_attr_pid.attr,
528 &dev_attr_dynamic_address.attr,
529 &dev_attr_hdrcap.attr,
530 NULL,
531 };
532 ATTRIBUTE_GROUPS(i3c_masterdev);
533
534 static void i3c_masterdev_release(struct device *dev)
535 {
536 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
537 struct i3c_bus *bus = dev_to_i3cbus(dev);
538
539 if (master->wq)
540 destroy_workqueue(master->wq);
541
542 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
543 i3c_bus_cleanup(bus);
544
545 of_node_put(dev->of_node);
546 }
547
548 static const struct device_type i3c_masterdev_type = {
549 .groups = i3c_masterdev_groups,
550 };
551
552 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
553 unsigned long max_i2c_scl_rate)
554 {
555 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
556
557 i3cbus->mode = mode;
558
559 switch (i3cbus->mode) {
560 case I3C_BUS_MODE_PURE:
561 if (!i3cbus->scl_rate.i3c)
562 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
563 break;
564 case I3C_BUS_MODE_MIXED_FAST:
565 case I3C_BUS_MODE_MIXED_LIMITED:
566 if (!i3cbus->scl_rate.i3c)
567 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
568 if (!i3cbus->scl_rate.i2c)
569 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
570 break;
571 case I3C_BUS_MODE_MIXED_SLOW:
572 if (!i3cbus->scl_rate.i2c)
573 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
574 if (!i3cbus->scl_rate.i3c ||
575 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
576 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
577 break;
578 default:
579 return -EINVAL;
580 }
581
582 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
583 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
584
585 /*
586 * I3C/I2C frequency may have been overridden, check that user-provided
587 * values are not exceeding max possible frequency.
588 */
589 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
590 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
591 return -EINVAL;
592
593 return 0;
594 }
595
596 static struct i3c_master_controller *
597 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
598 {
599 return container_of(adap, struct i3c_master_controller, i2c);
600 }
601
602 static struct i2c_adapter *
603 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
604 {
605 return &master->i2c;
606 }
607
608 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
609 {
610 kfree(dev);
611 }
612
613 static struct i2c_dev_desc *
614 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
615 const struct i2c_dev_boardinfo *boardinfo)
616 {
617 struct i2c_dev_desc *dev;
618
619 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
620 if (!dev)
621 return ERR_PTR(-ENOMEM);
622
623 dev->common.master = master;
624 dev->boardinfo = boardinfo;
625 dev->addr = boardinfo->base.addr;
626 dev->lvr = boardinfo->lvr;
627
628 return dev;
629 }
630
631 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
632 u16 payloadlen)
633 {
634 dest->addr = addr;
635 dest->payload.len = payloadlen;
636 if (payloadlen)
637 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
638 else
639 dest->payload.data = NULL;
640
641 return dest->payload.data;
642 }
643
644 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
645 {
646 kfree(dest->payload.data);
647 }
648
649 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
650 struct i3c_ccc_cmd_dest *dests,
651 unsigned int ndests)
652 {
653 cmd->rnw = rnw ? 1 : 0;
654 cmd->id = id;
655 cmd->dests = dests;
656 cmd->ndests = ndests;
657 cmd->err = I3C_ERROR_UNKNOWN;
658 }
659
660 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
661 struct i3c_ccc_cmd *cmd)
662 {
663 int ret;
664
665 if (!cmd || !master)
666 return -EINVAL;
667
668 if (WARN_ON(master->init_done &&
669 !rwsem_is_locked(&master->bus.lock)))
670 return -EINVAL;
671
672 if (!master->ops->send_ccc_cmd)
673 return -ENOTSUPP;
674
675 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
676 return -EINVAL;
677
678 if (master->ops->supports_ccc_cmd &&
679 !master->ops->supports_ccc_cmd(master, cmd))
680 return -ENOTSUPP;
681
682 ret = master->ops->send_ccc_cmd(master, cmd);
683 if (ret) {
684 if (cmd->err != I3C_ERROR_UNKNOWN)
685 return cmd->err;
686
687 return ret;
688 }
689
690 return 0;
691 }
692
693 static struct i2c_dev_desc *
694 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
695 u16 addr)
696 {
697 struct i2c_dev_desc *dev;
698
699 i3c_bus_for_each_i2cdev(&master->bus, dev) {
700 if (dev->boardinfo->base.addr == addr)
701 return dev;
702 }
703
704 return NULL;
705 }
706
707 /**
708 * i3c_master_get_free_addr() - get a free address on the bus
709 * @master: I3C master object
710 * @start_addr: where to start searching
711 *
712 * This function must be called with the bus lock held in write mode.
713 *
714 * Return: the first free address starting at @start_addr (included) or -ENOMEM
715 * if there's no more address available.
716 */
717 int i3c_master_get_free_addr(struct i3c_master_controller *master,
718 u8 start_addr)
719 {
720 return i3c_bus_get_free_addr(&master->bus, start_addr);
721 }
722 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
723
724 static void i3c_device_release(struct device *dev)
725 {
726 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
727
728 WARN_ON(i3cdev->desc);
729
730 of_node_put(i3cdev->dev.of_node);
731 kfree(i3cdev);
732 }
733
734 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
735 {
736 kfree(dev);
737 }
738
739 static struct i3c_dev_desc *
740 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
741 const struct i3c_device_info *info)
742 {
743 struct i3c_dev_desc *dev;
744
745 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
746 if (!dev)
747 return ERR_PTR(-ENOMEM);
748
749 dev->common.master = master;
750 dev->info = *info;
751 mutex_init(&dev->ibi_lock);
752
753 return dev;
754 }
755
756 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
757 u8 addr)
758 {
759 enum i3c_addr_slot_status addrstat;
760 struct i3c_ccc_cmd_dest dest;
761 struct i3c_ccc_cmd cmd;
762 int ret;
763
764 if (!master)
765 return -EINVAL;
766
767 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
768 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
769 return -EINVAL;
770
771 i3c_ccc_cmd_dest_init(&dest, addr, 0);
772 i3c_ccc_cmd_init(&cmd, false,
773 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
774 &dest, 1);
775 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
776 i3c_ccc_cmd_dest_cleanup(&dest);
777
778 return ret;
779 }
780
781 /**
782 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
783 * procedure
784 * @master: master used to send frames on the bus
785 *
786 * Send a ENTDAA CCC command to start a DAA procedure.
787 *
788 * Note that this function only sends the ENTDAA CCC command, all the logic
789 * behind dynamic address assignment has to be handled in the I3C master
790 * driver.
791 *
792 * This function must be called with the bus lock held in write mode.
793 *
794 * Return: 0 in case of success, a positive I3C error code if the error is
795 * one of the official Mx error codes, and a negative error code otherwise.
796 */
797 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
798 {
799 struct i3c_ccc_cmd_dest dest;
800 struct i3c_ccc_cmd cmd;
801 int ret;
802
803 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
804 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
805 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
806 i3c_ccc_cmd_dest_cleanup(&dest);
807
808 return ret;
809 }
810 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
811
812 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
813 u8 addr, bool enable, u8 evts)
814 {
815 struct i3c_ccc_events *events;
816 struct i3c_ccc_cmd_dest dest;
817 struct i3c_ccc_cmd cmd;
818 int ret;
819
820 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
821 if (!events)
822 return -ENOMEM;
823
824 events->events = evts;
825 i3c_ccc_cmd_init(&cmd, false,
826 enable ?
827 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
828 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
829 &dest, 1);
830 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
831 i3c_ccc_cmd_dest_cleanup(&dest);
832
833 return ret;
834 }
835
836 /**
837 * i3c_master_disec_locked() - send a DISEC CCC command
838 * @master: master used to send frames on the bus
839 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
840 * @evts: events to disable
841 *
842 * Send a DISEC CCC command to disable some or all events coming from a
843 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
844 *
845 * This function must be called with the bus lock held in write mode.
846 *
847 * Return: 0 in case of success, a positive I3C error code if the error is
848 * one of the official Mx error codes, and a negative error code otherwise.
849 */
850 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
851 u8 evts)
852 {
853 return i3c_master_enec_disec_locked(master, addr, false, evts);
854 }
855 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
856
857 /**
858 * i3c_master_enec_locked() - send an ENEC CCC command
859 * @master: master used to send frames on the bus
860 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
861 * @evts: events to disable
862 *
863 * Sends an ENEC CCC command to enable some or all events coming from a
864 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
865 *
866 * This function must be called with the bus lock held in write mode.
867 *
868 * Return: 0 in case of success, a positive I3C error code if the error is
869 * one of the official Mx error codes, and a negative error code otherwise.
870 */
871 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
872 u8 evts)
873 {
874 return i3c_master_enec_disec_locked(master, addr, true, evts);
875 }
876 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
877
878 /**
879 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
880 * @master: master used to send frames on the bus
881 *
882 * Send a DEFSLVS CCC command containing all the devices known to the @master.
883 * This is useful when you have secondary masters on the bus to propagate
884 * device information.
885 *
886 * This should be called after all I3C devices have been discovered (in other
887 * words, after the DAA procedure has finished) and instantiated in
888 * &i3c_master_controller_ops->bus_init().
889 * It should also be called if a master ACKed an Hot-Join request and assigned
890 * a dynamic address to the device joining the bus.
891 *
892 * This function must be called with the bus lock held in write mode.
893 *
894 * Return: 0 in case of success, a positive I3C error code if the error is
895 * one of the official Mx error codes, and a negative error code otherwise.
896 */
897 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
898 {
899 struct i3c_ccc_defslvs *defslvs;
900 struct i3c_ccc_dev_desc *desc;
901 struct i3c_ccc_cmd_dest dest;
902 struct i3c_dev_desc *i3cdev;
903 struct i2c_dev_desc *i2cdev;
904 struct i3c_ccc_cmd cmd;
905 struct i3c_bus *bus;
906 bool send = false;
907 int ndevs = 0, ret;
908
909 if (!master)
910 return -EINVAL;
911
912 bus = i3c_master_get_bus(master);
913 i3c_bus_for_each_i3cdev(bus, i3cdev) {
914 ndevs++;
915
916 if (i3cdev == master->this)
917 continue;
918
919 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
920 I3C_BCR_I3C_MASTER)
921 send = true;
922 }
923
924 /* No other master on the bus, skip DEFSLVS. */
925 if (!send)
926 return 0;
927
928 i3c_bus_for_each_i2cdev(bus, i2cdev)
929 ndevs++;
930
931 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
932 struct_size(defslvs, slaves,
933 ndevs - 1));
934 if (!defslvs)
935 return -ENOMEM;
936
937 defslvs->count = ndevs;
938 defslvs->master.bcr = master->this->info.bcr;
939 defslvs->master.dcr = master->this->info.dcr;
940 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
941 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
942
943 desc = defslvs->slaves;
944 i3c_bus_for_each_i2cdev(bus, i2cdev) {
945 desc->lvr = i2cdev->lvr;
946 desc->static_addr = i2cdev->addr << 1;
947 desc++;
948 }
949
950 i3c_bus_for_each_i3cdev(bus, i3cdev) {
951 /* Skip the I3C dev representing this master. */
952 if (i3cdev == master->this)
953 continue;
954
955 desc->bcr = i3cdev->info.bcr;
956 desc->dcr = i3cdev->info.dcr;
957 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
958 desc->static_addr = i3cdev->info.static_addr << 1;
959 desc++;
960 }
961
962 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
963 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
964 i3c_ccc_cmd_dest_cleanup(&dest);
965
966 return ret;
967 }
968 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
969
970 static int i3c_master_setda_locked(struct i3c_master_controller *master,
971 u8 oldaddr, u8 newaddr, bool setdasa)
972 {
973 struct i3c_ccc_cmd_dest dest;
974 struct i3c_ccc_setda *setda;
975 struct i3c_ccc_cmd cmd;
976 int ret;
977
978 if (!oldaddr || !newaddr)
979 return -EINVAL;
980
981 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
982 if (!setda)
983 return -ENOMEM;
984
985 setda->addr = newaddr << 1;
986 i3c_ccc_cmd_init(&cmd, false,
987 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
988 &dest, 1);
989 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
990 i3c_ccc_cmd_dest_cleanup(&dest);
991
992 return ret;
993 }
994
995 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
996 u8 static_addr, u8 dyn_addr)
997 {
998 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
999 }
1000
1001 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1002 u8 oldaddr, u8 newaddr)
1003 {
1004 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1005 }
1006
1007 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1008 struct i3c_device_info *info)
1009 {
1010 struct i3c_ccc_cmd_dest dest;
1011 unsigned int expected_len;
1012 struct i3c_ccc_mrl *mrl;
1013 struct i3c_ccc_cmd cmd;
1014 int ret;
1015
1016 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1017 if (!mrl)
1018 return -ENOMEM;
1019
1020 /*
1021 * When the device does not have IBI payload GETMRL only returns 2
1022 * bytes of data.
1023 */
1024 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1025 dest.payload.len -= 1;
1026
1027 expected_len = dest.payload.len;
1028 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1029 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1030 if (ret)
1031 goto out;
1032
1033 if (dest.payload.len != expected_len) {
1034 ret = -EIO;
1035 goto out;
1036 }
1037
1038 info->max_read_len = be16_to_cpu(mrl->read_len);
1039
1040 if (info->bcr & I3C_BCR_IBI_PAYLOAD)
1041 info->max_ibi_len = mrl->ibi_len;
1042
1043 out:
1044 i3c_ccc_cmd_dest_cleanup(&dest);
1045
1046 return ret;
1047 }
1048
1049 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1050 struct i3c_device_info *info)
1051 {
1052 struct i3c_ccc_cmd_dest dest;
1053 struct i3c_ccc_mwl *mwl;
1054 struct i3c_ccc_cmd cmd;
1055 int ret;
1056
1057 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1058 if (!mwl)
1059 return -ENOMEM;
1060
1061 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1062 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1063 if (ret)
1064 goto out;
1065
1066 if (dest.payload.len != sizeof(*mwl)) {
1067 ret = -EIO;
1068 goto out;
1069 }
1070
1071 info->max_write_len = be16_to_cpu(mwl->len);
1072
1073 out:
1074 i3c_ccc_cmd_dest_cleanup(&dest);
1075
1076 return ret;
1077 }
1078
1079 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1080 struct i3c_device_info *info)
1081 {
1082 struct i3c_ccc_getmxds *getmaxds;
1083 struct i3c_ccc_cmd_dest dest;
1084 struct i3c_ccc_cmd cmd;
1085 int ret;
1086
1087 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1088 sizeof(*getmaxds));
1089 if (!getmaxds)
1090 return -ENOMEM;
1091
1092 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1093 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1094 if (ret)
1095 goto out;
1096
1097 if (dest.payload.len != 2 && dest.payload.len != 5) {
1098 ret = -EIO;
1099 goto out;
1100 }
1101
1102 info->max_read_ds = getmaxds->maxrd;
1103 info->max_write_ds = getmaxds->maxwr;
1104 if (dest.payload.len == 5)
1105 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1106 ((u32)getmaxds->maxrdturn[1] << 8) |
1107 ((u32)getmaxds->maxrdturn[2] << 16);
1108
1109 out:
1110 i3c_ccc_cmd_dest_cleanup(&dest);
1111
1112 return ret;
1113 }
1114
1115 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1116 struct i3c_device_info *info)
1117 {
1118 struct i3c_ccc_gethdrcap *gethdrcap;
1119 struct i3c_ccc_cmd_dest dest;
1120 struct i3c_ccc_cmd cmd;
1121 int ret;
1122
1123 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1124 sizeof(*gethdrcap));
1125 if (!gethdrcap)
1126 return -ENOMEM;
1127
1128 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1129 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1130 if (ret)
1131 goto out;
1132
1133 if (dest.payload.len != 1) {
1134 ret = -EIO;
1135 goto out;
1136 }
1137
1138 info->hdr_cap = gethdrcap->modes;
1139
1140 out:
1141 i3c_ccc_cmd_dest_cleanup(&dest);
1142
1143 return ret;
1144 }
1145
1146 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1147 struct i3c_device_info *info)
1148 {
1149 struct i3c_ccc_getpid *getpid;
1150 struct i3c_ccc_cmd_dest dest;
1151 struct i3c_ccc_cmd cmd;
1152 int ret, i;
1153
1154 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1155 if (!getpid)
1156 return -ENOMEM;
1157
1158 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1159 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1160 if (ret)
1161 goto out;
1162
1163 info->pid = 0;
1164 for (i = 0; i < sizeof(getpid->pid); i++) {
1165 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1166
1167 info->pid |= (u64)getpid->pid[i] << sft;
1168 }
1169
1170 out:
1171 i3c_ccc_cmd_dest_cleanup(&dest);
1172
1173 return ret;
1174 }
1175
1176 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1177 struct i3c_device_info *info)
1178 {
1179 struct i3c_ccc_getbcr *getbcr;
1180 struct i3c_ccc_cmd_dest dest;
1181 struct i3c_ccc_cmd cmd;
1182 int ret;
1183
1184 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1185 if (!getbcr)
1186 return -ENOMEM;
1187
1188 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1189 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1190 if (ret)
1191 goto out;
1192
1193 info->bcr = getbcr->bcr;
1194
1195 out:
1196 i3c_ccc_cmd_dest_cleanup(&dest);
1197
1198 return ret;
1199 }
1200
1201 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1202 struct i3c_device_info *info)
1203 {
1204 struct i3c_ccc_getdcr *getdcr;
1205 struct i3c_ccc_cmd_dest dest;
1206 struct i3c_ccc_cmd cmd;
1207 int ret;
1208
1209 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1210 if (!getdcr)
1211 return -ENOMEM;
1212
1213 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1214 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1215 if (ret)
1216 goto out;
1217
1218 info->dcr = getdcr->dcr;
1219
1220 out:
1221 i3c_ccc_cmd_dest_cleanup(&dest);
1222
1223 return ret;
1224 }
1225
1226 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1227 {
1228 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1229 enum i3c_addr_slot_status slot_status;
1230 int ret;
1231
1232 if (!dev->info.dyn_addr)
1233 return -EINVAL;
1234
1235 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1236 dev->info.dyn_addr);
1237 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1238 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1239 return -EINVAL;
1240
1241 ret = i3c_master_getpid_locked(master, &dev->info);
1242 if (ret)
1243 return ret;
1244
1245 ret = i3c_master_getbcr_locked(master, &dev->info);
1246 if (ret)
1247 return ret;
1248
1249 ret = i3c_master_getdcr_locked(master, &dev->info);
1250 if (ret)
1251 return ret;
1252
1253 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1254 ret = i3c_master_getmxds_locked(master, &dev->info);
1255 if (ret)
1256 return ret;
1257 }
1258
1259 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1260 dev->info.max_ibi_len = 1;
1261
1262 i3c_master_getmrl_locked(master, &dev->info);
1263 i3c_master_getmwl_locked(master, &dev->info);
1264
1265 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1266 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1267 if (ret)
1268 return ret;
1269 }
1270
1271 return 0;
1272 }
1273
1274 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1275 {
1276 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1277
1278 if (dev->info.static_addr)
1279 i3c_bus_set_addr_slot_status(&master->bus,
1280 dev->info.static_addr,
1281 I3C_ADDR_SLOT_FREE);
1282
1283 if (dev->info.dyn_addr)
1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1285 I3C_ADDR_SLOT_FREE);
1286
1287 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1288 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1289 I3C_ADDR_SLOT_FREE);
1290 }
1291
1292 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1293 {
1294 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1295 enum i3c_addr_slot_status status;
1296
1297 if (!dev->info.static_addr && !dev->info.dyn_addr)
1298 return 0;
1299
1300 if (dev->info.static_addr) {
1301 status = i3c_bus_get_addr_slot_status(&master->bus,
1302 dev->info.static_addr);
1303 if (status != I3C_ADDR_SLOT_FREE)
1304 return -EBUSY;
1305
1306 i3c_bus_set_addr_slot_status(&master->bus,
1307 dev->info.static_addr,
1308 I3C_ADDR_SLOT_I3C_DEV);
1309 }
1310
1311 /*
1312 * ->init_dyn_addr should have been reserved before that, so, if we're
1313 * trying to apply a pre-reserved dynamic address, we should not try
1314 * to reserve the address slot a second time.
1315 */
1316 if (dev->info.dyn_addr &&
1317 (!dev->boardinfo ||
1318 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1319 status = i3c_bus_get_addr_slot_status(&master->bus,
1320 dev->info.dyn_addr);
1321 if (status != I3C_ADDR_SLOT_FREE)
1322 goto err_release_static_addr;
1323
1324 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1325 I3C_ADDR_SLOT_I3C_DEV);
1326 }
1327
1328 return 0;
1329
1330 err_release_static_addr:
1331 if (dev->info.static_addr)
1332 i3c_bus_set_addr_slot_status(&master->bus,
1333 dev->info.static_addr,
1334 I3C_ADDR_SLOT_FREE);
1335
1336 return -EBUSY;
1337 }
1338
1339 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1340 struct i3c_dev_desc *dev)
1341 {
1342 int ret;
1343
1344 /*
1345 * We don't attach devices to the controller until they are
1346 * addressable on the bus.
1347 */
1348 if (!dev->info.static_addr && !dev->info.dyn_addr)
1349 return 0;
1350
1351 ret = i3c_master_get_i3c_addrs(dev);
1352 if (ret)
1353 return ret;
1354
1355 /* Do not attach the master device itself. */
1356 if (master->this != dev && master->ops->attach_i3c_dev) {
1357 ret = master->ops->attach_i3c_dev(dev);
1358 if (ret) {
1359 i3c_master_put_i3c_addrs(dev);
1360 return ret;
1361 }
1362 }
1363
1364 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1365
1366 return 0;
1367 }
1368
1369 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1370 u8 old_dyn_addr)
1371 {
1372 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1373 enum i3c_addr_slot_status status;
1374 int ret;
1375
1376 if (dev->info.dyn_addr != old_dyn_addr) {
1377 status = i3c_bus_get_addr_slot_status(&master->bus,
1378 dev->info.dyn_addr);
1379 if (status != I3C_ADDR_SLOT_FREE)
1380 return -EBUSY;
1381 i3c_bus_set_addr_slot_status(&master->bus,
1382 dev->info.dyn_addr,
1383 I3C_ADDR_SLOT_I3C_DEV);
1384 }
1385
1386 if (master->ops->reattach_i3c_dev) {
1387 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1388 if (ret) {
1389 i3c_master_put_i3c_addrs(dev);
1390 return ret;
1391 }
1392 }
1393
1394 return 0;
1395 }
1396
1397 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1398 {
1399 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1400
1401 /* Do not detach the master device itself. */
1402 if (master->this != dev && master->ops->detach_i3c_dev)
1403 master->ops->detach_i3c_dev(dev);
1404
1405 i3c_master_put_i3c_addrs(dev);
1406 list_del(&dev->common.node);
1407 }
1408
1409 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1410 struct i2c_dev_desc *dev)
1411 {
1412 int ret;
1413
1414 if (master->ops->attach_i2c_dev) {
1415 ret = master->ops->attach_i2c_dev(dev);
1416 if (ret)
1417 return ret;
1418 }
1419
1420 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1421
1422 return 0;
1423 }
1424
1425 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1426 {
1427 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1428
1429 list_del(&dev->common.node);
1430
1431 if (master->ops->detach_i2c_dev)
1432 master->ops->detach_i2c_dev(dev);
1433 }
1434
1435 static void i3c_master_pre_assign_dyn_addr(struct i3c_dev_desc *dev)
1436 {
1437 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1438 int ret;
1439
1440 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
1441 !dev->boardinfo->static_addr)
1442 return;
1443
1444 ret = i3c_master_setdasa_locked(master, dev->info.static_addr,
1445 dev->boardinfo->init_dyn_addr);
1446 if (ret)
1447 return;
1448
1449 dev->info.dyn_addr = dev->boardinfo->init_dyn_addr;
1450 ret = i3c_master_reattach_i3c_dev(dev, 0);
1451 if (ret)
1452 goto err_rstdaa;
1453
1454 ret = i3c_master_retrieve_dev_info(dev);
1455 if (ret)
1456 goto err_rstdaa;
1457
1458 return;
1459
1460 err_rstdaa:
1461 i3c_master_rstdaa_locked(master, dev->boardinfo->init_dyn_addr);
1462 }
1463
1464 static void
1465 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1466 {
1467 struct i3c_dev_desc *desc;
1468 int ret;
1469
1470 if (!master->init_done)
1471 return;
1472
1473 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1474 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1475 continue;
1476
1477 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1478 if (!desc->dev)
1479 continue;
1480
1481 desc->dev->bus = &master->bus;
1482 desc->dev->desc = desc;
1483 desc->dev->dev.parent = &master->dev;
1484 desc->dev->dev.type = &i3c_device_type;
1485 desc->dev->dev.bus = &i3c_bus_type;
1486 desc->dev->dev.release = i3c_device_release;
1487 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1488 desc->info.pid);
1489
1490 if (desc->boardinfo)
1491 desc->dev->dev.of_node = desc->boardinfo->of_node;
1492
1493 ret = device_register(&desc->dev->dev);
1494 if (ret)
1495 dev_err(&master->dev,
1496 "Failed to add I3C device (err = %d)\n", ret);
1497 }
1498 }
1499
1500 /**
1501 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1502 * @master: master doing the DAA
1503 *
1504 * This function is instantiating an I3C device object and adding it to the
1505 * I3C device list. All device information are automatically retrieved using
1506 * standard CCC commands.
1507 *
1508 * The I3C device object is returned in case the master wants to attach
1509 * private data to it using i3c_dev_set_master_data().
1510 *
1511 * This function must be called with the bus lock held in write mode.
1512 *
1513 * Return: a 0 in case of success, an negative error code otherwise.
1514 */
1515 int i3c_master_do_daa(struct i3c_master_controller *master)
1516 {
1517 int ret;
1518
1519 i3c_bus_maintenance_lock(&master->bus);
1520 ret = master->ops->do_daa(master);
1521 i3c_bus_maintenance_unlock(&master->bus);
1522
1523 if (ret)
1524 return ret;
1525
1526 i3c_bus_normaluse_lock(&master->bus);
1527 i3c_master_register_new_i3c_devs(master);
1528 i3c_bus_normaluse_unlock(&master->bus);
1529
1530 return 0;
1531 }
1532 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1533
1534 /**
1535 * i3c_master_set_info() - set master device information
1536 * @master: master used to send frames on the bus
1537 * @info: I3C device information
1538 *
1539 * Set master device info. This should be called from
1540 * &i3c_master_controller_ops->bus_init().
1541 *
1542 * Not all &i3c_device_info fields are meaningful for a master device.
1543 * Here is a list of fields that should be properly filled:
1544 *
1545 * - &i3c_device_info->dyn_addr
1546 * - &i3c_device_info->bcr
1547 * - &i3c_device_info->dcr
1548 * - &i3c_device_info->pid
1549 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1550 * &i3c_device_info->bcr
1551 *
1552 * This function must be called with the bus lock held in maintenance mode.
1553 *
1554 * Return: 0 if @info contains valid information (not every piece of
1555 * information can be checked, but we can at least make sure @info->dyn_addr
1556 * and @info->bcr are correct), -EINVAL otherwise.
1557 */
1558 int i3c_master_set_info(struct i3c_master_controller *master,
1559 const struct i3c_device_info *info)
1560 {
1561 struct i3c_dev_desc *i3cdev;
1562 int ret;
1563
1564 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1565 return -EINVAL;
1566
1567 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1568 master->secondary)
1569 return -EINVAL;
1570
1571 if (master->this)
1572 return -EINVAL;
1573
1574 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1575 if (IS_ERR(i3cdev))
1576 return PTR_ERR(i3cdev);
1577
1578 master->this = i3cdev;
1579 master->bus.cur_master = master->this;
1580
1581 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1582 if (ret)
1583 goto err_free_dev;
1584
1585 return 0;
1586
1587 err_free_dev:
1588 i3c_master_free_i3c_dev(i3cdev);
1589
1590 return ret;
1591 }
1592 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1593
1594 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1595 {
1596 struct i3c_dev_desc *i3cdev, *i3ctmp;
1597 struct i2c_dev_desc *i2cdev, *i2ctmp;
1598
1599 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1600 common.node) {
1601 i3c_master_detach_i3c_dev(i3cdev);
1602
1603 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1604 i3c_bus_set_addr_slot_status(&master->bus,
1605 i3cdev->boardinfo->init_dyn_addr,
1606 I3C_ADDR_SLOT_FREE);
1607
1608 i3c_master_free_i3c_dev(i3cdev);
1609 }
1610
1611 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1612 common.node) {
1613 i3c_master_detach_i2c_dev(i2cdev);
1614 i3c_bus_set_addr_slot_status(&master->bus,
1615 i2cdev->addr,
1616 I3C_ADDR_SLOT_FREE);
1617 i3c_master_free_i2c_dev(i2cdev);
1618 }
1619 }
1620
1621 /**
1622 * i3c_master_bus_init() - initialize an I3C bus
1623 * @master: main master initializing the bus
1624 *
1625 * This function is following all initialisation steps described in the I3C
1626 * specification:
1627 *
1628 * 1. Attach I2C and statically defined I3C devs to the master so that the
1629 * master can fill its internal device table appropriately
1630 *
1631 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1632 * the master controller. That's usually where the bus mode is selected
1633 * (pure bus or mixed fast/slow bus)
1634 *
1635 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1636 * particularly important when the bus was previously configured by someone
1637 * else (for example the bootloader)
1638 *
1639 * 4. Disable all slave events.
1640 *
1641 * 5. Pre-assign dynamic addresses requested by the FW with SETDASA for I3C
1642 * devices that have a static address
1643 *
1644 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1645 * remaining I3C devices
1646 *
1647 * Once this is done, all I3C and I2C devices should be usable.
1648 *
1649 * Return: a 0 in case of success, an negative error code otherwise.
1650 */
1651 static int i3c_master_bus_init(struct i3c_master_controller *master)
1652 {
1653 enum i3c_addr_slot_status status;
1654 struct i2c_dev_boardinfo *i2cboardinfo;
1655 struct i3c_dev_boardinfo *i3cboardinfo;
1656 struct i3c_dev_desc *i3cdev;
1657 struct i2c_dev_desc *i2cdev;
1658 int ret;
1659
1660 /*
1661 * First attach all devices with static definitions provided by the
1662 * FW.
1663 */
1664 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1665 status = i3c_bus_get_addr_slot_status(&master->bus,
1666 i2cboardinfo->base.addr);
1667 if (status != I3C_ADDR_SLOT_FREE) {
1668 ret = -EBUSY;
1669 goto err_detach_devs;
1670 }
1671
1672 i3c_bus_set_addr_slot_status(&master->bus,
1673 i2cboardinfo->base.addr,
1674 I3C_ADDR_SLOT_I2C_DEV);
1675
1676 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1677 if (IS_ERR(i2cdev)) {
1678 ret = PTR_ERR(i2cdev);
1679 goto err_detach_devs;
1680 }
1681
1682 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1683 if (ret) {
1684 i3c_master_free_i2c_dev(i2cdev);
1685 goto err_detach_devs;
1686 }
1687 }
1688 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1689 struct i3c_device_info info = {
1690 .static_addr = i3cboardinfo->static_addr,
1691 };
1692
1693 if (i3cboardinfo->init_dyn_addr) {
1694 status = i3c_bus_get_addr_slot_status(&master->bus,
1695 i3cboardinfo->init_dyn_addr);
1696 if (status != I3C_ADDR_SLOT_FREE) {
1697 ret = -EBUSY;
1698 goto err_detach_devs;
1699 }
1700 }
1701
1702 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1703 if (IS_ERR(i3cdev)) {
1704 ret = PTR_ERR(i3cdev);
1705 goto err_detach_devs;
1706 }
1707
1708 i3cdev->boardinfo = i3cboardinfo;
1709
1710 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1711 if (ret) {
1712 i3c_master_free_i3c_dev(i3cdev);
1713 goto err_detach_devs;
1714 }
1715 }
1716
1717 /*
1718 * Now execute the controller specific ->bus_init() routine, which
1719 * might configure its internal logic to match the bus limitations.
1720 */
1721 ret = master->ops->bus_init(master);
1722 if (ret)
1723 goto err_detach_devs;
1724
1725 /*
1726 * The master device should have been instantiated in ->bus_init(),
1727 * complain if this was not the case.
1728 */
1729 if (!master->this) {
1730 dev_err(&master->dev,
1731 "master_set_info() was not called in ->bus_init()\n");
1732 ret = -EINVAL;
1733 goto err_bus_cleanup;
1734 }
1735
1736 /*
1737 * Reset all dynamic address that may have been assigned before
1738 * (assigned by the bootloader for example).
1739 */
1740 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1741 if (ret && ret != I3C_ERROR_M2)
1742 goto err_bus_cleanup;
1743
1744 /* Disable all slave events before starting DAA. */
1745 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1746 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1747 I3C_CCC_EVENT_HJ);
1748 if (ret && ret != I3C_ERROR_M2)
1749 goto err_bus_cleanup;
1750
1751 /*
1752 * Pre-assign dynamic address and retrieve device information if
1753 * needed.
1754 */
1755 i3c_bus_for_each_i3cdev(&master->bus, i3cdev)
1756 i3c_master_pre_assign_dyn_addr(i3cdev);
1757
1758 ret = i3c_master_do_daa(master);
1759 if (ret)
1760 goto err_rstdaa;
1761
1762 return 0;
1763
1764 err_rstdaa:
1765 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1766
1767 err_bus_cleanup:
1768 if (master->ops->bus_cleanup)
1769 master->ops->bus_cleanup(master);
1770
1771 err_detach_devs:
1772 i3c_master_detach_free_devs(master);
1773
1774 return ret;
1775 }
1776
1777 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1778 {
1779 if (master->ops->bus_cleanup)
1780 master->ops->bus_cleanup(master);
1781
1782 i3c_master_detach_free_devs(master);
1783 }
1784
1785 static struct i3c_dev_desc *
1786 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1787 {
1788 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1789 struct i3c_dev_desc *i3cdev;
1790
1791 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1792 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1793 return i3cdev;
1794 }
1795
1796 return NULL;
1797 }
1798
1799 /**
1800 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1801 * @master: master used to send frames on the bus
1802 * @addr: I3C slave dynamic address assigned to the device
1803 *
1804 * This function is instantiating an I3C device object and adding it to the
1805 * I3C device list. All device information are automatically retrieved using
1806 * standard CCC commands.
1807 *
1808 * The I3C device object is returned in case the master wants to attach
1809 * private data to it using i3c_dev_set_master_data().
1810 *
1811 * This function must be called with the bus lock held in write mode.
1812 *
1813 * Return: a 0 in case of success, an negative error code otherwise.
1814 */
1815 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1816 u8 addr)
1817 {
1818 struct i3c_device_info info = { .dyn_addr = addr };
1819 struct i3c_dev_desc *newdev, *olddev;
1820 u8 old_dyn_addr = addr, expected_dyn_addr;
1821 struct i3c_ibi_setup ibireq = { };
1822 bool enable_ibi = false;
1823 int ret;
1824
1825 if (!master)
1826 return -EINVAL;
1827
1828 newdev = i3c_master_alloc_i3c_dev(master, &info);
1829 if (IS_ERR(newdev))
1830 return PTR_ERR(newdev);
1831
1832 ret = i3c_master_attach_i3c_dev(master, newdev);
1833 if (ret)
1834 goto err_free_dev;
1835
1836 ret = i3c_master_retrieve_dev_info(newdev);
1837 if (ret)
1838 goto err_detach_dev;
1839
1840 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1841 if (olddev) {
1842 newdev->boardinfo = olddev->boardinfo;
1843 newdev->info.static_addr = olddev->info.static_addr;
1844 newdev->dev = olddev->dev;
1845 if (newdev->dev)
1846 newdev->dev->desc = newdev;
1847
1848 /*
1849 * We need to restore the IBI state too, so let's save the
1850 * IBI information and try to restore them after olddev has
1851 * been detached+released and its IBI has been stopped and
1852 * the associated resources have been freed.
1853 */
1854 mutex_lock(&olddev->ibi_lock);
1855 if (olddev->ibi) {
1856 ibireq.handler = olddev->ibi->handler;
1857 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1858 ibireq.num_slots = olddev->ibi->num_slots;
1859
1860 if (olddev->ibi->enabled) {
1861 enable_ibi = true;
1862 i3c_dev_disable_ibi_locked(olddev);
1863 }
1864
1865 i3c_dev_free_ibi_locked(olddev);
1866 }
1867 mutex_unlock(&olddev->ibi_lock);
1868
1869 old_dyn_addr = olddev->info.dyn_addr;
1870
1871 i3c_master_detach_i3c_dev(olddev);
1872 i3c_master_free_i3c_dev(olddev);
1873 }
1874
1875 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1876 if (ret)
1877 goto err_detach_dev;
1878
1879 /*
1880 * Depending on our previous state, the expected dynamic address might
1881 * differ:
1882 * - if the device already had a dynamic address assigned, let's try to
1883 * re-apply this one
1884 * - if the device did not have a dynamic address and the firmware
1885 * requested a specific address, pick this one
1886 * - in any other case, keep the address automatically assigned by the
1887 * master
1888 */
1889 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1890 expected_dyn_addr = old_dyn_addr;
1891 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1892 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1893 else
1894 expected_dyn_addr = newdev->info.dyn_addr;
1895
1896 if (newdev->info.dyn_addr != expected_dyn_addr) {
1897 /*
1898 * Try to apply the expected dynamic address. If it fails, keep
1899 * the address assigned by the master.
1900 */
1901 ret = i3c_master_setnewda_locked(master,
1902 newdev->info.dyn_addr,
1903 expected_dyn_addr);
1904 if (!ret) {
1905 old_dyn_addr = newdev->info.dyn_addr;
1906 newdev->info.dyn_addr = expected_dyn_addr;
1907 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1908 } else {
1909 dev_err(&master->dev,
1910 "Failed to assign reserved/old address to device %d%llx",
1911 master->bus.id, newdev->info.pid);
1912 }
1913 }
1914
1915 /*
1916 * Now is time to try to restore the IBI setup. If we're lucky,
1917 * everything works as before, otherwise, all we can do is complain.
1918 * FIXME: maybe we should add callback to inform the driver that it
1919 * should request the IBI again instead of trying to hide that from
1920 * him.
1921 */
1922 if (ibireq.handler) {
1923 mutex_lock(&newdev->ibi_lock);
1924 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1925 if (ret) {
1926 dev_err(&master->dev,
1927 "Failed to request IBI on device %d-%llx",
1928 master->bus.id, newdev->info.pid);
1929 } else if (enable_ibi) {
1930 ret = i3c_dev_enable_ibi_locked(newdev);
1931 if (ret)
1932 dev_err(&master->dev,
1933 "Failed to re-enable IBI on device %d-%llx",
1934 master->bus.id, newdev->info.pid);
1935 }
1936 mutex_unlock(&newdev->ibi_lock);
1937 }
1938
1939 return 0;
1940
1941 err_detach_dev:
1942 if (newdev->dev && newdev->dev->desc)
1943 newdev->dev->desc = NULL;
1944
1945 i3c_master_detach_i3c_dev(newdev);
1946
1947 err_free_dev:
1948 i3c_master_free_i3c_dev(newdev);
1949
1950 return ret;
1951 }
1952 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1953
1954 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1955
1956 static int
1957 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1958 struct device_node *node, u32 *reg)
1959 {
1960 struct i2c_dev_boardinfo *boardinfo;
1961 struct device *dev = &master->dev;
1962 int ret;
1963
1964 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
1965 if (!boardinfo)
1966 return -ENOMEM;
1967
1968 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
1969 if (ret)
1970 return ret;
1971
1972 /*
1973 * The I3C Specification does not clearly say I2C devices with 10-bit
1974 * address are supported. These devices can't be passed properly through
1975 * DEFSLVS command.
1976 */
1977 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
1978 dev_err(dev, "I2C device with 10 bit address not supported.");
1979 return -ENOTSUPP;
1980 }
1981
1982 /* LVR is encoded in reg[2]. */
1983 boardinfo->lvr = reg[2];
1984
1985 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
1986 of_node_get(node);
1987
1988 return 0;
1989 }
1990
1991 static int
1992 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
1993 struct device_node *node, u32 *reg)
1994 {
1995 struct i3c_dev_boardinfo *boardinfo;
1996 struct device *dev = &master->dev;
1997 enum i3c_addr_slot_status addrstatus;
1998 u32 init_dyn_addr = 0;
1999
2000 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2001 if (!boardinfo)
2002 return -ENOMEM;
2003
2004 if (reg[0]) {
2005 if (reg[0] > I3C_MAX_ADDR)
2006 return -EINVAL;
2007
2008 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2009 reg[0]);
2010 if (addrstatus != I3C_ADDR_SLOT_FREE)
2011 return -EINVAL;
2012 }
2013
2014 boardinfo->static_addr = reg[0];
2015
2016 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2017 if (init_dyn_addr > I3C_MAX_ADDR)
2018 return -EINVAL;
2019
2020 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2021 init_dyn_addr);
2022 if (addrstatus != I3C_ADDR_SLOT_FREE)
2023 return -EINVAL;
2024 }
2025
2026 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2027
2028 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2029 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2030 return -EINVAL;
2031
2032 boardinfo->init_dyn_addr = init_dyn_addr;
2033 boardinfo->of_node = of_node_get(node);
2034 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2035
2036 return 0;
2037 }
2038
2039 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2040 struct device_node *node)
2041 {
2042 u32 reg[3];
2043 int ret;
2044
2045 if (!master || !node)
2046 return -EINVAL;
2047
2048 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2049 if (ret)
2050 return ret;
2051
2052 /*
2053 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2054 * dealing with an I2C device.
2055 */
2056 if (!reg[1])
2057 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2058 else
2059 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2060
2061 return ret;
2062 }
2063
2064 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2065 {
2066 struct device *dev = &master->dev;
2067 struct device_node *i3cbus_np = dev->of_node;
2068 struct device_node *node;
2069 int ret;
2070 u32 val;
2071
2072 if (!i3cbus_np)
2073 return 0;
2074
2075 for_each_available_child_of_node(i3cbus_np, node) {
2076 ret = of_i3c_master_add_dev(master, node);
2077 if (ret) {
2078 of_node_put(node);
2079 return ret;
2080 }
2081 }
2082
2083 /*
2084 * The user might want to limit I2C and I3C speed in case some devices
2085 * on the bus are not supporting typical rates, or if the bus topology
2086 * prevents it from using max possible rate.
2087 */
2088 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2089 master->bus.scl_rate.i2c = val;
2090
2091 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2092 master->bus.scl_rate.i3c = val;
2093
2094 return 0;
2095 }
2096
2097 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2098 struct i2c_msg *xfers, int nxfers)
2099 {
2100 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2101 struct i2c_dev_desc *dev;
2102 int i, ret;
2103 u16 addr;
2104
2105 if (!xfers || !master || nxfers <= 0)
2106 return -EINVAL;
2107
2108 if (!master->ops->i2c_xfers)
2109 return -ENOTSUPP;
2110
2111 /* Doing transfers to different devices is not supported. */
2112 addr = xfers[0].addr;
2113 for (i = 1; i < nxfers; i++) {
2114 if (addr != xfers[i].addr)
2115 return -ENOTSUPP;
2116 }
2117
2118 i3c_bus_normaluse_lock(&master->bus);
2119 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2120 if (!dev)
2121 ret = -ENOENT;
2122 else
2123 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2124 i3c_bus_normaluse_unlock(&master->bus);
2125
2126 return ret ? ret : nxfers;
2127 }
2128
2129 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2130 {
2131 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2132 }
2133
2134 static const struct i2c_algorithm i3c_master_i2c_algo = {
2135 .master_xfer = i3c_master_i2c_adapter_xfer,
2136 .functionality = i3c_master_i2c_funcs,
2137 };
2138
2139 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2140 {
2141 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2142 struct i2c_dev_desc *i2cdev;
2143 int ret;
2144
2145 adap->dev.parent = master->dev.parent;
2146 adap->owner = master->dev.parent->driver->owner;
2147 adap->algo = &i3c_master_i2c_algo;
2148 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2149
2150 /* FIXME: Should we allow i3c masters to override these values? */
2151 adap->timeout = 1000;
2152 adap->retries = 3;
2153
2154 ret = i2c_add_adapter(adap);
2155 if (ret)
2156 return ret;
2157
2158 /*
2159 * We silently ignore failures here. The bus should keep working
2160 * correctly even if one or more i2c devices are not registered.
2161 */
2162 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2163 i2cdev->dev = i2c_new_device(adap, &i2cdev->boardinfo->base);
2164
2165 return 0;
2166 }
2167
2168 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2169 {
2170 struct i2c_dev_desc *i2cdev;
2171
2172 i2c_del_adapter(&master->i2c);
2173
2174 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2175 i2cdev->dev = NULL;
2176 }
2177
2178 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2179 {
2180 struct i3c_dev_desc *i3cdev;
2181
2182 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2183 if (!i3cdev->dev)
2184 continue;
2185
2186 i3cdev->dev->desc = NULL;
2187 if (device_is_registered(&i3cdev->dev->dev))
2188 device_unregister(&i3cdev->dev->dev);
2189 else
2190 put_device(&i3cdev->dev->dev);
2191 i3cdev->dev = NULL;
2192 }
2193 }
2194
2195 /**
2196 * i3c_master_queue_ibi() - Queue an IBI
2197 * @dev: the device this IBI is coming from
2198 * @slot: the IBI slot used to store the payload
2199 *
2200 * Queue an IBI to the controller workqueue. The IBI handler attached to
2201 * the dev will be called from a workqueue context.
2202 */
2203 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2204 {
2205 atomic_inc(&dev->ibi->pending_ibis);
2206 queue_work(dev->common.master->wq, &slot->work);
2207 }
2208 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2209
2210 static void i3c_master_handle_ibi(struct work_struct *work)
2211 {
2212 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2213 work);
2214 struct i3c_dev_desc *dev = slot->dev;
2215 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2216 struct i3c_ibi_payload payload;
2217
2218 payload.data = slot->data;
2219 payload.len = slot->len;
2220
2221 if (dev->dev)
2222 dev->ibi->handler(dev->dev, &payload);
2223
2224 master->ops->recycle_ibi_slot(dev, slot);
2225 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2226 complete(&dev->ibi->all_ibis_handled);
2227 }
2228
2229 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2230 struct i3c_ibi_slot *slot)
2231 {
2232 slot->dev = dev;
2233 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2234 }
2235
2236 struct i3c_generic_ibi_slot {
2237 struct list_head node;
2238 struct i3c_ibi_slot base;
2239 };
2240
2241 struct i3c_generic_ibi_pool {
2242 spinlock_t lock;
2243 unsigned int num_slots;
2244 struct i3c_generic_ibi_slot *slots;
2245 void *payload_buf;
2246 struct list_head free_slots;
2247 struct list_head pending;
2248 };
2249
2250 /**
2251 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2252 * @pool: the IBI pool to free
2253 *
2254 * Free all IBI slots allated by a generic IBI pool.
2255 */
2256 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2257 {
2258 struct i3c_generic_ibi_slot *slot;
2259 unsigned int nslots = 0;
2260
2261 while (!list_empty(&pool->free_slots)) {
2262 slot = list_first_entry(&pool->free_slots,
2263 struct i3c_generic_ibi_slot, node);
2264 list_del(&slot->node);
2265 nslots++;
2266 }
2267
2268 /*
2269 * If the number of freed slots is not equal to the number of allocated
2270 * slots we have a leak somewhere.
2271 */
2272 WARN_ON(nslots != pool->num_slots);
2273
2274 kfree(pool->payload_buf);
2275 kfree(pool->slots);
2276 kfree(pool);
2277 }
2278 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2279
2280 /**
2281 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2282 * @dev: the device this pool will be used for
2283 * @req: IBI setup request describing what the device driver expects
2284 *
2285 * Create a generic IBI pool based on the information provided in @req.
2286 *
2287 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2288 */
2289 struct i3c_generic_ibi_pool *
2290 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2291 const struct i3c_ibi_setup *req)
2292 {
2293 struct i3c_generic_ibi_pool *pool;
2294 struct i3c_generic_ibi_slot *slot;
2295 unsigned int i;
2296 int ret;
2297
2298 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2299 if (!pool)
2300 return ERR_PTR(-ENOMEM);
2301
2302 spin_lock_init(&pool->lock);
2303 INIT_LIST_HEAD(&pool->free_slots);
2304 INIT_LIST_HEAD(&pool->pending);
2305
2306 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2307 if (!pool->slots) {
2308 ret = -ENOMEM;
2309 goto err_free_pool;
2310 }
2311
2312 if (req->max_payload_len) {
2313 pool->payload_buf = kcalloc(req->num_slots,
2314 req->max_payload_len, GFP_KERNEL);
2315 if (!pool->payload_buf) {
2316 ret = -ENOMEM;
2317 goto err_free_pool;
2318 }
2319 }
2320
2321 for (i = 0; i < req->num_slots; i++) {
2322 slot = &pool->slots[i];
2323 i3c_master_init_ibi_slot(dev, &slot->base);
2324
2325 if (req->max_payload_len)
2326 slot->base.data = pool->payload_buf +
2327 (i * req->max_payload_len);
2328
2329 list_add_tail(&slot->node, &pool->free_slots);
2330 pool->num_slots++;
2331 }
2332
2333 return pool;
2334
2335 err_free_pool:
2336 i3c_generic_ibi_free_pool(pool);
2337 return ERR_PTR(ret);
2338 }
2339 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2340
2341 /**
2342 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2343 * @pool: the pool to query an IBI slot on
2344 *
2345 * Search for a free slot in a generic IBI pool.
2346 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2347 * when it's no longer needed.
2348 *
2349 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2350 */
2351 struct i3c_ibi_slot *
2352 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2353 {
2354 struct i3c_generic_ibi_slot *slot;
2355 unsigned long flags;
2356
2357 spin_lock_irqsave(&pool->lock, flags);
2358 slot = list_first_entry_or_null(&pool->free_slots,
2359 struct i3c_generic_ibi_slot, node);
2360 if (slot)
2361 list_del(&slot->node);
2362 spin_unlock_irqrestore(&pool->lock, flags);
2363
2364 return slot ? &slot->base : NULL;
2365 }
2366 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2367
2368 /**
2369 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2370 * @pool: the pool to return the IBI slot to
2371 * @s: IBI slot to recycle
2372 *
2373 * Add an IBI slot back to its generic IBI pool. Should be called from the
2374 * master driver struct_master_controller_ops->recycle_ibi() method.
2375 */
2376 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2377 struct i3c_ibi_slot *s)
2378 {
2379 struct i3c_generic_ibi_slot *slot;
2380 unsigned long flags;
2381
2382 if (!s)
2383 return;
2384
2385 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2386 spin_lock_irqsave(&pool->lock, flags);
2387 list_add_tail(&slot->node, &pool->free_slots);
2388 spin_unlock_irqrestore(&pool->lock, flags);
2389 }
2390 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2391
2392 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2393 {
2394 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2395 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2396 return -EINVAL;
2397
2398 if (ops->request_ibi &&
2399 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2400 !ops->recycle_ibi_slot))
2401 return -EINVAL;
2402
2403 return 0;
2404 }
2405
2406 /**
2407 * i3c_master_register() - register an I3C master
2408 * @master: master used to send frames on the bus
2409 * @parent: the parent device (the one that provides this I3C master
2410 * controller)
2411 * @ops: the master controller operations
2412 * @secondary: true if you are registering a secondary master. Will return
2413 * -ENOTSUPP if set to true since secondary masters are not yet
2414 * supported
2415 *
2416 * This function takes care of everything for you:
2417 *
2418 * - creates and initializes the I3C bus
2419 * - populates the bus with static I2C devs if @parent->of_node is not
2420 * NULL
2421 * - registers all I3C devices added by the controller during bus
2422 * initialization
2423 * - registers the I2C adapter and all I2C devices
2424 *
2425 * Return: 0 in case of success, a negative error code otherwise.
2426 */
2427 int i3c_master_register(struct i3c_master_controller *master,
2428 struct device *parent,
2429 const struct i3c_master_controller_ops *ops,
2430 bool secondary)
2431 {
2432 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2433 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2434 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2435 struct i2c_dev_boardinfo *i2cbi;
2436 int ret;
2437
2438 /* We do not support secondary masters yet. */
2439 if (secondary)
2440 return -ENOTSUPP;
2441
2442 ret = i3c_master_check_ops(ops);
2443 if (ret)
2444 return ret;
2445
2446 master->dev.parent = parent;
2447 master->dev.of_node = of_node_get(parent->of_node);
2448 master->dev.bus = &i3c_bus_type;
2449 master->dev.type = &i3c_masterdev_type;
2450 master->dev.release = i3c_masterdev_release;
2451 master->ops = ops;
2452 master->secondary = secondary;
2453 INIT_LIST_HEAD(&master->boardinfo.i2c);
2454 INIT_LIST_HEAD(&master->boardinfo.i3c);
2455
2456 ret = i3c_bus_init(i3cbus);
2457 if (ret)
2458 return ret;
2459
2460 device_initialize(&master->dev);
2461 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2462
2463 ret = of_populate_i3c_bus(master);
2464 if (ret)
2465 goto err_put_dev;
2466
2467 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2468 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2469 case I3C_LVR_I2C_INDEX(0):
2470 if (mode < I3C_BUS_MODE_MIXED_FAST)
2471 mode = I3C_BUS_MODE_MIXED_FAST;
2472 break;
2473 case I3C_LVR_I2C_INDEX(1):
2474 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2475 mode = I3C_BUS_MODE_MIXED_LIMITED;
2476 break;
2477 case I3C_LVR_I2C_INDEX(2):
2478 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2479 mode = I3C_BUS_MODE_MIXED_SLOW;
2480 break;
2481 default:
2482 ret = -EINVAL;
2483 goto err_put_dev;
2484 }
2485
2486 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2487 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2488 }
2489
2490 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2491 if (ret)
2492 goto err_put_dev;
2493
2494 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2495 if (!master->wq) {
2496 ret = -ENOMEM;
2497 goto err_put_dev;
2498 }
2499
2500 ret = i3c_master_bus_init(master);
2501 if (ret)
2502 goto err_put_dev;
2503
2504 ret = device_add(&master->dev);
2505 if (ret)
2506 goto err_cleanup_bus;
2507
2508 /*
2509 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2510 * through the I2C subsystem.
2511 */
2512 ret = i3c_master_i2c_adapter_init(master);
2513 if (ret)
2514 goto err_del_dev;
2515
2516 /*
2517 * We're done initializing the bus and the controller, we can now
2518 * register I3C devices discovered during the initial DAA.
2519 */
2520 master->init_done = true;
2521 i3c_bus_normaluse_lock(&master->bus);
2522 i3c_master_register_new_i3c_devs(master);
2523 i3c_bus_normaluse_unlock(&master->bus);
2524
2525 return 0;
2526
2527 err_del_dev:
2528 device_del(&master->dev);
2529
2530 err_cleanup_bus:
2531 i3c_master_bus_cleanup(master);
2532
2533 err_put_dev:
2534 put_device(&master->dev);
2535
2536 return ret;
2537 }
2538 EXPORT_SYMBOL_GPL(i3c_master_register);
2539
2540 /**
2541 * i3c_master_unregister() - unregister an I3C master
2542 * @master: master used to send frames on the bus
2543 *
2544 * Basically undo everything done in i3c_master_register().
2545 *
2546 * Return: 0 in case of success, a negative error code otherwise.
2547 */
2548 int i3c_master_unregister(struct i3c_master_controller *master)
2549 {
2550 i3c_master_i2c_adapter_cleanup(master);
2551 i3c_master_unregister_i3c_devs(master);
2552 i3c_master_bus_cleanup(master);
2553 device_unregister(&master->dev);
2554
2555 return 0;
2556 }
2557 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2558
2559 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2560 struct i3c_priv_xfer *xfers,
2561 int nxfers)
2562 {
2563 struct i3c_master_controller *master;
2564
2565 if (!dev)
2566 return -ENOENT;
2567
2568 master = i3c_dev_get_master(dev);
2569 if (!master || !xfers)
2570 return -EINVAL;
2571
2572 if (!master->ops->priv_xfers)
2573 return -ENOTSUPP;
2574
2575 return master->ops->priv_xfers(dev, xfers, nxfers);
2576 }
2577
2578 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2579 {
2580 struct i3c_master_controller *master;
2581 int ret;
2582
2583 if (!dev->ibi)
2584 return -EINVAL;
2585
2586 master = i3c_dev_get_master(dev);
2587 ret = master->ops->disable_ibi(dev);
2588 if (ret)
2589 return ret;
2590
2591 reinit_completion(&dev->ibi->all_ibis_handled);
2592 if (atomic_read(&dev->ibi->pending_ibis))
2593 wait_for_completion(&dev->ibi->all_ibis_handled);
2594
2595 dev->ibi->enabled = false;
2596
2597 return 0;
2598 }
2599
2600 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2601 {
2602 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2603 int ret;
2604
2605 if (!dev->ibi)
2606 return -EINVAL;
2607
2608 ret = master->ops->enable_ibi(dev);
2609 if (!ret)
2610 dev->ibi->enabled = true;
2611
2612 return ret;
2613 }
2614
2615 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2616 const struct i3c_ibi_setup *req)
2617 {
2618 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2619 struct i3c_device_ibi_info *ibi;
2620 int ret;
2621
2622 if (!master->ops->request_ibi)
2623 return -ENOTSUPP;
2624
2625 if (dev->ibi)
2626 return -EBUSY;
2627
2628 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2629 if (!ibi)
2630 return -ENOMEM;
2631
2632 atomic_set(&ibi->pending_ibis, 0);
2633 init_completion(&ibi->all_ibis_handled);
2634 ibi->handler = req->handler;
2635 ibi->max_payload_len = req->max_payload_len;
2636 ibi->num_slots = req->num_slots;
2637
2638 dev->ibi = ibi;
2639 ret = master->ops->request_ibi(dev, req);
2640 if (ret) {
2641 kfree(ibi);
2642 dev->ibi = NULL;
2643 }
2644
2645 return ret;
2646 }
2647
2648 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2649 {
2650 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2651
2652 if (!dev->ibi)
2653 return;
2654
2655 if (WARN_ON(dev->ibi->enabled))
2656 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2657
2658 master->ops->free_ibi(dev);
2659 kfree(dev->ibi);
2660 dev->ibi = NULL;
2661 }
2662
2663 static int __init i3c_init(void)
2664 {
2665 return bus_register(&i3c_bus_type);
2666 }
2667 subsys_initcall(i3c_init);
2668
2669 static void __exit i3c_exit(void)
2670 {
2671 idr_destroy(&i3c_bus_idr);
2672 bus_unregister(&i3c_bus_type);
2673 }
2674 module_exit(i3c_exit);
2675
2676 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2677 MODULE_DESCRIPTION("I3C core");
2678 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support