1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/err.h>
26 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
37 #define DRVNAME "f71808e_wdt"
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
49 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
50 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
51 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
52 #define SIO_F81866_REG_GPIO1 0x2c /* F81866 GPIO1 Enable Register */
53 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
54 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
56 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
57 #define SIO_F71808_ID 0x0901 /* Chipset ID */
58 #define SIO_F71858_ID 0x0507 /* Chipset ID */
59 #define SIO_F71862_ID 0x0601 /* Chipset ID */
60 #define SIO_F71868_ID 0x1106 /* Chipset ID */
61 #define SIO_F71869_ID 0x0814 /* Chipset ID */
62 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
63 #define SIO_F71882_ID 0x0541 /* Chipset ID */
64 #define SIO_F71889_ID 0x0723 /* Chipset ID */
65 #define SIO_F81865_ID 0x0704 /* Chipset ID */
66 #define SIO_F81866_ID 0x1010 /* Chipset ID */
68 #define F71808FG_REG_WDO_CONF 0xf0
69 #define F71808FG_REG_WDT_CONF 0xf5
70 #define F71808FG_REG_WD_TIME 0xf6
72 #define F71808FG_FLAG_WDOUT_EN 7
74 #define F71808FG_FLAG_WDTMOUT_STS 6
75 #define F71808FG_FLAG_WD_EN 5
76 #define F71808FG_FLAG_WD_PULSE 4
77 #define F71808FG_FLAG_WD_UNIT 3
79 #define F81865_REG_WDO_CONF 0xfa
80 #define F81865_FLAG_WDOUT_EN 0
83 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
84 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
85 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
87 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
90 static unsigned short force_id
;
91 module_param(force_id
, ushort
, 0);
92 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
94 static const int max_timeout
= WATCHDOG_MAX_TIMEOUT
;
95 static int timeout
= WATCHDOG_TIMEOUT
; /* default timeout in seconds */
96 module_param(timeout
, int, 0);
97 MODULE_PARM_DESC(timeout
,
98 "Watchdog timeout in seconds. 1<= timeout <="
99 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT
) " (default="
100 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
102 static unsigned int pulse_width
= WATCHDOG_PULSE_WIDTH
;
103 module_param(pulse_width
, uint
, 0);
104 MODULE_PARM_DESC(pulse_width
,
105 "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
106 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH
) ")");
108 static unsigned int f71862fg_pin
= WATCHDOG_F71862FG_PIN
;
109 module_param(f71862fg_pin
, uint
, 0);
110 MODULE_PARM_DESC(f71862fg_pin
,
111 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
112 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN
)")");
114 static bool nowayout
= WATCHDOG_NOWAYOUT
;
115 module_param(nowayout
, bool, 0444);
116 MODULE_PARM_DESC(nowayout
, "Disable watchdog shutdown on close");
118 static unsigned int start_withtimeout
;
119 module_param(start_withtimeout
, uint
, 0);
120 MODULE_PARM_DESC(start_withtimeout
, "Start watchdog timer on module load with"
121 " given initial timeout. Zero (default) disables this feature.");
123 enum chips
{ f71808fg
, f71858fg
, f71862fg
, f71868
, f71869
, f71882fg
, f71889fg
,
126 static const char *f71808e_names
[] = {
138 /* Super-I/O Function prototypes */
139 static inline int superio_inb(int base
, int reg
);
140 static inline int superio_inw(int base
, int reg
);
141 static inline void superio_outb(int base
, int reg
, u8 val
);
142 static inline void superio_set_bit(int base
, int reg
, int bit
);
143 static inline void superio_clear_bit(int base
, int reg
, int bit
);
144 static inline int superio_enter(int base
);
145 static inline void superio_select(int base
, int ld
);
146 static inline void superio_exit(int base
);
148 struct watchdog_data
{
149 unsigned short sioaddr
;
151 unsigned long opened
;
154 struct watchdog_info ident
;
156 unsigned short timeout
;
157 u8 timer_val
; /* content for the wd_time register */
159 u8 pulse_val
; /* pulse width flag */
160 char pulse_mode
; /* enable pulse output mode? */
161 char caused_reboot
; /* last reboot was by the watchdog */
164 static struct watchdog_data watchdog
= {
165 .lock
= __MUTEX_INITIALIZER(watchdog
.lock
),
168 /* Super I/O functions */
169 static inline int superio_inb(int base
, int reg
)
172 return inb(base
+ 1);
175 static int superio_inw(int base
, int reg
)
178 val
= superio_inb(base
, reg
) << 8;
179 val
|= superio_inb(base
, reg
+ 1);
183 static inline void superio_outb(int base
, int reg
, u8 val
)
189 static inline void superio_set_bit(int base
, int reg
, int bit
)
191 unsigned long val
= superio_inb(base
, reg
);
192 __set_bit(bit
, &val
);
193 superio_outb(base
, reg
, val
);
196 static inline void superio_clear_bit(int base
, int reg
, int bit
)
198 unsigned long val
= superio_inb(base
, reg
);
199 __clear_bit(bit
, &val
);
200 superio_outb(base
, reg
, val
);
203 static inline int superio_enter(int base
)
205 /* Don't step on other drivers' I/O space by accident */
206 if (!request_muxed_region(base
, 2, DRVNAME
)) {
207 pr_err("I/O address 0x%04x already in use\n", (int)base
);
211 /* according to the datasheet the key must be sent twice! */
212 outb(SIO_UNLOCK_KEY
, base
);
213 outb(SIO_UNLOCK_KEY
, base
);
218 static inline void superio_select(int base
, int ld
)
220 outb(SIO_REG_LDSEL
, base
);
224 static inline void superio_exit(int base
)
226 outb(SIO_LOCK_KEY
, base
);
227 release_region(base
, 2);
230 static int watchdog_set_timeout(int timeout
)
233 || timeout
> max_timeout
) {
234 pr_err("watchdog timeout out of range\n");
238 mutex_lock(&watchdog
.lock
);
240 watchdog
.timeout
= timeout
;
241 if (timeout
> 0xff) {
242 watchdog
.timer_val
= DIV_ROUND_UP(timeout
, 60);
243 watchdog
.minutes_mode
= true;
245 watchdog
.timer_val
= timeout
;
246 watchdog
.minutes_mode
= false;
249 mutex_unlock(&watchdog
.lock
);
254 static int watchdog_set_pulse_width(unsigned int pw
)
257 unsigned int t1
= 25, t2
= 125, t3
= 5000;
259 if (watchdog
.type
== f71868
) {
265 mutex_lock(&watchdog
.lock
);
268 watchdog
.pulse_val
= 0;
269 } else if (pw
<= t1
) {
270 watchdog
.pulse_val
= 1;
271 } else if (pw
<= t2
) {
272 watchdog
.pulse_val
= 2;
273 } else if (pw
<= t3
) {
274 watchdog
.pulse_val
= 3;
276 pr_err("pulse width out of range\n");
281 watchdog
.pulse_mode
= pw
;
284 mutex_unlock(&watchdog
.lock
);
288 static int watchdog_keepalive(void)
292 mutex_lock(&watchdog
.lock
);
293 err
= superio_enter(watchdog
.sioaddr
);
296 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
298 if (watchdog
.minutes_mode
)
299 /* select minutes for timer units */
300 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
301 F71808FG_FLAG_WD_UNIT
);
303 /* select seconds for timer units */
304 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
305 F71808FG_FLAG_WD_UNIT
);
307 /* Set timer value */
308 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WD_TIME
,
311 superio_exit(watchdog
.sioaddr
);
314 mutex_unlock(&watchdog
.lock
);
318 static int f71862fg_pin_configure(unsigned short ioaddr
)
320 /* When ioaddr is non-zero the calling function has to take care of
321 mutex handling and superio preparation! */
323 if (f71862fg_pin
== 63) {
325 /* SPI must be disabled first to use this pin! */
326 superio_clear_bit(ioaddr
, SIO_REG_ROM_ADDR_SEL
, 6);
327 superio_set_bit(ioaddr
, SIO_REG_MFUNCT3
, 4);
329 } else if (f71862fg_pin
== 56) {
331 superio_set_bit(ioaddr
, SIO_REG_MFUNCT1
, 1);
333 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin
);
339 static int watchdog_start(void)
341 /* Make sure we don't die as soon as the watchdog is enabled below */
342 int err
= watchdog_keepalive();
346 mutex_lock(&watchdog
.lock
);
347 err
= superio_enter(watchdog
.sioaddr
);
350 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
352 /* Watchdog pin configuration */
353 switch (watchdog
.type
) {
355 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
356 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT2
, 3);
357 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT3
, 3);
361 err
= f71862fg_pin_configure(watchdog
.sioaddr
);
368 /* GPIO14 --> WDTRST# */
369 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT1
, 4);
373 /* Set pin 56 to WDTRST# */
374 superio_set_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT1
, 1);
378 /* set pin 40 to WDTRST# */
379 superio_outb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
,
380 superio_inb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
) & 0xcf);
384 /* Set pin 70 to WDTRST# */
385 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT3
, 5);
389 /* Set pin 70 to WDTRST# */
390 superio_clear_bit(watchdog
.sioaddr
, SIO_F81866_REG_PORT_SEL
,
392 superio_set_bit(watchdog
.sioaddr
, SIO_F81866_REG_PORT_SEL
,
395 * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
396 * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
400 superio_clear_bit(watchdog
.sioaddr
, SIO_F81866_REG_GPIO1
,
406 * 'default' label to shut up the compiler and catch
413 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
414 superio_set_bit(watchdog
.sioaddr
, SIO_REG_ENABLE
, 0);
416 if (watchdog
.type
== f81865
|| watchdog
.type
== f81866
)
417 superio_set_bit(watchdog
.sioaddr
, F81865_REG_WDO_CONF
,
418 F81865_FLAG_WDOUT_EN
);
420 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDO_CONF
,
421 F71808FG_FLAG_WDOUT_EN
);
423 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
424 F71808FG_FLAG_WD_EN
);
426 if (watchdog
.pulse_mode
) {
427 /* Select "pulse" output mode with given duration */
428 u8 wdt_conf
= superio_inb(watchdog
.sioaddr
,
429 F71808FG_REG_WDT_CONF
);
431 /* Set WD_PSWIDTH bits (1:0) */
432 wdt_conf
= (wdt_conf
& 0xfc) | (watchdog
.pulse_val
& 0x03);
433 /* Set WD_PULSE to "pulse" mode */
434 wdt_conf
|= BIT(F71808FG_FLAG_WD_PULSE
);
436 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
439 /* Select "level" output mode */
440 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
441 F71808FG_FLAG_WD_PULSE
);
445 superio_exit(watchdog
.sioaddr
);
447 mutex_unlock(&watchdog
.lock
);
452 static int watchdog_stop(void)
456 mutex_lock(&watchdog
.lock
);
457 err
= superio_enter(watchdog
.sioaddr
);
460 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
462 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
463 F71808FG_FLAG_WD_EN
);
465 superio_exit(watchdog
.sioaddr
);
468 mutex_unlock(&watchdog
.lock
);
473 static int watchdog_get_status(void)
477 mutex_lock(&watchdog
.lock
);
478 status
= (watchdog
.caused_reboot
) ? WDIOF_CARDRESET
: 0;
479 mutex_unlock(&watchdog
.lock
);
484 static bool watchdog_is_running(void)
487 * if we fail to determine the watchdog's status assume it to be
488 * running to be on the safe side
490 bool is_running
= true;
492 mutex_lock(&watchdog
.lock
);
493 if (superio_enter(watchdog
.sioaddr
))
495 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
497 is_running
= (superio_inb(watchdog
.sioaddr
, SIO_REG_ENABLE
) & BIT(0))
498 && (superio_inb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
)
499 & F71808FG_FLAG_WD_EN
);
501 superio_exit(watchdog
.sioaddr
);
504 mutex_unlock(&watchdog
.lock
);
508 /* /dev/watchdog api */
510 static int watchdog_open(struct inode
*inode
, struct file
*file
)
514 /* If the watchdog is alive we don't need to start it again */
515 if (test_and_set_bit(0, &watchdog
.opened
))
518 err
= watchdog_start();
520 clear_bit(0, &watchdog
.opened
);
525 __module_get(THIS_MODULE
);
527 watchdog
.expect_close
= 0;
528 return nonseekable_open(inode
, file
);
531 static int watchdog_release(struct inode
*inode
, struct file
*file
)
533 clear_bit(0, &watchdog
.opened
);
535 if (!watchdog
.expect_close
) {
536 watchdog_keepalive();
537 pr_crit("Unexpected close, not stopping watchdog!\n");
538 } else if (!nowayout
) {
546 * @file: file handle to the watchdog
547 * @buf: buffer to write
548 * @count: count of bytes
549 * @ppos: pointer to the position to write. No seeks allowed
551 * A write to a watchdog device is defined as a keepalive signal. Any
552 * write of data will do, as we we don't define content meaning.
555 static ssize_t
watchdog_write(struct file
*file
, const char __user
*buf
,
556 size_t count
, loff_t
*ppos
)
562 /* In case it was set long ago */
563 bool expect_close
= false;
565 for (i
= 0; i
!= count
; i
++) {
567 if (get_user(c
, buf
+ i
))
569 expect_close
= (c
== 'V');
572 /* Properly order writes across fork()ed processes */
573 mutex_lock(&watchdog
.lock
);
574 watchdog
.expect_close
= expect_close
;
575 mutex_unlock(&watchdog
.lock
);
578 /* someone wrote to us, we should restart timer */
579 watchdog_keepalive();
586 * @inode: inode of the device
587 * @file: file handle to the device
588 * @cmd: watchdog command
589 * @arg: argument pointer
591 * The watchdog API defines a common set of functions for all watchdogs
592 * according to their available features.
594 static long watchdog_ioctl(struct file
*file
, unsigned int cmd
,
601 struct watchdog_info __user
*ident
;
605 uarg
.i
= (int __user
*)arg
;
608 case WDIOC_GETSUPPORT
:
609 return copy_to_user(uarg
.ident
, &watchdog
.ident
,
610 sizeof(watchdog
.ident
)) ? -EFAULT
: 0;
612 case WDIOC_GETSTATUS
:
613 status
= watchdog_get_status();
616 return put_user(status
, uarg
.i
);
618 case WDIOC_GETBOOTSTATUS
:
619 return put_user(0, uarg
.i
);
621 case WDIOC_SETOPTIONS
:
622 if (get_user(new_options
, uarg
.i
))
625 if (new_options
& WDIOS_DISABLECARD
)
628 if (new_options
& WDIOS_ENABLECARD
)
629 return watchdog_start();
632 case WDIOC_KEEPALIVE
:
633 watchdog_keepalive();
636 case WDIOC_SETTIMEOUT
:
637 if (get_user(new_timeout
, uarg
.i
))
640 if (watchdog_set_timeout(new_timeout
))
643 watchdog_keepalive();
646 case WDIOC_GETTIMEOUT
:
647 return put_user(watchdog
.timeout
, uarg
.i
);
655 static int watchdog_notify_sys(struct notifier_block
*this, unsigned long code
,
658 if (code
== SYS_DOWN
|| code
== SYS_HALT
)
663 static const struct file_operations watchdog_fops
= {
664 .owner
= THIS_MODULE
,
666 .open
= watchdog_open
,
667 .release
= watchdog_release
,
668 .write
= watchdog_write
,
669 .unlocked_ioctl
= watchdog_ioctl
,
672 static struct miscdevice watchdog_miscdev
= {
673 .minor
= WATCHDOG_MINOR
,
675 .fops
= &watchdog_fops
,
678 static struct notifier_block watchdog_notifier
= {
679 .notifier_call
= watchdog_notify_sys
,
682 static int __init
watchdog_init(int sioaddr
)
684 int wdt_conf
, err
= 0;
686 /* No need to lock watchdog.lock here because no entry points
687 * into the module have been registered yet.
689 watchdog
.sioaddr
= sioaddr
;
690 watchdog
.ident
.options
= WDIOC_SETTIMEOUT
692 | WDIOF_KEEPALIVEPING
;
694 snprintf(watchdog
.ident
.identity
,
695 sizeof(watchdog
.ident
.identity
), "%s watchdog",
696 f71808e_names
[watchdog
.type
]);
698 err
= superio_enter(sioaddr
);
701 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
703 wdt_conf
= superio_inb(sioaddr
, F71808FG_REG_WDT_CONF
);
704 watchdog
.caused_reboot
= wdt_conf
& BIT(F71808FG_FLAG_WDTMOUT_STS
);
706 superio_exit(sioaddr
);
708 err
= watchdog_set_timeout(timeout
);
711 err
= watchdog_set_pulse_width(pulse_width
);
715 err
= register_reboot_notifier(&watchdog_notifier
);
719 err
= misc_register(&watchdog_miscdev
);
721 pr_err("cannot register miscdev on minor=%d\n",
722 watchdog_miscdev
.minor
);
726 if (start_withtimeout
) {
727 if (start_withtimeout
<= 0
728 || start_withtimeout
> max_timeout
) {
729 pr_err("starting timeout out of range\n");
734 err
= watchdog_start();
736 pr_err("cannot start watchdog timer\n");
740 mutex_lock(&watchdog
.lock
);
741 err
= superio_enter(sioaddr
);
744 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
746 if (start_withtimeout
> 0xff) {
747 /* select minutes for timer units */
748 superio_set_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
749 F71808FG_FLAG_WD_UNIT
);
750 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
751 DIV_ROUND_UP(start_withtimeout
, 60));
753 /* select seconds for timer units */
754 superio_clear_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
755 F71808FG_FLAG_WD_UNIT
);
756 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
760 superio_exit(sioaddr
);
761 mutex_unlock(&watchdog
.lock
);
764 __module_get(THIS_MODULE
);
766 pr_info("watchdog started with initial timeout of %u sec\n",
773 mutex_unlock(&watchdog
.lock
);
775 misc_deregister(&watchdog_miscdev
);
777 unregister_reboot_notifier(&watchdog_notifier
);
782 static int __init
f71808e_find(int sioaddr
)
785 int err
= superio_enter(sioaddr
);
789 devid
= superio_inw(sioaddr
, SIO_REG_MANID
);
790 if (devid
!= SIO_FINTEK_ID
) {
791 pr_debug("Not a Fintek device\n");
796 devid
= force_id
? force_id
: superio_inw(sioaddr
, SIO_REG_DEVID
);
799 watchdog
.type
= f71808fg
;
802 watchdog
.type
= f71862fg
;
803 err
= f71862fg_pin_configure(0); /* validate module parameter */
806 watchdog
.type
= f71868
;
810 watchdog
.type
= f71869
;
813 watchdog
.type
= f71882fg
;
816 watchdog
.type
= f71889fg
;
819 /* Confirmed (by datasheet) not to have a watchdog. */
823 watchdog
.type
= f81865
;
826 watchdog
.type
= f81866
;
829 pr_info("Unrecognized Fintek device: %04x\n",
830 (unsigned int)devid
);
835 pr_info("Found %s watchdog chip, revision %d\n",
836 f71808e_names
[watchdog
.type
],
837 (int)superio_inb(sioaddr
, SIO_REG_DEVREV
));
839 superio_exit(sioaddr
);
843 static int __init
f71808e_init(void)
845 static const unsigned short addrs
[] = { 0x2e, 0x4e };
849 for (i
= 0; i
< ARRAY_SIZE(addrs
); i
++) {
850 err
= f71808e_find(addrs
[i
]);
854 if (i
== ARRAY_SIZE(addrs
))
857 return watchdog_init(addrs
[i
]);
860 static void __exit
f71808e_exit(void)
862 if (watchdog_is_running()) {
863 pr_warn("Watchdog timer still running, stopping it\n");
866 misc_deregister(&watchdog_miscdev
);
867 unregister_reboot_notifier(&watchdog_notifier
);
870 MODULE_DESCRIPTION("F71808E Watchdog Driver");
871 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
872 MODULE_LICENSE("GPL");
874 module_init(f71808e_init
);
875 module_exit(f71808e_exit
);