MIPS: BCM1480: Remove checks for CONFIG_SIBYTE_BCM1480_PROF
[linux/fpc-iii.git] / drivers / watchdog / sp805_wdt.c
blob47629d268e0a674a74899a8c620dc128476508ea
1 /*
2 * drivers/char/watchdog/sp805-wdt.c
4 * Watchdog driver for ARM SP805 watchdog module
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #include <linux/device.h>
15 #include <linux/resource.h>
16 #include <linux/amba/bus.h>
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/io.h>
20 #include <linux/ioport.h>
21 #include <linux/kernel.h>
22 #include <linux/math64.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pm.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28 #include <linux/types.h>
29 #include <linux/watchdog.h>
31 /* default timeout in seconds */
32 #define DEFAULT_TIMEOUT 60
34 #define MODULE_NAME "sp805-wdt"
36 /* watchdog register offsets and masks */
37 #define WDTLOAD 0x000
38 #define LOAD_MIN 0x00000001
39 #define LOAD_MAX 0xFFFFFFFF
40 #define WDTVALUE 0x004
41 #define WDTCONTROL 0x008
42 /* control register masks */
43 #define INT_ENABLE (1 << 0)
44 #define RESET_ENABLE (1 << 1)
45 #define WDTINTCLR 0x00C
46 #define WDTRIS 0x010
47 #define WDTMIS 0x014
48 #define INT_MASK (1 << 0)
49 #define WDTLOCK 0xC00
50 #define UNLOCK 0x1ACCE551
51 #define LOCK 0x00000001
53 /**
54 * struct sp805_wdt: sp805 wdt device structure
55 * @wdd: instance of struct watchdog_device
56 * @lock: spin lock protecting dev structure and io access
57 * @base: base address of wdt
58 * @clk: clock structure of wdt
59 * @adev: amba device structure of wdt
60 * @status: current status of wdt
61 * @load_val: load value to be set for current timeout
62 * @timeout: current programmed timeout
64 struct sp805_wdt {
65 struct watchdog_device wdd;
66 spinlock_t lock;
67 void __iomem *base;
68 struct clk *clk;
69 struct amba_device *adev;
70 unsigned int load_val;
71 unsigned int timeout;
74 static bool nowayout = WATCHDOG_NOWAYOUT;
75 module_param(nowayout, bool, 0);
76 MODULE_PARM_DESC(nowayout,
77 "Set to 1 to keep watchdog running after device release");
79 /* This routine finds load value that will reset system in required timout */
80 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
82 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
83 u64 load, rate;
85 rate = clk_get_rate(wdt->clk);
88 * sp805 runs counter with given value twice, after the end of first
89 * counter it gives an interrupt and then starts counter again. If
90 * interrupt already occurred then it resets the system. This is why
91 * load is half of what should be required.
93 load = div_u64(rate, 2) * timeout - 1;
95 load = (load > LOAD_MAX) ? LOAD_MAX : load;
96 load = (load < LOAD_MIN) ? LOAD_MIN : load;
98 spin_lock(&wdt->lock);
99 wdt->load_val = load;
100 /* roundup timeout to closest positive integer value */
101 wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
102 spin_unlock(&wdt->lock);
104 return 0;
107 /* returns number of seconds left for reset to occur */
108 static unsigned int wdt_timeleft(struct watchdog_device *wdd)
110 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
111 u64 load, rate;
113 rate = clk_get_rate(wdt->clk);
115 spin_lock(&wdt->lock);
116 load = readl_relaxed(wdt->base + WDTVALUE);
118 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
119 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
120 load += wdt->load_val + 1;
121 spin_unlock(&wdt->lock);
123 return div_u64(load, rate);
126 static int wdt_config(struct watchdog_device *wdd, bool ping)
128 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
129 int ret;
131 if (!ping) {
133 ret = clk_prepare_enable(wdt->clk);
134 if (ret) {
135 dev_err(&wdt->adev->dev, "clock enable fail");
136 return ret;
140 spin_lock(&wdt->lock);
142 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
143 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
145 if (!ping) {
146 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
147 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
148 WDTCONTROL);
151 writel_relaxed(LOCK, wdt->base + WDTLOCK);
153 /* Flush posted writes. */
154 readl_relaxed(wdt->base + WDTLOCK);
155 spin_unlock(&wdt->lock);
157 return 0;
160 static int wdt_ping(struct watchdog_device *wdd)
162 return wdt_config(wdd, true);
165 /* enables watchdog timers reset */
166 static int wdt_enable(struct watchdog_device *wdd)
168 return wdt_config(wdd, false);
171 /* disables watchdog timers reset */
172 static int wdt_disable(struct watchdog_device *wdd)
174 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
176 spin_lock(&wdt->lock);
178 writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
179 writel_relaxed(0, wdt->base + WDTCONTROL);
180 writel_relaxed(LOCK, wdt->base + WDTLOCK);
182 /* Flush posted writes. */
183 readl_relaxed(wdt->base + WDTLOCK);
184 spin_unlock(&wdt->lock);
186 clk_disable_unprepare(wdt->clk);
188 return 0;
191 static const struct watchdog_info wdt_info = {
192 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
193 .identity = MODULE_NAME,
196 static const struct watchdog_ops wdt_ops = {
197 .owner = THIS_MODULE,
198 .start = wdt_enable,
199 .stop = wdt_disable,
200 .ping = wdt_ping,
201 .set_timeout = wdt_setload,
202 .get_timeleft = wdt_timeleft,
205 static int
206 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
208 struct sp805_wdt *wdt;
209 int ret = 0;
211 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
212 if (!wdt) {
213 ret = -ENOMEM;
214 goto err;
217 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
218 if (IS_ERR(wdt->base))
219 return PTR_ERR(wdt->base);
221 wdt->clk = devm_clk_get(&adev->dev, NULL);
222 if (IS_ERR(wdt->clk)) {
223 dev_warn(&adev->dev, "Clock not found\n");
224 ret = PTR_ERR(wdt->clk);
225 goto err;
228 wdt->adev = adev;
229 wdt->wdd.info = &wdt_info;
230 wdt->wdd.ops = &wdt_ops;
232 spin_lock_init(&wdt->lock);
233 watchdog_set_nowayout(&wdt->wdd, nowayout);
234 watchdog_set_drvdata(&wdt->wdd, wdt);
235 wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
237 ret = watchdog_register_device(&wdt->wdd);
238 if (ret) {
239 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
240 ret);
241 goto err;
243 amba_set_drvdata(adev, wdt);
245 dev_info(&adev->dev, "registration successful\n");
246 return 0;
248 err:
249 dev_err(&adev->dev, "Probe Failed!!!\n");
250 return ret;
253 static int sp805_wdt_remove(struct amba_device *adev)
255 struct sp805_wdt *wdt = amba_get_drvdata(adev);
257 watchdog_unregister_device(&wdt->wdd);
258 watchdog_set_drvdata(&wdt->wdd, NULL);
260 return 0;
263 static int __maybe_unused sp805_wdt_suspend(struct device *dev)
265 struct sp805_wdt *wdt = dev_get_drvdata(dev);
267 if (watchdog_active(&wdt->wdd))
268 return wdt_disable(&wdt->wdd);
270 return 0;
273 static int __maybe_unused sp805_wdt_resume(struct device *dev)
275 struct sp805_wdt *wdt = dev_get_drvdata(dev);
277 if (watchdog_active(&wdt->wdd))
278 return wdt_enable(&wdt->wdd);
280 return 0;
283 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
284 sp805_wdt_resume);
286 static struct amba_id sp805_wdt_ids[] = {
288 .id = 0x00141805,
289 .mask = 0x00ffffff,
291 { 0, 0 },
294 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
296 static struct amba_driver sp805_wdt_driver = {
297 .drv = {
298 .name = MODULE_NAME,
299 .pm = &sp805_wdt_dev_pm_ops,
301 .id_table = sp805_wdt_ids,
302 .probe = sp805_wdt_probe,
303 .remove = sp805_wdt_remove,
306 module_amba_driver(sp805_wdt_driver);
308 MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
309 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
310 MODULE_LICENSE("GPL");