Merge tag 'nfs-for-3.13-2' of git://git.linux-nfs.org/projects/trondmy/linux-nfs
[linux/fpc-iii.git] / drivers / xen / events.c
blob4035e833ea2643cb78ca5da68ed5db5037aee11d
1 /*
2 * Xen event channels
4 * Xen models interrupts with abstract event channels. Because each
5 * domain gets 1024 event channels, but NR_IRQ is not that large, we
6 * must dynamically map irqs<->event channels. The event channels
7 * interface with the rest of the kernel by defining a xen interrupt
8 * chip. When an event is received, it is mapped to an irq and sent
9 * through the normal interrupt processing path.
11 * There are four kinds of events which can be mapped to an event
12 * channel:
14 * 1. Inter-domain notifications. This includes all the virtual
15 * device events, since they're driven by front-ends in another domain
16 * (typically dom0).
17 * 2. VIRQs, typically used for timers. These are per-cpu events.
18 * 3. IPIs.
19 * 4. PIRQs - Hardware interrupts.
21 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
24 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
26 #include <linux/linkage.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/module.h>
30 #include <linux/string.h>
31 #include <linux/bootmem.h>
32 #include <linux/slab.h>
33 #include <linux/irqnr.h>
34 #include <linux/pci.h>
36 #ifdef CONFIG_X86
37 #include <asm/desc.h>
38 #include <asm/ptrace.h>
39 #include <asm/irq.h>
40 #include <asm/idle.h>
41 #include <asm/io_apic.h>
42 #include <asm/xen/page.h>
43 #include <asm/xen/pci.h>
44 #endif
45 #include <asm/sync_bitops.h>
46 #include <asm/xen/hypercall.h>
47 #include <asm/xen/hypervisor.h>
49 #include <xen/xen.h>
50 #include <xen/hvm.h>
51 #include <xen/xen-ops.h>
52 #include <xen/events.h>
53 #include <xen/interface/xen.h>
54 #include <xen/interface/event_channel.h>
55 #include <xen/interface/hvm/hvm_op.h>
56 #include <xen/interface/hvm/params.h>
57 #include <xen/interface/physdev.h>
58 #include <xen/interface/sched.h>
59 #include <xen/interface/vcpu.h>
60 #include <asm/hw_irq.h>
63 * This lock protects updates to the following mapping and reference-count
64 * arrays. The lock does not need to be acquired to read the mapping tables.
66 static DEFINE_MUTEX(irq_mapping_update_lock);
68 static LIST_HEAD(xen_irq_list_head);
70 /* IRQ <-> VIRQ mapping. */
71 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
73 /* IRQ <-> IPI mapping */
74 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
76 /* Interrupt types. */
77 enum xen_irq_type {
78 IRQT_UNBOUND = 0,
79 IRQT_PIRQ,
80 IRQT_VIRQ,
81 IRQT_IPI,
82 IRQT_EVTCHN
86 * Packed IRQ information:
87 * type - enum xen_irq_type
88 * event channel - irq->event channel mapping
89 * cpu - cpu this event channel is bound to
90 * index - type-specific information:
91 * PIRQ - physical IRQ, GSI, flags, and owner domain
92 * VIRQ - virq number
93 * IPI - IPI vector
94 * EVTCHN -
96 struct irq_info {
97 struct list_head list;
98 int refcnt;
99 enum xen_irq_type type; /* type */
100 unsigned irq;
101 unsigned short evtchn; /* event channel */
102 unsigned short cpu; /* cpu bound */
104 union {
105 unsigned short virq;
106 enum ipi_vector ipi;
107 struct {
108 unsigned short pirq;
109 unsigned short gsi;
110 unsigned char flags;
111 uint16_t domid;
112 } pirq;
113 } u;
115 #define PIRQ_NEEDS_EOI (1 << 0)
116 #define PIRQ_SHAREABLE (1 << 1)
118 static int *evtchn_to_irq;
119 #ifdef CONFIG_X86
120 static unsigned long *pirq_eoi_map;
121 #endif
122 static bool (*pirq_needs_eoi)(unsigned irq);
125 * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
126 * careful to only use bitops which allow for this (e.g
127 * test_bit/find_first_bit and friends but not __ffs) and to pass
128 * BITS_PER_EVTCHN_WORD as the bitmask length.
130 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
132 * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
133 * array. Primarily to avoid long lines (hence the terse name).
135 #define BM(x) (unsigned long *)(x)
136 /* Find the first set bit in a evtchn mask */
137 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
139 static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD],
140 cpu_evtchn_mask);
142 /* Xen will never allocate port zero for any purpose. */
143 #define VALID_EVTCHN(chn) ((chn) != 0)
145 static struct irq_chip xen_dynamic_chip;
146 static struct irq_chip xen_percpu_chip;
147 static struct irq_chip xen_pirq_chip;
148 static void enable_dynirq(struct irq_data *data);
149 static void disable_dynirq(struct irq_data *data);
151 /* Get info for IRQ */
152 static struct irq_info *info_for_irq(unsigned irq)
154 return irq_get_handler_data(irq);
157 /* Constructors for packed IRQ information. */
158 static void xen_irq_info_common_init(struct irq_info *info,
159 unsigned irq,
160 enum xen_irq_type type,
161 unsigned short evtchn,
162 unsigned short cpu)
165 BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
167 info->type = type;
168 info->irq = irq;
169 info->evtchn = evtchn;
170 info->cpu = cpu;
172 evtchn_to_irq[evtchn] = irq;
174 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
177 static void xen_irq_info_evtchn_init(unsigned irq,
178 unsigned short evtchn)
180 struct irq_info *info = info_for_irq(irq);
182 xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
185 static void xen_irq_info_ipi_init(unsigned cpu,
186 unsigned irq,
187 unsigned short evtchn,
188 enum ipi_vector ipi)
190 struct irq_info *info = info_for_irq(irq);
192 xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
194 info->u.ipi = ipi;
196 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
199 static void xen_irq_info_virq_init(unsigned cpu,
200 unsigned irq,
201 unsigned short evtchn,
202 unsigned short virq)
204 struct irq_info *info = info_for_irq(irq);
206 xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
208 info->u.virq = virq;
210 per_cpu(virq_to_irq, cpu)[virq] = irq;
213 static void xen_irq_info_pirq_init(unsigned irq,
214 unsigned short evtchn,
215 unsigned short pirq,
216 unsigned short gsi,
217 uint16_t domid,
218 unsigned char flags)
220 struct irq_info *info = info_for_irq(irq);
222 xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
224 info->u.pirq.pirq = pirq;
225 info->u.pirq.gsi = gsi;
226 info->u.pirq.domid = domid;
227 info->u.pirq.flags = flags;
231 * Accessors for packed IRQ information.
233 static unsigned int evtchn_from_irq(unsigned irq)
235 if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
236 return 0;
238 return info_for_irq(irq)->evtchn;
241 unsigned irq_from_evtchn(unsigned int evtchn)
243 return evtchn_to_irq[evtchn];
245 EXPORT_SYMBOL_GPL(irq_from_evtchn);
247 static enum ipi_vector ipi_from_irq(unsigned irq)
249 struct irq_info *info = info_for_irq(irq);
251 BUG_ON(info == NULL);
252 BUG_ON(info->type != IRQT_IPI);
254 return info->u.ipi;
257 static unsigned virq_from_irq(unsigned irq)
259 struct irq_info *info = info_for_irq(irq);
261 BUG_ON(info == NULL);
262 BUG_ON(info->type != IRQT_VIRQ);
264 return info->u.virq;
267 static unsigned pirq_from_irq(unsigned irq)
269 struct irq_info *info = info_for_irq(irq);
271 BUG_ON(info == NULL);
272 BUG_ON(info->type != IRQT_PIRQ);
274 return info->u.pirq.pirq;
277 static enum xen_irq_type type_from_irq(unsigned irq)
279 return info_for_irq(irq)->type;
282 static unsigned cpu_from_irq(unsigned irq)
284 return info_for_irq(irq)->cpu;
287 static unsigned int cpu_from_evtchn(unsigned int evtchn)
289 int irq = evtchn_to_irq[evtchn];
290 unsigned ret = 0;
292 if (irq != -1)
293 ret = cpu_from_irq(irq);
295 return ret;
298 #ifdef CONFIG_X86
299 static bool pirq_check_eoi_map(unsigned irq)
301 return test_bit(pirq_from_irq(irq), pirq_eoi_map);
303 #endif
305 static bool pirq_needs_eoi_flag(unsigned irq)
307 struct irq_info *info = info_for_irq(irq);
308 BUG_ON(info->type != IRQT_PIRQ);
310 return info->u.pirq.flags & PIRQ_NEEDS_EOI;
313 static inline xen_ulong_t active_evtchns(unsigned int cpu,
314 struct shared_info *sh,
315 unsigned int idx)
317 return sh->evtchn_pending[idx] &
318 per_cpu(cpu_evtchn_mask, cpu)[idx] &
319 ~sh->evtchn_mask[idx];
322 static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
324 int irq = evtchn_to_irq[chn];
326 BUG_ON(irq == -1);
327 #ifdef CONFIG_SMP
328 cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
329 #endif
331 clear_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu_from_irq(irq))));
332 set_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu)));
334 info_for_irq(irq)->cpu = cpu;
337 static void init_evtchn_cpu_bindings(void)
339 int i;
340 #ifdef CONFIG_SMP
341 struct irq_info *info;
343 /* By default all event channels notify CPU#0. */
344 list_for_each_entry(info, &xen_irq_list_head, list) {
345 struct irq_desc *desc = irq_to_desc(info->irq);
346 cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
348 #endif
350 for_each_possible_cpu(i)
351 memset(per_cpu(cpu_evtchn_mask, i),
352 (i == 0) ? ~0 : 0, NR_EVENT_CHANNELS/8);
355 static inline void clear_evtchn(int port)
357 struct shared_info *s = HYPERVISOR_shared_info;
358 sync_clear_bit(port, BM(&s->evtchn_pending[0]));
361 static inline void set_evtchn(int port)
363 struct shared_info *s = HYPERVISOR_shared_info;
364 sync_set_bit(port, BM(&s->evtchn_pending[0]));
367 static inline int test_evtchn(int port)
369 struct shared_info *s = HYPERVISOR_shared_info;
370 return sync_test_bit(port, BM(&s->evtchn_pending[0]));
375 * notify_remote_via_irq - send event to remote end of event channel via irq
376 * @irq: irq of event channel to send event to
378 * Unlike notify_remote_via_evtchn(), this is safe to use across
379 * save/restore. Notifications on a broken connection are silently
380 * dropped.
382 void notify_remote_via_irq(int irq)
384 int evtchn = evtchn_from_irq(irq);
386 if (VALID_EVTCHN(evtchn))
387 notify_remote_via_evtchn(evtchn);
389 EXPORT_SYMBOL_GPL(notify_remote_via_irq);
391 static void mask_evtchn(int port)
393 struct shared_info *s = HYPERVISOR_shared_info;
394 sync_set_bit(port, BM(&s->evtchn_mask[0]));
397 static void unmask_evtchn(int port)
399 struct shared_info *s = HYPERVISOR_shared_info;
400 unsigned int cpu = get_cpu();
401 int do_hypercall = 0, evtchn_pending = 0;
403 BUG_ON(!irqs_disabled());
405 if (unlikely((cpu != cpu_from_evtchn(port))))
406 do_hypercall = 1;
407 else {
409 * Need to clear the mask before checking pending to
410 * avoid a race with an event becoming pending.
412 * EVTCHNOP_unmask will only trigger an upcall if the
413 * mask bit was set, so if a hypercall is needed
414 * remask the event.
416 sync_clear_bit(port, BM(&s->evtchn_mask[0]));
417 evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
419 if (unlikely(evtchn_pending && xen_hvm_domain())) {
420 sync_set_bit(port, BM(&s->evtchn_mask[0]));
421 do_hypercall = 1;
425 /* Slow path (hypercall) if this is a non-local port or if this is
426 * an hvm domain and an event is pending (hvm domains don't have
427 * their own implementation of irq_enable). */
428 if (do_hypercall) {
429 struct evtchn_unmask unmask = { .port = port };
430 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
431 } else {
432 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
435 * The following is basically the equivalent of
436 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
437 * the interrupt edge' if the channel is masked.
439 if (evtchn_pending &&
440 !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
441 BM(&vcpu_info->evtchn_pending_sel)))
442 vcpu_info->evtchn_upcall_pending = 1;
445 put_cpu();
448 static void xen_irq_init(unsigned irq)
450 struct irq_info *info;
451 #ifdef CONFIG_SMP
452 struct irq_desc *desc = irq_to_desc(irq);
454 /* By default all event channels notify CPU#0. */
455 cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
456 #endif
458 info = kzalloc(sizeof(*info), GFP_KERNEL);
459 if (info == NULL)
460 panic("Unable to allocate metadata for IRQ%d\n", irq);
462 info->type = IRQT_UNBOUND;
463 info->refcnt = -1;
465 irq_set_handler_data(irq, info);
467 list_add_tail(&info->list, &xen_irq_list_head);
470 static int __must_check xen_allocate_irq_dynamic(void)
472 int first = 0;
473 int irq;
475 #ifdef CONFIG_X86_IO_APIC
477 * For an HVM guest or domain 0 which see "real" (emulated or
478 * actual respectively) GSIs we allocate dynamic IRQs
479 * e.g. those corresponding to event channels or MSIs
480 * etc. from the range above those "real" GSIs to avoid
481 * collisions.
483 if (xen_initial_domain() || xen_hvm_domain())
484 first = get_nr_irqs_gsi();
485 #endif
487 irq = irq_alloc_desc_from(first, -1);
489 if (irq >= 0)
490 xen_irq_init(irq);
492 return irq;
495 static int __must_check xen_allocate_irq_gsi(unsigned gsi)
497 int irq;
500 * A PV guest has no concept of a GSI (since it has no ACPI
501 * nor access to/knowledge of the physical APICs). Therefore
502 * all IRQs are dynamically allocated from the entire IRQ
503 * space.
505 if (xen_pv_domain() && !xen_initial_domain())
506 return xen_allocate_irq_dynamic();
508 /* Legacy IRQ descriptors are already allocated by the arch. */
509 if (gsi < NR_IRQS_LEGACY)
510 irq = gsi;
511 else
512 irq = irq_alloc_desc_at(gsi, -1);
514 xen_irq_init(irq);
516 return irq;
519 static void xen_free_irq(unsigned irq)
521 struct irq_info *info = irq_get_handler_data(irq);
523 if (WARN_ON(!info))
524 return;
526 list_del(&info->list);
528 irq_set_handler_data(irq, NULL);
530 WARN_ON(info->refcnt > 0);
532 kfree(info);
534 /* Legacy IRQ descriptors are managed by the arch. */
535 if (irq < NR_IRQS_LEGACY)
536 return;
538 irq_free_desc(irq);
541 static void pirq_query_unmask(int irq)
543 struct physdev_irq_status_query irq_status;
544 struct irq_info *info = info_for_irq(irq);
546 BUG_ON(info->type != IRQT_PIRQ);
548 irq_status.irq = pirq_from_irq(irq);
549 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
550 irq_status.flags = 0;
552 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
553 if (irq_status.flags & XENIRQSTAT_needs_eoi)
554 info->u.pirq.flags |= PIRQ_NEEDS_EOI;
557 static bool probing_irq(int irq)
559 struct irq_desc *desc = irq_to_desc(irq);
561 return desc && desc->action == NULL;
564 static void eoi_pirq(struct irq_data *data)
566 int evtchn = evtchn_from_irq(data->irq);
567 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
568 int rc = 0;
570 irq_move_irq(data);
572 if (VALID_EVTCHN(evtchn))
573 clear_evtchn(evtchn);
575 if (pirq_needs_eoi(data->irq)) {
576 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
577 WARN_ON(rc);
581 static void mask_ack_pirq(struct irq_data *data)
583 disable_dynirq(data);
584 eoi_pirq(data);
587 static unsigned int __startup_pirq(unsigned int irq)
589 struct evtchn_bind_pirq bind_pirq;
590 struct irq_info *info = info_for_irq(irq);
591 int evtchn = evtchn_from_irq(irq);
592 int rc;
594 BUG_ON(info->type != IRQT_PIRQ);
596 if (VALID_EVTCHN(evtchn))
597 goto out;
599 bind_pirq.pirq = pirq_from_irq(irq);
600 /* NB. We are happy to share unless we are probing. */
601 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
602 BIND_PIRQ__WILL_SHARE : 0;
603 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
604 if (rc != 0) {
605 if (!probing_irq(irq))
606 pr_info("Failed to obtain physical IRQ %d\n", irq);
607 return 0;
609 evtchn = bind_pirq.port;
611 pirq_query_unmask(irq);
613 evtchn_to_irq[evtchn] = irq;
614 bind_evtchn_to_cpu(evtchn, 0);
615 info->evtchn = evtchn;
617 out:
618 unmask_evtchn(evtchn);
619 eoi_pirq(irq_get_irq_data(irq));
621 return 0;
624 static unsigned int startup_pirq(struct irq_data *data)
626 return __startup_pirq(data->irq);
629 static void shutdown_pirq(struct irq_data *data)
631 struct evtchn_close close;
632 unsigned int irq = data->irq;
633 struct irq_info *info = info_for_irq(irq);
634 int evtchn = evtchn_from_irq(irq);
636 BUG_ON(info->type != IRQT_PIRQ);
638 if (!VALID_EVTCHN(evtchn))
639 return;
641 mask_evtchn(evtchn);
643 close.port = evtchn;
644 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
645 BUG();
647 bind_evtchn_to_cpu(evtchn, 0);
648 evtchn_to_irq[evtchn] = -1;
649 info->evtchn = 0;
652 static void enable_pirq(struct irq_data *data)
654 startup_pirq(data);
657 static void disable_pirq(struct irq_data *data)
659 disable_dynirq(data);
662 int xen_irq_from_gsi(unsigned gsi)
664 struct irq_info *info;
666 list_for_each_entry(info, &xen_irq_list_head, list) {
667 if (info->type != IRQT_PIRQ)
668 continue;
670 if (info->u.pirq.gsi == gsi)
671 return info->irq;
674 return -1;
676 EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
679 * Do not make any assumptions regarding the relationship between the
680 * IRQ number returned here and the Xen pirq argument.
682 * Note: We don't assign an event channel until the irq actually started
683 * up. Return an existing irq if we've already got one for the gsi.
685 * Shareable implies level triggered, not shareable implies edge
686 * triggered here.
688 int xen_bind_pirq_gsi_to_irq(unsigned gsi,
689 unsigned pirq, int shareable, char *name)
691 int irq = -1;
692 struct physdev_irq irq_op;
694 mutex_lock(&irq_mapping_update_lock);
696 irq = xen_irq_from_gsi(gsi);
697 if (irq != -1) {
698 pr_info("%s: returning irq %d for gsi %u\n",
699 __func__, irq, gsi);
700 goto out;
703 irq = xen_allocate_irq_gsi(gsi);
704 if (irq < 0)
705 goto out;
707 irq_op.irq = irq;
708 irq_op.vector = 0;
710 /* Only the privileged domain can do this. For non-priv, the pcifront
711 * driver provides a PCI bus that does the call to do exactly
712 * this in the priv domain. */
713 if (xen_initial_domain() &&
714 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
715 xen_free_irq(irq);
716 irq = -ENOSPC;
717 goto out;
720 xen_irq_info_pirq_init(irq, 0, pirq, gsi, DOMID_SELF,
721 shareable ? PIRQ_SHAREABLE : 0);
723 pirq_query_unmask(irq);
724 /* We try to use the handler with the appropriate semantic for the
725 * type of interrupt: if the interrupt is an edge triggered
726 * interrupt we use handle_edge_irq.
728 * On the other hand if the interrupt is level triggered we use
729 * handle_fasteoi_irq like the native code does for this kind of
730 * interrupts.
732 * Depending on the Xen version, pirq_needs_eoi might return true
733 * not only for level triggered interrupts but for edge triggered
734 * interrupts too. In any case Xen always honors the eoi mechanism,
735 * not injecting any more pirqs of the same kind if the first one
736 * hasn't received an eoi yet. Therefore using the fasteoi handler
737 * is the right choice either way.
739 if (shareable)
740 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
741 handle_fasteoi_irq, name);
742 else
743 irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
744 handle_edge_irq, name);
746 out:
747 mutex_unlock(&irq_mapping_update_lock);
749 return irq;
752 #ifdef CONFIG_PCI_MSI
753 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
755 int rc;
756 struct physdev_get_free_pirq op_get_free_pirq;
758 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
759 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
761 WARN_ONCE(rc == -ENOSYS,
762 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
764 return rc ? -1 : op_get_free_pirq.pirq;
767 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
768 int pirq, const char *name, domid_t domid)
770 int irq, ret;
772 mutex_lock(&irq_mapping_update_lock);
774 irq = xen_allocate_irq_dynamic();
775 if (irq < 0)
776 goto out;
778 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
779 name);
781 xen_irq_info_pirq_init(irq, 0, pirq, 0, domid, 0);
782 ret = irq_set_msi_desc(irq, msidesc);
783 if (ret < 0)
784 goto error_irq;
785 out:
786 mutex_unlock(&irq_mapping_update_lock);
787 return irq;
788 error_irq:
789 mutex_unlock(&irq_mapping_update_lock);
790 xen_free_irq(irq);
791 return ret;
793 #endif
795 int xen_destroy_irq(int irq)
797 struct irq_desc *desc;
798 struct physdev_unmap_pirq unmap_irq;
799 struct irq_info *info = info_for_irq(irq);
800 int rc = -ENOENT;
802 mutex_lock(&irq_mapping_update_lock);
804 desc = irq_to_desc(irq);
805 if (!desc)
806 goto out;
808 if (xen_initial_domain()) {
809 unmap_irq.pirq = info->u.pirq.pirq;
810 unmap_irq.domid = info->u.pirq.domid;
811 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
812 /* If another domain quits without making the pci_disable_msix
813 * call, the Xen hypervisor takes care of freeing the PIRQs
814 * (free_domain_pirqs).
816 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
817 pr_info("domain %d does not have %d anymore\n",
818 info->u.pirq.domid, info->u.pirq.pirq);
819 else if (rc) {
820 pr_warn("unmap irq failed %d\n", rc);
821 goto out;
825 xen_free_irq(irq);
827 out:
828 mutex_unlock(&irq_mapping_update_lock);
829 return rc;
832 int xen_irq_from_pirq(unsigned pirq)
834 int irq;
836 struct irq_info *info;
838 mutex_lock(&irq_mapping_update_lock);
840 list_for_each_entry(info, &xen_irq_list_head, list) {
841 if (info->type != IRQT_PIRQ)
842 continue;
843 irq = info->irq;
844 if (info->u.pirq.pirq == pirq)
845 goto out;
847 irq = -1;
848 out:
849 mutex_unlock(&irq_mapping_update_lock);
851 return irq;
855 int xen_pirq_from_irq(unsigned irq)
857 return pirq_from_irq(irq);
859 EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
860 int bind_evtchn_to_irq(unsigned int evtchn)
862 int irq;
864 mutex_lock(&irq_mapping_update_lock);
866 irq = evtchn_to_irq[evtchn];
868 if (irq == -1) {
869 irq = xen_allocate_irq_dynamic();
870 if (irq < 0)
871 goto out;
873 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
874 handle_edge_irq, "event");
876 xen_irq_info_evtchn_init(irq, evtchn);
877 } else {
878 struct irq_info *info = info_for_irq(irq);
879 WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
882 out:
883 mutex_unlock(&irq_mapping_update_lock);
885 return irq;
887 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
889 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
891 struct evtchn_bind_ipi bind_ipi;
892 int evtchn, irq;
894 mutex_lock(&irq_mapping_update_lock);
896 irq = per_cpu(ipi_to_irq, cpu)[ipi];
898 if (irq == -1) {
899 irq = xen_allocate_irq_dynamic();
900 if (irq < 0)
901 goto out;
903 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
904 handle_percpu_irq, "ipi");
906 bind_ipi.vcpu = cpu;
907 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
908 &bind_ipi) != 0)
909 BUG();
910 evtchn = bind_ipi.port;
912 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
914 bind_evtchn_to_cpu(evtchn, cpu);
915 } else {
916 struct irq_info *info = info_for_irq(irq);
917 WARN_ON(info == NULL || info->type != IRQT_IPI);
920 out:
921 mutex_unlock(&irq_mapping_update_lock);
922 return irq;
925 static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
926 unsigned int remote_port)
928 struct evtchn_bind_interdomain bind_interdomain;
929 int err;
931 bind_interdomain.remote_dom = remote_domain;
932 bind_interdomain.remote_port = remote_port;
934 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
935 &bind_interdomain);
937 return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
940 static int find_virq(unsigned int virq, unsigned int cpu)
942 struct evtchn_status status;
943 int port, rc = -ENOENT;
945 memset(&status, 0, sizeof(status));
946 for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
947 status.dom = DOMID_SELF;
948 status.port = port;
949 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
950 if (rc < 0)
951 continue;
952 if (status.status != EVTCHNSTAT_virq)
953 continue;
954 if (status.u.virq == virq && status.vcpu == cpu) {
955 rc = port;
956 break;
959 return rc;
962 int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
964 struct evtchn_bind_virq bind_virq;
965 int evtchn, irq, ret;
967 mutex_lock(&irq_mapping_update_lock);
969 irq = per_cpu(virq_to_irq, cpu)[virq];
971 if (irq == -1) {
972 irq = xen_allocate_irq_dynamic();
973 if (irq < 0)
974 goto out;
976 irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
977 handle_percpu_irq, "virq");
979 bind_virq.virq = virq;
980 bind_virq.vcpu = cpu;
981 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
982 &bind_virq);
983 if (ret == 0)
984 evtchn = bind_virq.port;
985 else {
986 if (ret == -EEXIST)
987 ret = find_virq(virq, cpu);
988 BUG_ON(ret < 0);
989 evtchn = ret;
992 xen_irq_info_virq_init(cpu, irq, evtchn, virq);
994 bind_evtchn_to_cpu(evtchn, cpu);
995 } else {
996 struct irq_info *info = info_for_irq(irq);
997 WARN_ON(info == NULL || info->type != IRQT_VIRQ);
1000 out:
1001 mutex_unlock(&irq_mapping_update_lock);
1003 return irq;
1006 static void unbind_from_irq(unsigned int irq)
1008 struct evtchn_close close;
1009 int evtchn = evtchn_from_irq(irq);
1010 struct irq_info *info = irq_get_handler_data(irq);
1012 if (WARN_ON(!info))
1013 return;
1015 mutex_lock(&irq_mapping_update_lock);
1017 if (info->refcnt > 0) {
1018 info->refcnt--;
1019 if (info->refcnt != 0)
1020 goto done;
1023 if (VALID_EVTCHN(evtchn)) {
1024 close.port = evtchn;
1025 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
1026 BUG();
1028 switch (type_from_irq(irq)) {
1029 case IRQT_VIRQ:
1030 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
1031 [virq_from_irq(irq)] = -1;
1032 break;
1033 case IRQT_IPI:
1034 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
1035 [ipi_from_irq(irq)] = -1;
1036 break;
1037 default:
1038 break;
1041 /* Closed ports are implicitly re-bound to VCPU0. */
1042 bind_evtchn_to_cpu(evtchn, 0);
1044 evtchn_to_irq[evtchn] = -1;
1047 BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
1049 xen_free_irq(irq);
1051 done:
1052 mutex_unlock(&irq_mapping_update_lock);
1055 int bind_evtchn_to_irqhandler(unsigned int evtchn,
1056 irq_handler_t handler,
1057 unsigned long irqflags,
1058 const char *devname, void *dev_id)
1060 int irq, retval;
1062 irq = bind_evtchn_to_irq(evtchn);
1063 if (irq < 0)
1064 return irq;
1065 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1066 if (retval != 0) {
1067 unbind_from_irq(irq);
1068 return retval;
1071 return irq;
1073 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
1075 int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
1076 unsigned int remote_port,
1077 irq_handler_t handler,
1078 unsigned long irqflags,
1079 const char *devname,
1080 void *dev_id)
1082 int irq, retval;
1084 irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
1085 if (irq < 0)
1086 return irq;
1088 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1089 if (retval != 0) {
1090 unbind_from_irq(irq);
1091 return retval;
1094 return irq;
1096 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
1098 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
1099 irq_handler_t handler,
1100 unsigned long irqflags, const char *devname, void *dev_id)
1102 int irq, retval;
1104 irq = bind_virq_to_irq(virq, cpu);
1105 if (irq < 0)
1106 return irq;
1107 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1108 if (retval != 0) {
1109 unbind_from_irq(irq);
1110 return retval;
1113 return irq;
1115 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
1117 int bind_ipi_to_irqhandler(enum ipi_vector ipi,
1118 unsigned int cpu,
1119 irq_handler_t handler,
1120 unsigned long irqflags,
1121 const char *devname,
1122 void *dev_id)
1124 int irq, retval;
1126 irq = bind_ipi_to_irq(ipi, cpu);
1127 if (irq < 0)
1128 return irq;
1130 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
1131 retval = request_irq(irq, handler, irqflags, devname, dev_id);
1132 if (retval != 0) {
1133 unbind_from_irq(irq);
1134 return retval;
1137 return irq;
1140 void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1142 struct irq_info *info = irq_get_handler_data(irq);
1144 if (WARN_ON(!info))
1145 return;
1146 free_irq(irq, dev_id);
1147 unbind_from_irq(irq);
1149 EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1151 int evtchn_make_refcounted(unsigned int evtchn)
1153 int irq = evtchn_to_irq[evtchn];
1154 struct irq_info *info;
1156 if (irq == -1)
1157 return -ENOENT;
1159 info = irq_get_handler_data(irq);
1161 if (!info)
1162 return -ENOENT;
1164 WARN_ON(info->refcnt != -1);
1166 info->refcnt = 1;
1168 return 0;
1170 EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
1172 int evtchn_get(unsigned int evtchn)
1174 int irq;
1175 struct irq_info *info;
1176 int err = -ENOENT;
1178 if (evtchn >= NR_EVENT_CHANNELS)
1179 return -EINVAL;
1181 mutex_lock(&irq_mapping_update_lock);
1183 irq = evtchn_to_irq[evtchn];
1184 if (irq == -1)
1185 goto done;
1187 info = irq_get_handler_data(irq);
1189 if (!info)
1190 goto done;
1192 err = -EINVAL;
1193 if (info->refcnt <= 0)
1194 goto done;
1196 info->refcnt++;
1197 err = 0;
1198 done:
1199 mutex_unlock(&irq_mapping_update_lock);
1201 return err;
1203 EXPORT_SYMBOL_GPL(evtchn_get);
1205 void evtchn_put(unsigned int evtchn)
1207 int irq = evtchn_to_irq[evtchn];
1208 if (WARN_ON(irq == -1))
1209 return;
1210 unbind_from_irq(irq);
1212 EXPORT_SYMBOL_GPL(evtchn_put);
1214 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1216 int irq;
1218 #ifdef CONFIG_X86
1219 if (unlikely(vector == XEN_NMI_VECTOR)) {
1220 int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, cpu, NULL);
1221 if (rc < 0)
1222 printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
1223 return;
1225 #endif
1226 irq = per_cpu(ipi_to_irq, cpu)[vector];
1227 BUG_ON(irq < 0);
1228 notify_remote_via_irq(irq);
1231 irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
1233 struct shared_info *sh = HYPERVISOR_shared_info;
1234 int cpu = smp_processor_id();
1235 xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
1236 int i;
1237 unsigned long flags;
1238 static DEFINE_SPINLOCK(debug_lock);
1239 struct vcpu_info *v;
1241 spin_lock_irqsave(&debug_lock, flags);
1243 printk("\nvcpu %d\n ", cpu);
1245 for_each_online_cpu(i) {
1246 int pending;
1247 v = per_cpu(xen_vcpu, i);
1248 pending = (get_irq_regs() && i == cpu)
1249 ? xen_irqs_disabled(get_irq_regs())
1250 : v->evtchn_upcall_mask;
1251 printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
1252 pending, v->evtchn_upcall_pending,
1253 (int)(sizeof(v->evtchn_pending_sel)*2),
1254 v->evtchn_pending_sel);
1256 v = per_cpu(xen_vcpu, cpu);
1258 printk("\npending:\n ");
1259 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
1260 printk("%0*"PRI_xen_ulong"%s",
1261 (int)sizeof(sh->evtchn_pending[0])*2,
1262 sh->evtchn_pending[i],
1263 i % 8 == 0 ? "\n " : " ");
1264 printk("\nglobal mask:\n ");
1265 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1266 printk("%0*"PRI_xen_ulong"%s",
1267 (int)(sizeof(sh->evtchn_mask[0])*2),
1268 sh->evtchn_mask[i],
1269 i % 8 == 0 ? "\n " : " ");
1271 printk("\nglobally unmasked:\n ");
1272 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
1273 printk("%0*"PRI_xen_ulong"%s",
1274 (int)(sizeof(sh->evtchn_mask[0])*2),
1275 sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
1276 i % 8 == 0 ? "\n " : " ");
1278 printk("\nlocal cpu%d mask:\n ", cpu);
1279 for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
1280 printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
1281 cpu_evtchn[i],
1282 i % 8 == 0 ? "\n " : " ");
1284 printk("\nlocally unmasked:\n ");
1285 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
1286 xen_ulong_t pending = sh->evtchn_pending[i]
1287 & ~sh->evtchn_mask[i]
1288 & cpu_evtchn[i];
1289 printk("%0*"PRI_xen_ulong"%s",
1290 (int)(sizeof(sh->evtchn_mask[0])*2),
1291 pending, i % 8 == 0 ? "\n " : " ");
1294 printk("\npending list:\n");
1295 for (i = 0; i < NR_EVENT_CHANNELS; i++) {
1296 if (sync_test_bit(i, BM(sh->evtchn_pending))) {
1297 int word_idx = i / BITS_PER_EVTCHN_WORD;
1298 printk(" %d: event %d -> irq %d%s%s%s\n",
1299 cpu_from_evtchn(i), i,
1300 evtchn_to_irq[i],
1301 sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
1302 ? "" : " l2-clear",
1303 !sync_test_bit(i, BM(sh->evtchn_mask))
1304 ? "" : " globally-masked",
1305 sync_test_bit(i, BM(cpu_evtchn))
1306 ? "" : " locally-masked");
1310 spin_unlock_irqrestore(&debug_lock, flags);
1312 return IRQ_HANDLED;
1315 static DEFINE_PER_CPU(unsigned, xed_nesting_count);
1316 static DEFINE_PER_CPU(unsigned int, current_word_idx);
1317 static DEFINE_PER_CPU(unsigned int, current_bit_idx);
1320 * Mask out the i least significant bits of w
1322 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
1325 * Search the CPUs pending events bitmasks. For each one found, map
1326 * the event number to an irq, and feed it into do_IRQ() for
1327 * handling.
1329 * Xen uses a two-level bitmap to speed searching. The first level is
1330 * a bitset of words which contain pending event bits. The second
1331 * level is a bitset of pending events themselves.
1333 static void __xen_evtchn_do_upcall(void)
1335 int start_word_idx, start_bit_idx;
1336 int word_idx, bit_idx;
1337 int i, irq;
1338 int cpu = get_cpu();
1339 struct shared_info *s = HYPERVISOR_shared_info;
1340 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1341 unsigned count;
1343 do {
1344 xen_ulong_t pending_words;
1345 xen_ulong_t pending_bits;
1346 struct irq_desc *desc;
1348 vcpu_info->evtchn_upcall_pending = 0;
1350 if (__this_cpu_inc_return(xed_nesting_count) - 1)
1351 goto out;
1354 * Master flag must be cleared /before/ clearing
1355 * selector flag. xchg_xen_ulong must contain an
1356 * appropriate barrier.
1358 if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) {
1359 int evtchn = evtchn_from_irq(irq);
1360 word_idx = evtchn / BITS_PER_LONG;
1361 pending_bits = evtchn % BITS_PER_LONG;
1362 if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) {
1363 desc = irq_to_desc(irq);
1364 if (desc)
1365 generic_handle_irq_desc(irq, desc);
1369 pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
1371 start_word_idx = __this_cpu_read(current_word_idx);
1372 start_bit_idx = __this_cpu_read(current_bit_idx);
1374 word_idx = start_word_idx;
1376 for (i = 0; pending_words != 0; i++) {
1377 xen_ulong_t words;
1379 words = MASK_LSBS(pending_words, word_idx);
1382 * If we masked out all events, wrap to beginning.
1384 if (words == 0) {
1385 word_idx = 0;
1386 bit_idx = 0;
1387 continue;
1389 word_idx = EVTCHN_FIRST_BIT(words);
1391 pending_bits = active_evtchns(cpu, s, word_idx);
1392 bit_idx = 0; /* usually scan entire word from start */
1394 * We scan the starting word in two parts.
1396 * 1st time: start in the middle, scanning the
1397 * upper bits.
1399 * 2nd time: scan the whole word (not just the
1400 * parts skipped in the first pass) -- if an
1401 * event in the previously scanned bits is
1402 * pending again it would just be scanned on
1403 * the next loop anyway.
1405 if (word_idx == start_word_idx) {
1406 if (i == 0)
1407 bit_idx = start_bit_idx;
1410 do {
1411 xen_ulong_t bits;
1412 int port;
1414 bits = MASK_LSBS(pending_bits, bit_idx);
1416 /* If we masked out all events, move on. */
1417 if (bits == 0)
1418 break;
1420 bit_idx = EVTCHN_FIRST_BIT(bits);
1422 /* Process port. */
1423 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
1424 irq = evtchn_to_irq[port];
1426 if (irq != -1) {
1427 desc = irq_to_desc(irq);
1428 if (desc)
1429 generic_handle_irq_desc(irq, desc);
1432 bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
1434 /* Next caller starts at last processed + 1 */
1435 __this_cpu_write(current_word_idx,
1436 bit_idx ? word_idx :
1437 (word_idx+1) % BITS_PER_EVTCHN_WORD);
1438 __this_cpu_write(current_bit_idx, bit_idx);
1439 } while (bit_idx != 0);
1441 /* Scan start_l1i twice; all others once. */
1442 if ((word_idx != start_word_idx) || (i != 0))
1443 pending_words &= ~(1UL << word_idx);
1445 word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
1448 BUG_ON(!irqs_disabled());
1450 count = __this_cpu_read(xed_nesting_count);
1451 __this_cpu_write(xed_nesting_count, 0);
1452 } while (count != 1 || vcpu_info->evtchn_upcall_pending);
1454 out:
1456 put_cpu();
1459 void xen_evtchn_do_upcall(struct pt_regs *regs)
1461 struct pt_regs *old_regs = set_irq_regs(regs);
1463 irq_enter();
1464 #ifdef CONFIG_X86
1465 exit_idle();
1466 #endif
1468 __xen_evtchn_do_upcall();
1470 irq_exit();
1471 set_irq_regs(old_regs);
1474 void xen_hvm_evtchn_do_upcall(void)
1476 __xen_evtchn_do_upcall();
1478 EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
1480 /* Rebind a new event channel to an existing irq. */
1481 void rebind_evtchn_irq(int evtchn, int irq)
1483 struct irq_info *info = info_for_irq(irq);
1485 if (WARN_ON(!info))
1486 return;
1488 /* Make sure the irq is masked, since the new event channel
1489 will also be masked. */
1490 disable_irq(irq);
1492 mutex_lock(&irq_mapping_update_lock);
1494 /* After resume the irq<->evtchn mappings are all cleared out */
1495 BUG_ON(evtchn_to_irq[evtchn] != -1);
1496 /* Expect irq to have been bound before,
1497 so there should be a proper type */
1498 BUG_ON(info->type == IRQT_UNBOUND);
1500 xen_irq_info_evtchn_init(irq, evtchn);
1502 mutex_unlock(&irq_mapping_update_lock);
1504 /* new event channels are always bound to cpu 0 */
1505 irq_set_affinity(irq, cpumask_of(0));
1507 /* Unmask the event channel. */
1508 enable_irq(irq);
1511 /* Rebind an evtchn so that it gets delivered to a specific cpu */
1512 static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
1514 struct shared_info *s = HYPERVISOR_shared_info;
1515 struct evtchn_bind_vcpu bind_vcpu;
1516 int evtchn = evtchn_from_irq(irq);
1517 int masked;
1519 if (!VALID_EVTCHN(evtchn))
1520 return -1;
1523 * Events delivered via platform PCI interrupts are always
1524 * routed to vcpu 0 and hence cannot be rebound.
1526 if (xen_hvm_domain() && !xen_have_vector_callback)
1527 return -1;
1529 /* Send future instances of this interrupt to other vcpu. */
1530 bind_vcpu.port = evtchn;
1531 bind_vcpu.vcpu = tcpu;
1534 * Mask the event while changing the VCPU binding to prevent
1535 * it being delivered on an unexpected VCPU.
1537 masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask));
1540 * If this fails, it usually just indicates that we're dealing with a
1541 * virq or IPI channel, which don't actually need to be rebound. Ignore
1542 * it, but don't do the xenlinux-level rebind in that case.
1544 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1545 bind_evtchn_to_cpu(evtchn, tcpu);
1547 if (!masked)
1548 unmask_evtchn(evtchn);
1550 return 0;
1553 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1554 bool force)
1556 unsigned tcpu = cpumask_first(dest);
1558 return rebind_irq_to_cpu(data->irq, tcpu);
1561 int resend_irq_on_evtchn(unsigned int irq)
1563 int masked, evtchn = evtchn_from_irq(irq);
1564 struct shared_info *s = HYPERVISOR_shared_info;
1566 if (!VALID_EVTCHN(evtchn))
1567 return 1;
1569 masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask));
1570 sync_set_bit(evtchn, BM(s->evtchn_pending));
1571 if (!masked)
1572 unmask_evtchn(evtchn);
1574 return 1;
1577 static void enable_dynirq(struct irq_data *data)
1579 int evtchn = evtchn_from_irq(data->irq);
1581 if (VALID_EVTCHN(evtchn))
1582 unmask_evtchn(evtchn);
1585 static void disable_dynirq(struct irq_data *data)
1587 int evtchn = evtchn_from_irq(data->irq);
1589 if (VALID_EVTCHN(evtchn))
1590 mask_evtchn(evtchn);
1593 static void ack_dynirq(struct irq_data *data)
1595 int evtchn = evtchn_from_irq(data->irq);
1597 irq_move_irq(data);
1599 if (VALID_EVTCHN(evtchn))
1600 clear_evtchn(evtchn);
1603 static void mask_ack_dynirq(struct irq_data *data)
1605 disable_dynirq(data);
1606 ack_dynirq(data);
1609 static int retrigger_dynirq(struct irq_data *data)
1611 int evtchn = evtchn_from_irq(data->irq);
1612 struct shared_info *sh = HYPERVISOR_shared_info;
1613 int ret = 0;
1615 if (VALID_EVTCHN(evtchn)) {
1616 int masked;
1618 masked = sync_test_and_set_bit(evtchn, BM(sh->evtchn_mask));
1619 sync_set_bit(evtchn, BM(sh->evtchn_pending));
1620 if (!masked)
1621 unmask_evtchn(evtchn);
1622 ret = 1;
1625 return ret;
1628 static void restore_pirqs(void)
1630 int pirq, rc, irq, gsi;
1631 struct physdev_map_pirq map_irq;
1632 struct irq_info *info;
1634 list_for_each_entry(info, &xen_irq_list_head, list) {
1635 if (info->type != IRQT_PIRQ)
1636 continue;
1638 pirq = info->u.pirq.pirq;
1639 gsi = info->u.pirq.gsi;
1640 irq = info->irq;
1642 /* save/restore of PT devices doesn't work, so at this point the
1643 * only devices present are GSI based emulated devices */
1644 if (!gsi)
1645 continue;
1647 map_irq.domid = DOMID_SELF;
1648 map_irq.type = MAP_PIRQ_TYPE_GSI;
1649 map_irq.index = gsi;
1650 map_irq.pirq = pirq;
1652 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1653 if (rc) {
1654 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1655 gsi, irq, pirq, rc);
1656 xen_free_irq(irq);
1657 continue;
1660 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1662 __startup_pirq(irq);
1666 static void restore_cpu_virqs(unsigned int cpu)
1668 struct evtchn_bind_virq bind_virq;
1669 int virq, irq, evtchn;
1671 for (virq = 0; virq < NR_VIRQS; virq++) {
1672 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1673 continue;
1675 BUG_ON(virq_from_irq(irq) != virq);
1677 /* Get a new binding from Xen. */
1678 bind_virq.virq = virq;
1679 bind_virq.vcpu = cpu;
1680 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1681 &bind_virq) != 0)
1682 BUG();
1683 evtchn = bind_virq.port;
1685 /* Record the new mapping. */
1686 xen_irq_info_virq_init(cpu, irq, evtchn, virq);
1687 bind_evtchn_to_cpu(evtchn, cpu);
1691 static void restore_cpu_ipis(unsigned int cpu)
1693 struct evtchn_bind_ipi bind_ipi;
1694 int ipi, irq, evtchn;
1696 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1697 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1698 continue;
1700 BUG_ON(ipi_from_irq(irq) != ipi);
1702 /* Get a new binding from Xen. */
1703 bind_ipi.vcpu = cpu;
1704 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1705 &bind_ipi) != 0)
1706 BUG();
1707 evtchn = bind_ipi.port;
1709 /* Record the new mapping. */
1710 xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
1711 bind_evtchn_to_cpu(evtchn, cpu);
1715 /* Clear an irq's pending state, in preparation for polling on it */
1716 void xen_clear_irq_pending(int irq)
1718 int evtchn = evtchn_from_irq(irq);
1720 if (VALID_EVTCHN(evtchn))
1721 clear_evtchn(evtchn);
1723 EXPORT_SYMBOL(xen_clear_irq_pending);
1724 void xen_set_irq_pending(int irq)
1726 int evtchn = evtchn_from_irq(irq);
1728 if (VALID_EVTCHN(evtchn))
1729 set_evtchn(evtchn);
1732 bool xen_test_irq_pending(int irq)
1734 int evtchn = evtchn_from_irq(irq);
1735 bool ret = false;
1737 if (VALID_EVTCHN(evtchn))
1738 ret = test_evtchn(evtchn);
1740 return ret;
1743 /* Poll waiting for an irq to become pending with timeout. In the usual case,
1744 * the irq will be disabled so it won't deliver an interrupt. */
1745 void xen_poll_irq_timeout(int irq, u64 timeout)
1747 evtchn_port_t evtchn = evtchn_from_irq(irq);
1749 if (VALID_EVTCHN(evtchn)) {
1750 struct sched_poll poll;
1752 poll.nr_ports = 1;
1753 poll.timeout = timeout;
1754 set_xen_guest_handle(poll.ports, &evtchn);
1756 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1757 BUG();
1760 EXPORT_SYMBOL(xen_poll_irq_timeout);
1761 /* Poll waiting for an irq to become pending. In the usual case, the
1762 * irq will be disabled so it won't deliver an interrupt. */
1763 void xen_poll_irq(int irq)
1765 xen_poll_irq_timeout(irq, 0 /* no timeout */);
1768 /* Check whether the IRQ line is shared with other guests. */
1769 int xen_test_irq_shared(int irq)
1771 struct irq_info *info = info_for_irq(irq);
1772 struct physdev_irq_status_query irq_status;
1774 if (WARN_ON(!info))
1775 return -ENOENT;
1777 irq_status.irq = info->u.pirq.pirq;
1779 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
1780 return 0;
1781 return !(irq_status.flags & XENIRQSTAT_shared);
1783 EXPORT_SYMBOL_GPL(xen_test_irq_shared);
1785 void xen_irq_resume(void)
1787 unsigned int cpu, evtchn;
1788 struct irq_info *info;
1790 init_evtchn_cpu_bindings();
1792 /* New event-channel space is not 'live' yet. */
1793 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1794 mask_evtchn(evtchn);
1796 /* No IRQ <-> event-channel mappings. */
1797 list_for_each_entry(info, &xen_irq_list_head, list)
1798 info->evtchn = 0; /* zap event-channel binding */
1800 for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
1801 evtchn_to_irq[evtchn] = -1;
1803 for_each_possible_cpu(cpu) {
1804 restore_cpu_virqs(cpu);
1805 restore_cpu_ipis(cpu);
1808 restore_pirqs();
1811 static struct irq_chip xen_dynamic_chip __read_mostly = {
1812 .name = "xen-dyn",
1814 .irq_disable = disable_dynirq,
1815 .irq_mask = disable_dynirq,
1816 .irq_unmask = enable_dynirq,
1818 .irq_ack = ack_dynirq,
1819 .irq_mask_ack = mask_ack_dynirq,
1821 .irq_set_affinity = set_affinity_irq,
1822 .irq_retrigger = retrigger_dynirq,
1825 static struct irq_chip xen_pirq_chip __read_mostly = {
1826 .name = "xen-pirq",
1828 .irq_startup = startup_pirq,
1829 .irq_shutdown = shutdown_pirq,
1830 .irq_enable = enable_pirq,
1831 .irq_disable = disable_pirq,
1833 .irq_mask = disable_dynirq,
1834 .irq_unmask = enable_dynirq,
1836 .irq_ack = eoi_pirq,
1837 .irq_eoi = eoi_pirq,
1838 .irq_mask_ack = mask_ack_pirq,
1840 .irq_set_affinity = set_affinity_irq,
1842 .irq_retrigger = retrigger_dynirq,
1845 static struct irq_chip xen_percpu_chip __read_mostly = {
1846 .name = "xen-percpu",
1848 .irq_disable = disable_dynirq,
1849 .irq_mask = disable_dynirq,
1850 .irq_unmask = enable_dynirq,
1852 .irq_ack = ack_dynirq,
1855 int xen_set_callback_via(uint64_t via)
1857 struct xen_hvm_param a;
1858 a.domid = DOMID_SELF;
1859 a.index = HVM_PARAM_CALLBACK_IRQ;
1860 a.value = via;
1861 return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
1863 EXPORT_SYMBOL_GPL(xen_set_callback_via);
1865 #ifdef CONFIG_XEN_PVHVM
1866 /* Vector callbacks are better than PCI interrupts to receive event
1867 * channel notifications because we can receive vector callbacks on any
1868 * vcpu and we don't need PCI support or APIC interactions. */
1869 void xen_callback_vector(void)
1871 int rc;
1872 uint64_t callback_via;
1873 if (xen_have_vector_callback) {
1874 callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
1875 rc = xen_set_callback_via(callback_via);
1876 if (rc) {
1877 pr_err("Request for Xen HVM callback vector failed\n");
1878 xen_have_vector_callback = 0;
1879 return;
1881 pr_info("Xen HVM callback vector for event delivery is enabled\n");
1882 /* in the restore case the vector has already been allocated */
1883 if (!test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors))
1884 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR,
1885 xen_hvm_callback_vector);
1888 #else
1889 void xen_callback_vector(void) {}
1890 #endif
1892 void __init xen_init_IRQ(void)
1894 int i;
1896 evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
1897 GFP_KERNEL);
1898 BUG_ON(!evtchn_to_irq);
1899 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1900 evtchn_to_irq[i] = -1;
1902 init_evtchn_cpu_bindings();
1904 /* No event channels are 'live' right now. */
1905 for (i = 0; i < NR_EVENT_CHANNELS; i++)
1906 mask_evtchn(i);
1908 pirq_needs_eoi = pirq_needs_eoi_flag;
1910 #ifdef CONFIG_X86
1911 if (xen_hvm_domain()) {
1912 xen_callback_vector();
1913 native_init_IRQ();
1914 /* pci_xen_hvm_init must be called after native_init_IRQ so that
1915 * __acpi_register_gsi can point at the right function */
1916 pci_xen_hvm_init();
1917 } else {
1918 int rc;
1919 struct physdev_pirq_eoi_gmfn eoi_gmfn;
1921 irq_ctx_init(smp_processor_id());
1922 if (xen_initial_domain())
1923 pci_xen_initial_domain();
1925 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
1926 eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
1927 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
1928 if (rc != 0) {
1929 free_page((unsigned long) pirq_eoi_map);
1930 pirq_eoi_map = NULL;
1931 } else
1932 pirq_needs_eoi = pirq_check_eoi_map;
1934 #endif