2 * twl6030-irq.c - TWL6030 irq support
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/export.h>
35 #include <linux/interrupt.h>
36 #include <linux/irq.h>
37 #include <linux/kthread.h>
38 #include <linux/mfd/twl.h>
39 #include <linux/platform_device.h>
40 #include <linux/suspend.h>
42 #include <linux/irqdomain.h>
43 #include <linux/of_device.h>
48 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
49 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
50 * It exposes status bits saying who has raised an interrupt. There are
51 * three mask registers that corresponds to these status registers, that
52 * enables/disables these interrupts.
54 * We set up IRQs starting at a platform-specified base. An interrupt map table,
55 * specifies mapping between interrupt number and the associated module.
57 #define TWL6030_NR_IRQS 20
59 static int twl6030_interrupt_mapping
[24] = {
60 PWR_INTR_OFFSET
, /* Bit 0 PWRON */
61 PWR_INTR_OFFSET
, /* Bit 1 RPWRON */
62 PWR_INTR_OFFSET
, /* Bit 2 BAT_VLOW */
63 RTC_INTR_OFFSET
, /* Bit 3 RTC_ALARM */
64 RTC_INTR_OFFSET
, /* Bit 4 RTC_PERIOD */
65 HOTDIE_INTR_OFFSET
, /* Bit 5 HOT_DIE */
66 SMPSLDO_INTR_OFFSET
, /* Bit 6 VXXX_SHORT */
67 SMPSLDO_INTR_OFFSET
, /* Bit 7 VMMC_SHORT */
69 SMPSLDO_INTR_OFFSET
, /* Bit 8 VUSIM_SHORT */
70 BATDETECT_INTR_OFFSET
, /* Bit 9 BAT */
71 SIMDETECT_INTR_OFFSET
, /* Bit 10 SIM */
72 MMCDETECT_INTR_OFFSET
, /* Bit 11 MMC */
73 RSV_INTR_OFFSET
, /* Bit 12 Reserved */
74 MADC_INTR_OFFSET
, /* Bit 13 GPADC_RT_EOC */
75 MADC_INTR_OFFSET
, /* Bit 14 GPADC_SW_EOC */
76 GASGAUGE_INTR_OFFSET
, /* Bit 15 CC_AUTOCAL */
78 USBOTG_INTR_OFFSET
, /* Bit 16 ID_WKUP */
79 USBOTG_INTR_OFFSET
, /* Bit 17 VBUS_WKUP */
80 USBOTG_INTR_OFFSET
, /* Bit 18 ID */
81 USB_PRES_INTR_OFFSET
, /* Bit 19 VBUS */
82 CHARGER_INTR_OFFSET
, /* Bit 20 CHRG_CTRL */
83 CHARGERFAULT_INTR_OFFSET
, /* Bit 21 EXT_CHRG */
84 CHARGERFAULT_INTR_OFFSET
, /* Bit 22 INT_CHRG */
85 RSV_INTR_OFFSET
, /* Bit 23 Reserved */
88 static int twl6032_interrupt_mapping
[24] = {
89 PWR_INTR_OFFSET
, /* Bit 0 PWRON */
90 PWR_INTR_OFFSET
, /* Bit 1 RPWRON */
91 PWR_INTR_OFFSET
, /* Bit 2 SYS_VLOW */
92 RTC_INTR_OFFSET
, /* Bit 3 RTC_ALARM */
93 RTC_INTR_OFFSET
, /* Bit 4 RTC_PERIOD */
94 HOTDIE_INTR_OFFSET
, /* Bit 5 HOT_DIE */
95 SMPSLDO_INTR_OFFSET
, /* Bit 6 VXXX_SHORT */
96 PWR_INTR_OFFSET
, /* Bit 7 SPDURATION */
98 PWR_INTR_OFFSET
, /* Bit 8 WATCHDOG */
99 BATDETECT_INTR_OFFSET
, /* Bit 9 BAT */
100 SIMDETECT_INTR_OFFSET
, /* Bit 10 SIM */
101 MMCDETECT_INTR_OFFSET
, /* Bit 11 MMC */
102 MADC_INTR_OFFSET
, /* Bit 12 GPADC_RT_EOC */
103 MADC_INTR_OFFSET
, /* Bit 13 GPADC_SW_EOC */
104 GASGAUGE_INTR_OFFSET
, /* Bit 14 CC_EOC */
105 GASGAUGE_INTR_OFFSET
, /* Bit 15 CC_AUTOCAL */
107 USBOTG_INTR_OFFSET
, /* Bit 16 ID_WKUP */
108 USBOTG_INTR_OFFSET
, /* Bit 17 VBUS_WKUP */
109 USBOTG_INTR_OFFSET
, /* Bit 18 ID */
110 USB_PRES_INTR_OFFSET
, /* Bit 19 VBUS */
111 CHARGER_INTR_OFFSET
, /* Bit 20 CHRG_CTRL */
112 CHARGERFAULT_INTR_OFFSET
, /* Bit 21 EXT_CHRG */
113 CHARGERFAULT_INTR_OFFSET
, /* Bit 22 INT_CHRG */
114 RSV_INTR_OFFSET
, /* Bit 23 Reserved */
117 /*----------------------------------------------------------------------*/
120 unsigned int irq_base
;
122 bool irq_wake_enabled
;
124 struct notifier_block pm_nb
;
125 struct irq_chip irq_chip
;
126 struct irq_domain
*irq_domain
;
127 const int *irq_mapping_tbl
;
130 static struct twl6030_irq
*twl6030_irq
;
132 static int twl6030_irq_pm_notifier(struct notifier_block
*notifier
,
133 unsigned long pm_event
, void *unused
)
136 struct twl6030_irq
*pdata
= container_of(notifier
, struct twl6030_irq
,
140 case PM_SUSPEND_PREPARE
:
141 chained_wakeups
= atomic_read(&pdata
->wakeirqs
);
143 if (chained_wakeups
&& !pdata
->irq_wake_enabled
) {
144 if (enable_irq_wake(pdata
->twl_irq
))
145 pr_err("twl6030 IRQ wake enable failed\n");
147 pdata
->irq_wake_enabled
= true;
148 } else if (!chained_wakeups
&& pdata
->irq_wake_enabled
) {
149 disable_irq_wake(pdata
->twl_irq
);
150 pdata
->irq_wake_enabled
= false;
153 disable_irq(pdata
->twl_irq
);
156 case PM_POST_SUSPEND
:
157 enable_irq(pdata
->twl_irq
);
168 * Threaded irq handler for the twl6030 interrupt.
169 * We query the interrupt controller in the twl6030 to determine
170 * which module is generating the interrupt request and call
171 * handle_nested_irq for that module.
173 static irqreturn_t
twl6030_irq_thread(int irq
, void *data
)
180 u32 int_sts
; /* sts.int_sts converted to CPU endianness */
181 struct twl6030_irq
*pdata
= data
;
183 /* read INT_STS_A, B and C in one shot using a burst read */
184 ret
= twl_i2c_read(TWL_MODULE_PIH
, sts
.bytes
, REG_INT_STS_A
, 3);
186 pr_warn("twl6030_irq: I2C error %d reading PIH ISR\n", ret
);
190 sts
.bytes
[3] = 0; /* Only 24 bits are valid*/
193 * Since VBUS status bit is not reliable for VBUS disconnect
194 * use CHARGER VBUS detection status bit instead.
196 if (sts
.bytes
[2] & 0x10)
197 sts
.bytes
[2] |= 0x08;
199 int_sts
= le32_to_cpu(sts
.int_sts
);
200 for (i
= 0; int_sts
; int_sts
>>= 1, i
++)
203 irq_find_mapping(pdata
->irq_domain
,
204 pdata
->irq_mapping_tbl
[i
]);
206 handle_nested_irq(module_irq
);
208 pr_err("twl6030_irq: Unmapped PIH ISR %u detected\n",
210 pr_debug("twl6030_irq: PIH ISR %u, virq%u\n",
216 * Simulation confirms that documentation is wrong w.r.t the
217 * interrupt status clear operation. A single *byte* write to
218 * any one of STS_A to STS_C register results in all three
219 * STS registers being reset. Since it does not matter which
220 * value is written, all three registers are cleared on a
221 * single byte write, so we just use 0x0 to clear.
223 ret
= twl_i2c_write_u8(TWL_MODULE_PIH
, 0x00, REG_INT_STS_A
);
225 pr_warn("twl6030_irq: I2C error in clearing PIH ISR\n");
230 /*----------------------------------------------------------------------*/
232 static int twl6030_irq_set_wake(struct irq_data
*d
, unsigned int on
)
234 struct twl6030_irq
*pdata
= irq_data_get_irq_chip_data(d
);
237 atomic_inc(&pdata
->wakeirqs
);
239 atomic_dec(&pdata
->wakeirqs
);
244 int twl6030_interrupt_unmask(u8 bit_mask
, u8 offset
)
249 ret
= twl_i2c_read_u8(TWL_MODULE_PIH
, &unmask_value
,
250 REG_INT_STS_A
+ offset
);
251 unmask_value
&= (~(bit_mask
));
252 ret
|= twl_i2c_write_u8(TWL_MODULE_PIH
, unmask_value
,
253 REG_INT_STS_A
+ offset
); /* unmask INT_MSK_A/B/C */
256 EXPORT_SYMBOL(twl6030_interrupt_unmask
);
258 int twl6030_interrupt_mask(u8 bit_mask
, u8 offset
)
263 ret
= twl_i2c_read_u8(TWL_MODULE_PIH
, &mask_value
,
264 REG_INT_STS_A
+ offset
);
265 mask_value
|= (bit_mask
);
266 ret
|= twl_i2c_write_u8(TWL_MODULE_PIH
, mask_value
,
267 REG_INT_STS_A
+ offset
); /* mask INT_MSK_A/B/C */
270 EXPORT_SYMBOL(twl6030_interrupt_mask
);
272 int twl6030_mmc_card_detect_config(void)
277 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
278 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK
,
280 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK
,
283 * Initially Configuring MMC_CTRL for receiving interrupts &
284 * Card status on TWL6030 for MMC1
286 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, ®_val
, TWL6030_MMCCTRL
);
288 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret
);
291 reg_val
&= ~VMMC_AUTO_OFF
;
293 ret
= twl_i2c_write_u8(TWL6030_MODULE_ID0
, reg_val
, TWL6030_MMCCTRL
);
295 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret
);
299 /* Configuring PullUp-PullDown register */
300 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, ®_val
,
301 TWL6030_CFG_INPUT_PUPD3
);
303 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
307 reg_val
&= ~(MMC_PU
| MMC_PD
);
308 ret
= twl_i2c_write_u8(TWL6030_MODULE_ID0
, reg_val
,
309 TWL6030_CFG_INPUT_PUPD3
);
311 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
316 return irq_find_mapping(twl6030_irq
->irq_domain
,
317 MMCDETECT_INTR_OFFSET
);
319 EXPORT_SYMBOL(twl6030_mmc_card_detect_config
);
321 int twl6030_mmc_card_detect(struct device
*dev
, int slot
)
325 struct platform_device
*pdev
= to_platform_device(dev
);
328 /* TWL6030 provide's Card detect support for
329 * only MMC1 controller.
331 pr_err("Unknown MMC controller %d in %s\n", pdev
->id
, __func__
);
335 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
336 * 0 - Card not present ,1 - Card present
338 ret
= twl_i2c_read_u8(TWL6030_MODULE_ID0
, &read_reg
,
341 ret
= read_reg
& STS_MMC
;
344 EXPORT_SYMBOL(twl6030_mmc_card_detect
);
346 static int twl6030_irq_map(struct irq_domain
*d
, unsigned int virq
,
347 irq_hw_number_t hwirq
)
349 struct twl6030_irq
*pdata
= d
->host_data
;
351 irq_set_chip_data(virq
, pdata
);
352 irq_set_chip_and_handler(virq
, &pdata
->irq_chip
, handle_simple_irq
);
353 irq_set_nested_thread(virq
, true);
354 irq_set_parent(virq
, pdata
->twl_irq
);
355 irq_set_noprobe(virq
);
360 static void twl6030_irq_unmap(struct irq_domain
*d
, unsigned int virq
)
362 irq_set_chip_and_handler(virq
, NULL
, NULL
);
363 irq_set_chip_data(virq
, NULL
);
366 static const struct irq_domain_ops twl6030_irq_domain_ops
= {
367 .map
= twl6030_irq_map
,
368 .unmap
= twl6030_irq_unmap
,
369 .xlate
= irq_domain_xlate_onetwocell
,
372 static const struct of_device_id twl6030_of_match
[] = {
373 {.compatible
= "ti,twl6030", &twl6030_interrupt_mapping
},
374 {.compatible
= "ti,twl6032", &twl6032_interrupt_mapping
},
378 int twl6030_init_irq(struct device
*dev
, int irq_num
)
380 struct device_node
*node
= dev
->of_node
;
384 const struct of_device_id
*of_id
;
386 of_id
= of_match_device(twl6030_of_match
, dev
);
387 if (!of_id
|| !of_id
->data
) {
388 dev_err(dev
, "Unknown TWL device model\n");
392 nr_irqs
= TWL6030_NR_IRQS
;
394 twl6030_irq
= devm_kzalloc(dev
, sizeof(*twl6030_irq
), GFP_KERNEL
);
402 /* mask all int lines */
403 status
= twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_MSK_LINE_A
, 3);
404 /* mask all int sts */
405 status
|= twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_MSK_STS_A
, 3);
406 /* clear INT_STS_A,B,C */
407 status
|= twl_i2c_write(TWL_MODULE_PIH
, &mask
[0], REG_INT_STS_A
, 3);
410 dev_err(dev
, "I2C err writing TWL_MODULE_PIH: %d\n", status
);
415 * install an irq handler for each of the modules;
416 * clone dummy irq_chip since PIH can't *do* anything
418 twl6030_irq
->irq_chip
= dummy_irq_chip
;
419 twl6030_irq
->irq_chip
.name
= "twl6030";
420 twl6030_irq
->irq_chip
.irq_set_type
= NULL
;
421 twl6030_irq
->irq_chip
.irq_set_wake
= twl6030_irq_set_wake
;
423 twl6030_irq
->pm_nb
.notifier_call
= twl6030_irq_pm_notifier
;
424 atomic_set(&twl6030_irq
->wakeirqs
, 0);
425 twl6030_irq
->irq_mapping_tbl
= of_id
->data
;
427 twl6030_irq
->irq_domain
=
428 irq_domain_add_linear(node
, nr_irqs
,
429 &twl6030_irq_domain_ops
, twl6030_irq
);
430 if (!twl6030_irq
->irq_domain
) {
431 dev_err(dev
, "Can't add irq_domain\n");
435 dev_info(dev
, "PIH (irq %d) nested IRQs\n", irq_num
);
437 /* install an irq handler to demultiplex the TWL6030 interrupt */
438 status
= request_threaded_irq(irq_num
, NULL
, twl6030_irq_thread
,
439 IRQF_ONESHOT
, "TWL6030-PIH", twl6030_irq
);
441 dev_err(dev
, "could not claim irq %d: %d\n", irq_num
, status
);
445 twl6030_irq
->twl_irq
= irq_num
;
446 register_pm_notifier(&twl6030_irq
->pm_nb
);
450 irq_domain_remove(twl6030_irq
->irq_domain
);
454 int twl6030_exit_irq(void)
456 if (twl6030_irq
&& twl6030_irq
->twl_irq
) {
457 unregister_pm_notifier(&twl6030_irq
->pm_nb
);
458 free_irq(twl6030_irq
->twl_irq
, NULL
);
460 * TODO: IRQ domain and allocated nested IRQ descriptors
461 * should be freed somehow here. Now It can't be done, because
462 * child devices will not be deleted during removing of
463 * TWL Core driver and they will still contain allocated
464 * virt IRQs in their Resources tables.
465 * The same prevents us from using devm_request_threaded_irq()