2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 #ifndef __NFIT_TEST_H__
14 #define __NFIT_TEST_H__
15 #include <linux/list.h>
16 #include <linux/uuid.h>
17 #include <linux/ioport.h>
18 #include <linux/spinlock_types.h>
20 struct nfit_test_request
{
21 struct list_head list
;
25 struct nfit_test_resource
{
26 struct list_head requests
;
27 struct list_head list
;
35 #define ND_TRANSLATE_SPA_STATUS_INVALID_SPA 2
36 #define NFIT_ARS_INJECT_INVALID 2
38 enum err_inj_options
{
39 ND_ARS_ERR_INJ_OPT_NOTIFY
= 0,
44 NFIT_CMD_TRANSLATE_SPA
= 5,
45 NFIT_CMD_ARS_INJECT_SET
= 7,
46 NFIT_CMD_ARS_INJECT_CLEAR
= 8,
47 NFIT_CMD_ARS_INJECT_GET
= 9,
50 struct nd_cmd_translate_spa
{
55 __u64 translate_length
;
57 struct nd_nvdimm_device
{
58 __u32 nfit_device_handle
;
61 } __packed devices
[0];
65 struct nd_cmd_ars_err_inj
{
66 __u64 err_inj_spa_range_base
;
67 __u64 err_inj_spa_range_length
;
72 struct nd_cmd_ars_err_inj_clr
{
73 __u64 err_inj_clr_spa_range_base
;
74 __u64 err_inj_clr_spa_range_length
;
78 struct nd_cmd_ars_err_inj_stat
{
80 __u32 inj_err_rec_count
;
81 struct nd_error_stat_query_record
{
82 __u64 err_inj_stat_spa_range_base
;
83 __u64 err_inj_stat_spa_range_length
;
87 #define ND_INTEL_SMART 1
88 #define ND_INTEL_SMART_THRESHOLD 2
89 #define ND_INTEL_ENABLE_LSS_STATUS 10
90 #define ND_INTEL_FW_GET_INFO 12
91 #define ND_INTEL_FW_START_UPDATE 13
92 #define ND_INTEL_FW_SEND_DATA 14
93 #define ND_INTEL_FW_FINISH_UPDATE 15
94 #define ND_INTEL_FW_FINISH_QUERY 16
95 #define ND_INTEL_SMART_SET_THRESHOLD 17
96 #define ND_INTEL_SMART_INJECT 18
98 #define ND_INTEL_SMART_HEALTH_VALID (1 << 0)
99 #define ND_INTEL_SMART_SPARES_VALID (1 << 1)
100 #define ND_INTEL_SMART_USED_VALID (1 << 2)
101 #define ND_INTEL_SMART_MTEMP_VALID (1 << 3)
102 #define ND_INTEL_SMART_CTEMP_VALID (1 << 4)
103 #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID (1 << 5)
104 #define ND_INTEL_SMART_AIT_STATUS_VALID (1 << 6)
105 #define ND_INTEL_SMART_PTEMP_VALID (1 << 7)
106 #define ND_INTEL_SMART_ALARM_VALID (1 << 9)
107 #define ND_INTEL_SMART_SHUTDOWN_VALID (1 << 10)
108 #define ND_INTEL_SMART_VENDOR_VALID (1 << 11)
109 #define ND_INTEL_SMART_SPARE_TRIP (1 << 0)
110 #define ND_INTEL_SMART_TEMP_TRIP (1 << 1)
111 #define ND_INTEL_SMART_CTEMP_TRIP (1 << 2)
112 #define ND_INTEL_SMART_NON_CRITICAL_HEALTH (1 << 0)
113 #define ND_INTEL_SMART_CRITICAL_HEALTH (1 << 1)
114 #define ND_INTEL_SMART_FATAL_HEALTH (1 << 2)
115 #define ND_INTEL_SMART_INJECT_MTEMP (1 << 0)
116 #define ND_INTEL_SMART_INJECT_SPARE (1 << 1)
117 #define ND_INTEL_SMART_INJECT_FATAL (1 << 2)
118 #define ND_INTEL_SMART_INJECT_SHUTDOWN (1 << 3)
120 struct nd_intel_smart
{
130 __u16 media_temperature
;
131 __u16 ctrl_temperature
;
132 __u32 shutdown_count
;
134 __u16 pmic_temperature
;
138 __u8 vendor_data
[92];
144 struct nd_intel_smart_threshold
{
150 __u16 media_temperature
;
151 __u16 ctrl_temperature
;
158 struct nd_intel_smart_set_threshold
{
161 __u16 media_temperature
;
162 __u16 ctrl_temperature
;
166 struct nd_intel_smart_inject
{
169 __u16 media_temperature
;
173 __u8 unsafe_shutdown_enable
;
177 #define INTEL_FW_STORAGE_SIZE 0x100000
178 #define INTEL_FW_MAX_SEND_LEN 0xFFEC
179 #define INTEL_FW_QUERY_INTERVAL 250000
180 #define INTEL_FW_QUERY_MAX_TIME 3000000
181 #define INTEL_FW_FIS_VERSION 0x0105
182 #define INTEL_FW_FAKE_VERSION 0xffffffffabcd
184 enum intel_fw_update_state
{
186 FW_STATE_IN_PROGRESS
,
191 struct nd_intel_fw_info
{
195 __u32 query_interval
;
196 __u32 max_query_time
;
201 __u64 updated_version
;
204 struct nd_intel_fw_start
{
209 /* this one has the output first because the variable input data size */
210 struct nd_intel_fw_send_data
{
215 /* this field is not declared due ot variable data from input */
219 struct nd_intel_fw_finish_update
{
226 struct nd_intel_fw_finish_query
{
229 __u64 updated_fw_rev
;
232 struct nd_intel_lss
{
238 typedef void *acpi_handle
;
240 typedef struct nfit_test_resource
*(*nfit_test_lookup_fn
)(resource_size_t
);
241 typedef union acpi_object
*(*nfit_test_evaluate_dsm_fn
)(acpi_handle handle
,
242 const guid_t
*guid
, u64 rev
, u64 func
,
243 union acpi_object
*argv4
);
244 void __iomem
*__wrap_ioremap_nocache(resource_size_t offset
,
246 void __wrap_iounmap(volatile void __iomem
*addr
);
247 void nfit_test_setup(nfit_test_lookup_fn lookup
,
248 nfit_test_evaluate_dsm_fn evaluate
);
249 void nfit_test_teardown(void);
250 struct nfit_test_resource
*get_nfit_res(resource_size_t resource
);