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[linux/fpc-iii.git] / arch / arm / mach-omap1 / board-h3.c
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1 /*
2 * linux/arch/arm/mach-omap1/board-h3.c
4 * This file contains OMAP1710 H3 specific code.
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/i2c.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/nand.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/input.h>
29 #include <linux/spi/spi.h>
30 #include <linux/i2c/tps65010.h>
32 #include <asm/setup.h>
33 #include <asm/page.h>
34 #include <mach/hardware.h>
35 #include <asm/gpio.h>
37 #include <asm/mach-types.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/flash.h>
40 #include <asm/mach/map.h>
42 #include <mach/irqs.h>
43 #include <mach/mux.h>
44 #include <mach/tc.h>
45 #include <mach/nand.h>
46 #include <mach/usb.h>
47 #include <mach/keypad.h>
48 #include <mach/dma.h>
49 #include <mach/common.h>
51 #include "board-h3.h"
53 /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
54 #define OMAP1710_ETHR_START 0x04000300
56 #define H3_TS_GPIO 48
58 static int h3_keymap[] = {
59 KEY(0, 0, KEY_LEFT),
60 KEY(0, 1, KEY_RIGHT),
61 KEY(0, 2, KEY_3),
62 KEY(0, 3, KEY_F10),
63 KEY(0, 4, KEY_F5),
64 KEY(0, 5, KEY_9),
65 KEY(1, 0, KEY_DOWN),
66 KEY(1, 1, KEY_UP),
67 KEY(1, 2, KEY_2),
68 KEY(1, 3, KEY_F9),
69 KEY(1, 4, KEY_F7),
70 KEY(1, 5, KEY_0),
71 KEY(2, 0, KEY_ENTER),
72 KEY(2, 1, KEY_6),
73 KEY(2, 2, KEY_1),
74 KEY(2, 3, KEY_F2),
75 KEY(2, 4, KEY_F6),
76 KEY(2, 5, KEY_HOME),
77 KEY(3, 0, KEY_8),
78 KEY(3, 1, KEY_5),
79 KEY(3, 2, KEY_F12),
80 KEY(3, 3, KEY_F3),
81 KEY(3, 4, KEY_F8),
82 KEY(3, 5, KEY_END),
83 KEY(4, 0, KEY_7),
84 KEY(4, 1, KEY_4),
85 KEY(4, 2, KEY_F11),
86 KEY(4, 3, KEY_F1),
87 KEY(4, 4, KEY_F4),
88 KEY(4, 5, KEY_ESC),
89 KEY(5, 0, KEY_F13),
90 KEY(5, 1, KEY_F14),
91 KEY(5, 2, KEY_F15),
92 KEY(5, 3, KEY_F16),
93 KEY(5, 4, KEY_SLEEP),
98 static struct mtd_partition nor_partitions[] = {
99 /* bootloader (U-Boot, etc) in first sector */
101 .name = "bootloader",
102 .offset = 0,
103 .size = SZ_128K,
104 .mask_flags = MTD_WRITEABLE, /* force read-only */
106 /* bootloader params in the next sector */
108 .name = "params",
109 .offset = MTDPART_OFS_APPEND,
110 .size = SZ_128K,
111 .mask_flags = 0,
113 /* kernel */
115 .name = "kernel",
116 .offset = MTDPART_OFS_APPEND,
117 .size = SZ_2M,
118 .mask_flags = 0
120 /* file system */
122 .name = "filesystem",
123 .offset = MTDPART_OFS_APPEND,
124 .size = MTDPART_SIZ_FULL,
125 .mask_flags = 0
129 static struct flash_platform_data nor_data = {
130 .map_name = "cfi_probe",
131 .width = 2,
132 .parts = nor_partitions,
133 .nr_parts = ARRAY_SIZE(nor_partitions),
136 static struct resource nor_resource = {
137 /* This is on CS3, wherever it's mapped */
138 .flags = IORESOURCE_MEM,
141 static struct platform_device nor_device = {
142 .name = "omapflash",
143 .id = 0,
144 .dev = {
145 .platform_data = &nor_data,
147 .num_resources = 1,
148 .resource = &nor_resource,
151 static struct mtd_partition nand_partitions[] = {
152 #if 0
153 /* REVISIT: enable these partitions if you make NAND BOOT work */
155 .name = "xloader",
156 .offset = 0,
157 .size = 64 * 1024,
158 .mask_flags = MTD_WRITEABLE, /* force read-only */
161 .name = "bootloader",
162 .offset = MTDPART_OFS_APPEND,
163 .size = 256 * 1024,
164 .mask_flags = MTD_WRITEABLE, /* force read-only */
167 .name = "params",
168 .offset = MTDPART_OFS_APPEND,
169 .size = 192 * 1024,
172 .name = "kernel",
173 .offset = MTDPART_OFS_APPEND,
174 .size = 2 * SZ_1M,
176 #endif
178 .name = "filesystem",
179 .size = MTDPART_SIZ_FULL,
180 .offset = MTDPART_OFS_APPEND,
184 /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
185 static struct omap_nand_platform_data nand_data = {
186 .options = NAND_SAMSUNG_LP_OPTIONS,
187 .parts = nand_partitions,
188 .nr_parts = ARRAY_SIZE(nand_partitions),
191 static struct resource nand_resource = {
192 .flags = IORESOURCE_MEM,
195 static struct platform_device nand_device = {
196 .name = "omapnand",
197 .id = 0,
198 .dev = {
199 .platform_data = &nand_data,
201 .num_resources = 1,
202 .resource = &nand_resource,
205 static struct resource smc91x_resources[] = {
206 [0] = {
207 .start = OMAP1710_ETHR_START, /* Physical */
208 .end = OMAP1710_ETHR_START + 0xf,
209 .flags = IORESOURCE_MEM,
211 [1] = {
212 .start = OMAP_GPIO_IRQ(40),
213 .end = OMAP_GPIO_IRQ(40),
214 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
218 static struct platform_device smc91x_device = {
219 .name = "smc91x",
220 .id = 0,
221 .num_resources = ARRAY_SIZE(smc91x_resources),
222 .resource = smc91x_resources,
225 #define GPTIMER_BASE 0xFFFB1400
226 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
227 #define GPTIMER_REGS_SIZE 0x46
229 static struct resource intlat_resources[] = {
230 [0] = {
231 .start = GPTIMER_REGS(0), /* Physical */
232 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
233 .flags = IORESOURCE_MEM,
235 [1] = {
236 .start = INT_1610_GPTIMER1,
237 .end = INT_1610_GPTIMER1,
238 .flags = IORESOURCE_IRQ,
242 static struct platform_device intlat_device = {
243 .name = "omap_intlat",
244 .id = 0,
245 .num_resources = ARRAY_SIZE(intlat_resources),
246 .resource = intlat_resources,
249 static struct resource h3_kp_resources[] = {
250 [0] = {
251 .start = INT_KEYBOARD,
252 .end = INT_KEYBOARD,
253 .flags = IORESOURCE_IRQ,
257 static struct omap_kp_platform_data h3_kp_data = {
258 .rows = 8,
259 .cols = 8,
260 .keymap = h3_keymap,
261 .keymapsize = ARRAY_SIZE(h3_keymap),
262 .rep = 1,
263 .delay = 9,
264 .dbounce = 1,
267 static struct platform_device h3_kp_device = {
268 .name = "omap-keypad",
269 .id = -1,
270 .dev = {
271 .platform_data = &h3_kp_data,
273 .num_resources = ARRAY_SIZE(h3_kp_resources),
274 .resource = h3_kp_resources,
277 static struct platform_device h3_lcd_device = {
278 .name = "lcd_h3",
279 .id = -1,
282 static struct spi_board_info h3_spi_board_info[] __initdata = {
283 [0] = {
284 .modalias = "tsc2101",
285 .bus_num = 2,
286 .chip_select = 0,
287 .irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
288 .max_speed_hz = 16000000,
289 /* .platform_data = &tsc_platform_data, */
293 static struct platform_device *devices[] __initdata = {
294 &nor_device,
295 &nand_device,
296 &smc91x_device,
297 &intlat_device,
298 &h3_kp_device,
299 &h3_lcd_device,
302 static struct omap_usb_config h3_usb_config __initdata = {
303 /* usb1 has a Mini-AB port and external isp1301 transceiver */
304 .otg = 2,
306 #ifdef CONFIG_USB_GADGET_OMAP
307 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
308 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
309 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
310 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
311 #endif
313 .pins[1] = 3,
316 static struct omap_uart_config h3_uart_config __initdata = {
317 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
320 static struct omap_lcd_config h3_lcd_config __initdata = {
321 .ctrl_name = "internal",
324 static struct omap_board_config_kernel h3_config[] __initdata = {
325 { OMAP_TAG_UART, &h3_uart_config },
326 { OMAP_TAG_LCD, &h3_lcd_config },
329 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
331 I2C_BOARD_INFO("tps65013", 0x48),
332 /* .irq = OMAP_GPIO_IRQ(??), */
335 I2C_BOARD_INFO("isp1301_omap", 0x2d),
336 .irq = OMAP_GPIO_IRQ(14),
340 #define H3_NAND_RB_GPIO_PIN 10
342 static int nand_dev_ready(struct omap_nand_platform_data *data)
344 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
347 static void __init h3_init(void)
349 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
350 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
351 * notice whether a NAND chip is enabled at probe time.
353 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
354 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
355 * to avoid probing every possible flash configuration...
357 nor_resource.end = nor_resource.start = omap_cs3_phys();
358 nor_resource.end += SZ_32M - 1;
360 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
361 nand_resource.end += SZ_4K - 1;
362 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
363 BUG();
364 nand_data.dev_ready = nand_dev_ready;
366 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
367 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
368 omap_cfg_reg(V2_1710_GPIO10);
370 platform_add_devices(devices, ARRAY_SIZE(devices));
371 spi_register_board_info(h3_spi_board_info,
372 ARRAY_SIZE(h3_spi_board_info));
373 omap_board_config = h3_config;
374 omap_board_config_size = ARRAY_SIZE(h3_config);
375 omap_serial_init();
376 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
377 ARRAY_SIZE(h3_i2c_board_info));
378 omap_usb_init(&h3_usb_config);
379 h3_mmc_init();
382 static void __init h3_init_smc91x(void)
384 omap_cfg_reg(W15_1710_GPIO40);
385 if (gpio_request(40, "SMC91x irq") < 0) {
386 printk("Error requesting gpio 40 for smc91x irq\n");
387 return;
391 static void __init h3_init_irq(void)
393 omap1_init_common_hw();
394 omap_init_irq();
395 omap_gpio_init();
396 h3_init_smc91x();
399 static void __init h3_map_io(void)
401 omap1_map_common_io();
404 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
405 /* Maintainer: Texas Instruments, Inc. */
406 .phys_io = 0xfff00000,
407 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
408 .boot_params = 0x10000100,
409 .map_io = h3_map_io,
410 .init_irq = h3_init_irq,
411 .init_machine = h3_init,
412 .timer = &omap_timer,
413 MACHINE_END