arch/blackfin/mach-bf527/include/mach/cdefBF52x_base.h

   1 /*
   2  * File:         include/asm-blackfin/mach-bf527/cdefBF52x_base.h
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Rev:
  10  *
  11  * Modified:
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2, or (at your option)
  18  * any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; see the file COPYING.
  27  * If not, write to the Free Software Foundation,
  28  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29  */
  30
  31 #ifndef _CDEF_BF52X_H
  32 #define _CDEF_BF52X_H
  33
  34 #include <asm/blackfin.h>
  35
  36 #include "defBF52x_base.h"
  37
  38 /* Include core specific register pointer definitions                                                           */
  39 #include <asm/cdef_LPBlackfin.h>
  40
  41 /* ==== begin from cdefBF534.h ==== */
  42
  43 /* Clock and System Control     (0xFFC00000 - 0xFFC000FF)                                                               */
  44 #define bfin_read_PLL_CTL()                     bfin_read16(PLL_CTL)
  45 #define bfin_read_PLL_DIV()                     bfin_read16(PLL_DIV)
  46 #define bfin_write_PLL_DIV(val)                 bfin_write16(PLL_DIV, val)
  47 #define bfin_read_VR_CTL()                      bfin_read16(VR_CTL)
  48 #define bfin_read_PLL_STAT()                    bfin_read16(PLL_STAT)
  49 #define bfin_write_PLL_STAT(val)                bfin_write16(PLL_STAT, val)
  50 #define bfin_read_PLL_LOCKCNT()                 bfin_read16(PLL_LOCKCNT)
  51 #define bfin_write_PLL_LOCKCNT(val)             bfin_write16(PLL_LOCKCNT, val)
  52 #define bfin_read_CHIPID()                      bfin_read32(CHIPID)
  53 #define bfin_write_CHIPID(val)                  bfin_write32(CHIPID, val)
  54
  55
  56 /* System Interrupt Controller (0xFFC00100 - 0xFFC001FF)                                                        */
  57 #define bfin_read_SWRST()                       bfin_read16(SWRST)
  58 #define bfin_write_SWRST(val)                   bfin_write16(SWRST, val)
  59 #define bfin_read_SYSCR()                       bfin_read16(SYSCR)
  60 #define bfin_write_SYSCR(val)                   bfin_write16(SYSCR, val)
  61
  62 #define bfin_read_SIC_RVECT()                   bfin_read32(SIC_RVECT)
  63 #define bfin_write_SIC_RVECT(val)               bfin_write32(SIC_RVECT, val)
  64 #define bfin_read_SIC_IMASK0()                  bfin_read32(SIC_IMASK0)
  65 #define bfin_write_SIC_IMASK0(val)              bfin_write32(SIC_IMASK0, val)
  66 #define bfin_read_SIC_IMASK(x)                  bfin_read32(SIC_IMASK0 + (x << 6))
  67 #define bfin_write_SIC_IMASK(x, val)            bfin_write32((SIC_IMASK0 + (x << 6)), val)
  68
  69 #define bfin_read_SIC_IAR0()                    bfin_read32(SIC_IAR0)
  70 #define bfin_write_SIC_IAR0(val)                bfin_write32(SIC_IAR0, val)
  71 #define bfin_read_SIC_IAR1()                    bfin_read32(SIC_IAR1)
  72 #define bfin_write_SIC_IAR1(val)                bfin_write32(SIC_IAR1, val)
  73 #define bfin_read_SIC_IAR2()                    bfin_read32(SIC_IAR2)
  74 #define bfin_write_SIC_IAR2(val)                bfin_write32(SIC_IAR2, val)
  75 #define bfin_read_SIC_IAR3()                    bfin_read32(SIC_IAR3)
  76 #define bfin_write_SIC_IAR3(val)                bfin_write32(SIC_IAR3, val)
  77
  78 #define bfin_read_SIC_ISR0()                    bfin_read32(SIC_ISR0)
  79 #define bfin_write_SIC_ISR0(val)                bfin_write32(SIC_ISR0, val)
  80 #define bfin_read_SIC_ISR(x)                    bfin_read32(SIC_ISR0 + (x << 6))
  81 #define bfin_write_SIC_ISR(x, val)              bfin_write32((SIC_ISR0 + (x << 6)), val)
  82
  83 #define bfin_read_SIC_IWR0()                    bfin_read32(SIC_IWR0)
  84 #define bfin_write_SIC_IWR0(val)                bfin_write32(SIC_IWR0, val)
  85 #define bfin_read_SIC_IWR(x)                    bfin_read32(SIC_IWR0 + (x << 6))
  86 #define bfin_write_SIC_IWR(x, val)              bfin_write32((SIC_IWR0 + (x << 6)), val)
  87
  88 /* SIC Additions to ADSP-BF52x (0xFFC0014C - 0xFFC00162) */
  89
  90 #define bfin_read_SIC_IMASK1()                  bfin_read32(SIC_IMASK1)
  91 #define bfin_write_SIC_IMASK1(val)              bfin_write32(SIC_IMASK1, val)
  92 #define bfin_read_SIC_IAR4()                    bfin_read32(SIC_IAR4)
  93 #define bfin_write_SIC_IAR4(val)                bfin_write32(SIC_IAR4, val)
  94 #define bfin_read_SIC_IAR5()                    bfin_read32(SIC_IAR5)
  95 #define bfin_write_SIC_IAR5(val)                bfin_write32(SIC_IAR5, val)
  96 #define bfin_read_SIC_IAR6()                    bfin_read32(SIC_IAR6)
  97 #define bfin_write_SIC_IAR6(val)                bfin_write32(SIC_IAR6, val)
  98 #define bfin_read_SIC_IAR7()                    bfin_read32(SIC_IAR7)
  99 #define bfin_write_SIC_IAR7(val)                bfin_write32(SIC_IAR7, val)
 100 #define bfin_read_SIC_ISR1()                    bfin_read32(SIC_ISR1)
 101 #define bfin_write_SIC_ISR1(val)                bfin_write32(SIC_ISR1, val)
 102 #define bfin_read_SIC_IWR1()                    bfin_read32(SIC_IWR1)
 103 #define bfin_write_SIC_IWR1(val)                bfin_write32(SIC_IWR1, val)
 104
 105 /* Watchdog Timer               (0xFFC00200 - 0xFFC002FF)                                                                       */
 106 #define bfin_read_WDOG_CTL()                    bfin_read16(WDOG_CTL)
 107 #define bfin_write_WDOG_CTL(val)                bfin_write16(WDOG_CTL, val)
 108 #define bfin_read_WDOG_CNT()                    bfin_read32(WDOG_CNT)
 109 #define bfin_write_WDOG_CNT(val)                bfin_write32(WDOG_CNT, val)
 110 #define bfin_read_WDOG_STAT()                   bfin_read32(WDOG_STAT)
 111 #define bfin_write_WDOG_STAT(val)               bfin_write32(WDOG_STAT, val)
 112
 113
 114 /* Real Time Clock              (0xFFC00300 - 0xFFC003FF)                                                                       */
 115 #define bfin_read_RTC_STAT()                    bfin_read32(RTC_STAT)
 116 #define bfin_write_RTC_STAT(val)                bfin_write32(RTC_STAT, val)
 117 #define bfin_read_RTC_ICTL()                    bfin_read16(RTC_ICTL)
 118 #define bfin_write_RTC_ICTL(val)                bfin_write16(RTC_ICTL, val)
 119 #define bfin_read_RTC_ISTAT()                   bfin_read16(RTC_ISTAT)
 120 #define bfin_write_RTC_ISTAT(val)               bfin_write16(RTC_ISTAT, val)
 121 #define bfin_read_RTC_SWCNT()                   bfin_read16(RTC_SWCNT)
 122 #define bfin_write_RTC_SWCNT(val)               bfin_write16(RTC_SWCNT, val)
 123 #define bfin_read_RTC_ALARM()                   bfin_read32(RTC_ALARM)
 124 #define bfin_write_RTC_ALARM(val)               bfin_write32(RTC_ALARM, val)
 125 #define bfin_read_RTC_FAST()                    bfin_read16(RTC_FAST)
 126 #define bfin_write_RTC_FAST(val)                bfin_write16(RTC_FAST, val)
 127 #define bfin_read_RTC_PREN()                    bfin_read16(RTC_PREN)
 128 #define bfin_write_RTC_PREN(val)                bfin_write16(RTC_PREN, val)
 129
 130
 131 /* UART0 Controller             (0xFFC00400 - 0xFFC004FF)                                                                       */
 132 #define bfin_read_UART0_THR()                   bfin_read16(UART0_THR)
 133 #define bfin_write_UART0_THR(val)               bfin_write16(UART0_THR, val)
 134 #define bfin_read_UART0_RBR()                   bfin_read16(UART0_RBR)
 135 #define bfin_write_UART0_RBR(val)               bfin_write16(UART0_RBR, val)
 136 #define bfin_read_UART0_DLL()                   bfin_read16(UART0_DLL)
 137 #define bfin_write_UART0_DLL(val)               bfin_write16(UART0_DLL, val)
 138 #define bfin_read_UART0_IER()                   bfin_read16(UART0_IER)
 139 #define bfin_write_UART0_IER(val)               bfin_write16(UART0_IER, val)
 140 #define bfin_read_UART0_DLH()                   bfin_read16(UART0_DLH)
 141 #define bfin_write_UART0_DLH(val)               bfin_write16(UART0_DLH, val)
 142 #define bfin_read_UART0_IIR()                   bfin_read16(UART0_IIR)
 143 #define bfin_write_UART0_IIR(val)               bfin_write16(UART0_IIR, val)
 144 #define bfin_read_UART0_LCR()                   bfin_read16(UART0_LCR)
 145 #define bfin_write_UART0_LCR(val)               bfin_write16(UART0_LCR, val)
 146 #define bfin_read_UART0_MCR()                   bfin_read16(UART0_MCR)
 147 #define bfin_write_UART0_MCR(val)               bfin_write16(UART0_MCR, val)
 148 #define bfin_read_UART0_LSR()                   bfin_read16(UART0_LSR)
 149 #define bfin_write_UART0_LSR(val)               bfin_write16(UART0_LSR, val)
 150 #define bfin_read_UART0_MSR()                   bfin_read16(UART0_MSR)
 151 #define bfin_write_UART0_MSR(val)               bfin_write16(UART0_MSR, val)
 152 #define bfin_read_UART0_SCR()                   bfin_read16(UART0_SCR)
 153 #define bfin_write_UART0_SCR(val)               bfin_write16(UART0_SCR, val)
 154 #define bfin_read_UART0_GCTL()                  bfin_read16(UART0_GCTL)
 155 #define bfin_write_UART0_GCTL(val)              bfin_write16(UART0_GCTL, val)
 156
 157
 158 /* SPI Controller               (0xFFC00500 - 0xFFC005FF)                                                                       */
 159 #define bfin_read_SPI_CTL()                     bfin_read16(SPI_CTL)
 160 #define bfin_write_SPI_CTL(val)                 bfin_write16(SPI_CTL, val)
 161 #define bfin_read_SPI_FLG()                     bfin_read16(SPI_FLG)
 162 #define bfin_write_SPI_FLG(val)                 bfin_write16(SPI_FLG, val)
 163 #define bfin_read_SPI_STAT()                    bfin_read16(SPI_STAT)
 164 #define bfin_write_SPI_STAT(val)                bfin_write16(SPI_STAT, val)
 165 #define bfin_read_SPI_TDBR()                    bfin_read16(SPI_TDBR)
 166 #define bfin_write_SPI_TDBR(val)                bfin_write16(SPI_TDBR, val)
 167 #define bfin_read_SPI_RDBR()                    bfin_read16(SPI_RDBR)
 168 #define bfin_write_SPI_RDBR(val)                bfin_write16(SPI_RDBR, val)
 169 #define bfin_read_SPI_BAUD()                    bfin_read16(SPI_BAUD)
 170 #define bfin_write_SPI_BAUD(val)                bfin_write16(SPI_BAUD, val)
 171 #define bfin_read_SPI_SHADOW()                  bfin_read16(SPI_SHADOW)
 172 #define bfin_write_SPI_SHADOW(val)              bfin_write16(SPI_SHADOW, val)
 173
 174
 175 /* TIMER0-7 Registers           (0xFFC00600 - 0xFFC006FF)                                                               */
 176 #define bfin_read_TIMER0_CONFIG()               bfin_read16(TIMER0_CONFIG)
 177 #define bfin_write_TIMER0_CONFIG(val)           bfin_write16(TIMER0_CONFIG, val)
 178 #define bfin_read_TIMER0_COUNTER()              bfin_read32(TIMER0_COUNTER)
 179 #define bfin_write_TIMER0_COUNTER(val)          bfin_write32(TIMER0_COUNTER, val)
 180 #define bfin_read_TIMER0_PERIOD()               bfin_read32(TIMER0_PERIOD)
 181 #define bfin_write_TIMER0_PERIOD(val)           bfin_write32(TIMER0_PERIOD, val)
 182 #define bfin_read_TIMER0_WIDTH()                bfin_read32(TIMER0_WIDTH)
 183 #define bfin_write_TIMER0_WIDTH(val)            bfin_write32(TIMER0_WIDTH, val)
 184
 185 #define bfin_read_TIMER1_CONFIG()               bfin_read16(TIMER1_CONFIG)
 186 #define bfin_write_TIMER1_CONFIG(val)           bfin_write16(TIMER1_CONFIG, val)
 187 #define bfin_read_TIMER1_COUNTER()              bfin_read32(TIMER1_COUNTER)
 188 #define bfin_write_TIMER1_COUNTER(val)          bfin_write32(TIMER1_COUNTER, val)
 189 #define bfin_read_TIMER1_PERIOD()               bfin_read32(TIMER1_PERIOD)
 190 #define bfin_write_TIMER1_PERIOD(val)           bfin_write32(TIMER1_PERIOD, val)
 191 #define bfin_read_TIMER1_WIDTH()                bfin_read32(TIMER1_WIDTH)
 192 #define bfin_write_TIMER1_WIDTH(val)            bfin_write32(TIMER1_WIDTH, val)
 193
 194 #define bfin_read_TIMER2_CONFIG()               bfin_read16(TIMER2_CONFIG)
 195 #define bfin_write_TIMER2_CONFIG(val)           bfin_write16(TIMER2_CONFIG, val)
 196 #define bfin_read_TIMER2_COUNTER()              bfin_read32(TIMER2_COUNTER)
 197 #define bfin_write_TIMER2_COUNTER(val)          bfin_write32(TIMER2_COUNTER, val)
 198 #define bfin_read_TIMER2_PERIOD()               bfin_read32(TIMER2_PERIOD)
 199 #define bfin_write_TIMER2_PERIOD(val)           bfin_write32(TIMER2_PERIOD, val)
 200 #define bfin_read_TIMER2_WIDTH()                bfin_read32(TIMER2_WIDTH)
 201 #define bfin_write_TIMER2_WIDTH(val)            bfin_write32(TIMER2_WIDTH, val)
 202
 203 #define bfin_read_TIMER3_CONFIG()               bfin_read16(TIMER3_CONFIG)
 204 #define bfin_write_TIMER3_CONFIG(val)           bfin_write16(TIMER3_CONFIG, val)
 205 #define bfin_read_TIMER3_COUNTER()              bfin_read32(TIMER3_COUNTER)
 206 #define bfin_write_TIMER3_COUNTER(val)          bfin_write32(TIMER3_COUNTER, val)
 207 #define bfin_read_TIMER3_PERIOD()               bfin_read32(TIMER3_PERIOD)
 208 #define bfin_write_TIMER3_PERIOD(val)           bfin_write32(TIMER3_PERIOD, val)
 209 #define bfin_read_TIMER3_WIDTH()                bfin_read32(TIMER3_WIDTH)
 210 #define bfin_write_TIMER3_WIDTH(val)            bfin_write32(TIMER3_WIDTH, val)
 211
 212 #define bfin_read_TIMER4_CONFIG()               bfin_read16(TIMER4_CONFIG)
 213 #define bfin_write_TIMER4_CONFIG(val)           bfin_write16(TIMER4_CONFIG, val)
 214 #define bfin_read_TIMER4_COUNTER()              bfin_read32(TIMER4_COUNTER)
 215 #define bfin_write_TIMER4_COUNTER(val)          bfin_write32(TIMER4_COUNTER, val)
 216 #define bfin_read_TIMER4_PERIOD()               bfin_read32(TIMER4_PERIOD)
 217 #define bfin_write_TIMER4_PERIOD(val)           bfin_write32(TIMER4_PERIOD, val)
 218 #define bfin_read_TIMER4_WIDTH()                bfin_read32(TIMER4_WIDTH)
 219 #define bfin_write_TIMER4_WIDTH(val)            bfin_write32(TIMER4_WIDTH, val)
 220
 221 #define bfin_read_TIMER5_CONFIG()               bfin_read16(TIMER5_CONFIG)
 222 #define bfin_write_TIMER5_CONFIG(val)           bfin_write16(TIMER5_CONFIG, val)
 223 #define bfin_read_TIMER5_COUNTER()              bfin_read32(TIMER5_COUNTER)
 224 #define bfin_write_TIMER5_COUNTER(val)          bfin_write32(TIMER5_COUNTER, val)
 225 #define bfin_read_TIMER5_PERIOD()               bfin_read32(TIMER5_PERIOD)
 226 #define bfin_write_TIMER5_PERIOD(val)           bfin_write32(TIMER5_PERIOD, val)
 227 #define bfin_read_TIMER5_WIDTH()                bfin_read32(TIMER5_WIDTH)
 228 #define bfin_write_TIMER5_WIDTH(val)            bfin_write32(TIMER5_WIDTH, val)
 229
 230 #define bfin_read_TIMER6_CONFIG()               bfin_read16(TIMER6_CONFIG)
 231 #define bfin_write_TIMER6_CONFIG(val)           bfin_write16(TIMER6_CONFIG, val)
 232 #define bfin_read_TIMER6_COUNTER()              bfin_read32(TIMER6_COUNTER)
 233 #define bfin_write_TIMER6_COUNTER(val)          bfin_write32(TIMER6_COUNTER, val)
 234 #define bfin_read_TIMER6_PERIOD()               bfin_read32(TIMER6_PERIOD)
 235 #define bfin_write_TIMER6_PERIOD(val)           bfin_write32(TIMER6_PERIOD, val)
 236 #define bfin_read_TIMER6_WIDTH()                bfin_read32(TIMER6_WIDTH)
 237 #define bfin_write_TIMER6_WIDTH(val)            bfin_write32(TIMER6_WIDTH, val)
 238
 239 #define bfin_read_TIMER7_CONFIG()               bfin_read16(TIMER7_CONFIG)
 240 #define bfin_write_TIMER7_CONFIG(val)           bfin_write16(TIMER7_CONFIG, val)
 241 #define bfin_read_TIMER7_COUNTER()              bfin_read32(TIMER7_COUNTER)
 242 #define bfin_write_TIMER7_COUNTER(val)          bfin_write32(TIMER7_COUNTER, val)
 243 #define bfin_read_TIMER7_PERIOD()               bfin_read32(TIMER7_PERIOD)
 244 #define bfin_write_TIMER7_PERIOD(val)           bfin_write32(TIMER7_PERIOD, val)
 245 #define bfin_read_TIMER7_WIDTH()                bfin_read32(TIMER7_WIDTH)
 246 #define bfin_write_TIMER7_WIDTH(val)            bfin_write32(TIMER7_WIDTH, val)
 247
 248 #define bfin_read_TIMER_ENABLE()                bfin_read16(TIMER_ENABLE)
 249 #define bfin_write_TIMER_ENABLE(val)            bfin_write16(TIMER_ENABLE, val)
 250 #define bfin_read_TIMER_DISABLE()               bfin_read16(TIMER_DISABLE)
 251 #define bfin_write_TIMER_DISABLE(val)           bfin_write16(TIMER_DISABLE, val)
 252 #define bfin_read_TIMER_STATUS()                bfin_read32(TIMER_STATUS)
 253 #define bfin_write_TIMER_STATUS(val)            bfin_write32(TIMER_STATUS, val)
 254
 255
 256 /* General Purpose I/O Port F (0xFFC00700 - 0xFFC007FF)                                                         */
 257 #define bfin_read_PORTFIO()                     bfin_read16(PORTFIO)
 258 #define bfin_write_PORTFIO(val)                 bfin_write16(PORTFIO, val)
 259 #define bfin_read_PORTFIO_CLEAR()               bfin_read16(PORTFIO_CLEAR)
 260 #define bfin_write_PORTFIO_CLEAR(val)           bfin_write16(PORTFIO_CLEAR, val)
 261 #define bfin_read_PORTFIO_SET()                 bfin_read16(PORTFIO_SET)
 262 #define bfin_write_PORTFIO_SET(val)             bfin_write16(PORTFIO_SET, val)
 263 #define bfin_read_PORTFIO_TOGGLE()              bfin_read16(PORTFIO_TOGGLE)
 264 #define bfin_write_PORTFIO_TOGGLE(val)          bfin_write16(PORTFIO_TOGGLE, val)
 265 #define bfin_read_PORTFIO_MASKA()               bfin_read16(PORTFIO_MASKA)
 266 #define bfin_write_PORTFIO_MASKA(val)           bfin_write16(PORTFIO_MASKA, val)
 267 #define bfin_read_PORTFIO_MASKA_CLEAR()         bfin_read16(PORTFIO_MASKA_CLEAR)
 268 #define bfin_write_PORTFIO_MASKA_CLEAR(val)     bfin_write16(PORTFIO_MASKA_CLEAR, val)
 269 #define bfin_read_PORTFIO_MASKA_SET()           bfin_read16(PORTFIO_MASKA_SET)
 270 #define bfin_write_PORTFIO_MASKA_SET(val)       bfin_write16(PORTFIO_MASKA_SET, val)
 271 #define bfin_read_PORTFIO_MASKA_TOGGLE()        bfin_read16(PORTFIO_MASKA_TOGGLE)
 272 #define bfin_write_PORTFIO_MASKA_TOGGLE(val)    bfin_write16(PORTFIO_MASKA_TOGGLE, val)
 273 #define bfin_read_PORTFIO_MASKB()               bfin_read16(PORTFIO_MASKB)
 274 #define bfin_write_PORTFIO_MASKB(val)           bfin_write16(PORTFIO_MASKB, val)
 275 #define bfin_read_PORTFIO_MASKB_CLEAR()         bfin_read16(PORTFIO_MASKB_CLEAR)
 276 #define bfin_write_PORTFIO_MASKB_CLEAR(val)     bfin_write16(PORTFIO_MASKB_CLEAR, val)
 277 #define bfin_read_PORTFIO_MASKB_SET()           bfin_read16(PORTFIO_MASKB_SET)
 278 #define bfin_write_PORTFIO_MASKB_SET(val)       bfin_write16(PORTFIO_MASKB_SET, val)
 279 #define bfin_read_PORTFIO_MASKB_TOGGLE()        bfin_read16(PORTFIO_MASKB_TOGGLE)
 280 #define bfin_write_PORTFIO_MASKB_TOGGLE(val)    bfin_write16(PORTFIO_MASKB_TOGGLE, val)
 281 #define bfin_read_PORTFIO_DIR()                 bfin_read16(PORTFIO_DIR)
 282 #define bfin_write_PORTFIO_DIR(val)             bfin_write16(PORTFIO_DIR, val)
 283 #define bfin_read_PORTFIO_POLAR()               bfin_read16(PORTFIO_POLAR)
 284 #define bfin_write_PORTFIO_POLAR(val)           bfin_write16(PORTFIO_POLAR, val)
 285 #define bfin_read_PORTFIO_EDGE()                bfin_read16(PORTFIO_EDGE)
 286 #define bfin_write_PORTFIO_EDGE(val)            bfin_write16(PORTFIO_EDGE, val)
 287 #define bfin_read_PORTFIO_BOTH()                bfin_read16(PORTFIO_BOTH)
 288 #define bfin_write_PORTFIO_BOTH(val)            bfin_write16(PORTFIO_BOTH, val)
 289 #define bfin_read_PORTFIO_INEN()                bfin_read16(PORTFIO_INEN)
 290 #define bfin_write_PORTFIO_INEN(val)            bfin_write16(PORTFIO_INEN, val)
 291
 292
 293 /* SPORT0 Controller            (0xFFC00800 - 0xFFC008FF)                                                               */
 294 #define bfin_read_SPORT0_TCR1()                 bfin_read16(SPORT0_TCR1)
 295 #define bfin_write_SPORT0_TCR1(val)             bfin_write16(SPORT0_TCR1, val)
 296 #define bfin_read_SPORT0_TCR2()                 bfin_read16(SPORT0_TCR2)
 297 #define bfin_write_SPORT0_TCR2(val)             bfin_write16(SPORT0_TCR2, val)
 298 #define bfin_read_SPORT0_TCLKDIV()              bfin_read16(SPORT0_TCLKDIV)
 299 #define bfin_write_SPORT0_TCLKDIV(val)          bfin_write16(SPORT0_TCLKDIV, val)
 300 #define bfin_read_SPORT0_TFSDIV()               bfin_read16(SPORT0_TFSDIV)
 301 #define bfin_write_SPORT0_TFSDIV(val)           bfin_write16(SPORT0_TFSDIV, val)
 302 #define bfin_read_SPORT0_TX()                   bfin_read32(SPORT0_TX)
 303 #define bfin_write_SPORT0_TX(val)               bfin_write32(SPORT0_TX, val)
 304 #define bfin_read_SPORT0_RX()                   bfin_read32(SPORT0_RX)
 305 #define bfin_write_SPORT0_RX(val)               bfin_write32(SPORT0_RX, val)
 306 #define bfin_read_SPORT0_TX32()                 bfin_read32(SPORT0_TX32)
 307 #define bfin_write_SPORT0_TX32(val)             bfin_write32(SPORT0_TX32, val)
 308 #define bfin_read_SPORT0_RX32()                 bfin_read32(SPORT0_RX32)
 309 #define bfin_write_SPORT0_RX32(val)             bfin_write32(SPORT0_RX32, val)
 310 #define bfin_read_SPORT0_TX16()                 bfin_read16(SPORT0_TX16)
 311 #define bfin_write_SPORT0_TX16(val)             bfin_write16(SPORT0_TX16, val)
 312 #define bfin_read_SPORT0_RX16()                 bfin_read16(SPORT0_RX16)
 313 #define bfin_write_SPORT0_RX16(val)             bfin_write16(SPORT0_RX16, val)
 314 #define bfin_read_SPORT0_RCR1()                 bfin_read16(SPORT0_RCR1)
 315 #define bfin_write_SPORT0_RCR1(val)             bfin_write16(SPORT0_RCR1, val)
 316 #define bfin_read_SPORT0_RCR2()                 bfin_read16(SPORT0_RCR2)
 317 #define bfin_write_SPORT0_RCR2(val)             bfin_write16(SPORT0_RCR2, val)
 318 #define bfin_read_SPORT0_RCLKDIV()              bfin_read16(SPORT0_RCLKDIV)
 319 #define bfin_write_SPORT0_RCLKDIV(val)          bfin_write16(SPORT0_RCLKDIV, val)
 320 #define bfin_read_SPORT0_RFSDIV()               bfin_read16(SPORT0_RFSDIV)
 321 #define bfin_write_SPORT0_RFSDIV(val)           bfin_write16(SPORT0_RFSDIV, val)
 322 #define bfin_read_SPORT0_STAT()                 bfin_read16(SPORT0_STAT)
 323 #define bfin_write_SPORT0_STAT(val)             bfin_write16(SPORT0_STAT, val)
 324 #define bfin_read_SPORT0_CHNL()                 bfin_read16(SPORT0_CHNL)
 325 #define bfin_write_SPORT0_CHNL(val)             bfin_write16(SPORT0_CHNL, val)
 326 #define bfin_read_SPORT0_MCMC1()                bfin_read16(SPORT0_MCMC1)
 327 #define bfin_write_SPORT0_MCMC1(val)            bfin_write16(SPORT0_MCMC1, val)
 328 #define bfin_read_SPORT0_MCMC2()                bfin_read16(SPORT0_MCMC2)
 329 #define bfin_write_SPORT0_MCMC2(val)            bfin_write16(SPORT0_MCMC2, val)
 330 #define bfin_read_SPORT0_MTCS0()                bfin_read32(SPORT0_MTCS0)
 331 #define bfin_write_SPORT0_MTCS0(val)            bfin_write32(SPORT0_MTCS0, val)
 332 #define bfin_read_SPORT0_MTCS1()                bfin_read32(SPORT0_MTCS1)
 333 #define bfin_write_SPORT0_MTCS1(val)            bfin_write32(SPORT0_MTCS1, val)
 334 #define bfin_read_SPORT0_MTCS2()                bfin_read32(SPORT0_MTCS2)
 335 #define bfin_write_SPORT0_MTCS2(val)            bfin_write32(SPORT0_MTCS2, val)
 336 #define bfin_read_SPORT0_MTCS3()                bfin_read32(SPORT0_MTCS3)
 337 #define bfin_write_SPORT0_MTCS3(val)            bfin_write32(SPORT0_MTCS3, val)
 338 #define bfin_read_SPORT0_MRCS0()                bfin_read32(SPORT0_MRCS0)
 339 #define bfin_write_SPORT0_MRCS0(val)            bfin_write32(SPORT0_MRCS0, val)
 340 #define bfin_read_SPORT0_MRCS1()                bfin_read32(SPORT0_MRCS1)
 341 #define bfin_write_SPORT0_MRCS1(val)            bfin_write32(SPORT0_MRCS1, val)
 342 #define bfin_read_SPORT0_MRCS2()                bfin_read32(SPORT0_MRCS2)
 343 #define bfin_write_SPORT0_MRCS2(val)            bfin_write32(SPORT0_MRCS2, val)
 344 #define bfin_read_SPORT0_MRCS3()                bfin_read32(SPORT0_MRCS3)
 345 #define bfin_write_SPORT0_MRCS3(val)            bfin_write32(SPORT0_MRCS3, val)
 346
 347
 348 /* SPORT1 Controller            (0xFFC00900 - 0xFFC009FF)                                                               */
 349 #define bfin_read_SPORT1_TCR1()                 bfin_read16(SPORT1_TCR1)
 350 #define bfin_write_SPORT1_TCR1(val)             bfin_write16(SPORT1_TCR1, val)
 351 #define bfin_read_SPORT1_TCR2()                 bfin_read16(SPORT1_TCR2)
 352 #define bfin_write_SPORT1_TCR2(val)             bfin_write16(SPORT1_TCR2, val)
 353 #define bfin_read_SPORT1_TCLKDIV()              bfin_read16(SPORT1_TCLKDIV)
 354 #define bfin_write_SPORT1_TCLKDIV(val)          bfin_write16(SPORT1_TCLKDIV, val)
 355 #define bfin_read_SPORT1_TFSDIV()               bfin_read16(SPORT1_TFSDIV)
 356 #define bfin_write_SPORT1_TFSDIV(val)           bfin_write16(SPORT1_TFSDIV, val)
 357 #define bfin_read_SPORT1_TX()                   bfin_read32(SPORT1_TX)
 358 #define bfin_write_SPORT1_TX(val)               bfin_write32(SPORT1_TX, val)
 359 #define bfin_read_SPORT1_RX()                   bfin_read32(SPORT1_RX)
 360 #define bfin_write_SPORT1_RX(val)               bfin_write32(SPORT1_RX, val)
 361 #define bfin_read_SPORT1_TX32()                 bfin_read32(SPORT1_TX32)
 362 #define bfin_write_SPORT1_TX32(val)             bfin_write32(SPORT1_TX32, val)
 363 #define bfin_read_SPORT1_RX32()                 bfin_read32(SPORT1_RX32)
 364 #define bfin_write_SPORT1_RX32(val)             bfin_write32(SPORT1_RX32, val)
 365 #define bfin_read_SPORT1_TX16()                 bfin_read16(SPORT1_TX16)
 366 #define bfin_write_SPORT1_TX16(val)             bfin_write16(SPORT1_TX16, val)
 367 #define bfin_read_SPORT1_RX16()                 bfin_read16(SPORT1_RX16)
 368 #define bfin_write_SPORT1_RX16(val)             bfin_write16(SPORT1_RX16, val)
 369 #define bfin_read_SPORT1_RCR1()                 bfin_read16(SPORT1_RCR1)
 370 #define bfin_write_SPORT1_RCR1(val)             bfin_write16(SPORT1_RCR1, val)
 371 #define bfin_read_SPORT1_RCR2()                 bfin_read16(SPORT1_RCR2)
 372 #define bfin_write_SPORT1_RCR2(val)             bfin_write16(SPORT1_RCR2, val)
 373 #define bfin_read_SPORT1_RCLKDIV()              bfin_read16(SPORT1_RCLKDIV)
 374 #define bfin_write_SPORT1_RCLKDIV(val)          bfin_write16(SPORT1_RCLKDIV, val)
 375 #define bfin_read_SPORT1_RFSDIV()               bfin_read16(SPORT1_RFSDIV)
 376 #define bfin_write_SPORT1_RFSDIV(val)           bfin_write16(SPORT1_RFSDIV, val)
 377 #define bfin_read_SPORT1_STAT()                 bfin_read16(SPORT1_STAT)
 378 #define bfin_write_SPORT1_STAT(val)             bfin_write16(SPORT1_STAT, val)
 379 #define bfin_read_SPORT1_CHNL()                 bfin_read16(SPORT1_CHNL)
 380 #define bfin_write_SPORT1_CHNL(val)             bfin_write16(SPORT1_CHNL, val)
 381 #define bfin_read_SPORT1_MCMC1()                bfin_read16(SPORT1_MCMC1)
 382 #define bfin_write_SPORT1_MCMC1(val)            bfin_write16(SPORT1_MCMC1, val)
 383 #define bfin_read_SPORT1_MCMC2()                bfin_read16(SPORT1_MCMC2)
 384 #define bfin_write_SPORT1_MCMC2(val)            bfin_write16(SPORT1_MCMC2, val)
 385 #define bfin_read_SPORT1_MTCS0()                bfin_read32(SPORT1_MTCS0)
 386 #define bfin_write_SPORT1_MTCS0(val)            bfin_write32(SPORT1_MTCS0, val)
 387 #define bfin_read_SPORT1_MTCS1()                bfin_read32(SPORT1_MTCS1)
 388 #define bfin_write_SPORT1_MTCS1(val)            bfin_write32(SPORT1_MTCS1, val)
 389 #define bfin_read_SPORT1_MTCS2()                bfin_read32(SPORT1_MTCS2)
 390 #define bfin_write_SPORT1_MTCS2(val)            bfin_write32(SPORT1_MTCS2, val)
 391 #define bfin_read_SPORT1_MTCS3()                bfin_read32(SPORT1_MTCS3)
 392 #define bfin_write_SPORT1_MTCS3(val)            bfin_write32(SPORT1_MTCS3, val)
 393 #define bfin_read_SPORT1_MRCS0()                bfin_read32(SPORT1_MRCS0)
 394 #define bfin_write_SPORT1_MRCS0(val)            bfin_write32(SPORT1_MRCS0, val)
 395 #define bfin_read_SPORT1_MRCS1()                bfin_read32(SPORT1_MRCS1)
 396 #define bfin_write_SPORT1_MRCS1(val)            bfin_write32(SPORT1_MRCS1, val)
 397 #define bfin_read_SPORT1_MRCS2()                bfin_read32(SPORT1_MRCS2)
 398 #define bfin_write_SPORT1_MRCS2(val)            bfin_write32(SPORT1_MRCS2, val)
 399 #define bfin_read_SPORT1_MRCS3()                bfin_read32(SPORT1_MRCS3)
 400 #define bfin_write_SPORT1_MRCS3(val)            bfin_write32(SPORT1_MRCS3, val)
 401
 402
 403 /* External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF)                                                        */
 404 #define bfin_read_EBIU_AMGCTL()                 bfin_read16(EBIU_AMGCTL)
 405 #define bfin_write_EBIU_AMGCTL(val)             bfin_write16(EBIU_AMGCTL, val)
 406 #define bfin_read_EBIU_AMBCTL0()                bfin_read32(EBIU_AMBCTL0)
 407 #define bfin_write_EBIU_AMBCTL0(val)            bfin_write32(EBIU_AMBCTL0, val)
 408 #define bfin_read_EBIU_AMBCTL1()                bfin_read32(EBIU_AMBCTL1)
 409 #define bfin_write_EBIU_AMBCTL1(val)            bfin_write32(EBIU_AMBCTL1, val)
 410 #define bfin_read_EBIU_SDGCTL()                 bfin_read32(EBIU_SDGCTL)
 411 #define bfin_write_EBIU_SDGCTL(val)             bfin_write32(EBIU_SDGCTL, val)
 412 #define bfin_read_EBIU_SDBCTL()                 bfin_read16(EBIU_SDBCTL)
 413 #define bfin_write_EBIU_SDBCTL(val)             bfin_write16(EBIU_SDBCTL, val)
 414 #define bfin_read_EBIU_SDRRC()                  bfin_read16(EBIU_SDRRC)
 415 #define bfin_write_EBIU_SDRRC(val)              bfin_write16(EBIU_SDRRC, val)
 416 #define bfin_read_EBIU_SDSTAT()                 bfin_read16(EBIU_SDSTAT)
 417 #define bfin_write_EBIU_SDSTAT(val)             bfin_write16(EBIU_SDSTAT, val)
 418
 419
 420 /* DMA Traffic Control Registers                                                                                                        */
 421 #define bfin_read_DMA_TC_PER()                  bfin_read16(DMA_TC_PER)
 422 #define bfin_write_DMA_TC_PER(val)              bfin_write16(DMA_TC_PER, val)
 423 #define bfin_read_DMA_TC_CNT()                  bfin_read16(DMA_TC_CNT)
 424 #define bfin_write_DMA_TC_CNT(val)              bfin_write16(DMA_TC_CNT, val)
 425
 426 /* Alternate deprecated register names (below) provided for backwards code compatibility */
 427 #define bfin_read_DMA_TCPER()                   bfin_read16(DMA_TCPER)
 428 #define bfin_write_DMA_TCPER(val)               bfin_write16(DMA_TCPER, val)
 429 #define bfin_read_DMA_TCCNT()                   bfin_read16(DMA_TCCNT)
 430 #define bfin_write_DMA_TCCNT(val)               bfin_write16(DMA_TCCNT, val)
 431
 432 /* DMA Controller                                                                                                                                       */
 433 #define bfin_read_DMA0_CONFIG()                 bfin_read16(DMA0_CONFIG)
 434 #define bfin_write_DMA0_CONFIG(val)             bfin_write16(DMA0_CONFIG, val)
 435 #define bfin_read_DMA0_NEXT_DESC_PTR()          bfin_read32(DMA0_NEXT_DESC_PTR)
 436 #define bfin_write_DMA0_NEXT_DESC_PTR(val)      bfin_write32(DMA0_NEXT_DESC_PTR, val)
 437 #define bfin_read_DMA0_START_ADDR()             bfin_read32(DMA0_START_ADDR)
 438 #define bfin_write_DMA0_START_ADDR(val)         bfin_write32(DMA0_START_ADDR, val)
 439 #define bfin_read_DMA0_X_COUNT()                bfin_read16(DMA0_X_COUNT)
 440 #define bfin_write_DMA0_X_COUNT(val)            bfin_write16(DMA0_X_COUNT, val)
 441 #define bfin_read_DMA0_Y_COUNT()                bfin_read16(DMA0_Y_COUNT)
 442 #define bfin_write_DMA0_Y_COUNT(val)            bfin_write16(DMA0_Y_COUNT, val)
 443 #define bfin_read_DMA0_X_MODIFY()               bfin_read16(DMA0_X_MODIFY)
 444 #define bfin_write_DMA0_X_MODIFY(val)           bfin_write16(DMA0_X_MODIFY, val)
 445 #define bfin_read_DMA0_Y_MODIFY()               bfin_read16(DMA0_Y_MODIFY)
 446 #define bfin_write_DMA0_Y_MODIFY(val)           bfin_write16(DMA0_Y_MODIFY, val)
 447 #define bfin_read_DMA0_CURR_DESC_PTR()          bfin_read32(DMA0_CURR_DESC_PTR)
 448 #define bfin_write_DMA0_CURR_DESC_PTR(val)      bfin_write32(DMA0_CURR_DESC_PTR, val)
 449 #define bfin_read_DMA0_CURR_ADDR()              bfin_read32(DMA0_CURR_ADDR)
 450 #define bfin_write_DMA0_CURR_ADDR(val)          bfin_write32(DMA0_CURR_ADDR, val)
 451 #define bfin_read_DMA0_CURR_X_COUNT()           bfin_read16(DMA0_CURR_X_COUNT)
 452 #define bfin_write_DMA0_CURR_X_COUNT(val)       bfin_write16(DMA0_CURR_X_COUNT, val)
 453 #define bfin_read_DMA0_CURR_Y_COUNT()           bfin_read16(DMA0_CURR_Y_COUNT)
 454 #define bfin_write_DMA0_CURR_Y_COUNT(val)       bfin_write16(DMA0_CURR_Y_COUNT, val)
 455 #define bfin_read_DMA0_IRQ_STATUS()             bfin_read16(DMA0_IRQ_STATUS)
 456 #define bfin_write_DMA0_IRQ_STATUS(val)         bfin_write16(DMA0_IRQ_STATUS, val)
 457 #define bfin_read_DMA0_PERIPHERAL_MAP()         bfin_read16(DMA0_PERIPHERAL_MAP)
 458 #define bfin_write_DMA0_PERIPHERAL_MAP(val)     bfin_write16(DMA0_PERIPHERAL_MAP, val)
 459
 460 #define bfin_read_DMA1_CONFIG()                 bfin_read16(DMA1_CONFIG)
 461 #define bfin_write_DMA1_CONFIG(val)             bfin_write16(DMA1_CONFIG, val)
 462 #define bfin_read_DMA1_NEXT_DESC_PTR()          bfin_read32(DMA1_NEXT_DESC_PTR)
 463 #define bfin_write_DMA1_NEXT_DESC_PTR(val)      bfin_write32(DMA1_NEXT_DESC_PTR, val)
 464 #define bfin_read_DMA1_START_ADDR()             bfin_read32(DMA1_START_ADDR)
 465 #define bfin_write_DMA1_START_ADDR(val)         bfin_write32(DMA1_START_ADDR, val)
 466 #define bfin_read_DMA1_X_COUNT()                bfin_read16(DMA1_X_COUNT)
 467 #define bfin_write_DMA1_X_COUNT(val)            bfin_write16(DMA1_X_COUNT, val)
 468 #define bfin_read_DMA1_Y_COUNT()                bfin_read16(DMA1_Y_COUNT)
 469 #define bfin_write_DMA1_Y_COUNT(val)            bfin_write16(DMA1_Y_COUNT, val)
 470 #define bfin_read_DMA1_X_MODIFY()               bfin_read16(DMA1_X_MODIFY)
 471 #define bfin_write_DMA1_X_MODIFY(val)           bfin_write16(DMA1_X_MODIFY, val)
 472 #define bfin_read_DMA1_Y_MODIFY()               bfin_read16(DMA1_Y_MODIFY)
 473 #define bfin_write_DMA1_Y_MODIFY(val)           bfin_write16(DMA1_Y_MODIFY, val)
 474 #define bfin_read_DMA1_CURR_DESC_PTR()          bfin_read32(DMA1_CURR_DESC_PTR)
 475 #define bfin_write_DMA1_CURR_DESC_PTR(val)      bfin_write32(DMA1_CURR_DESC_PTR, val)
 476 #define bfin_read_DMA1_CURR_ADDR()              bfin_read32(DMA1_CURR_ADDR)
 477 #define bfin_write_DMA1_CURR_ADDR(val)          bfin_write32(DMA1_CURR_ADDR, val)
 478 #define bfin_read_DMA1_CURR_X_COUNT()           bfin_read16(DMA1_CURR_X_COUNT)
 479 #define bfin_write_DMA1_CURR_X_COUNT(val)       bfin_write16(DMA1_CURR_X_COUNT, val)
 480 #define bfin_read_DMA1_CURR_Y_COUNT()           bfin_read16(DMA1_CURR_Y_COUNT)
 481 #define bfin_write_DMA1_CURR_Y_COUNT(val)       bfin_write16(DMA1_CURR_Y_COUNT, val)
 482 #define bfin_read_DMA1_IRQ_STATUS()             bfin_read16(DMA1_IRQ_STATUS)
 483 #define bfin_write_DMA1_IRQ_STATUS(val)         bfin_write16(DMA1_IRQ_STATUS, val)
 484 #define bfin_read_DMA1_PERIPHERAL_MAP()         bfin_read16(DMA1_PERIPHERAL_MAP)
 485 #define bfin_write_DMA1_PERIPHERAL_MAP(val)     bfin_write16(DMA1_PERIPHERAL_MAP, val)
 486
 487 #define bfin_read_DMA2_CONFIG()                 bfin_read16(DMA2_CONFIG)
 488 #define bfin_write_DMA2_CONFIG(val)             bfin_write16(DMA2_CONFIG, val)
 489 #define bfin_read_DMA2_NEXT_DESC_PTR()          bfin_read32(DMA2_NEXT_DESC_PTR)
 490 #define bfin_write_DMA2_NEXT_DESC_PTR(val)      bfin_write32(DMA2_NEXT_DESC_PTR, val)
 491 #define bfin_read_DMA2_START_ADDR()             bfin_read32(DMA2_START_ADDR)
 492 #define bfin_write_DMA2_START_ADDR(val)         bfin_write32(DMA2_START_ADDR, val)
 493 #define bfin_read_DMA2_X_COUNT()                bfin_read16(DMA2_X_COUNT)
 494 #define bfin_write_DMA2_X_COUNT(val)            bfin_write16(DMA2_X_COUNT, val)
 495 #define bfin_read_DMA2_Y_COUNT()                bfin_read16(DMA2_Y_COUNT)
 496 #define bfin_write_DMA2_Y_COUNT(val)            bfin_write16(DMA2_Y_COUNT, val)
 497 #define bfin_read_DMA2_X_MODIFY()               bfin_read16(DMA2_X_MODIFY)
 498 #define bfin_write_DMA2_X_MODIFY(val)           bfin_write16(DMA2_X_MODIFY, val)
 499 #define bfin_read_DMA2_Y_MODIFY()               bfin_read16(DMA2_Y_MODIFY)
 500 #define bfin_write_DMA2_Y_MODIFY(val)           bfin_write16(DMA2_Y_MODIFY, val)
 501 #define bfin_read_DMA2_CURR_DESC_PTR()          bfin_read32(DMA2_CURR_DESC_PTR)
 502 #define bfin_write_DMA2_CURR_DESC_PTR(val)      bfin_write32(DMA2_CURR_DESC_PTR, val)
 503 #define bfin_read_DMA2_CURR_ADDR()              bfin_read32(DMA2_CURR_ADDR)
 504 #define bfin_write_DMA2_CURR_ADDR(val)          bfin_write32(DMA2_CURR_ADDR, val)
 505 #define bfin_read_DMA2_CURR_X_COUNT()           bfin_read16(DMA2_CURR_X_COUNT)
 506 #define bfin_write_DMA2_CURR_X_COUNT(val)       bfin_write16(DMA2_CURR_X_COUNT, val)
 507 #define bfin_read_DMA2_CURR_Y_COUNT()           bfin_read16(DMA2_CURR_Y_COUNT)
 508 #define bfin_write_DMA2_CURR_Y_COUNT(val)       bfin_write16(DMA2_CURR_Y_COUNT, val)
 509 #define bfin_read_DMA2_IRQ_STATUS()             bfin_read16(DMA2_IRQ_STATUS)
 510 #define bfin_write_DMA2_IRQ_STATUS(val)         bfin_write16(DMA2_IRQ_STATUS, val)
 511 #define bfin_read_DMA2_PERIPHERAL_MAP()         bfin_read16(DMA2_PERIPHERAL_MAP)
 512 #define bfin_write_DMA2_PERIPHERAL_MAP(val)     bfin_write16(DMA2_PERIPHERAL_MAP, val)
 513
 514 #define bfin_read_DMA3_CONFIG()                 bfin_read16(DMA3_CONFIG)
 515 #define bfin_write_DMA3_CONFIG(val)             bfin_write16(DMA3_CONFIG, val)
 516 #define bfin_read_DMA3_NEXT_DESC_PTR()          bfin_read32(DMA3_NEXT_DESC_PTR)
 517 #define bfin_write_DMA3_NEXT_DESC_PTR(val)      bfin_write32(DMA3_NEXT_DESC_PTR, val)
 518 #define bfin_read_DMA3_START_ADDR()             bfin_read32(DMA3_START_ADDR)
 519 #define bfin_write_DMA3_START_ADDR(val)         bfin_write32(DMA3_START_ADDR, val)
 520 #define bfin_read_DMA3_X_COUNT()                bfin_read16(DMA3_X_COUNT)
 521 #define bfin_write_DMA3_X_COUNT(val)            bfin_write16(DMA3_X_COUNT, val)
 522 #define bfin_read_DMA3_Y_COUNT()                bfin_read16(DMA3_Y_COUNT)
 523 #define bfin_write_DMA3_Y_COUNT(val)            bfin_write16(DMA3_Y_COUNT, val)
 524 #define bfin_read_DMA3_X_MODIFY()               bfin_read16(DMA3_X_MODIFY)
 525 #define bfin_write_DMA3_X_MODIFY(val)           bfin_write16(DMA3_X_MODIFY, val)
 526 #define bfin_read_DMA3_Y_MODIFY()               bfin_read16(DMA3_Y_MODIFY)
 527 #define bfin_write_DMA3_Y_MODIFY(val)           bfin_write16(DMA3_Y_MODIFY, val)
 528 #define bfin_read_DMA3_CURR_DESC_PTR()          bfin_read32(DMA3_CURR_DESC_PTR)
 529 #define bfin_write_DMA3_CURR_DESC_PTR(val)      bfin_write32(DMA3_CURR_DESC_PTR, val)
 530 #define bfin_read_DMA3_CURR_ADDR()              bfin_read32(DMA3_CURR_ADDR)
 531 #define bfin_write_DMA3_CURR_ADDR(val)          bfin_write32(DMA3_CURR_ADDR, val)
 532 #define bfin_read_DMA3_CURR_X_COUNT()           bfin_read16(DMA3_CURR_X_COUNT)
 533 #define bfin_write_DMA3_CURR_X_COUNT(val)       bfin_write16(DMA3_CURR_X_COUNT, val)
 534 #define bfin_read_DMA3_CURR_Y_COUNT()           bfin_read16(DMA3_CURR_Y_COUNT)
 535 #define bfin_write_DMA3_CURR_Y_COUNT(val)       bfin_write16(DMA3_CURR_Y_COUNT, val)
 536 #define bfin_read_DMA3_IRQ_STATUS()             bfin_read16(DMA3_IRQ_STATUS)
 537 #define bfin_write_DMA3_IRQ_STATUS(val)         bfin_write16(DMA3_IRQ_STATUS, val)
 538 #define bfin_read_DMA3_PERIPHERAL_MAP()         bfin_read16(DMA3_PERIPHERAL_MAP)
 539 #define bfin_write_DMA3_PERIPHERAL_MAP(val)     bfin_write16(DMA3_PERIPHERAL_MAP, val)
 540
 541 #define bfin_read_DMA4_CONFIG()                 bfin_read16(DMA4_CONFIG)
 542 #define bfin_write_DMA4_CONFIG(val)             bfin_write16(DMA4_CONFIG, val)
 543 #define bfin_read_DMA4_NEXT_DESC_PTR()          bfin_read32(DMA4_NEXT_DESC_PTR)
 544 #define bfin_write_DMA4_NEXT_DESC_PTR(val)      bfin_write32(DMA4_NEXT_DESC_PTR, val)
 545 #define bfin_read_DMA4_START_ADDR()             bfin_read32(DMA4_START_ADDR)
 546 #define bfin_write_DMA4_START_ADDR(val)         bfin_write32(DMA4_START_ADDR, val)
 547 #define bfin_read_DMA4_X_COUNT()                bfin_read16(DMA4_X_COUNT)
 548 #define bfin_write_DMA4_X_COUNT(val)            bfin_write16(DMA4_X_COUNT, val)
 549 #define bfin_read_DMA4_Y_COUNT()                bfin_read16(DMA4_Y_COUNT)
 550 #define bfin_write_DMA4_Y_COUNT(val)            bfin_write16(DMA4_Y_COUNT, val)
 551 #define bfin_read_DMA4_X_MODIFY()               bfin_read16(DMA4_X_MODIFY)
 552 #define bfin_write_DMA4_X_MODIFY(val)           bfin_write16(DMA4_X_MODIFY, val)
 553 #define bfin_read_DMA4_Y_MODIFY()               bfin_read16(DMA4_Y_MODIFY)
 554 #define bfin_write_DMA4_Y_MODIFY(val)           bfin_write16(DMA4_Y_MODIFY, val)
 555 #define bfin_read_DMA4_CURR_DESC_PTR()          bfin_read32(DMA4_CURR_DESC_PTR)
 556 #define bfin_write_DMA4_CURR_DESC_PTR(val)      bfin_write32(DMA4_CURR_DESC_PTR, val)
 557 #define bfin_read_DMA4_CURR_ADDR()              bfin_read32(DMA4_CURR_ADDR)
 558 #define bfin_write_DMA4_CURR_ADDR(val)          bfin_write32(DMA4_CURR_ADDR, val)
 559 #define bfin_read_DMA4_CURR_X_COUNT()           bfin_read16(DMA4_CURR_X_COUNT)
 560 #define bfin_write_DMA4_CURR_X_COUNT(val)       bfin_write16(DMA4_CURR_X_COUNT, val)
 561 #define bfin_read_DMA4_CURR_Y_COUNT()           bfin_read16(DMA4_CURR_Y_COUNT)
 562 #define bfin_write_DMA4_CURR_Y_COUNT(val)       bfin_write16(DMA4_CURR_Y_COUNT, val)
 563 #define bfin_read_DMA4_IRQ_STATUS()             bfin_read16(DMA4_IRQ_STATUS)
 564 #define bfin_write_DMA4_IRQ_STATUS(val)         bfin_write16(DMA4_IRQ_STATUS, val)
 565 #define bfin_read_DMA4_PERIPHERAL_MAP()         bfin_read16(DMA4_PERIPHERAL_MAP)
 566 #define bfin_write_DMA4_PERIPHERAL_MAP(val)     bfin_write16(DMA4_PERIPHERAL_MAP, val)
 567
 568 #define bfin_read_DMA5_CONFIG()                 bfin_read16(DMA5_CONFIG)
 569 #define bfin_write_DMA5_CONFIG(val)             bfin_write16(DMA5_CONFIG, val)
 570 #define bfin_read_DMA5_NEXT_DESC_PTR()          bfin_read32(DMA5_NEXT_DESC_PTR)
 571 #define bfin_write_DMA5_NEXT_DESC_PTR(val)      bfin_write32(DMA5_NEXT_DESC_PTR, val)
 572 #define bfin_read_DMA5_START_ADDR()             bfin_read32(DMA5_START_ADDR)
 573 #define bfin_write_DMA5_START_ADDR(val)         bfin_write32(DMA5_START_ADDR, val)
 574 #define bfin_read_DMA5_X_COUNT()                bfin_read16(DMA5_X_COUNT)
 575 #define bfin_write_DMA5_X_COUNT(val)            bfin_write16(DMA5_X_COUNT, val)
 576 #define bfin_read_DMA5_Y_COUNT()                bfin_read16(DMA5_Y_COUNT)
 577 #define bfin_write_DMA5_Y_COUNT(val)            bfin_write16(DMA5_Y_COUNT, val)
 578 #define bfin_read_DMA5_X_MODIFY()               bfin_read16(DMA5_X_MODIFY)
 579 #define bfin_write_DMA5_X_MODIFY(val)           bfin_write16(DMA5_X_MODIFY, val)
 580 #define bfin_read_DMA5_Y_MODIFY()               bfin_read16(DMA5_Y_MODIFY)
 581 #define bfin_write_DMA5_Y_MODIFY(val)           bfin_write16(DMA5_Y_MODIFY, val)
 582 #define bfin_read_DMA5_CURR_DESC_PTR()          bfin_read32(DMA5_CURR_DESC_PTR)
 583 #define bfin_write_DMA5_CURR_DESC_PTR(val)      bfin_write32(DMA5_CURR_DESC_PTR, val)
 584 #define bfin_read_DMA5_CURR_ADDR()              bfin_read32(DMA5_CURR_ADDR)
 585 #define bfin_write_DMA5_CURR_ADDR(val)          bfin_write32(DMA5_CURR_ADDR, val)
 586 #define bfin_read_DMA5_CURR_X_COUNT()           bfin_read16(DMA5_CURR_X_COUNT)
 587 #define bfin_write_DMA5_CURR_X_COUNT(val)       bfin_write16(DMA5_CURR_X_COUNT, val)
 588 #define bfin_read_DMA5_CURR_Y_COUNT()           bfin_read16(DMA5_CURR_Y_COUNT)
 589 #define bfin_write_DMA5_CURR_Y_COUNT(val)       bfin_write16(DMA5_CURR_Y_COUNT, val)
 590 #define bfin_read_DMA5_IRQ_STATUS()             bfin_read16(DMA5_IRQ_STATUS)
 591 #define bfin_write_DMA5_IRQ_STATUS(val)         bfin_write16(DMA5_IRQ_STATUS, val)
 592 #define bfin_read_DMA5_PERIPHERAL_MAP()         bfin_read16(DMA5_PERIPHERAL_MAP)
 593 #define bfin_write_DMA5_PERIPHERAL_MAP(val)     bfin_write16(DMA5_PERIPHERAL_MAP, val)
 594
 595 #define bfin_read_DMA6_CONFIG()                 bfin_read16(DMA6_CONFIG)
 596 #define bfin_write_DMA6_CONFIG(val)             bfin_write16(DMA6_CONFIG, val)
 597 #define bfin_read_DMA6_NEXT_DESC_PTR()          bfin_read32(DMA6_NEXT_DESC_PTR)
 598 #define bfin_write_DMA6_NEXT_DESC_PTR(val)      bfin_write32(DMA6_NEXT_DESC_PTR, val)
 599 #define bfin_read_DMA6_START_ADDR()             bfin_read32(DMA6_START_ADDR)
 600 #define bfin_write_DMA6_START_ADDR(val)         bfin_write32(DMA6_START_ADDR, val)
 601 #define bfin_read_DMA6_X_COUNT()                bfin_read16(DMA6_X_COUNT)
 602 #define bfin_write_DMA6_X_COUNT(val)            bfin_write16(DMA6_X_COUNT, val)
 603 #define bfin_read_DMA6_Y_COUNT()                bfin_read16(DMA6_Y_COUNT)
 604 #define bfin_write_DMA6_Y_COUNT(val)            bfin_write16(DMA6_Y_COUNT, val)
 605 #define bfin_read_DMA6_X_MODIFY()               bfin_read16(DMA6_X_MODIFY)
 606 #define bfin_write_DMA6_X_MODIFY(val)           bfin_write16(DMA6_X_MODIFY, val)
 607 #define bfin_read_DMA6_Y_MODIFY()               bfin_read16(DMA6_Y_MODIFY)
 608 #define bfin_write_DMA6_Y_MODIFY(val)           bfin_write16(DMA6_Y_MODIFY, val)
 609 #define bfin_read_DMA6_CURR_DESC_PTR()          bfin_read32(DMA6_CURR_DESC_PTR)
 610 #define bfin_write_DMA6_CURR_DESC_PTR(val)      bfin_write32(DMA6_CURR_DESC_PTR, val)
 611 #define bfin_read_DMA6_CURR_ADDR()              bfin_read32(DMA6_CURR_ADDR)
 612 #define bfin_write_DMA6_CURR_ADDR(val)          bfin_write32(DMA6_CURR_ADDR, val)
 613 #define bfin_read_DMA6_CURR_X_COUNT()           bfin_read16(DMA6_CURR_X_COUNT)
 614 #define bfin_write_DMA6_CURR_X_COUNT(val)       bfin_write16(DMA6_CURR_X_COUNT, val)
 615 #define bfin_read_DMA6_CURR_Y_COUNT()           bfin_read16(DMA6_CURR_Y_COUNT)
 616 #define bfin_write_DMA6_CURR_Y_COUNT(val)       bfin_write16(DMA6_CURR_Y_COUNT, val)
 617 #define bfin_read_DMA6_IRQ_STATUS()             bfin_read16(DMA6_IRQ_STATUS)
 618 #define bfin_write_DMA6_IRQ_STATUS(val)         bfin_write16(DMA6_IRQ_STATUS, val)
 619 #define bfin_read_DMA6_PERIPHERAL_MAP()         bfin_read16(DMA6_PERIPHERAL_MAP)
 620 #define bfin_write_DMA6_PERIPHERAL_MAP(val)     bfin_write16(DMA6_PERIPHERAL_MAP, val)
 621
 622 #define bfin_read_DMA7_CONFIG()                 bfin_read16(DMA7_CONFIG)
 623 #define bfin_write_DMA7_CONFIG(val)             bfin_write16(DMA7_CONFIG, val)
 624 #define bfin_read_DMA7_NEXT_DESC_PTR()          bfin_read32(DMA7_NEXT_DESC_PTR)
 625 #define bfin_write_DMA7_NEXT_DESC_PTR(val)      bfin_write32(DMA7_NEXT_DESC_PTR, val)
 626 #define bfin_read_DMA7_START_ADDR()             bfin_read32(DMA7_START_ADDR)
 627 #define bfin_write_DMA7_START_ADDR(val)         bfin_write32(DMA7_START_ADDR, val)
 628 #define bfin_read_DMA7_X_COUNT()                bfin_read16(DMA7_X_COUNT)
 629 #define bfin_write_DMA7_X_COUNT(val)            bfin_write16(DMA7_X_COUNT, val)
 630 #define bfin_read_DMA7_Y_COUNT()                bfin_read16(DMA7_Y_COUNT)
 631 #define bfin_write_DMA7_Y_COUNT(val)            bfin_write16(DMA7_Y_COUNT, val)
 632 #define bfin_read_DMA7_X_MODIFY()               bfin_read16(DMA7_X_MODIFY)
 633 #define bfin_write_DMA7_X_MODIFY(val)           bfin_write16(DMA7_X_MODIFY, val)
 634 #define bfin_read_DMA7_Y_MODIFY()               bfin_read16(DMA7_Y_MODIFY)
 635 #define bfin_write_DMA7_Y_MODIFY(val)           bfin_write16(DMA7_Y_MODIFY, val)
 636 #define bfin_read_DMA7_CURR_DESC_PTR()          bfin_read32(DMA7_CURR_DESC_PTR)
 637 #define bfin_write_DMA7_CURR_DESC_PTR(val)      bfin_write32(DMA7_CURR_DESC_PTR, val)
 638 #define bfin_read_DMA7_CURR_ADDR()              bfin_read32(DMA7_CURR_ADDR)
 639 #define bfin_write_DMA7_CURR_ADDR(val)          bfin_write32(DMA7_CURR_ADDR, val)
 640 #define bfin_read_DMA7_CURR_X_COUNT()           bfin_read16(DMA7_CURR_X_COUNT)
 641 #define bfin_write_DMA7_CURR_X_COUNT(val)       bfin_write16(DMA7_CURR_X_COUNT, val)
 642 #define bfin_read_DMA7_CURR_Y_COUNT()           bfin_read16(DMA7_CURR_Y_COUNT)
 643 #define bfin_write_DMA7_CURR_Y_COUNT(val)       bfin_write16(DMA7_CURR_Y_COUNT, val)
 644 #define bfin_read_DMA7_IRQ_STATUS()             bfin_read16(DMA7_IRQ_STATUS)
 645 #define bfin_write_DMA7_IRQ_STATUS(val)         bfin_write16(DMA7_IRQ_STATUS, val)
 646 #define bfin_read_DMA7_PERIPHERAL_MAP()         bfin_read16(DMA7_PERIPHERAL_MAP)
 647 #define bfin_write_DMA7_PERIPHERAL_MAP(val)     bfin_write16(DMA7_PERIPHERAL_MAP, val)
 648
 649 #define bfin_read_DMA8_CONFIG()                 bfin_read16(DMA8_CONFIG)
 650 #define bfin_write_DMA8_CONFIG(val)             bfin_write16(DMA8_CONFIG, val)
 651 #define bfin_read_DMA8_NEXT_DESC_PTR()          bfin_read32(DMA8_NEXT_DESC_PTR)
 652 #define bfin_write_DMA8_NEXT_DESC_PTR(val)      bfin_write32(DMA8_NEXT_DESC_PTR, val)
 653 #define bfin_read_DMA8_START_ADDR()             bfin_read32(DMA8_START_ADDR)
 654 #define bfin_write_DMA8_START_ADDR(val)         bfin_write32(DMA8_START_ADDR, val)
 655 #define bfin_read_DMA8_X_COUNT()                bfin_read16(DMA8_X_COUNT)
 656 #define bfin_write_DMA8_X_COUNT(val)            bfin_write16(DMA8_X_COUNT, val)
 657 #define bfin_read_DMA8_Y_COUNT()                bfin_read16(DMA8_Y_COUNT)
 658 #define bfin_write_DMA8_Y_COUNT(val)            bfin_write16(DMA8_Y_COUNT, val)
 659 #define bfin_read_DMA8_X_MODIFY()               bfin_read16(DMA8_X_MODIFY)
 660 #define bfin_write_DMA8_X_MODIFY(val)           bfin_write16(DMA8_X_MODIFY, val)
 661 #define bfin_read_DMA8_Y_MODIFY()               bfin_read16(DMA8_Y_MODIFY)
 662 #define bfin_write_DMA8_Y_MODIFY(val)           bfin_write16(DMA8_Y_MODIFY, val)
 663 #define bfin_read_DMA8_CURR_DESC_PTR()          bfin_read32(DMA8_CURR_DESC_PTR)
 664 #define bfin_write_DMA8_CURR_DESC_PTR(val)      bfin_write32(DMA8_CURR_DESC_PTR, val)
 665 #define bfin_read_DMA8_CURR_ADDR()              bfin_read32(DMA8_CURR_ADDR)
 666 #define bfin_write_DMA8_CURR_ADDR(val)          bfin_write32(DMA8_CURR_ADDR, val)
 667 #define bfin_read_DMA8_CURR_X_COUNT()           bfin_read16(DMA8_CURR_X_COUNT)
 668 #define bfin_write_DMA8_CURR_X_COUNT(val)       bfin_write16(DMA8_CURR_X_COUNT, val)
 669 #define bfin_read_DMA8_CURR_Y_COUNT()           bfin_read16(DMA8_CURR_Y_COUNT)
 670 #define bfin_write_DMA8_CURR_Y_COUNT(val)       bfin_write16(DMA8_CURR_Y_COUNT, val)
 671 #define bfin_read_DMA8_IRQ_STATUS()             bfin_read16(DMA8_IRQ_STATUS)
 672 #define bfin_write_DMA8_IRQ_STATUS(val)         bfin_write16(DMA8_IRQ_STATUS, val)
 673 #define bfin_read_DMA8_PERIPHERAL_MAP()         bfin_read16(DMA8_PERIPHERAL_MAP)
 674 #define bfin_write_DMA8_PERIPHERAL_MAP(val)     bfin_write16(DMA8_PERIPHERAL_MAP, val)
 675
 676 #define bfin_read_DMA9_CONFIG()                 bfin_read16(DMA9_CONFIG)
 677 #define bfin_write_DMA9_CONFIG(val)             bfin_write16(DMA9_CONFIG, val)
 678 #define bfin_read_DMA9_NEXT_DESC_PTR()          bfin_read32(DMA9_NEXT_DESC_PTR)
 679 #define bfin_write_DMA9_NEXT_DESC_PTR(val)      bfin_write32(DMA9_NEXT_DESC_PTR, val)
 680 #define bfin_read_DMA9_START_ADDR()             bfin_read32(DMA9_START_ADDR)
 681 #define bfin_write_DMA9_START_ADDR(val)         bfin_write32(DMA9_START_ADDR, val)
 682 #define bfin_read_DMA9_X_COUNT()                bfin_read16(DMA9_X_COUNT)
 683 #define bfin_write_DMA9_X_COUNT(val)            bfin_write16(DMA9_X_COUNT, val)
 684 #define bfin_read_DMA9_Y_COUNT()                bfin_read16(DMA9_Y_COUNT)
 685 #define bfin_write_DMA9_Y_COUNT(val)            bfin_write16(DMA9_Y_COUNT, val)
 686 #define bfin_read_DMA9_X_MODIFY()               bfin_read16(DMA9_X_MODIFY)
 687 #define bfin_write_DMA9_X_MODIFY(val)           bfin_write16(DMA9_X_MODIFY, val)
 688 #define bfin_read_DMA9_Y_MODIFY()               bfin_read16(DMA9_Y_MODIFY)
 689 #define bfin_write_DMA9_Y_MODIFY(val)           bfin_write16(DMA9_Y_MODIFY, val)
 690 #define bfin_read_DMA9_CURR_DESC_PTR()          bfin_read32(DMA9_CURR_DESC_PTR)
 691 #define bfin_write_DMA9_CURR_DESC_PTR(val)      bfin_write32(DMA9_CURR_DESC_PTR, val)
 692 #define bfin_read_DMA9_CURR_ADDR()              bfin_read32(DMA9_CURR_ADDR)
 693 #define bfin_write_DMA9_CURR_ADDR(val)          bfin_write32(DMA9_CURR_ADDR, val)
 694 #define bfin_read_DMA9_CURR_X_COUNT()           bfin_read16(DMA9_CURR_X_COUNT)
 695 #define bfin_write_DMA9_CURR_X_COUNT(val)       bfin_write16(DMA9_CURR_X_COUNT, val)
 696 #define bfin_read_DMA9_CURR_Y_COUNT()           bfin_read16(DMA9_CURR_Y_COUNT)
 697 #define bfin_write_DMA9_CURR_Y_COUNT(val)       bfin_write16(DMA9_CURR_Y_COUNT, val)
 698 #define bfin_read_DMA9_IRQ_STATUS()             bfin_read16(DMA9_IRQ_STATUS)
 699 #define bfin_write_DMA9_IRQ_STATUS(val)         bfin_write16(DMA9_IRQ_STATUS, val)
 700 #define bfin_read_DMA9_PERIPHERAL_MAP()         bfin_read16(DMA9_PERIPHERAL_MAP)
 701 #define bfin_write_DMA9_PERIPHERAL_MAP(val)     bfin_write16(DMA9_PERIPHERAL_MAP, val)
 702
 703 #define bfin_read_DMA10_CONFIG()                bfin_read16(DMA10_CONFIG)
 704 #define bfin_write_DMA10_CONFIG(val)            bfin_write16(DMA10_CONFIG, val)
 705 #define bfin_read_DMA10_NEXT_DESC_PTR()         bfin_read32(DMA10_NEXT_DESC_PTR)
 706 #define bfin_write_DMA10_NEXT_DESC_PTR(val)     bfin_write32(DMA10_NEXT_DESC_PTR, val)
 707 #define bfin_read_DMA10_START_ADDR()            bfin_read32(DMA10_START_ADDR)
 708 #define bfin_write_DMA10_START_ADDR(val)        bfin_write32(DMA10_START_ADDR, val)
 709 #define bfin_read_DMA10_X_COUNT()               bfin_read16(DMA10_X_COUNT)
 710 #define bfin_write_DMA10_X_COUNT(val)           bfin_write16(DMA10_X_COUNT, val)
 711 #define bfin_read_DMA10_Y_COUNT()               bfin_read16(DMA10_Y_COUNT)
 712 #define bfin_write_DMA10_Y_COUNT(val)           bfin_write16(DMA10_Y_COUNT, val)
 713 #define bfin_read_DMA10_X_MODIFY()              bfin_read16(DMA10_X_MODIFY)
 714 #define bfin_write_DMA10_X_MODIFY(val)          bfin_write16(DMA10_X_MODIFY, val)
 715 #define bfin_read_DMA10_Y_MODIFY()              bfin_read16(DMA10_Y_MODIFY)
 716 #define bfin_write_DMA10_Y_MODIFY(val)          bfin_write16(DMA10_Y_MODIFY, val)
 717 #define bfin_read_DMA10_CURR_DESC_PTR()         bfin_read32(DMA10_CURR_DESC_PTR)
 718 #define bfin_write_DMA10_CURR_DESC_PTR(val)     bfin_write32(DMA10_CURR_DESC_PTR, val)
 719 #define bfin_read_DMA10_CURR_ADDR()             bfin_read32(DMA10_CURR_ADDR)
 720 #define bfin_write_DMA10_CURR_ADDR(val)         bfin_write32(DMA10_CURR_ADDR, val)
 721 #define bfin_read_DMA10_CURR_X_COUNT()          bfin_read16(DMA10_CURR_X_COUNT)
 722 #define bfin_write_DMA10_CURR_X_COUNT(val)      bfin_write16(DMA10_CURR_X_COUNT, val)
 723 #define bfin_read_DMA10_CURR_Y_COUNT()          bfin_read16(DMA10_CURR_Y_COUNT)
 724 #define bfin_write_DMA10_CURR_Y_COUNT(val)      bfin_write16(DMA10_CURR_Y_COUNT, val)
 725 #define bfin_read_DMA10_IRQ_STATUS()            bfin_read16(DMA10_IRQ_STATUS)
 726 #define bfin_write_DMA10_IRQ_STATUS(val)        bfin_write16(DMA10_IRQ_STATUS, val)
 727 #define bfin_read_DMA10_PERIPHERAL_MAP()        bfin_read16(DMA10_PERIPHERAL_MAP)
 728 #define bfin_write_DMA10_PERIPHERAL_MAP(val)    bfin_write16(DMA10_PERIPHERAL_MAP, val)
 729
 730 #define bfin_read_DMA11_CONFIG()                bfin_read16(DMA11_CONFIG)
 731 #define bfin_write_DMA11_CONFIG(val)            bfin_write16(DMA11_CONFIG, val)
 732 #define bfin_read_DMA11_NEXT_DESC_PTR()         bfin_read32(DMA11_NEXT_DESC_PTR)
 733 #define bfin_write_DMA11_NEXT_DESC_PTR(val)     bfin_write32(DMA11_NEXT_DESC_PTR, val)
 734 #define bfin_read_DMA11_START_ADDR()            bfin_read32(DMA11_START_ADDR)
 735 #define bfin_write_DMA11_START_ADDR(val)        bfin_write32(DMA11_START_ADDR, val)
 736 #define bfin_read_DMA11_X_COUNT()               bfin_read16(DMA11_X_COUNT)
 737 #define bfin_write_DMA11_X_COUNT(val)           bfin_write16(DMA11_X_COUNT, val)
 738 #define bfin_read_DMA11_Y_COUNT()               bfin_read16(DMA11_Y_COUNT)
 739 #define bfin_write_DMA11_Y_COUNT(val)           bfin_write16(DMA11_Y_COUNT, val)
 740 #define bfin_read_DMA11_X_MODIFY()              bfin_read16(DMA11_X_MODIFY)
 741 #define bfin_write_DMA11_X_MODIFY(val)          bfin_write16(DMA11_X_MODIFY, val)
 742 #define bfin_read_DMA11_Y_MODIFY()              bfin_read16(DMA11_Y_MODIFY)
 743 #define bfin_write_DMA11_Y_MODIFY(val)          bfin_write16(DMA11_Y_MODIFY, val)
 744 #define bfin_read_DMA11_CURR_DESC_PTR()         bfin_read32(DMA11_CURR_DESC_PTR)
 745 #define bfin_write_DMA11_CURR_DESC_PTR(val)     bfin_write32(DMA11_CURR_DESC_PTR, val)
 746 #define bfin_read_DMA11_CURR_ADDR()             bfin_read32(DMA11_CURR_ADDR)
 747 #define bfin_write_DMA11_CURR_ADDR(val)         bfin_write32(DMA11_CURR_ADDR, val)
 748 #define bfin_read_DMA11_CURR_X_COUNT()          bfin_read16(DMA11_CURR_X_COUNT)
 749 #define bfin_write_DMA11_CURR_X_COUNT(val)      bfin_write16(DMA11_CURR_X_COUNT, val)
 750 #define bfin_read_DMA11_CURR_Y_COUNT()          bfin_read16(DMA11_CURR_Y_COUNT)
 751 #define bfin_write_DMA11_CURR_Y_COUNT(val)      bfin_write16(DMA11_CURR_Y_COUNT, val)
 752 #define bfin_read_DMA11_IRQ_STATUS()            bfin_read16(DMA11_IRQ_STATUS)
 753 #define bfin_write_DMA11_IRQ_STATUS(val)        bfin_write16(DMA11_IRQ_STATUS, val)
 754 #define bfin_read_DMA11_PERIPHERAL_MAP()        bfin_read16(DMA11_PERIPHERAL_MAP)
 755 #define bfin_write_DMA11_PERIPHERAL_MAP(val)    bfin_write16(DMA11_PERIPHERAL_MAP, val)
 756
 757 #define bfin_read_MDMA_D0_CONFIG()              bfin_read16(MDMA_D0_CONFIG)
 758 #define bfin_write_MDMA_D0_CONFIG(val)          bfin_write16(MDMA_D0_CONFIG, val)
 759 #define bfin_read_MDMA_D0_NEXT_DESC_PTR()       bfin_read32(MDMA_D0_NEXT_DESC_PTR)
 760 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
 761 #define bfin_read_MDMA_D0_START_ADDR()          bfin_read32(MDMA_D0_START_ADDR)
 762 #define bfin_write_MDMA_D0_START_ADDR(val)      bfin_write32(MDMA_D0_START_ADDR, val)
 763 #define bfin_read_MDMA_D0_X_COUNT()             bfin_read16(MDMA_D0_X_COUNT)
 764 #define bfin_write_MDMA_D0_X_COUNT(val)         bfin_write16(MDMA_D0_X_COUNT, val)
 765 #define bfin_read_MDMA_D0_Y_COUNT()             bfin_read16(MDMA_D0_Y_COUNT)
 766 #define bfin_write_MDMA_D0_Y_COUNT(val)         bfin_write16(MDMA_D0_Y_COUNT, val)
 767 #define bfin_read_MDMA_D0_X_MODIFY()            bfin_read16(MDMA_D0_X_MODIFY)
 768 #define bfin_write_MDMA_D0_X_MODIFY(val)        bfin_write16(MDMA_D0_X_MODIFY, val)
 769 #define bfin_read_MDMA_D0_Y_MODIFY()            bfin_read16(MDMA_D0_Y_MODIFY)
 770 #define bfin_write_MDMA_D0_Y_MODIFY(val)        bfin_write16(MDMA_D0_Y_MODIFY, val)
 771 #define bfin_read_MDMA_D0_CURR_DESC_PTR()       bfin_read32(MDMA_D0_CURR_DESC_PTR)
 772 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val)   bfin_write32(MDMA_D0_CURR_DESC_PTR, val)
 773 #define bfin_read_MDMA_D0_CURR_ADDR()           bfin_read32(MDMA_D0_CURR_ADDR)
 774 #define bfin_write_MDMA_D0_CURR_ADDR(val)       bfin_write32(MDMA_D0_CURR_ADDR, val)
 775 #define bfin_read_MDMA_D0_CURR_X_COUNT()        bfin_read16(MDMA_D0_CURR_X_COUNT)
 776 #define bfin_write_MDMA_D0_CURR_X_COUNT(val)    bfin_write16(MDMA_D0_CURR_X_COUNT, val)
 777 #define bfin_read_MDMA_D0_CURR_Y_COUNT()        bfin_read16(MDMA_D0_CURR_Y_COUNT)
 778 #define bfin_write_MDMA_D0_CURR_Y_COUNT(val)    bfin_write16(MDMA_D0_CURR_Y_COUNT, val)
 779 #define bfin_read_MDMA_D0_IRQ_STATUS()          bfin_read16(MDMA_D0_IRQ_STATUS)
 780 #define bfin_write_MDMA_D0_IRQ_STATUS(val)      bfin_write16(MDMA_D0_IRQ_STATUS, val)
 781 #define bfin_read_MDMA_D0_PERIPHERAL_MAP()      bfin_read16(MDMA_D0_PERIPHERAL_MAP)
 782 #define bfin_write_MDMA_D0_PERIPHERAL_MAP(val)  bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)
 783
 784 #define bfin_read_MDMA_S0_CONFIG()              bfin_read16(MDMA_S0_CONFIG)
 785 #define bfin_write_MDMA_S0_CONFIG(val)          bfin_write16(MDMA_S0_CONFIG, val)
 786 #define bfin_read_MDMA_S0_NEXT_DESC_PTR()       bfin_read32(MDMA_S0_NEXT_DESC_PTR)
 787 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)
 788 #define bfin_read_MDMA_S0_START_ADDR()          bfin_read32(MDMA_S0_START_ADDR)
 789 #define bfin_write_MDMA_S0_START_ADDR(val)      bfin_write32(MDMA_S0_START_ADDR, val)
 790 #define bfin_read_MDMA_S0_X_COUNT()             bfin_read16(MDMA_S0_X_COUNT)
 791 #define bfin_write_MDMA_S0_X_COUNT(val)         bfin_write16(MDMA_S0_X_COUNT, val)
 792 #define bfin_read_MDMA_S0_Y_COUNT()             bfin_read16(MDMA_S0_Y_COUNT)
 793 #define bfin_write_MDMA_S0_Y_COUNT(val)         bfin_write16(MDMA_S0_Y_COUNT, val)
 794 #define bfin_read_MDMA_S0_X_MODIFY()            bfin_read16(MDMA_S0_X_MODIFY)
 795 #define bfin_write_MDMA_S0_X_MODIFY(val)        bfin_write16(MDMA_S0_X_MODIFY, val)
 796 #define bfin_read_MDMA_S0_Y_MODIFY()            bfin_read16(MDMA_S0_Y_MODIFY)
 797 #define bfin_write_MDMA_S0_Y_MODIFY(val)        bfin_write16(MDMA_S0_Y_MODIFY, val)
 798 #define bfin_read_MDMA_S0_CURR_DESC_PTR()       bfin_read32(MDMA_S0_CURR_DESC_PTR)
 799 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val)   bfin_write32(MDMA_S0_CURR_DESC_PTR, val)
 800 #define bfin_read_MDMA_S0_CURR_ADDR()           bfin_read32(MDMA_S0_CURR_ADDR)
 801 #define bfin_write_MDMA_S0_CURR_ADDR(val)       bfin_write32(MDMA_S0_CURR_ADDR, val)
 802 #define bfin_read_MDMA_S0_CURR_X_COUNT()        bfin_read16(MDMA_S0_CURR_X_COUNT)
 803 #define bfin_write_MDMA_S0_CURR_X_COUNT(val)    bfin_write16(MDMA_S0_CURR_X_COUNT, val)
 804 #define bfin_read_MDMA_S0_CURR_Y_COUNT()        bfin_read16(MDMA_S0_CURR_Y_COUNT)
 805 #define bfin_write_MDMA_S0_CURR_Y_COUNT(val)    bfin_write16(MDMA_S0_CURR_Y_COUNT, val)
 806 #define bfin_read_MDMA_S0_IRQ_STATUS()          bfin_read16(MDMA_S0_IRQ_STATUS)
 807 #define bfin_write_MDMA_S0_IRQ_STATUS(val)      bfin_write16(MDMA_S0_IRQ_STATUS, val)
 808 #define bfin_read_MDMA_S0_PERIPHERAL_MAP()      bfin_read16(MDMA_S0_PERIPHERAL_MAP)
 809 #define bfin_write_MDMA_S0_PERIPHERAL_MAP(val)  bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)
 810
 811 #define bfin_read_MDMA_D1_CONFIG()              bfin_read16(MDMA_D1_CONFIG)
 812 #define bfin_write_MDMA_D1_CONFIG(val)          bfin_write16(MDMA_D1_CONFIG, val)
 813 #define bfin_read_MDMA_D1_NEXT_DESC_PTR()       bfin_read32(MDMA_D1_NEXT_DESC_PTR)
 814 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)
 815 #define bfin_read_MDMA_D1_START_ADDR()          bfin_read32(MDMA_D1_START_ADDR)
 816 #define bfin_write_MDMA_D1_START_ADDR(val)      bfin_write32(MDMA_D1_START_ADDR, val)
 817 #define bfin_read_MDMA_D1_X_COUNT()             bfin_read16(MDMA_D1_X_COUNT)
 818 #define bfin_write_MDMA_D1_X_COUNT(val)         bfin_write16(MDMA_D1_X_COUNT, val)
 819 #define bfin_read_MDMA_D1_Y_COUNT()             bfin_read16(MDMA_D1_Y_COUNT)
 820 #define bfin_write_MDMA_D1_Y_COUNT(val)         bfin_write16(MDMA_D1_Y_COUNT, val)
 821 #define bfin_read_MDMA_D1_X_MODIFY()            bfin_read16(MDMA_D1_X_MODIFY)
 822 #define bfin_write_MDMA_D1_X_MODIFY(val)        bfin_write16(MDMA_D1_X_MODIFY, val)
 823 #define bfin_read_MDMA_D1_Y_MODIFY()            bfin_read16(MDMA_D1_Y_MODIFY)
 824 #define bfin_write_MDMA_D1_Y_MODIFY(val)        bfin_write16(MDMA_D1_Y_MODIFY, val)
 825 #define bfin_read_MDMA_D1_CURR_DESC_PTR()       bfin_read32(MDMA_D1_CURR_DESC_PTR)
 826 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val)   bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
 827 #define bfin_read_MDMA_D1_CURR_ADDR()           bfin_read32(MDMA_D1_CURR_ADDR)
 828 #define bfin_write_MDMA_D1_CURR_ADDR(val)       bfin_write32(MDMA_D1_CURR_ADDR, val)
 829 #define bfin_read_MDMA_D1_CURR_X_COUNT()        bfin_read16(MDMA_D1_CURR_X_COUNT)
 830 #define bfin_write_MDMA_D1_CURR_X_COUNT(val)    bfin_write16(MDMA_D1_CURR_X_COUNT, val)
 831 #define bfin_read_MDMA_D1_CURR_Y_COUNT()        bfin_read16(MDMA_D1_CURR_Y_COUNT)
 832 #define bfin_write_MDMA_D1_CURR_Y_COUNT(val)    bfin_write16(MDMA_D1_CURR_Y_COUNT, val)
 833 #define bfin_read_MDMA_D1_IRQ_STATUS()          bfin_read16(MDMA_D1_IRQ_STATUS)
 834 #define bfin_write_MDMA_D1_IRQ_STATUS(val)      bfin_write16(MDMA_D1_IRQ_STATUS, val)
 835 #define bfin_read_MDMA_D1_PERIPHERAL_MAP()      bfin_read16(MDMA_D1_PERIPHERAL_MAP)
 836 #define bfin_write_MDMA_D1_PERIPHERAL_MAP(val)  bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)
 837
 838 #define bfin_read_MDMA_S1_CONFIG()              bfin_read16(MDMA_S1_CONFIG)
 839 #define bfin_write_MDMA_S1_CONFIG(val)          bfin_write16(MDMA_S1_CONFIG, val)
 840 #define bfin_read_MDMA_S1_NEXT_DESC_PTR()       bfin_read32(MDMA_S1_NEXT_DESC_PTR)
 841 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val)   bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)
 842 #define bfin_read_MDMA_S1_START_ADDR()          bfin_read32(MDMA_S1_START_ADDR)
 843 #define bfin_write_MDMA_S1_START_ADDR(val)      bfin_write32(MDMA_S1_START_ADDR, val)
 844 #define bfin_read_MDMA_S1_X_COUNT()             bfin_read16(MDMA_S1_X_COUNT)
 845 #define bfin_write_MDMA_S1_X_COUNT(val)         bfin_write16(MDMA_S1_X_COUNT, val)
 846 #define bfin_read_MDMA_S1_Y_COUNT()             bfin_read16(MDMA_S1_Y_COUNT)
 847 #define bfin_write_MDMA_S1_Y_COUNT(val)         bfin_write16(MDMA_S1_Y_COUNT, val)
 848 #define bfin_read_MDMA_S1_X_MODIFY()            bfin_read16(MDMA_S1_X_MODIFY)
 849 #define bfin_write_MDMA_S1_X_MODIFY(val)        bfin_write16(MDMA_S1_X_MODIFY, val)
 850 #define bfin_read_MDMA_S1_Y_MODIFY()            bfin_read16(MDMA_S1_Y_MODIFY)
 851 #define bfin_write_MDMA_S1_Y_MODIFY(val)        bfin_write16(MDMA_S1_Y_MODIFY, val)
 852 #define bfin_read_MDMA_S1_CURR_DESC_PTR()       bfin_read32(MDMA_S1_CURR_DESC_PTR)
 853 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val)   bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
 854 #define bfin_read_MDMA_S1_CURR_ADDR()           bfin_read32(MDMA_S1_CURR_ADDR)
 855 #define bfin_write_MDMA_S1_CURR_ADDR(val)       bfin_write32(MDMA_S1_CURR_ADDR, val)
 856 #define bfin_read_MDMA_S1_CURR_X_COUNT()        bfin_read16(MDMA_S1_CURR_X_COUNT)
 857 #define bfin_write_MDMA_S1_CURR_X_COUNT(val)    bfin_write16(MDMA_S1_CURR_X_COUNT, val)
 858 #define bfin_read_MDMA_S1_CURR_Y_COUNT()        bfin_read16(MDMA_S1_CURR_Y_COUNT)
 859 #define bfin_write_MDMA_S1_CURR_Y_COUNT(val)    bfin_write16(MDMA_S1_CURR_Y_COUNT, val)
 860 #define bfin_read_MDMA_S1_IRQ_STATUS()          bfin_read16(MDMA_S1_IRQ_STATUS)
 861 #define bfin_write_MDMA_S1_IRQ_STATUS(val)      bfin_write16(MDMA_S1_IRQ_STATUS, val)
 862 #define bfin_read_MDMA_S1_PERIPHERAL_MAP()      bfin_read16(MDMA_S1_PERIPHERAL_MAP)
 863 #define bfin_write_MDMA_S1_PERIPHERAL_MAP(val)  bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)
 864
 865
 866 /* Parallel Peripheral Interface (0xFFC01000 - 0xFFC010FF)                                                      */
 867 #define bfin_read_PPI_CONTROL()                 bfin_read16(PPI_CONTROL)
 868 #define bfin_write_PPI_CONTROL(val)             bfin_write16(PPI_CONTROL, val)
 869 #define bfin_read_PPI_STATUS()                  bfin_read16(PPI_STATUS)
 870 #define bfin_write_PPI_STATUS(val)              bfin_write16(PPI_STATUS, val)
 871 #define bfin_read_PPI_DELAY()                   bfin_read16(PPI_DELAY)
 872 #define bfin_write_PPI_DELAY(val)               bfin_write16(PPI_DELAY, val)
 873 #define bfin_read_PPI_COUNT()                   bfin_read16(PPI_COUNT)
 874 #define bfin_write_PPI_COUNT(val)               bfin_write16(PPI_COUNT, val)
 875 #define bfin_read_PPI_FRAME()                   bfin_read16(PPI_FRAME)
 876 #define bfin_write_PPI_FRAME(val)               bfin_write16(PPI_FRAME, val)
 877
 878
 879 /* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF)                                                               */
 880
 881 /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF)                                                         */
 882 #define bfin_read_PORTGIO()                     bfin_read16(PORTGIO)
 883 #define bfin_write_PORTGIO(val)                 bfin_write16(PORTGIO, val)
 884 #define bfin_read_PORTGIO_CLEAR()               bfin_read16(PORTGIO_CLEAR)
 885 #define bfin_write_PORTGIO_CLEAR(val)           bfin_write16(PORTGIO_CLEAR, val)
 886 #define bfin_read_PORTGIO_SET()                 bfin_read16(PORTGIO_SET)
 887 #define bfin_write_PORTGIO_SET(val)             bfin_write16(PORTGIO_SET, val)
 888 #define bfin_read_PORTGIO_TOGGLE()              bfin_read16(PORTGIO_TOGGLE)
 889 #define bfin_write_PORTGIO_TOGGLE(val)          bfin_write16(PORTGIO_TOGGLE, val)
 890 #define bfin_read_PORTGIO_MASKA()               bfin_read16(PORTGIO_MASKA)
 891 #define bfin_write_PORTGIO_MASKA(val)           bfin_write16(PORTGIO_MASKA, val)
 892 #define bfin_read_PORTGIO_MASKA_CLEAR()         bfin_read16(PORTGIO_MASKA_CLEAR)
 893 #define bfin_write_PORTGIO_MASKA_CLEAR(val)     bfin_write16(PORTGIO_MASKA_CLEAR, val)
 894 #define bfin_read_PORTGIO_MASKA_SET()           bfin_read16(PORTGIO_MASKA_SET)
 895 #define bfin_write_PORTGIO_MASKA_SET(val)       bfin_write16(PORTGIO_MASKA_SET, val)
 896 #define bfin_read_PORTGIO_MASKA_TOGGLE()        bfin_read16(PORTGIO_MASKA_TOGGLE)
 897 #define bfin_write_PORTGIO_MASKA_TOGGLE(val)    bfin_write16(PORTGIO_MASKA_TOGGLE, val)
 898 #define bfin_read_PORTGIO_MASKB()               bfin_read16(PORTGIO_MASKB)
 899 #define bfin_write_PORTGIO_MASKB(val)           bfin_write16(PORTGIO_MASKB, val)
 900 #define bfin_read_PORTGIO_MASKB_CLEAR()         bfin_read16(PORTGIO_MASKB_CLEAR)
 901 #define bfin_write_PORTGIO_MASKB_CLEAR(val)     bfin_write16(PORTGIO_MASKB_CLEAR, val)
 902 #define bfin_read_PORTGIO_MASKB_SET()           bfin_read16(PORTGIO_MASKB_SET)
 903 #define bfin_write_PORTGIO_MASKB_SET(val)       bfin_write16(PORTGIO_MASKB_SET, val)
 904 #define bfin_read_PORTGIO_MASKB_TOGGLE()        bfin_read16(PORTGIO_MASKB_TOGGLE)
 905 #define bfin_write_PORTGIO_MASKB_TOGGLE(val)    bfin_write16(PORTGIO_MASKB_TOGGLE, val)
 906 #define bfin_read_PORTGIO_DIR()                 bfin_read16(PORTGIO_DIR)
 907 #define bfin_write_PORTGIO_DIR(val)             bfin_write16(PORTGIO_DIR, val)
 908 #define bfin_read_PORTGIO_POLAR()               bfin_read16(PORTGIO_POLAR)
 909 #define bfin_write_PORTGIO_POLAR(val)           bfin_write16(PORTGIO_POLAR, val)
 910 #define bfin_read_PORTGIO_EDGE()                bfin_read16(PORTGIO_EDGE)
 911 #define bfin_write_PORTGIO_EDGE(val)            bfin_write16(PORTGIO_EDGE, val)
 912 #define bfin_read_PORTGIO_BOTH()                bfin_read16(PORTGIO_BOTH)
 913 #define bfin_write_PORTGIO_BOTH(val)            bfin_write16(PORTGIO_BOTH, val)
 914 #define bfin_read_PORTGIO_INEN()                bfin_read16(PORTGIO_INEN)
 915 #define bfin_write_PORTGIO_INEN(val)            bfin_write16(PORTGIO_INEN, val)
 916
 917
 918 /* General Purpose I/O Port H (0xFFC01700 - 0xFFC017FF)                                                         */
 919 #define bfin_read_PORTHIO()                     bfin_read16(PORTHIO)
 920 #define bfin_write_PORTHIO(val)                 bfin_write16(PORTHIO, val)
 921 #define bfin_read_PORTHIO_CLEAR()               bfin_read16(PORTHIO_CLEAR)
 922 #define bfin_write_PORTHIO_CLEAR(val)           bfin_write16(PORTHIO_CLEAR, val)
 923 #define bfin_read_PORTHIO_SET()                 bfin_read16(PORTHIO_SET)
 924 #define bfin_write_PORTHIO_SET(val)             bfin_write16(PORTHIO_SET, val)
 925 #define bfin_read_PORTHIO_TOGGLE()              bfin_read16(PORTHIO_TOGGLE)
 926 #define bfin_write_PORTHIO_TOGGLE(val)          bfin_write16(PORTHIO_TOGGLE, val)
 927 #define bfin_read_PORTHIO_MASKA()               bfin_read16(PORTHIO_MASKA)
 928 #define bfin_write_PORTHIO_MASKA(val)           bfin_write16(PORTHIO_MASKA, val)
 929 #define bfin_read_PORTHIO_MASKA_CLEAR()         bfin_read16(PORTHIO_MASKA_CLEAR)
 930 #define bfin_write_PORTHIO_MASKA_CLEAR(val)     bfin_write16(PORTHIO_MASKA_CLEAR, val)
 931 #define bfin_read_PORTHIO_MASKA_SET()           bfin_read16(PORTHIO_MASKA_SET)
 932 #define bfin_write_PORTHIO_MASKA_SET(val)       bfin_write16(PORTHIO_MASKA_SET, val)
 933 #define bfin_read_PORTHIO_MASKA_TOGGLE()        bfin_read16(PORTHIO_MASKA_TOGGLE)
 934 #define bfin_write_PORTHIO_MASKA_TOGGLE(val)    bfin_write16(PORTHIO_MASKA_TOGGLE, val)
 935 #define bfin_read_PORTHIO_MASKB()               bfin_read16(PORTHIO_MASKB)
 936 #define bfin_write_PORTHIO_MASKB(val)           bfin_write16(PORTHIO_MASKB, val)
 937 #define bfin_read_PORTHIO_MASKB_CLEAR()         bfin_read16(PORTHIO_MASKB_CLEAR)
 938 #define bfin_write_PORTHIO_MASKB_CLEAR(val)     bfin_write16(PORTHIO_MASKB_CLEAR, val)
 939 #define bfin_read_PORTHIO_MASKB_SET()           bfin_read16(PORTHIO_MASKB_SET)
 940 #define bfin_write_PORTHIO_MASKB_SET(val)       bfin_write16(PORTHIO_MASKB_SET, val)
 941 #define bfin_read_PORTHIO_MASKB_TOGGLE()        bfin_read16(PORTHIO_MASKB_TOGGLE)
 942 #define bfin_write_PORTHIO_MASKB_TOGGLE(val)    bfin_write16(PORTHIO_MASKB_TOGGLE, val)
 943 #define bfin_read_PORTHIO_DIR()                 bfin_read16(PORTHIO_DIR)
 944 #define bfin_write_PORTHIO_DIR(val)             bfin_write16(PORTHIO_DIR, val)
 945 #define bfin_read_PORTHIO_POLAR()               bfin_read16(PORTHIO_POLAR)
 946 #define bfin_write_PORTHIO_POLAR(val)           bfin_write16(PORTHIO_POLAR, val)
 947 #define bfin_read_PORTHIO_EDGE()                bfin_read16(PORTHIO_EDGE)
 948 #define bfin_write_PORTHIO_EDGE(val)            bfin_write16(PORTHIO_EDGE, val)
 949 #define bfin_read_PORTHIO_BOTH()                bfin_read16(PORTHIO_BOTH)
 950 #define bfin_write_PORTHIO_BOTH(val)            bfin_write16(PORTHIO_BOTH, val)
 951 #define bfin_read_PORTHIO_INEN()                bfin_read16(PORTHIO_INEN)
 952 #define bfin_write_PORTHIO_INEN(val)            bfin_write16(PORTHIO_INEN, val)
 953
 954
 955 /* UART1 Controller             (0xFFC02000 - 0xFFC020FF)                                                               */
 956 #define bfin_read_UART1_THR()                   bfin_read16(UART1_THR)
 957 #define bfin_write_UART1_THR(val)               bfin_write16(UART1_THR, val)
 958 #define bfin_read_UART1_RBR()                   bfin_read16(UART1_RBR)
 959 #define bfin_write_UART1_RBR(val)               bfin_write16(UART1_RBR, val)
 960 #define bfin_read_UART1_DLL()                   bfin_read16(UART1_DLL)
 961 #define bfin_write_UART1_DLL(val)               bfin_write16(UART1_DLL, val)
 962 #define bfin_read_UART1_IER()                   bfin_read16(UART1_IER)
 963 #define bfin_write_UART1_IER(val)               bfin_write16(UART1_IER, val)
 964 #define bfin_read_UART1_DLH()                   bfin_read16(UART1_DLH)
 965 #define bfin_write_UART1_DLH(val)               bfin_write16(UART1_DLH, val)
 966 #define bfin_read_UART1_IIR()                   bfin_read16(UART1_IIR)
 967 #define bfin_write_UART1_IIR(val)               bfin_write16(UART1_IIR, val)
 968 #define bfin_read_UART1_LCR()                   bfin_read16(UART1_LCR)
 969 #define bfin_write_UART1_LCR(val)               bfin_write16(UART1_LCR, val)
 970 #define bfin_read_UART1_MCR()                   bfin_read16(UART1_MCR)
 971 #define bfin_write_UART1_MCR(val)               bfin_write16(UART1_MCR, val)
 972 #define bfin_read_UART1_LSR()                   bfin_read16(UART1_LSR)
 973 #define bfin_write_UART1_LSR(val)               bfin_write16(UART1_LSR, val)
 974 #define bfin_read_UART1_MSR()                   bfin_read16(UART1_MSR)
 975 #define bfin_write_UART1_MSR(val)               bfin_write16(UART1_MSR, val)
 976 #define bfin_read_UART1_SCR()                   bfin_read16(UART1_SCR)
 977 #define bfin_write_UART1_SCR(val)               bfin_write16(UART1_SCR, val)
 978 #define bfin_read_UART1_GCTL()                  bfin_read16(UART1_GCTL)
 979 #define bfin_write_UART1_GCTL(val)              bfin_write16(UART1_GCTL, val)
 980
 981 /* Omit CAN register sets from the cdefBF534.h (CAN is not in the ADSP-BF52x processor) */
 982
 983 /* Pin Control Registers        (0xFFC03200 - 0xFFC032FF)                                                               */
 984 #define bfin_read_PORTF_FER()                   bfin_read16(PORTF_FER)
 985 #define bfin_write_PORTF_FER(val)               bfin_write16(PORTF_FER, val)
 986 #define bfin_read_PORTG_FER()                   bfin_read16(PORTG_FER)
 987 #define bfin_write_PORTG_FER(val)               bfin_write16(PORTG_FER, val)
 988 #define bfin_read_PORTH_FER()                   bfin_read16(PORTH_FER)
 989 #define bfin_write_PORTH_FER(val)               bfin_write16(PORTH_FER, val)
 990 #define bfin_read_PORT_MUX()                    bfin_read16(PORT_MUX)
 991 #define bfin_write_PORT_MUX(val)                bfin_write16(PORT_MUX, val)
 992
 993
 994 /* Handshake MDMA Registers     (0xFFC03300 - 0xFFC033FF)                                                               */
 995 #define bfin_read_HMDMA0_CONTROL()              bfin_read16(HMDMA0_CONTROL)
 996 #define bfin_write_HMDMA0_CONTROL(val)          bfin_write16(HMDMA0_CONTROL, val)
 997 #define bfin_read_HMDMA0_ECINIT()               bfin_read16(HMDMA0_ECINIT)
 998 #define bfin_write_HMDMA0_ECINIT(val)           bfin_write16(HMDMA0_ECINIT, val)
 999 #define bfin_read_HMDMA0_BCINIT()               bfin_read16(HMDMA0_BCINIT)
1000 #define bfin_write_HMDMA0_BCINIT(val)           bfin_write16(HMDMA0_BCINIT, val)
1001 #define bfin_read_HMDMA0_ECURGENT()             bfin_read16(HMDMA0_ECURGENT)
1002 #define bfin_write_HMDMA0_ECURGENT(val)         bfin_write16(HMDMA0_ECURGENT, val)
1003 #define bfin_read_HMDMA0_ECOVERFLOW()           bfin_read16(HMDMA0_ECOVERFLOW)
1004 #define bfin_write_HMDMA0_ECOVERFLOW(val)       bfin_write16(HMDMA0_ECOVERFLOW, val)
1005 #define bfin_read_HMDMA0_ECOUNT()               bfin_read16(HMDMA0_ECOUNT)
1006 #define bfin_write_HMDMA0_ECOUNT(val)           bfin_write16(HMDMA0_ECOUNT, val)
1007 #define bfin_read_HMDMA0_BCOUNT()               bfin_read16(HMDMA0_BCOUNT)
1008 #define bfin_write_HMDMA0_BCOUNT(val)           bfin_write16(HMDMA0_BCOUNT, val)
1009
1010 #define bfin_read_HMDMA1_CONTROL()              bfin_read16(HMDMA1_CONTROL)
1011 #define bfin_write_HMDMA1_CONTROL(val)          bfin_write16(HMDMA1_CONTROL, val)
1012 #define bfin_read_HMDMA1_ECINIT()               bfin_read16(HMDMA1_ECINIT)
1013 #define bfin_write_HMDMA1_ECINIT(val)           bfin_write16(HMDMA1_ECINIT, val)
1014 #define bfin_read_HMDMA1_BCINIT()               bfin_read16(HMDMA1_BCINIT)
1015 #define bfin_write_HMDMA1_BCINIT(val)           bfin_write16(HMDMA1_BCINIT, val)
1016 #define bfin_read_HMDMA1_ECURGENT()             bfin_read16(HMDMA1_ECURGENT)
1017 #define bfin_write_HMDMA1_ECURGENT(val)         bfin_write16(HMDMA1_ECURGENT, val)
1018 #define bfin_read_HMDMA1_ECOVERFLOW()           bfin_read16(HMDMA1_ECOVERFLOW)
1019 #define bfin_write_HMDMA1_ECOVERFLOW(val)       bfin_write16(HMDMA1_ECOVERFLOW, val)
1020 #define bfin_read_HMDMA1_ECOUNT()               bfin_read16(HMDMA1_ECOUNT)
1021 #define bfin_write_HMDMA1_ECOUNT(val)           bfin_write16(HMDMA1_ECOUNT, val)
1022 #define bfin_read_HMDMA1_BCOUNT()               bfin_read16(HMDMA1_BCOUNT)
1023 #define bfin_write_HMDMA1_BCOUNT(val)           bfin_write16(HMDMA1_BCOUNT, val)
1024
1025 /* ==== end from cdefBF534.h ==== */
1026
1027 /* GPIO PIN mux (0xFFC03210 - OxFFC03288) */
1028
1029 #define bfin_read_PORTF_MUX()                   bfin_read16(PORTF_MUX)
1030 #define bfin_write_PORTF_MUX(val)               bfin_write16(PORTF_MUX, val)
1031 #define bfin_read_PORTG_MUX()                   bfin_read16(PORTG_MUX)
1032 #define bfin_write_PORTG_MUX(val)               bfin_write16(PORTG_MUX, val)
1033 #define bfin_read_PORTH_MUX()                   bfin_read16(PORTH_MUX)
1034 #define bfin_write_PORTH_MUX(val)               bfin_write16(PORTH_MUX, val)
1035
1036 #define bfin_read_PORTF_DRIVE()                 bfin_read16(PORTF_DRIVE)
1037 #define bfin_write_PORTF_DRIVE(val)             bfin_write16(PORTF_DRIVE, val)
1038 #define bfin_read_PORTG_DRIVE()                 bfin_read16(PORTG_DRIVE)
1039 #define bfin_write_PORTG_DRIVE(val)             bfin_write16(PORTG_DRIVE, val)
1040 #define bfin_read_PORTH_DRIVE()                 bfin_read16(PORTH_DRIVE)
1041 #define bfin_write_PORTH_DRIVE(val)             bfin_write16(PORTH_DRIVE, val)
1042 #define bfin_read_PORTF_SLEW()                  bfin_read16(PORTF_SLEW)
1043 #define bfin_write_PORTF_SLEW(val)              bfin_write16(PORTF_SLEW, val)
1044 #define bfin_read_PORTG_SLEW()                  bfin_read16(PORTG_SLEW)
1045 #define bfin_write_PORTG_SLEW(val)              bfin_write16(PORTG_SLEW, val)
1046 #define bfin_read_PORTH_SLEW()                  bfin_read16(PORTH_SLEW)
1047 #define bfin_write_PORTH_SLEW(val)              bfin_write16(PORTH_SLEW, val)
1048 #define bfin_read_PORTF_HYSTERISIS()            bfin_read16(PORTF_HYSTERISIS)
1049 #define bfin_write_PORTF_HYSTERISIS(val)        bfin_write16(PORTF_HYSTERISIS, val)
1050 #define bfin_read_PORTG_HYSTERISIS()            bfin_read16(PORTG_HYSTERISIS)
1051 #define bfin_write_PORTG_HYSTERISIS(val)        bfin_write16(PORTG_HYSTERISIS, val)
1052 #define bfin_read_PORTH_HYSTERISIS()            bfin_read16(PORTH_HYSTERISIS)
1053 #define bfin_write_PORTH_HYSTERISIS(val)        bfin_write16(PORTH_HYSTERISIS, val)
1054 #define bfin_read_MISCPORT_DRIVE()              bfin_read16(MISCPORT_DRIVE)
1055 #define bfin_write_MISCPORT_DRIVE(val)          bfin_write16(MISCPORT_DRIVE, val)
1056 #define bfin_read_MISCPORT_SLEW()               bfin_read16(MISCPORT_SLEW)
1057 #define bfin_write_MISCPORT_SLEW(val)           bfin_write16(MISCPORT_SLEW, val)
1058 #define bfin_read_MISCPORT_HYSTERISIS()         bfin_read16(MISCPORT_HYSTERISIS)
1059 #define bfin_write_MISCPORT_HYSTERISIS(val)     bfin_write16(MISCPORT_HYSTERISIS, val)
1060
1061 /* HOST Port Registers */
1062
1063 #define bfin_read_HOST_CONTROL()                bfin_read16(HOST_CONTROL)
1064 #define bfin_write_HOST_CONTROL(val)            bfin_write16(HOST_CONTROL, val)
1065 #define bfin_read_HOST_STATUS()                 bfin_read16(HOST_STATUS)
1066 #define bfin_write_HOST_STATUS(val)             bfin_write16(HOST_STATUS, val)
1067 #define bfin_read_HOST_TIMEOUT()                bfin_read16(HOST_TIMEOUT)
1068 #define bfin_write_HOST_TIMEOUT(val)            bfin_write16(HOST_TIMEOUT, val)
1069
1070 /* Counter Registers */
1071
1072 #define bfin_read_CNT_CONFIG()                  bfin_read16(CNT_CONFIG)
1073 #define bfin_write_CNT_CONFIG(val)              bfin_write16(CNT_CONFIG, val)
1074 #define bfin_read_CNT_IMASK()                   bfin_read16(CNT_IMASK)
1075 #define bfin_write_CNT_IMASK(val)               bfin_write16(CNT_IMASK, val)
1076 #define bfin_read_CNT_STATUS()                  bfin_read16(CNT_STATUS)
1077 #define bfin_write_CNT_STATUS(val)              bfin_write16(CNT_STATUS, val)
1078 #define bfin_read_CNT_COMMAND()                 bfin_read16(CNT_COMMAND)
1079 #define bfin_write_CNT_COMMAND(val)             bfin_write16(CNT_COMMAND, val)
1080 #define bfin_read_CNT_DEBOUNCE()                bfin_read16(CNT_DEBOUNCE)
1081 #define bfin_write_CNT_DEBOUNCE(val)            bfin_write16(CNT_DEBOUNCE, val)
1082 #define bfin_read_CNT_COUNTER()                 bfin_read32(CNT_COUNTER)
1083 #define bfin_write_CNT_COUNTER(val)             bfin_write32(CNT_COUNTER, val)
1084 #define bfin_read_CNT_MAX()                     bfin_read32(CNT_MAX)
1085 #define bfin_write_CNT_MAX(val)                 bfin_write32(CNT_MAX, val)
1086 #define bfin_read_CNT_MIN()                     bfin_read32(CNT_MIN)
1087 #define bfin_write_CNT_MIN(val)                 bfin_write32(CNT_MIN, val)
1088
1089 /* OTP/FUSE Registers */
1090
1091 #define bfin_read_OTP_CONTROL()                 bfin_read16(OTP_CONTROL)
1092 #define bfin_write_OTP_CONTROL(val)             bfin_write16(OTP_CONTROL, val)
1093 #define bfin_read_OTP_BEN()                     bfin_read16(OTP_BEN)
1094 #define bfin_write_OTP_BEN(val)                 bfin_write16(OTP_BEN, val)
1095 #define bfin_read_OTP_STATUS()                  bfin_read16(OTP_STATUS)
1096 #define bfin_write_OTP_STATUS(val)              bfin_write16(OTP_STATUS, val)
1097 #define bfin_read_OTP_TIMING()                  bfin_read32(OTP_TIMING)
1098 #define bfin_write_OTP_TIMING(val)              bfin_write32(OTP_TIMING, val)
1099
1100 /* Security Registers */
1101
1102 #define bfin_read_SECURE_SYSSWT()               bfin_read32(SECURE_SYSSWT)
1103 #define bfin_write_SECURE_SYSSWT(val)           bfin_write32(SECURE_SYSSWT, val)
1104 #define bfin_read_SECURE_CONTROL()              bfin_read16(SECURE_CONTROL)
1105 #define bfin_write_SECURE_CONTROL(val)          bfin_write16(SECURE_CONTROL, val)
1106 #define bfin_read_SECURE_STATUS()               bfin_read16(SECURE_STATUS)
1107 #define bfin_write_SECURE_STATUS(val)           bfin_write16(SECURE_STATUS, val)
1108
1109 /* OTP Read/Write Data Buffer Registers */
1110
1111 #define bfin_read_OTP_DATA0()                   bfin_read32(OTP_DATA0)
1112 #define bfin_write_OTP_DATA0(val)               bfin_write32(OTP_DATA0, val)
1113 #define bfin_read_OTP_DATA1()                   bfin_read32(OTP_DATA1)
1114 #define bfin_write_OTP_DATA1(val)               bfin_write32(OTP_DATA1, val)
1115 #define bfin_read_OTP_DATA2()                   bfin_read32(OTP_DATA2)
1116 #define bfin_write_OTP_DATA2(val)               bfin_write32(OTP_DATA2, val)
1117 #define bfin_read_OTP_DATA3()                   bfin_read32(OTP_DATA3)
1118 #define bfin_write_OTP_DATA3(val)               bfin_write32(OTP_DATA3, val)
1119
1120 /* NFC Registers */
1121
1122 #define bfin_read_NFC_CTL()                     bfin_read16(NFC_CTL)
1123 #define bfin_write_NFC_CTL(val)                 bfin_write16(NFC_CTL, val)
1124 #define bfin_read_NFC_STAT()                    bfin_read16(NFC_STAT)
1125 #define bfin_write_NFC_STAT(val)                bfin_write16(NFC_STAT, val)
1126 #define bfin_read_NFC_IRQSTAT()                 bfin_read16(NFC_IRQSTAT)
1127 #define bfin_write_NFC_IRQSTAT(val)             bfin_write16(NFC_IRQSTAT, val)
1128 #define bfin_read_NFC_IRQMASK()                 bfin_read16(NFC_IRQMASK)
1129 #define bfin_write_NFC_IRQMASK(val)             bfin_write16(NFC_IRQMASK, val)
1130 #define bfin_read_NFC_ECC0()                    bfin_read16(NFC_ECC0)
1131 #define bfin_write_NFC_ECC0(val)                bfin_write16(NFC_ECC0, val)
1132 #define bfin_read_NFC_ECC1()                    bfin_read16(NFC_ECC1)
1133 #define bfin_write_NFC_ECC1(val)                bfin_write16(NFC_ECC1, val)
1134 #define bfin_read_NFC_ECC2()                    bfin_read16(NFC_ECC2)
1135 #define bfin_write_NFC_ECC2(val)                bfin_write16(NFC_ECC2, val)
1136 #define bfin_read_NFC_ECC3()                    bfin_read16(NFC_ECC3)
1137 #define bfin_write_NFC_ECC3(val)                bfin_write16(NFC_ECC3, val)
1138 #define bfin_read_NFC_COUNT()                   bfin_read16(NFC_COUNT)
1139 #define bfin_write_NFC_COUNT(val)               bfin_write16(NFC_COUNT, val)
1140 #define bfin_read_NFC_RST()                     bfin_read16(NFC_RST)
1141 #define bfin_write_NFC_RST(val)                 bfin_write16(NFC_RST, val)
1142 #define bfin_read_NFC_PGCTL()                   bfin_read16(NFC_PGCTL)
1143 #define bfin_write_NFC_PGCTL(val)               bfin_write16(NFC_PGCTL, val)
1144 #define bfin_read_NFC_READ()                    bfin_read16(NFC_READ)
1145 #define bfin_write_NFC_READ(val)                bfin_write16(NFC_READ, val)
1146 #define bfin_read_NFC_ADDR()                    bfin_read16(NFC_ADDR)
1147 #define bfin_write_NFC_ADDR(val)                bfin_write16(NFC_ADDR, val)
1148 #define bfin_read_NFC_CMD()                     bfin_read16(NFC_CMD)
1149 #define bfin_write_NFC_CMD(val)                 bfin_write16(NFC_CMD, val)
1150 #define bfin_read_NFC_DATA_WR()                 bfin_read16(NFC_DATA_WR)
1151 #define bfin_write_NFC_DATA_WR(val)             bfin_write16(NFC_DATA_WR, val)
1152 #define bfin_read_NFC_DATA_RD()                 bfin_read16(NFC_DATA_RD)
1153 #define bfin_write_NFC_DATA_RD(val)             bfin_write16(NFC_DATA_RD, val)
1154
1155 /* These need to be last due to the cdef/linux inter-dependencies */
1156 #include <asm/irq.h>
1157
1158 /* Writing to PLL_CTL initiates a PLL relock sequence. */
1159 static __inline__ void bfin_write_PLL_CTL(unsigned int val)
1160 {
1161         unsigned long flags, iwr0, iwr1;
1162
1163         if (val == bfin_read_PLL_CTL())
1164                 return;
1165
1166         local_irq_save_hw(flags);
1167         /* Enable the PLL Wakeup bit in SIC IWR */
1168         iwr0 = bfin_read32(SIC_IWR0);
1169         iwr1 = bfin_read32(SIC_IWR1);
1170         /* Only allow PPL Wakeup) */
1171         bfin_write32(SIC_IWR0, IWR_ENABLE(0));
1172         bfin_write32(SIC_IWR1, 0);
1173
1174         bfin_write16(PLL_CTL, val);
1175         SSYNC();
1176         asm("IDLE;");
1177
1178         bfin_write32(SIC_IWR0, iwr0);
1179         bfin_write32(SIC_IWR1, iwr1);
1180         local_irq_restore_hw(flags);
1181 }
1182
1183 /* Writing to VR_CTL initiates a PLL relock sequence. */
1184 static __inline__ void bfin_write_VR_CTL(unsigned int val)
1185 {
1186         unsigned long flags, iwr0, iwr1;
1187
1188         if (val == bfin_read_VR_CTL())
1189                 return;
1190
1191         local_irq_save_hw(flags);
1192         /* Enable the PLL Wakeup bit in SIC IWR */
1193         iwr0 = bfin_read32(SIC_IWR0);
1194         iwr1 = bfin_read32(SIC_IWR1);
1195         /* Only allow PPL Wakeup) */
1196         bfin_write32(SIC_IWR0, IWR_ENABLE(0));
1197         bfin_write32(SIC_IWR1, 0);
1198
1199         bfin_write16(VR_CTL, val);
1200         SSYNC();
1201         asm("IDLE;");
1202
1203         bfin_write32(SIC_IWR0, iwr0);
1204         bfin_write32(SIC_IWR1, iwr1);
1205         local_irq_restore_hw(flags);
1206 }
1207
1208 #endif /* _CDEF_BF52X_H */