2 * File: arch/blackfin/mach-bf533/ip0x.c
3 * Based on: arch/blackfin/mach-bf533/bf1.c
4 * Based on: arch/blackfin/mach-bf533/stamp.c
5 * Author: Ivan Danov <idanov@gmail.com>
6 * Modified for IP0X David Rowe
9 * Description: Board info file for the IP04/IP08 boards, which
10 * are derived from the BlackfinOne V2.0 boards.
13 * COpyright 2007 David Rowe
14 * Copyright 2006 Intratrade Ltd.
15 * Copyright 2005 National ICT Australia (NICTA)
16 * Copyright 2004-2006 Analog Devices Inc.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, see the file COPYING, or write
30 * to the Free Software Foundation, Inc.,
31 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <linux/device.h>
35 #include <linux/platform_device.h>
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/partitions.h>
38 #include <linux/spi/spi.h>
39 #include <linux/spi/flash.h>
40 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
41 #include <linux/usb/isp1362.h>
44 #include <asm/bfin5xx_spi.h>
47 * Name the Board for the /proc/cpuinfo
49 const char bfin_board_name
[] = "IP04/IP08";
52 * Driver needs to know address, irq and flag pin.
54 #if defined(CONFIG_BFIN532_IP0X)
55 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
57 #include <linux/dm9000.h>
59 static struct resource dm9000_resource1
[] = {
62 .end
= 0x20100000 + 1,
63 .flags
= IORESOURCE_MEM
65 .start
= 0x20100000 + 2,
66 .end
= 0x20100000 + 3,
67 .flags
= IORESOURCE_MEM
71 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHEDGE
75 static struct resource dm9000_resource2
[] = {
78 .end
= 0x20200000 + 1,
79 .flags
= IORESOURCE_MEM
81 .start
= 0x20200000 + 2,
82 .end
= 0x20200000 + 3,
83 .flags
= IORESOURCE_MEM
87 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHEDGE
92 * for the moment we limit ourselves to 16bit IO until some
93 * better IO routines can be written and tested
95 static struct dm9000_plat_data dm9000_platdata1
= {
96 .flags
= DM9000_PLATF_16BITONLY
,
99 static struct platform_device dm9000_device1
= {
102 .num_resources
= ARRAY_SIZE(dm9000_resource1
),
103 .resource
= dm9000_resource1
,
105 .platform_data
= &dm9000_platdata1
,
109 static struct dm9000_plat_data dm9000_platdata2
= {
110 .flags
= DM9000_PLATF_16BITONLY
,
113 static struct platform_device dm9000_device2
= {
116 .num_resources
= ARRAY_SIZE(dm9000_resource2
),
117 .resource
= dm9000_resource2
,
119 .platform_data
= &dm9000_platdata2
,
127 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
128 /* all SPI peripherals info goes here */
130 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
131 static struct bfin5xx_spi_chip mmc_spi_chip_info
= {
133 * CPOL (Clock Polarity)
134 * 0 - Active high SCK
136 * CPHA (Clock Phase) Selects transfer format and operation mode
137 * 0 - SCLK toggles from middle of the first data bit, slave select
138 * pins controlled by hardware.
139 * 1 - SCLK toggles from beginning of first data bit, slave select
140 * pins controller by user software.
141 * .ctl_reg = 0x1c00, * CPOL=1,CPHA=1,Sandisk 1G work
142 * NO NO .ctl_reg = 0x1800, * CPOL=1,CPHA=0
143 * NO NO .ctl_reg = 0x1400, * CPOL=0,CPHA=1
145 .ctl_reg
= 0x1000, /* CPOL=0,CPHA=0,Sandisk 1G work */
146 .enable_dma
= 0, /* if 1 - block!!! */
148 .cs_change_per_word
= 0,
152 /* Notice: for blackfin, the speed_hz is the value of register
153 * SPI_BAUD, not the real baudrate */
154 static struct spi_board_info bfin_spi_board_info
[] __initdata
= {
155 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
157 .modalias
= "mmc_spi",
161 .controller_data
= &mmc_spi_chip_info
,
166 /* SPI controller data */
167 static struct bfin5xx_spi_master spi_bfin_master_info
= {
169 .enable_dma
= 1, /* master has the ability to do dma transfer */
172 static struct platform_device spi_bfin_master_device
= {
173 .name
= "bfin-spi-master",
174 .id
= 1, /* Bus number */
176 .platform_data
= &spi_bfin_master_info
, /* Passed to driver */
179 #endif /* spi master and devices */
181 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
182 static struct resource bfin_uart_resources
[] = {
186 .flags
= IORESOURCE_MEM
,
190 static struct platform_device bfin_uart_device
= {
193 .num_resources
= ARRAY_SIZE(bfin_uart_resources
),
194 .resource
= bfin_uart_resources
,
198 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
199 #ifdef CONFIG_BFIN_SIR0
200 static struct resource bfin_sir0_resources
[] = {
204 .flags
= IORESOURCE_MEM
,
207 .start
= IRQ_UART0_RX
,
208 .end
= IRQ_UART0_RX
+1,
209 .flags
= IORESOURCE_IRQ
,
212 .start
= CH_UART0_RX
,
213 .end
= CH_UART0_RX
+1,
214 .flags
= IORESOURCE_DMA
,
218 static struct platform_device bfin_sir0_device
= {
221 .num_resources
= ARRAY_SIZE(bfin_sir0_resources
),
222 .resource
= bfin_sir0_resources
,
227 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
228 static struct resource isp1362_hcd_resources
[] = {
231 .end
= 0x20300000 + 1,
232 .flags
= IORESOURCE_MEM
,
234 .start
= 0x20300000 + 2,
235 .end
= 0x20300000 + 3,
236 .flags
= IORESOURCE_MEM
,
240 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
,
244 static struct isp1362_platform_data isp1362_priv
= {
247 .oc_enable
= 0, /* external OC */
249 .int_edge_triggered
= 0,
250 .remote_wakeup_connected
= 0,
251 .no_power_switching
= 1,
252 .power_switching_mode
= 0,
255 static struct platform_device isp1362_hcd_device
= {
256 .name
= "isp1362-hcd",
259 .platform_data
= &isp1362_priv
,
261 .num_resources
= ARRAY_SIZE(isp1362_hcd_resources
),
262 .resource
= isp1362_hcd_resources
,
267 static struct platform_device
*ip0x_devices
[] __initdata
= {
268 #if defined(CONFIG_BFIN532_IP0X)
269 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
275 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
276 &spi_bfin_master_device
,
279 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
283 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
284 #ifdef CONFIG_BFIN_SIR0
289 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
294 static int __init
ip0x_init(void)
298 printk(KERN_INFO
"%s(): registering device resources\n", __func__
);
299 platform_add_devices(ip0x_devices
, ARRAY_SIZE(ip0x_devices
));
301 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
302 for (i
= 0; i
< ARRAY_SIZE(bfin_spi_board_info
); ++i
) {
303 int j
= 1 << bfin_spi_board_info
[i
].chip_select
;
304 /* set spi cs to 1 */
305 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j
);
306 bfin_write_FIO_FLAG_S(j
);
308 spi_register_board_info(bfin_spi_board_info
, ARRAY_SIZE(bfin_spi_board_info
));
314 arch_initcall(ip0x_init
);