arch/powerpc/boot/dts/mpc8272ads.dts

   1 /*
   2  * MPC8272 ADS Device Tree Source
   3  *
   4  * Copyright 2005,2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8272ADS";
  16         compatible = "fsl,mpc8272ads";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &eth0;
  22                 ethernet1 = &eth1;
  23                 serial0 = &scc1;
  24                 serial1 = &scc4;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8272@0 {
  32                         device_type = "cpu";
  33                         reg = <0x0>;
  34                         d-cache-line-size = <32>;
  35                         i-cache-line-size = <32>;
  36                         d-cache-size = <16384>;
  37                         i-cache-size = <16384>;
  38                         timebase-frequency = <0>;
  39                         bus-frequency = <0>;
  40                         clock-frequency = <0>;
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x0 0x0>;
  47         };
  48
  49         localbus@f0010100 {
  50                 compatible = "fsl,mpc8272-localbus",
  51                              "fsl,pq2-localbus";
  52                 #address-cells = <2>;
  53                 #size-cells = <1>;
  54                 reg = <0xf0010100 0x40>;
  55
  56                 ranges = <0x0 0x0 0xff800000 0x00800000
  57                           0x1 0x0 0xf4500000 0x8000
  58                           0x3 0x0 0xf8200000 0x8000>;
  59
  60                 flash@0,0 {
  61                         compatible = "jedec-flash";
  62                         reg = <0x0 0x0 0x00800000>;
  63                         bank-width = <4>;
  64                         device-width = <1>;
  65                 };
  66
  67                 board-control@1,0 {
  68                         reg = <0x1 0x0 0x20>;
  69                         compatible = "fsl,mpc8272ads-bcsr";
  70                 };
  71
  72                 PCI_PIC: interrupt-controller@3,0 {
  73                         compatible = "fsl,mpc8272ads-pci-pic",
  74                                      "fsl,pq2ads-pci-pic";
  75                         #interrupt-cells = <1>;
  76                         interrupt-controller;
  77                         reg = <0x3 0x0 0x8>;
  78                         interrupt-parent = <&PIC>;
  79                         interrupts = <20 8>;
  80                 };
  81         };
  82
  83
  84         pci@f0010800 {
  85                 device_type = "pci";
  86                 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
  87                 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
  88                 #interrupt-cells = <1>;
  89                 #size-cells = <2>;
  90                 #address-cells = <3>;
  91                 clock-frequency = <66666666>;
  92                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  93                 interrupt-map = <
  94                                  /* IDSEL 0x16 */
  95                                  0xb000 0x0 0x0 0x1 &PCI_PIC 0
  96                                  0xb000 0x0 0x0 0x2 &PCI_PIC 1
  97                                  0xb000 0x0 0x0 0x3 &PCI_PIC 2
  98                                  0xb000 0x0 0x0 0x4 &PCI_PIC 3
  99
 100                                  /* IDSEL 0x17 */
 101                                  0xb800 0x0 0x0 0x1 &PCI_PIC 4
 102                                  0xb800 0x0 0x0 0x2 &PCI_PIC 5
 103                                  0xb800 0x0 0x0 0x3 &PCI_PIC 6
 104                                  0xb800 0x0 0x0 0x4 &PCI_PIC 7
 105
 106                                  /* IDSEL 0x18 */
 107                                  0xc000 0x0 0x0 0x1 &PCI_PIC 8
 108                                  0xc000 0x0 0x0 0x2 &PCI_PIC 9
 109                                  0xc000 0x0 0x0 0x3 &PCI_PIC 10
 110                                  0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
 111
 112                 interrupt-parent = <&PIC>;
 113                 interrupts = <18 8>;
 114                 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 115                           0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 116                           0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
 117         };
 118
 119         soc@f0000000 {
 120                 #address-cells = <1>;
 121                 #size-cells = <1>;
 122                 device_type = "soc";
 123                 compatible = "fsl,mpc8272", "fsl,pq2-soc";
 124                 ranges = <0x0 0xf0000000 0x53000>;
 125
 126                 // Temporary -- will go away once kernel uses ranges for get_immrbase().
 127                 reg = <0xf0000000 0x53000>;
 128
 129                 cpm@119c0 {
 130                         #address-cells = <1>;
 131                         #size-cells = <1>;
 132                         compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
 133                         reg = <0x119c0 0x30>;
 134                         ranges;
 135
 136                         muram@0 {
 137                                 #address-cells = <1>;
 138                                 #size-cells = <1>;
 139                                 ranges = <0x0 0x0 0x10000>;
 140
 141                                 data@0 {
 142                                         compatible = "fsl,cpm-muram-data";
 143                                         reg = <0x0 0x2000 0x9800 0x800>;
 144                                 };
 145                         };
 146
 147                         brg@119f0 {
 148                                 compatible = "fsl,mpc8272-brg",
 149                                              "fsl,cpm2-brg",
 150                                              "fsl,cpm-brg";
 151                                 reg = <0x119f0 0x10 0x115f0 0x10>;
 152                         };
 153
 154                         scc1: serial@11a00 {
 155                                 device_type = "serial";
 156                                 compatible = "fsl,mpc8272-scc-uart",
 157                                              "fsl,cpm2-scc-uart";
 158                                 reg = <0x11a00 0x20 0x8000 0x100>;
 159                                 interrupts = <40 8>;
 160                                 interrupt-parent = <&PIC>;
 161                                 fsl,cpm-brg = <1>;
 162                                 fsl,cpm-command = <0x800000>;
 163                         };
 164
 165                         scc4: serial@11a60 {
 166                                 device_type = "serial";
 167                                 compatible = "fsl,mpc8272-scc-uart",
 168                                              "fsl,cpm2-scc-uart";
 169                                 reg = <0x11a60 0x20 0x8300 0x100>;
 170                                 interrupts = <43 8>;
 171                                 interrupt-parent = <&PIC>;
 172                                 fsl,cpm-brg = <4>;
 173                                 fsl,cpm-command = <0xce00000>;
 174                         };
 175
 176                         mdio@10d40 {
 177                                 device_type = "mdio";
 178                                 compatible = "fsl,mpc8272ads-mdio-bitbang",
 179                                              "fsl,mpc8272-mdio-bitbang",
 180                                              "fsl,cpm2-mdio-bitbang";
 181                                 reg = <0x10d40 0x14>;
 182                                 #address-cells = <1>;
 183                                 #size-cells = <0>;
 184                                 fsl,mdio-pin = <18>;
 185                                 fsl,mdc-pin = <19>;
 186
 187                                 PHY0: ethernet-phy@0 {
 188                                         interrupt-parent = <&PIC>;
 189                                         interrupts = <23 8>;
 190                                         reg = <0x0>;
 191                                         device_type = "ethernet-phy";
 192                                 };
 193
 194                                 PHY1: ethernet-phy@1 {
 195                                         interrupt-parent = <&PIC>;
 196                                         interrupts = <23 8>;
 197                                         reg = <0x3>;
 198                                         device_type = "ethernet-phy";
 199                                 };
 200                         };
 201
 202                         eth0: ethernet@11300 {
 203                                 device_type = "network";
 204                                 compatible = "fsl,mpc8272-fcc-enet",
 205                                              "fsl,cpm2-fcc-enet";
 206                                 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
 207                                 local-mac-address = [ 00 00 00 00 00 00 ];
 208                                 interrupts = <32 8>;
 209                                 interrupt-parent = <&PIC>;
 210                                 phy-handle = <&PHY0>;
 211                                 linux,network-index = <0>;
 212                                 fsl,cpm-command = <0x12000300>;
 213                         };
 214
 215                         eth1: ethernet@11320 {
 216                                 device_type = "network";
 217                                 compatible = "fsl,mpc8272-fcc-enet",
 218                                              "fsl,cpm2-fcc-enet";
 219                                 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
 220                                 local-mac-address = [ 00 00 00 00 00 00 ];
 221                                 interrupts = <33 8>;
 222                                 interrupt-parent = <&PIC>;
 223                                 phy-handle = <&PHY1>;
 224                                 linux,network-index = <1>;
 225                                 fsl,cpm-command = <0x16200300>;
 226                         };
 227
 228                         i2c@11860 {
 229                                 compatible = "fsl,mpc8272-i2c",
 230                                              "fsl,cpm2-i2c";
 231                                 reg = <0x11860 0x20 0x8afc 0x2>;
 232                                 interrupts = <1 8>;
 233                                 interrupt-parent = <&PIC>;
 234                                 fsl,cpm-command = <0x29600000>;
 235                                 #address-cells = <1>;
 236                                 #size-cells = <0>;
 237                         };
 238                 };
 239
 240                 PIC: interrupt-controller@10c00 {
 241                         #interrupt-cells = <2>;
 242                         interrupt-controller;
 243                         reg = <0x10c00 0x80>;
 244                         compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
 245                 };
 246
 247                 crypto@30000 {
 248                         compatible = "fsl,sec1.0";
 249                         reg = <0x40000 0x13000>;
 250                         interrupts = <47 0x8>;
 251                         interrupt-parent = <&PIC>;
 252                         fsl,num-channels = <4>;
 253                         fsl,channel-fifo-len = <24>;
 254                         fsl,exec-units-mask = <0x7e>;
 255                         fsl,descriptor-types-mask = <0x1010415>;
 256                 };
 257         };
 258
 259         chosen {
 260                 linux,stdout-path = "/soc/cpm/serial@11a00";
 261         };
 262 };