arch/x86/include/asm/processor-cyrix.h

   1 /*
   2  * NSC/Cyrix CPU indexed register access. Must be inlined instead of
   3  * macros to ensure correct access ordering
   4  * Access order is always 0x22 (=offset), 0x23 (=value)
   5  *
   6  * When using the old macros a line like
   7  *   setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
   8  * gets expanded to:
   9  *  do {
  10  *    outb((CX86_CCR2), 0x22);
  11  *    outb((({
  12  *        outb((CX86_CCR2), 0x22);
  13  *        inb(0x23);
  14  *    }) | 0x88), 0x23);
  15  *  } while (0);
  16  *
  17  * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
  18  */
  19
  20 static inline u8 getCx86(u8 reg)
  21 {
  22         outb(reg, 0x22);
  23         return inb(0x23);
  24 }
  25
  26 static inline void setCx86(u8 reg, u8 data)
  27 {
  28         outb(reg, 0x22);
  29         outb(data, 0x23);
  30 }
  31
  32 #define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
  33
  34 #define setCx86_old(reg, data) do { \
  35         outb((reg), 0x22); \
  36         outb((data), 0x23); \
  37 } while (0)
  38