4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for branch trace store (BTS) and
6 * precise-event based sampling (PEBS).
9 * - DS and BTS hardware configuration
10 * - buffer overflow handling (to be done)
14 * - security checking (is the caller allowed to trace the task)
15 * - buffer allocation (memory accounting)
18 * Copyright (C) 2007-2009 Intel Corporation.
19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
22 #include <linux/kernel.h>
23 #include <linux/string.h>
24 #include <linux/errno.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
28 #include <linux/trace_clock.h>
32 #include "ds_selftest.h"
35 * The configuration for a particular DS hardware implementation:
37 struct ds_configuration
{
38 /* The name of the configuration: */
41 /* The size of pointer-typed fields in DS, BTS, and PEBS: */
42 unsigned char sizeof_ptr_field
;
44 /* The size of a BTS/PEBS record in bytes: */
45 unsigned char sizeof_rec
[2];
47 /* The number of pebs counter reset values in the DS structure. */
48 unsigned char nr_counter_reset
;
50 /* Control bit-masks indexed by enum ds_feature: */
51 unsigned long ctl
[dsf_ctl_max
];
53 static struct ds_configuration ds_cfg __read_mostly
;
56 /* Maximal size of a DS configuration: */
57 #define MAX_SIZEOF_DS 0x80
59 /* Maximal size of a BTS record: */
60 #define MAX_SIZEOF_BTS (3 * 8)
62 /* BTS and PEBS buffer alignment: */
63 #define DS_ALIGNMENT (1 << 3)
65 /* Number of buffer pointers in DS: */
66 #define NUM_DS_PTR_FIELDS 8
68 /* Size of a pebs reset value in DS: */
69 #define PEBS_RESET_FIELD_SIZE 8
71 /* Mask of control bits in the DS MSR register: */
73 ( ds_cfg.ctl[dsf_bts] | \
74 ds_cfg.ctl[dsf_bts_kernel] | \
75 ds_cfg.ctl[dsf_bts_user] | \
76 ds_cfg.ctl[dsf_bts_overflow] )
79 * A BTS or PEBS tracer.
81 * This holds the configuration of the tracer and serves as a handle
82 * to identify tracers.
85 /* The DS context (partially) owned by this tracer. */
86 struct ds_context
*context
;
87 /* The buffer provided on ds_request() and its size in bytes. */
93 /* The common DS part: */
96 /* The trace including the DS configuration: */
97 struct bts_trace trace
;
99 /* Buffer overflow notification function: */
100 bts_ovfl_callback_t ovfl
;
102 /* Active flags affecting trace collection. */
107 /* The common DS part: */
110 /* The trace including the DS configuration: */
111 struct pebs_trace trace
;
113 /* Buffer overflow notification function: */
114 pebs_ovfl_callback_t ovfl
;
118 * Debug Store (DS) save area configuration (see Intel64 and IA32
119 * Architectures Software Developer's Manual, section 18.5)
121 * The DS configuration consists of the following fields; different
122 * architetures vary in the size of those fields.
124 * - double-word aligned base linear address of the BTS buffer
125 * - write pointer into the BTS buffer
126 * - end linear address of the BTS buffer (one byte beyond the end of
128 * - interrupt pointer into BTS buffer
129 * (interrupt occurs when write pointer passes interrupt pointer)
130 * - double-word aligned base linear address of the PEBS buffer
131 * - write pointer into the PEBS buffer
132 * - end linear address of the PEBS buffer (one byte beyond the end of
134 * - interrupt pointer into PEBS buffer
135 * (interrupt occurs when write pointer passes interrupt pointer)
136 * - value to which counter is reset following counter overflow
138 * Later architectures use 64bit pointers throughout, whereas earlier
139 * architectures use 32bit pointers in 32bit mode.
142 * We compute the base address for the first 8 fields based on:
143 * - the field size stored in the DS configuration
144 * - the relative field position
145 * - an offset giving the start of the respective region
147 * This offset is further used to index various arrays holding
148 * information for BTS and PEBS at the respective index.
150 * On later 32bit processors, we only access the lower 32bit of the
151 * 64bit pointer fields. The upper halves will be zeroed out.
158 ds_interrupt_threshold
,
166 static inline unsigned long
167 ds_get(const unsigned char *base
, enum ds_qualifier qual
, enum ds_field field
)
169 base
+= (ds_cfg
.sizeof_ptr_field
* (field
+ (4 * qual
)));
170 return *(unsigned long *)base
;
174 ds_set(unsigned char *base
, enum ds_qualifier qual
, enum ds_field field
,
177 base
+= (ds_cfg
.sizeof_ptr_field
* (field
+ (4 * qual
)));
178 (*(unsigned long *)base
) = value
;
183 * Locking is done only for allocating BTS or PEBS resources.
185 static DEFINE_SPINLOCK(ds_lock
);
188 * We either support (system-wide) per-cpu or per-thread allocation.
189 * We distinguish the two based on the task_struct pointer, where a
190 * NULL pointer indicates per-cpu allocation for the current cpu.
192 * Allocations are use-counted. As soon as resources are allocated,
193 * further allocations must be of the same type (per-cpu or
194 * per-thread). We model this by counting allocations (i.e. the number
195 * of tracers of a certain type) for one type negatively:
197 * >0 number of per-thread tracers
198 * <0 number of per-cpu tracers
200 * Tracers essentially gives the number of ds contexts for a certain
201 * type of allocation.
203 static atomic_t tracers
= ATOMIC_INIT(0);
205 static inline int get_tracer(struct task_struct
*task
)
209 spin_lock_irq(&ds_lock
);
213 if (atomic_read(&tracers
) < 0)
215 atomic_inc(&tracers
);
218 if (atomic_read(&tracers
) > 0)
220 atomic_dec(&tracers
);
225 spin_unlock_irq(&ds_lock
);
229 static inline void put_tracer(struct task_struct
*task
)
232 atomic_dec(&tracers
);
234 atomic_inc(&tracers
);
238 * The DS context is either attached to a thread or to a cpu:
239 * - in the former case, the thread_struct contains a pointer to the
241 * - in the latter case, we use a static array of per-cpu context
244 * Contexts are use-counted. They are allocated on first access and
245 * deallocated when the last user puts the context.
248 /* The DS configuration; goes into MSR_IA32_DS_AREA: */
249 unsigned char ds
[MAX_SIZEOF_DS
];
251 /* The owner of the BTS and PEBS configuration, respectively: */
252 struct bts_tracer
*bts_master
;
253 struct pebs_tracer
*pebs_master
;
258 /* Pointer to the context pointer field: */
259 struct ds_context
**this;
261 /* The traced task; NULL for cpu tracing: */
262 struct task_struct
*task
;
264 /* The traced cpu; only valid if task is NULL: */
268 static DEFINE_PER_CPU(struct ds_context
*, cpu_context
);
271 static struct ds_context
*ds_get_context(struct task_struct
*task
, int cpu
)
273 struct ds_context
**p_context
=
274 (task
? &task
->thread
.ds_ctx
: &per_cpu(cpu_context
, cpu
));
275 struct ds_context
*context
= NULL
;
276 struct ds_context
*new_context
= NULL
;
278 /* Chances are small that we already have a context. */
279 new_context
= kzalloc(sizeof(*new_context
), GFP_KERNEL
);
283 spin_lock_irq(&ds_lock
);
285 context
= *p_context
;
286 if (likely(!context
)) {
287 context
= new_context
;
289 context
->this = p_context
;
290 context
->task
= task
;
294 *p_context
= context
;
299 spin_unlock_irq(&ds_lock
);
301 if (context
!= new_context
)
307 static void ds_put_context(struct ds_context
*context
)
309 struct task_struct
*task
;
315 spin_lock_irqsave(&ds_lock
, irq
);
317 if (--context
->count
) {
318 spin_unlock_irqrestore(&ds_lock
, irq
);
322 *(context
->this) = NULL
;
324 task
= context
->task
;
327 clear_tsk_thread_flag(task
, TIF_DS_AREA_MSR
);
330 * We leave the (now dangling) pointer to the DS configuration in
331 * the DS_AREA msr. This is as good or as bad as replacing it with
332 * NULL - the hardware would crash if we enabled tracing.
334 * This saves us some problems with having to write an msr on a
335 * different cpu while preventing others from doing the same for the
336 * next context for that same cpu.
339 spin_unlock_irqrestore(&ds_lock
, irq
);
341 /* The context might still be in use for context switching. */
342 if (task
&& (task
!= current
))
343 wait_task_context_switch(task
);
348 static void ds_install_ds_area(struct ds_context
*context
)
352 ds
= (unsigned long)context
->ds
;
355 * There is a race between the bts master and the pebs master.
357 * The thread/cpu access is synchronized via get/put_cpu() for
358 * task tracing and via wrmsr_on_cpu for cpu tracing.
360 * If bts and pebs are collected for the same task or same cpu,
361 * the same confiuration is written twice.
365 if (context
->task
== current
)
366 wrmsrl(MSR_IA32_DS_AREA
, ds
);
367 set_tsk_thread_flag(context
->task
, TIF_DS_AREA_MSR
);
370 wrmsr_on_cpu(context
->cpu
, MSR_IA32_DS_AREA
,
371 (u32
)((u64
)ds
), (u32
)((u64
)ds
>> 32));
375 * Call the tracer's callback on a buffer overflow.
377 * context: the ds context
378 * qual: the buffer type
380 static void ds_overflow(struct ds_context
*context
, enum ds_qualifier qual
)
384 if (context
->bts_master
&&
385 context
->bts_master
->ovfl
)
386 context
->bts_master
->ovfl(context
->bts_master
);
389 if (context
->pebs_master
&&
390 context
->pebs_master
->ovfl
)
391 context
->pebs_master
->ovfl(context
->pebs_master
);
398 * Write raw data into the BTS or PEBS buffer.
400 * The remainder of any partially written record is zeroed out.
402 * context: the DS context
403 * qual: the buffer type
404 * record: the data to write
405 * size: the size of the data
407 static int ds_write(struct ds_context
*context
, enum ds_qualifier qual
,
408 const void *record
, size_t size
)
410 int bytes_written
= 0;
416 unsigned long base
, index
, end
, write_end
, int_th
;
417 unsigned long write_size
, adj_write_size
;
420 * Write as much as possible without producing an
421 * overflow interrupt.
423 * Interrupt_threshold must either be
424 * - bigger than absolute_maximum or
425 * - point to a record between buffer_base and absolute_maximum
427 * Index points to a valid record.
429 base
= ds_get(context
->ds
, qual
, ds_buffer_base
);
430 index
= ds_get(context
->ds
, qual
, ds_index
);
431 end
= ds_get(context
->ds
, qual
, ds_absolute_maximum
);
432 int_th
= ds_get(context
->ds
, qual
, ds_interrupt_threshold
);
434 write_end
= min(end
, int_th
);
437 * If we are already beyond the interrupt threshold,
438 * we fill the entire buffer.
440 if (write_end
<= index
)
443 if (write_end
<= index
)
446 write_size
= min((unsigned long) size
, write_end
- index
);
447 memcpy((void *)index
, record
, write_size
);
449 record
= (const char *)record
+ write_size
;
451 bytes_written
+= write_size
;
453 adj_write_size
= write_size
/ ds_cfg
.sizeof_rec
[qual
];
454 adj_write_size
*= ds_cfg
.sizeof_rec
[qual
];
456 /* Zero out trailing bytes. */
457 memset((char *)index
+ write_size
, 0,
458 adj_write_size
- write_size
);
459 index
+= adj_write_size
;
463 ds_set(context
->ds
, qual
, ds_index
, index
);
466 ds_overflow(context
, qual
);
469 return bytes_written
;
474 * Branch Trace Store (BTS) uses the following format. Different
475 * architectures vary in the size of those fields.
476 * - source linear address
477 * - destination linear address
480 * Later architectures use 64bit pointers throughout, whereas earlier
481 * architectures use 32bit pointers in 32bit mode.
483 * We compute the base address for the fields based on:
484 * - the field size stored in the DS configuration
485 * - the relative field position
487 * In order to store additional information in the BTS buffer, we use
488 * a special source address to indicate that the record requires
489 * special interpretation.
491 * Netburst indicated via a bit in the flags field whether the branch
492 * was predicted; this is ignored.
494 * We use two levels of abstraction:
495 * - the raw data level defined here
496 * - an arch-independent level defined in ds.h
508 bts_qual_mask
= (bts_qual_max
- 1),
509 bts_escape
= ((unsigned long)-1 & ~bts_qual_mask
)
512 static inline unsigned long bts_get(const char *base
, enum bts_field field
)
514 base
+= (ds_cfg
.sizeof_ptr_field
* field
);
515 return *(unsigned long *)base
;
518 static inline void bts_set(char *base
, enum bts_field field
, unsigned long val
)
520 base
+= (ds_cfg
.sizeof_ptr_field
* field
);;
521 (*(unsigned long *)base
) = val
;
526 * The raw BTS data is architecture dependent.
528 * For higher-level users, we give an arch-independent view.
529 * - ds.h defines struct bts_struct
530 * - bts_read translates one raw bts record into a bts_struct
531 * - bts_write translates one bts_struct into the raw format and
532 * writes it into the top of the parameter tracer's buffer.
534 * return: bytes read/written on success; -Eerrno, otherwise
537 bts_read(struct bts_tracer
*tracer
, const void *at
, struct bts_struct
*out
)
542 if (at
< tracer
->trace
.ds
.begin
)
545 if (tracer
->trace
.ds
.end
< (at
+ tracer
->trace
.ds
.size
))
548 memset(out
, 0, sizeof(*out
));
549 if ((bts_get(at
, bts_qual
) & ~bts_qual_mask
) == bts_escape
) {
550 out
->qualifier
= (bts_get(at
, bts_qual
) & bts_qual_mask
);
551 out
->variant
.event
.clock
= bts_get(at
, bts_clock
);
552 out
->variant
.event
.pid
= bts_get(at
, bts_pid
);
554 out
->qualifier
= bts_branch
;
555 out
->variant
.lbr
.from
= bts_get(at
, bts_from
);
556 out
->variant
.lbr
.to
= bts_get(at
, bts_to
);
558 if (!out
->variant
.lbr
.from
&& !out
->variant
.lbr
.to
)
559 out
->qualifier
= bts_invalid
;
562 return ds_cfg
.sizeof_rec
[ds_bts
];
565 static int bts_write(struct bts_tracer
*tracer
, const struct bts_struct
*in
)
567 unsigned char raw
[MAX_SIZEOF_BTS
];
572 if (MAX_SIZEOF_BTS
< ds_cfg
.sizeof_rec
[ds_bts
])
575 switch (in
->qualifier
) {
577 bts_set(raw
, bts_from
, 0);
578 bts_set(raw
, bts_to
, 0);
579 bts_set(raw
, bts_flags
, 0);
582 bts_set(raw
, bts_from
, in
->variant
.lbr
.from
);
583 bts_set(raw
, bts_to
, in
->variant
.lbr
.to
);
584 bts_set(raw
, bts_flags
, 0);
586 case bts_task_arrives
:
587 case bts_task_departs
:
588 bts_set(raw
, bts_qual
, (bts_escape
| in
->qualifier
));
589 bts_set(raw
, bts_clock
, in
->variant
.event
.clock
);
590 bts_set(raw
, bts_pid
, in
->variant
.event
.pid
);
596 return ds_write(tracer
->ds
.context
, ds_bts
, raw
,
597 ds_cfg
.sizeof_rec
[ds_bts
]);
601 static void ds_write_config(struct ds_context
*context
,
602 struct ds_trace
*cfg
, enum ds_qualifier qual
)
604 unsigned char *ds
= context
->ds
;
606 ds_set(ds
, qual
, ds_buffer_base
, (unsigned long)cfg
->begin
);
607 ds_set(ds
, qual
, ds_index
, (unsigned long)cfg
->top
);
608 ds_set(ds
, qual
, ds_absolute_maximum
, (unsigned long)cfg
->end
);
609 ds_set(ds
, qual
, ds_interrupt_threshold
, (unsigned long)cfg
->ith
);
612 static void ds_read_config(struct ds_context
*context
,
613 struct ds_trace
*cfg
, enum ds_qualifier qual
)
615 unsigned char *ds
= context
->ds
;
617 cfg
->begin
= (void *)ds_get(ds
, qual
, ds_buffer_base
);
618 cfg
->top
= (void *)ds_get(ds
, qual
, ds_index
);
619 cfg
->end
= (void *)ds_get(ds
, qual
, ds_absolute_maximum
);
620 cfg
->ith
= (void *)ds_get(ds
, qual
, ds_interrupt_threshold
);
623 static void ds_init_ds_trace(struct ds_trace
*trace
, enum ds_qualifier qual
,
624 void *base
, size_t size
, size_t ith
,
625 unsigned int flags
) {
626 unsigned long buffer
, adj
;
629 * Adjust the buffer address and size to meet alignment
631 * - buffer is double-word aligned
632 * - size is multiple of record size
634 * We checked the size at the very beginning; we have enough
635 * space to do the adjustment.
637 buffer
= (unsigned long)base
;
639 adj
= ALIGN(buffer
, DS_ALIGNMENT
) - buffer
;
643 trace
->n
= size
/ ds_cfg
.sizeof_rec
[qual
];
644 trace
->size
= ds_cfg
.sizeof_rec
[qual
];
646 size
= (trace
->n
* trace
->size
);
648 trace
->begin
= (void *)buffer
;
649 trace
->top
= trace
->begin
;
650 trace
->end
= (void *)(buffer
+ size
);
652 * The value for 'no threshold' is -1, which will set the
653 * threshold outside of the buffer, just like we want it.
655 ith
*= ds_cfg
.sizeof_rec
[qual
];
656 trace
->ith
= (void *)(buffer
+ size
- ith
);
658 trace
->flags
= flags
;
662 static int ds_request(struct ds_tracer
*tracer
, struct ds_trace
*trace
,
663 enum ds_qualifier qual
, struct task_struct
*task
,
664 int cpu
, void *base
, size_t size
, size_t th
)
666 struct ds_context
*context
;
671 if (!ds_cfg
.sizeof_rec
[qual
])
678 req_size
= ds_cfg
.sizeof_rec
[qual
];
679 /* We might need space for alignment adjustments. */
680 if (!IS_ALIGNED((unsigned long)base
, DS_ALIGNMENT
))
681 req_size
+= DS_ALIGNMENT
;
687 if (th
!= (size_t)-1) {
688 th
*= ds_cfg
.sizeof_rec
[qual
];
695 tracer
->buffer
= base
;
699 context
= ds_get_context(task
, cpu
);
702 tracer
->context
= context
;
705 * Defer any tracer-specific initialization work for the context until
706 * context ownership has been clarified.
714 static struct bts_tracer
*ds_request_bts(struct task_struct
*task
, int cpu
,
715 void *base
, size_t size
,
716 bts_ovfl_callback_t ovfl
, size_t th
,
719 struct bts_tracer
*tracer
;
722 /* Buffer overflow notification is not yet implemented. */
727 error
= get_tracer(task
);
732 tracer
= kzalloc(sizeof(*tracer
), GFP_KERNEL
);
737 /* Do some more error checking and acquire a tracing context. */
738 error
= ds_request(&tracer
->ds
, &tracer
->trace
.ds
,
739 ds_bts
, task
, cpu
, base
, size
, th
);
743 /* Claim the bts part of the tracing context we acquired above. */
744 spin_lock_irq(&ds_lock
);
747 if (tracer
->ds
.context
->bts_master
)
749 tracer
->ds
.context
->bts_master
= tracer
;
751 spin_unlock_irq(&ds_lock
);
754 * Now that we own the bts part of the context, let's complete the
755 * initialization for that part.
757 ds_init_ds_trace(&tracer
->trace
.ds
, ds_bts
, base
, size
, th
, flags
);
758 ds_write_config(tracer
->ds
.context
, &tracer
->trace
.ds
, ds_bts
);
759 ds_install_ds_area(tracer
->ds
.context
);
761 tracer
->trace
.read
= bts_read
;
762 tracer
->trace
.write
= bts_write
;
765 ds_resume_bts(tracer
);
770 spin_unlock_irq(&ds_lock
);
771 ds_put_context(tracer
->ds
.context
);
777 return ERR_PTR(error
);
780 struct bts_tracer
*ds_request_bts_task(struct task_struct
*task
,
781 void *base
, size_t size
,
782 bts_ovfl_callback_t ovfl
,
783 size_t th
, unsigned int flags
)
785 return ds_request_bts(task
, 0, base
, size
, ovfl
, th
, flags
);
788 struct bts_tracer
*ds_request_bts_cpu(int cpu
, void *base
, size_t size
,
789 bts_ovfl_callback_t ovfl
,
790 size_t th
, unsigned int flags
)
792 return ds_request_bts(NULL
, cpu
, base
, size
, ovfl
, th
, flags
);
795 static struct pebs_tracer
*ds_request_pebs(struct task_struct
*task
, int cpu
,
796 void *base
, size_t size
,
797 pebs_ovfl_callback_t ovfl
, size_t th
,
800 struct pebs_tracer
*tracer
;
803 /* Buffer overflow notification is not yet implemented. */
808 error
= get_tracer(task
);
813 tracer
= kzalloc(sizeof(*tracer
), GFP_KERNEL
);
818 /* Do some more error checking and acquire a tracing context. */
819 error
= ds_request(&tracer
->ds
, &tracer
->trace
.ds
,
820 ds_pebs
, task
, cpu
, base
, size
, th
);
824 /* Claim the pebs part of the tracing context we acquired above. */
825 spin_lock_irq(&ds_lock
);
828 if (tracer
->ds
.context
->pebs_master
)
830 tracer
->ds
.context
->pebs_master
= tracer
;
832 spin_unlock_irq(&ds_lock
);
835 * Now that we own the pebs part of the context, let's complete the
836 * initialization for that part.
838 ds_init_ds_trace(&tracer
->trace
.ds
, ds_pebs
, base
, size
, th
, flags
);
839 ds_write_config(tracer
->ds
.context
, &tracer
->trace
.ds
, ds_pebs
);
840 ds_install_ds_area(tracer
->ds
.context
);
843 ds_resume_pebs(tracer
);
848 spin_unlock_irq(&ds_lock
);
849 ds_put_context(tracer
->ds
.context
);
855 return ERR_PTR(error
);
858 struct pebs_tracer
*ds_request_pebs_task(struct task_struct
*task
,
859 void *base
, size_t size
,
860 pebs_ovfl_callback_t ovfl
,
861 size_t th
, unsigned int flags
)
863 return ds_request_pebs(task
, 0, base
, size
, ovfl
, th
, flags
);
866 struct pebs_tracer
*ds_request_pebs_cpu(int cpu
, void *base
, size_t size
,
867 pebs_ovfl_callback_t ovfl
,
868 size_t th
, unsigned int flags
)
870 return ds_request_pebs(NULL
, cpu
, base
, size
, ovfl
, th
, flags
);
873 static void ds_free_bts(struct bts_tracer
*tracer
)
875 struct task_struct
*task
;
877 task
= tracer
->ds
.context
->task
;
879 WARN_ON_ONCE(tracer
->ds
.context
->bts_master
!= tracer
);
880 tracer
->ds
.context
->bts_master
= NULL
;
882 /* Make sure tracing stopped and the tracer is not in use. */
883 if (task
&& (task
!= current
))
884 wait_task_context_switch(task
);
886 ds_put_context(tracer
->ds
.context
);
892 void ds_release_bts(struct bts_tracer
*tracer
)
899 ds_suspend_bts(tracer
);
903 int ds_release_bts_noirq(struct bts_tracer
*tracer
)
905 struct task_struct
*task
;
912 task
= tracer
->ds
.context
->task
;
918 (tracer
->ds
.context
->cpu
!= smp_processor_id()))
922 if (task
&& (task
!= current
))
925 ds_suspend_bts_noirq(tracer
);
930 local_irq_restore(irq
);
934 static void update_task_debugctlmsr(struct task_struct
*task
,
935 unsigned long debugctlmsr
)
937 task
->thread
.debugctlmsr
= debugctlmsr
;
941 update_debugctlmsr(debugctlmsr
);
945 void ds_suspend_bts(struct bts_tracer
*tracer
)
947 struct task_struct
*task
;
948 unsigned long debugctlmsr
;
956 task
= tracer
->ds
.context
->task
;
957 cpu
= tracer
->ds
.context
->cpu
;
959 WARN_ON(!task
&& irqs_disabled());
961 debugctlmsr
= (task
?
962 task
->thread
.debugctlmsr
:
963 get_debugctlmsr_on_cpu(cpu
));
964 debugctlmsr
&= ~BTS_CONTROL
;
967 update_task_debugctlmsr(task
, debugctlmsr
);
969 update_debugctlmsr_on_cpu(cpu
, debugctlmsr
);
972 int ds_suspend_bts_noirq(struct bts_tracer
*tracer
)
974 struct task_struct
*task
;
975 unsigned long debugctlmsr
, irq
;
983 task
= tracer
->ds
.context
->task
;
984 cpu
= tracer
->ds
.context
->cpu
;
989 if (!task
&& (cpu
!= smp_processor_id()))
992 debugctlmsr
= (task
?
993 task
->thread
.debugctlmsr
:
995 debugctlmsr
&= ~BTS_CONTROL
;
998 update_task_debugctlmsr(task
, debugctlmsr
);
1000 update_debugctlmsr(debugctlmsr
);
1004 local_irq_restore(irq
);
1008 static unsigned long ds_bts_control(struct bts_tracer
*tracer
)
1010 unsigned long control
;
1012 control
= ds_cfg
.ctl
[dsf_bts
];
1013 if (!(tracer
->trace
.ds
.flags
& BTS_KERNEL
))
1014 control
|= ds_cfg
.ctl
[dsf_bts_kernel
];
1015 if (!(tracer
->trace
.ds
.flags
& BTS_USER
))
1016 control
|= ds_cfg
.ctl
[dsf_bts_user
];
1021 void ds_resume_bts(struct bts_tracer
*tracer
)
1023 struct task_struct
*task
;
1024 unsigned long debugctlmsr
;
1030 tracer
->flags
= tracer
->trace
.ds
.flags
;
1032 task
= tracer
->ds
.context
->task
;
1033 cpu
= tracer
->ds
.context
->cpu
;
1035 WARN_ON(!task
&& irqs_disabled());
1037 debugctlmsr
= (task
?
1038 task
->thread
.debugctlmsr
:
1039 get_debugctlmsr_on_cpu(cpu
));
1040 debugctlmsr
|= ds_bts_control(tracer
);
1043 update_task_debugctlmsr(task
, debugctlmsr
);
1045 update_debugctlmsr_on_cpu(cpu
, debugctlmsr
);
1048 int ds_resume_bts_noirq(struct bts_tracer
*tracer
)
1050 struct task_struct
*task
;
1051 unsigned long debugctlmsr
, irq
;
1057 tracer
->flags
= tracer
->trace
.ds
.flags
;
1059 task
= tracer
->ds
.context
->task
;
1060 cpu
= tracer
->ds
.context
->cpu
;
1062 local_irq_save(irq
);
1065 if (!task
&& (cpu
!= smp_processor_id()))
1068 debugctlmsr
= (task
?
1069 task
->thread
.debugctlmsr
:
1071 debugctlmsr
|= ds_bts_control(tracer
);
1074 update_task_debugctlmsr(task
, debugctlmsr
);
1076 update_debugctlmsr(debugctlmsr
);
1080 local_irq_restore(irq
);
1084 static void ds_free_pebs(struct pebs_tracer
*tracer
)
1086 struct task_struct
*task
;
1088 task
= tracer
->ds
.context
->task
;
1090 WARN_ON_ONCE(tracer
->ds
.context
->pebs_master
!= tracer
);
1091 tracer
->ds
.context
->pebs_master
= NULL
;
1093 ds_put_context(tracer
->ds
.context
);
1099 void ds_release_pebs(struct pebs_tracer
*tracer
)
1106 ds_suspend_pebs(tracer
);
1107 ds_free_pebs(tracer
);
1110 int ds_release_pebs_noirq(struct pebs_tracer
*tracer
)
1112 struct task_struct
*task
;
1119 task
= tracer
->ds
.context
->task
;
1121 local_irq_save(irq
);
1125 (tracer
->ds
.context
->cpu
!= smp_processor_id()))
1129 if (task
&& (task
!= current
))
1132 ds_suspend_pebs_noirq(tracer
);
1133 ds_free_pebs(tracer
);
1137 local_irq_restore(irq
);
1141 void ds_suspend_pebs(struct pebs_tracer
*tracer
)
1146 int ds_suspend_pebs_noirq(struct pebs_tracer
*tracer
)
1151 void ds_resume_pebs(struct pebs_tracer
*tracer
)
1156 int ds_resume_pebs_noirq(struct pebs_tracer
*tracer
)
1161 const struct bts_trace
*ds_read_bts(struct bts_tracer
*tracer
)
1166 ds_read_config(tracer
->ds
.context
, &tracer
->trace
.ds
, ds_bts
);
1167 return &tracer
->trace
;
1170 const struct pebs_trace
*ds_read_pebs(struct pebs_tracer
*tracer
)
1175 ds_read_config(tracer
->ds
.context
, &tracer
->trace
.ds
, ds_pebs
);
1177 tracer
->trace
.counters
= ds_cfg
.nr_counter_reset
;
1178 memcpy(tracer
->trace
.counter_reset
,
1179 tracer
->ds
.context
->ds
+
1180 (NUM_DS_PTR_FIELDS
* ds_cfg
.sizeof_ptr_field
),
1181 ds_cfg
.nr_counter_reset
* PEBS_RESET_FIELD_SIZE
);
1183 return &tracer
->trace
;
1186 int ds_reset_bts(struct bts_tracer
*tracer
)
1191 tracer
->trace
.ds
.top
= tracer
->trace
.ds
.begin
;
1193 ds_set(tracer
->ds
.context
->ds
, ds_bts
, ds_index
,
1194 (unsigned long)tracer
->trace
.ds
.top
);
1199 int ds_reset_pebs(struct pebs_tracer
*tracer
)
1204 tracer
->trace
.ds
.top
= tracer
->trace
.ds
.begin
;
1206 ds_set(tracer
->ds
.context
->ds
, ds_pebs
, ds_index
,
1207 (unsigned long)tracer
->trace
.ds
.top
);
1212 int ds_set_pebs_reset(struct pebs_tracer
*tracer
,
1213 unsigned int counter
, u64 value
)
1218 if (ds_cfg
.nr_counter_reset
< counter
)
1221 *(u64
*)(tracer
->ds
.context
->ds
+
1222 (NUM_DS_PTR_FIELDS
* ds_cfg
.sizeof_ptr_field
) +
1223 (counter
* PEBS_RESET_FIELD_SIZE
)) = value
;
1228 static const struct ds_configuration ds_cfg_netburst
= {
1230 .ctl
[dsf_bts
] = (1 << 2) | (1 << 3),
1231 .ctl
[dsf_bts_kernel
] = (1 << 5),
1232 .ctl
[dsf_bts_user
] = (1 << 6),
1233 .nr_counter_reset
= 1,
1235 static const struct ds_configuration ds_cfg_pentium_m
= {
1236 .name
= "Pentium M",
1237 .ctl
[dsf_bts
] = (1 << 6) | (1 << 7),
1238 .nr_counter_reset
= 1,
1240 static const struct ds_configuration ds_cfg_core2_atom
= {
1241 .name
= "Core 2/Atom",
1242 .ctl
[dsf_bts
] = (1 << 6) | (1 << 7),
1243 .ctl
[dsf_bts_kernel
] = (1 << 9),
1244 .ctl
[dsf_bts_user
] = (1 << 10),
1245 .nr_counter_reset
= 1,
1247 static const struct ds_configuration ds_cfg_core_i7
= {
1249 .ctl
[dsf_bts
] = (1 << 6) | (1 << 7),
1250 .ctl
[dsf_bts_kernel
] = (1 << 9),
1251 .ctl
[dsf_bts_user
] = (1 << 10),
1252 .nr_counter_reset
= 4,
1256 ds_configure(const struct ds_configuration
*cfg
,
1257 struct cpuinfo_x86
*cpu
)
1259 unsigned long nr_pebs_fields
= 0;
1261 printk(KERN_INFO
"[ds] using %s configuration\n", cfg
->name
);
1264 nr_pebs_fields
= 10;
1266 nr_pebs_fields
= 18;
1270 * Starting with version 2, architectural performance
1271 * monitoring supports a format specifier.
1273 if ((cpuid_eax(0xa) & 0xff) > 1) {
1274 unsigned long perf_capabilities
, format
;
1276 rdmsrl(MSR_IA32_PERF_CAPABILITIES
, perf_capabilities
);
1278 format
= (perf_capabilities
>> 8) & 0xf;
1282 nr_pebs_fields
= 18;
1285 nr_pebs_fields
= 22;
1289 "[ds] unknown PEBS format: %lu\n", format
);
1295 memset(&ds_cfg
, 0, sizeof(ds_cfg
));
1298 ds_cfg
.sizeof_ptr_field
=
1299 (cpu_has(cpu
, X86_FEATURE_DTES64
) ? 8 : 4);
1301 ds_cfg
.sizeof_rec
[ds_bts
] = ds_cfg
.sizeof_ptr_field
* 3;
1302 ds_cfg
.sizeof_rec
[ds_pebs
] = ds_cfg
.sizeof_ptr_field
* nr_pebs_fields
;
1304 if (!cpu_has(cpu
, X86_FEATURE_BTS
)) {
1305 ds_cfg
.sizeof_rec
[ds_bts
] = 0;
1306 printk(KERN_INFO
"[ds] bts not available\n");
1308 if (!cpu_has(cpu
, X86_FEATURE_PEBS
)) {
1309 ds_cfg
.sizeof_rec
[ds_pebs
] = 0;
1310 printk(KERN_INFO
"[ds] pebs not available\n");
1313 printk(KERN_INFO
"[ds] sizes: address: %u bit, ",
1314 8 * ds_cfg
.sizeof_ptr_field
);
1315 printk("bts/pebs record: %u/%u bytes\n",
1316 ds_cfg
.sizeof_rec
[ds_bts
], ds_cfg
.sizeof_rec
[ds_pebs
]);
1318 WARN_ON_ONCE(MAX_PEBS_COUNTERS
< ds_cfg
.nr_counter_reset
);
1321 void __cpuinit
ds_init_intel(struct cpuinfo_x86
*c
)
1323 /* Only configure the first cpu. Others are identical. */
1329 switch (c
->x86_model
) {
1331 case 0xd: /* Pentium M */
1332 ds_configure(&ds_cfg_pentium_m
, c
);
1335 case 0x17: /* Core2 */
1336 case 0x1c: /* Atom */
1337 ds_configure(&ds_cfg_core2_atom
, c
);
1339 case 0x1a: /* Core i7 */
1340 ds_configure(&ds_cfg_core_i7
, c
);
1343 /* Sorry, don't know about them. */
1348 switch (c
->x86_model
) {
1351 case 0x2: /* Netburst */
1352 ds_configure(&ds_cfg_netburst
, c
);
1355 /* Sorry, don't know about them. */
1360 /* Sorry, don't know about them. */
1365 static inline void ds_take_timestamp(struct ds_context
*context
,
1366 enum bts_qualifier qualifier
,
1367 struct task_struct
*task
)
1369 struct bts_tracer
*tracer
= context
->bts_master
;
1370 struct bts_struct ts
;
1372 /* Prevent compilers from reading the tracer pointer twice. */
1375 if (!tracer
|| !(tracer
->flags
& BTS_TIMESTAMPS
))
1378 memset(&ts
, 0, sizeof(ts
));
1379 ts
.qualifier
= qualifier
;
1380 ts
.variant
.event
.clock
= trace_clock_global();
1381 ts
.variant
.event
.pid
= task
->pid
;
1383 bts_write(tracer
, &ts
);
1387 * Change the DS configuration from tracing prev to tracing next.
1389 void ds_switch_to(struct task_struct
*prev
, struct task_struct
*next
)
1391 struct ds_context
*prev_ctx
= prev
->thread
.ds_ctx
;
1392 struct ds_context
*next_ctx
= next
->thread
.ds_ctx
;
1393 unsigned long debugctlmsr
= next
->thread
.debugctlmsr
;
1395 /* Make sure all data is read before we start. */
1399 update_debugctlmsr(0);
1401 ds_take_timestamp(prev_ctx
, bts_task_departs
, prev
);
1405 ds_take_timestamp(next_ctx
, bts_task_arrives
, next
);
1407 wrmsrl(MSR_IA32_DS_AREA
, (unsigned long)next_ctx
->ds
);
1410 update_debugctlmsr(debugctlmsr
);
1413 static __init
int ds_selftest(void)
1415 if (ds_cfg
.sizeof_rec
[ds_bts
]) {
1418 error
= ds_selftest_bts();
1420 WARN(1, "[ds] selftest failed. disabling bts.\n");
1421 ds_cfg
.sizeof_rec
[ds_bts
] = 0;
1425 if (ds_cfg
.sizeof_rec
[ds_pebs
]) {
1428 error
= ds_selftest_pebs();
1430 WARN(1, "[ds] selftest failed. disabling pebs.\n");
1431 ds_cfg
.sizeof_rec
[ds_pebs
] = 0;
1437 device_initcall(ds_selftest
);