1 #ifndef __ASM_X86_XSAVE_H
2 #define __ASM_X86_XSAVE_H
4 #include <linux/types.h>
5 #include <asm/processor.h>
7 #define XSTATE_CPUID 0x0000000d
10 #define XSTATE_SSE 0x2
11 #define XSTATE_YMM 0x4
13 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
15 #define FXSAVE_SIZE 512
17 #define XSAVE_HDR_SIZE 64
18 #define XSAVE_HDR_OFFSET FXSAVE_SIZE
20 #define XSAVE_YMM_SIZE 256
21 #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
24 * These are the features that the OS can handle currently.
26 #define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
29 #define REX_PREFIX "0x48, "
34 extern unsigned int xstate_size
;
35 extern u64 pcntxt_mask
;
36 extern u64 xstate_fx_sw_bytes
[USER_XSTATE_FX_SW_WORDS
];
38 extern void xsave_init(void);
39 extern void update_regset_xstate_info(unsigned int size
, u64 xstate_mask
);
40 extern int init_fpu(struct task_struct
*child
);
41 extern int check_for_xstate(struct i387_fxsave_struct __user
*buf
,
43 struct _fpx_sw_bytes
*sw
);
45 static inline int fpu_xrstor_checking(struct fpu
*fpu
)
47 struct xsave_struct
*fx
= &fpu
->state
->xsave
;
50 asm volatile("1: .byte " REX_PREFIX
"0x0f,0xae,0x2f\n\t"
52 ".section .fixup,\"ax\"\n"
53 "3: movl $-1,%[err]\n"
58 : "D" (fx
), "m" (*fx
), "a" (-1), "d" (-1), "0" (0)
64 static inline int xsave_user(struct xsave_struct __user
*buf
)
69 * Clear the xsave header first, so that reserved fields are
70 * initialized to zero.
72 err
= __clear_user(&buf
->xsave_hdr
,
73 sizeof(struct xsave_hdr_struct
));
77 __asm__
__volatile__("1: .byte " REX_PREFIX
"0x0f,0xae,0x27\n"
79 ".section .fixup,\"ax\"\n"
80 "3: movl $-1,%[err]\n"
83 ".section __ex_table,\"a\"\n"
88 : "D" (buf
), "a" (-1), "d" (-1), "0" (0)
90 if (unlikely(err
) && __clear_user(buf
, xstate_size
))
92 /* No need to clear here because the caller clears USED_MATH */
96 static inline int xrestore_user(struct xsave_struct __user
*buf
, u64 mask
)
99 struct xsave_struct
*xstate
= ((__force
struct xsave_struct
*)buf
);
101 u32 hmask
= mask
>> 32;
103 __asm__
__volatile__("1: .byte " REX_PREFIX
"0x0f,0xae,0x2f\n"
105 ".section .fixup,\"ax\"\n"
106 "3: movl $-1,%[err]\n"
109 ".section __ex_table,\"a\"\n"
114 : "D" (xstate
), "a" (lmask
), "d" (hmask
), "0" (0)
115 : "memory"); /* memory required? */
119 static inline void xrstor_state(struct xsave_struct
*fx
, u64 mask
)
122 u32 hmask
= mask
>> 32;
124 asm volatile(".byte " REX_PREFIX
"0x0f,0xae,0x2f\n\t"
125 : : "D" (fx
), "m" (*fx
), "a" (lmask
), "d" (hmask
)
129 static inline void xsave_state(struct xsave_struct
*fx
, u64 mask
)
132 u32 hmask
= mask
>> 32;
134 asm volatile(".byte " REX_PREFIX
"0x0f,0xae,0x27\n\t"
135 : : "D" (fx
), "m" (*fx
), "a" (lmask
), "d" (hmask
)
139 static inline void fpu_xsave(struct fpu
*fpu
)
141 /* This, however, we can work around by forcing the compiler to select
142 an addressing mode that doesn't require extended registers. */
144 ".byte " REX_PREFIX
"0x0f,0xae,0x27",
145 ".byte " REX_PREFIX
"0x0f,0xae,0x37",
146 X86_FEATURE_XSAVEOPT
,
147 [fx
] "D" (&fpu
->state
->xsave
), "a" (-1), "d" (-1) :