[media] rc: img-ir: add JVC decoder module
[linux/fpc-iii.git] / drivers / media / rc / img-ir / img-ir-hw.c
blob81c50e3f88d920d178d7894d7ad6a7f7536ee2ae
1 /*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
4 * Copyright 2010-2014 Imagination Technologies Ltd.
6 * This ties into the input subsystem using the RC-core. Protocol support is
7 * provided in separate modules which provide the parameters and scancode
8 * translation functions to set up the hardware decoder and interpret the
9 * resulting input.
12 #include <linux/bitops.h>
13 #include <linux/clk.h>
14 #include <linux/interrupt.h>
15 #include <linux/spinlock.h>
16 #include <linux/timer.h>
17 #include <media/rc-core.h>
18 #include "img-ir.h"
20 /* Decoders lock (only modified to preprocess them) */
21 static DEFINE_SPINLOCK(img_ir_decoders_lock);
23 extern struct img_ir_decoder img_ir_nec;
24 extern struct img_ir_decoder img_ir_jvc;
26 static bool img_ir_decoders_preprocessed;
27 static struct img_ir_decoder *img_ir_decoders[] = {
28 #ifdef CONFIG_IR_IMG_NEC
29 &img_ir_nec,
30 #endif
31 #ifdef CONFIG_IR_IMG_JVC
32 &img_ir_jvc,
33 #endif
34 NULL
37 #define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */
38 #define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */
40 /* code type quirks */
42 #define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */
43 #define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */
45 /* functions for preprocessing timings, ensuring max is set */
47 static void img_ir_timing_preprocess(struct img_ir_timing_range *range,
48 unsigned int unit)
50 if (range->max < range->min)
51 range->max = range->min;
52 if (unit) {
53 /* multiply by unit and convert to microseconds */
54 range->min = (range->min*unit)/1000;
55 range->max = (range->max*unit + 999)/1000; /* round up */
59 static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing,
60 unsigned int unit)
62 img_ir_timing_preprocess(&timing->pulse, unit);
63 img_ir_timing_preprocess(&timing->space, unit);
66 static void img_ir_timings_preprocess(struct img_ir_timings *timings,
67 unsigned int unit)
69 img_ir_symbol_timing_preprocess(&timings->ldr, unit);
70 img_ir_symbol_timing_preprocess(&timings->s00, unit);
71 img_ir_symbol_timing_preprocess(&timings->s01, unit);
72 img_ir_symbol_timing_preprocess(&timings->s10, unit);
73 img_ir_symbol_timing_preprocess(&timings->s11, unit);
74 /* default s10 and s11 to s00 and s01 if no leader */
75 if (unit)
76 /* multiply by unit and convert to microseconds (round up) */
77 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000;
80 /* functions for filling empty fields with defaults */
82 static void img_ir_timing_defaults(struct img_ir_timing_range *range,
83 struct img_ir_timing_range *defaults)
85 if (!range->min)
86 range->min = defaults->min;
87 if (!range->max)
88 range->max = defaults->max;
91 static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing,
92 struct img_ir_symbol_timing *defaults)
94 img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
95 img_ir_timing_defaults(&timing->space, &defaults->space);
98 static void img_ir_timings_defaults(struct img_ir_timings *timings,
99 struct img_ir_timings *defaults)
101 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr);
102 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00);
103 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01);
104 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10);
105 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11);
106 if (!timings->ft.ft_min)
107 timings->ft.ft_min = defaults->ft.ft_min;
110 /* functions for converting timings to register values */
113 * img_ir_control() - Convert control struct to control register value.
114 * @control: Control data
116 * Returns: The control register value equivalent of @control.
118 static u32 img_ir_control(const struct img_ir_control *control)
120 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT;
121 if (control->decoden)
122 ctrl |= IMG_IR_DECODEN;
123 if (control->hdrtog)
124 ctrl |= IMG_IR_HDRTOG;
125 if (control->ldrdec)
126 ctrl |= IMG_IR_LDRDEC;
127 if (control->decodinpol)
128 ctrl |= IMG_IR_DECODINPOL;
129 if (control->bitorien)
130 ctrl |= IMG_IR_BITORIEN;
131 if (control->d1validsel)
132 ctrl |= IMG_IR_D1VALIDSEL;
133 if (control->bitinv)
134 ctrl |= IMG_IR_BITINV;
135 if (control->decodend2)
136 ctrl |= IMG_IR_DECODEND2;
137 if (control->bitoriend2)
138 ctrl |= IMG_IR_BITORIEND2;
139 if (control->bitinvd2)
140 ctrl |= IMG_IR_BITINVD2;
141 return ctrl;
145 * img_ir_timing_range_convert() - Convert microsecond range.
146 * @out: Output timing range in clock cycles with a shift.
147 * @in: Input timing range in microseconds.
148 * @tolerance: Tolerance as a fraction of 128 (roughly percent).
149 * @clock_hz: IR clock rate in Hz.
150 * @shift: Shift of output units.
152 * Converts min and max from microseconds to IR clock cycles, applies a
153 * tolerance, and shifts for the register, rounding in the right direction.
154 * Note that in and out can safely be the same object.
156 static void img_ir_timing_range_convert(struct img_ir_timing_range *out,
157 const struct img_ir_timing_range *in,
158 unsigned int tolerance,
159 unsigned long clock_hz,
160 unsigned int shift)
162 unsigned int min = in->min;
163 unsigned int max = in->max;
164 /* add a tolerance */
165 min = min - (min*tolerance >> 7);
166 max = max + (max*tolerance >> 7);
167 /* convert from microseconds into clock cycles */
168 min = min*clock_hz / 1000000;
169 max = (max*clock_hz + 999999) / 1000000; /* round up */
170 /* apply shift and copy to output */
171 out->min = min >> shift;
172 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */
176 * img_ir_symbol_timing() - Convert symbol timing struct to register value.
177 * @timing: Symbol timing data
178 * @tolerance: Timing tolerance where 0-128 represents 0-100%
179 * @clock_hz: Frequency of source clock in Hz
180 * @pd_shift: Shift to apply to symbol period
181 * @w_shift: Shift to apply to symbol width
183 * Returns: Symbol timing register value based on arguments.
185 static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing,
186 unsigned int tolerance,
187 unsigned long clock_hz,
188 unsigned int pd_shift,
189 unsigned int w_shift)
191 struct img_ir_timing_range hw_pulse, hw_period;
192 /* we calculate period in hw_period, then convert in place */
193 hw_period.min = timing->pulse.min + timing->space.min;
194 hw_period.max = timing->pulse.max + timing->space.max;
195 img_ir_timing_range_convert(&hw_period, &hw_period,
196 tolerance, clock_hz, pd_shift);
197 img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
198 tolerance, clock_hz, w_shift);
199 /* construct register value */
200 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) |
201 (hw_period.min << IMG_IR_PD_MIN_SHIFT) |
202 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) |
203 (hw_pulse.min << IMG_IR_W_MIN_SHIFT);
207 * img_ir_free_timing() - Convert free time timing struct to register value.
208 * @timing: Free symbol timing data
209 * @clock_hz: Source clock frequency in Hz
211 * Returns: Free symbol timing register value.
213 static u32 img_ir_free_timing(const struct img_ir_free_timing *timing,
214 unsigned long clock_hz)
216 unsigned int minlen, maxlen, ft_min;
217 /* minlen is only 5 bits, and round minlen to multiple of 2 */
218 if (timing->minlen < 30)
219 minlen = timing->minlen & -2;
220 else
221 minlen = 30;
222 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */
223 if (timing->maxlen < 48)
224 maxlen = (timing->maxlen + 1) & -2;
225 else
226 maxlen = 48;
227 /* convert and shift ft_min, rounding upwards */
228 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000;
229 ft_min = (ft_min + 7) >> 3;
230 /* construct register value */
231 return (timing->maxlen << IMG_IR_MAXLEN_SHIFT) |
232 (timing->minlen << IMG_IR_MINLEN_SHIFT) |
233 (ft_min << IMG_IR_FT_MIN_SHIFT);
237 * img_ir_free_timing_dynamic() - Update free time register value.
238 * @st_ft: Static free time register value from img_ir_free_timing.
239 * @filter: Current filter which may additionally restrict min/max len.
241 * Returns: Updated free time register value based on the current filter.
243 static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter)
245 unsigned int minlen, maxlen, newminlen, newmaxlen;
247 /* round minlen, maxlen to multiple of 2 */
248 newminlen = filter->minlen & -2;
249 newmaxlen = (filter->maxlen + 1) & -2;
250 /* extract min/max len from register */
251 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT;
252 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT;
253 /* if the new values are more restrictive, update the register value */
254 if (newminlen > minlen) {
255 st_ft &= ~IMG_IR_MINLEN;
256 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT;
258 if (newmaxlen < maxlen) {
259 st_ft &= ~IMG_IR_MAXLEN;
260 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT;
262 return st_ft;
266 * img_ir_timings_convert() - Convert timings to register values
267 * @regs: Output timing register values
268 * @timings: Input timing data
269 * @tolerance: Timing tolerance where 0-128 represents 0-100%
270 * @clock_hz: Source clock frequency in Hz
272 static void img_ir_timings_convert(struct img_ir_timing_regvals *regs,
273 const struct img_ir_timings *timings,
274 unsigned int tolerance,
275 unsigned int clock_hz)
277 /* leader symbol timings are divided by 16 */
278 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz,
279 4, 4);
280 /* other symbol timings, pd fields only are divided by 2 */
281 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz,
282 1, 0);
283 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz,
284 1, 0);
285 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz,
286 1, 0);
287 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz,
288 1, 0);
289 regs->ft = img_ir_free_timing(&timings->ft, clock_hz);
293 * img_ir_decoder_preprocess() - Preprocess timings in decoder.
294 * @decoder: Decoder to be preprocessed.
296 * Ensures that the symbol timing ranges are valid with respect to ordering, and
297 * does some fixed conversion on them.
299 static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder)
301 /* default tolerance */
302 if (!decoder->tolerance)
303 decoder->tolerance = 10; /* percent */
304 /* and convert tolerance to fraction out of 128 */
305 decoder->tolerance = decoder->tolerance * 128 / 100;
307 /* fill in implicit fields */
308 img_ir_timings_preprocess(&decoder->timings, decoder->unit);
310 /* do the same for repeat timings if applicable */
311 if (decoder->repeat) {
312 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit);
313 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings);
318 * img_ir_decoder_convert() - Generate internal timings in decoder.
319 * @decoder: Decoder to be converted to internal timings.
320 * @timings: Timing register values.
321 * @clock_hz: IR clock rate in Hz.
323 * Fills out the repeat timings and timing register values for a specific clock
324 * rate.
326 static void img_ir_decoder_convert(const struct img_ir_decoder *decoder,
327 struct img_ir_reg_timings *reg_timings,
328 unsigned int clock_hz)
330 /* calculate control value */
331 reg_timings->ctrl = img_ir_control(&decoder->control);
333 /* fill in implicit fields and calculate register values */
334 img_ir_timings_convert(&reg_timings->timings, &decoder->timings,
335 decoder->tolerance, clock_hz);
337 /* do the same for repeat timings if applicable */
338 if (decoder->repeat)
339 img_ir_timings_convert(&reg_timings->rtimings,
340 &decoder->rtimings, decoder->tolerance,
341 clock_hz);
345 * img_ir_write_timings() - Write timings to the hardware now
346 * @priv: IR private data
347 * @regs: Timing register values to write
348 * @type: RC filter type (RC_FILTER_*)
350 * Write timing register values @regs to the hardware, taking into account the
351 * current filter which may impose restrictions on the length of the expected
352 * data.
354 static void img_ir_write_timings(struct img_ir_priv *priv,
355 struct img_ir_timing_regvals *regs,
356 enum rc_filter_type type)
358 struct img_ir_priv_hw *hw = &priv->hw;
360 /* filter may be more restrictive to minlen, maxlen */
361 u32 ft = regs->ft;
362 if (hw->flags & BIT(type))
363 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]);
364 /* write to registers */
365 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);
366 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);
367 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);
368 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);
369 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);
370 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);
371 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
372 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft);
375 static void img_ir_write_filter(struct img_ir_priv *priv,
376 struct img_ir_filter *filter)
378 if (filter) {
379 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n",
380 (unsigned long long)filter->data,
381 (unsigned long long)filter->mask);
382 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);
383 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data
384 >> 32));
385 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);
386 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask
387 >> 32));
388 } else {
389 dev_dbg(priv->dev, "IR clearing filter\n");
390 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);
391 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);
395 /* caller must have lock */
396 static void _img_ir_set_filter(struct img_ir_priv *priv,
397 struct img_ir_filter *filter)
399 struct img_ir_priv_hw *hw = &priv->hw;
400 u32 irq_en, irq_on;
402 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
403 if (filter) {
404 /* Only use the match interrupt */
405 hw->filters[RC_FILTER_NORMAL] = *filter;
406 hw->flags |= IMG_IR_F_FILTER;
407 irq_on = IMG_IR_IRQ_DATA_MATCH;
408 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID);
409 } else {
410 /* Only use the valid interrupt */
411 hw->flags &= ~IMG_IR_F_FILTER;
412 irq_en &= ~IMG_IR_IRQ_DATA_MATCH;
413 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID;
415 irq_en |= irq_on;
417 img_ir_write_filter(priv, filter);
418 /* clear any interrupts we're enabling so we don't handle old ones */
419 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);
420 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);
423 /* caller must have lock */
424 static void _img_ir_set_wake_filter(struct img_ir_priv *priv,
425 struct img_ir_filter *filter)
427 struct img_ir_priv_hw *hw = &priv->hw;
428 if (filter) {
429 /* Enable wake, and copy filter for later */
430 hw->filters[RC_FILTER_WAKEUP] = *filter;
431 hw->flags |= IMG_IR_F_WAKE;
432 } else {
433 /* Disable wake */
434 hw->flags &= ~IMG_IR_F_WAKE;
438 /* Callback for setting scancode filter */
439 static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type,
440 struct rc_scancode_filter *sc_filter)
442 struct img_ir_priv *priv = dev->priv;
443 struct img_ir_priv_hw *hw = &priv->hw;
444 struct img_ir_filter filter, *filter_ptr = &filter;
445 int ret = 0;
447 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n",
448 type == RC_FILTER_WAKEUP ? "wake " : "",
449 sc_filter->data,
450 sc_filter->mask);
452 spin_lock_irq(&priv->lock);
454 /* filtering can always be disabled */
455 if (!sc_filter->mask) {
456 filter_ptr = NULL;
457 goto set_unlock;
460 /* current decoder must support scancode filtering */
461 if (!hw->decoder || !hw->decoder->filter) {
462 ret = -EINVAL;
463 goto unlock;
466 /* convert scancode filter to raw filter */
467 filter.minlen = 0;
468 filter.maxlen = ~0;
469 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols);
470 if (ret)
471 goto unlock;
472 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n",
473 type == RC_FILTER_WAKEUP ? "wake " : "",
474 (unsigned long long)filter.data,
475 (unsigned long long)filter.mask);
477 set_unlock:
478 /* apply raw filters */
479 switch (type) {
480 case RC_FILTER_NORMAL:
481 _img_ir_set_filter(priv, filter_ptr);
482 break;
483 case RC_FILTER_WAKEUP:
484 _img_ir_set_wake_filter(priv, filter_ptr);
485 break;
486 default:
487 ret = -EINVAL;
490 unlock:
491 spin_unlock_irq(&priv->lock);
492 return ret;
496 * img_ir_set_decoder() - Set the current decoder.
497 * @priv: IR private data.
498 * @decoder: Decoder to use with immediate effect.
499 * @proto: Protocol bitmap (or 0 to use decoder->type).
501 static void img_ir_set_decoder(struct img_ir_priv *priv,
502 const struct img_ir_decoder *decoder,
503 u64 proto)
505 struct img_ir_priv_hw *hw = &priv->hw;
506 struct rc_dev *rdev = hw->rdev;
507 u32 ir_status, irq_en;
508 spin_lock_irq(&priv->lock);
510 /* switch off and disable interrupts */
511 img_ir_write(priv, IMG_IR_CONTROL, 0);
512 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
513 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);
514 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);
516 /* ack any data already detected */
517 ir_status = img_ir_read(priv, IMG_IR_STATUS);
518 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) {
519 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
520 img_ir_write(priv, IMG_IR_STATUS, ir_status);
521 img_ir_read(priv, IMG_IR_DATA_LW);
522 img_ir_read(priv, IMG_IR_DATA_UP);
525 /* stop the end timer and switch back to normal mode */
526 del_timer_sync(&hw->end_timer);
527 hw->mode = IMG_IR_M_NORMAL;
529 /* clear the wakeup scancode filter */
530 rdev->scancode_filters[RC_FILTER_WAKEUP].data = 0;
531 rdev->scancode_filters[RC_FILTER_WAKEUP].mask = 0;
533 /* clear raw filters */
534 _img_ir_set_filter(priv, NULL);
535 _img_ir_set_wake_filter(priv, NULL);
537 /* clear the enabled protocols */
538 hw->enabled_protocols = 0;
540 /* switch decoder */
541 hw->decoder = decoder;
542 if (!decoder)
543 goto unlock;
545 /* set the enabled protocols */
546 if (!proto)
547 proto = decoder->type;
548 hw->enabled_protocols = proto;
550 /* write the new timings */
551 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz);
552 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL);
554 /* set up and enable */
555 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
558 unlock:
559 spin_unlock_irq(&priv->lock);
563 * img_ir_decoder_compatable() - Find whether a decoder will work with a device.
564 * @priv: IR private data.
565 * @dec: Decoder to check.
567 * Returns: true if @dec is compatible with the device @priv refers to.
569 static bool img_ir_decoder_compatible(struct img_ir_priv *priv,
570 const struct img_ir_decoder *dec)
572 unsigned int ct;
574 /* don't accept decoders using code types which aren't supported */
575 ct = dec->control.code_type;
576 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN)
577 return false;
579 return true;
583 * img_ir_allowed_protos() - Get allowed protocols from global decoder list.
584 * @priv: IR private data.
586 * Returns: Mask of protocols supported by the device @priv refers to.
588 static u64 img_ir_allowed_protos(struct img_ir_priv *priv)
590 u64 protos = 0;
591 struct img_ir_decoder **decp;
593 for (decp = img_ir_decoders; *decp; ++decp) {
594 const struct img_ir_decoder *dec = *decp;
595 if (img_ir_decoder_compatible(priv, dec))
596 protos |= dec->type;
598 return protos;
601 /* Callback for changing protocol using sysfs */
602 static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type)
604 struct img_ir_priv *priv = dev->priv;
605 struct img_ir_priv_hw *hw = &priv->hw;
606 struct rc_dev *rdev = hw->rdev;
607 struct img_ir_decoder **decp;
608 u64 wakeup_protocols;
610 if (!*ir_type) {
611 /* disable all protocols */
612 img_ir_set_decoder(priv, NULL, 0);
613 goto success;
615 for (decp = img_ir_decoders; *decp; ++decp) {
616 const struct img_ir_decoder *dec = *decp;
617 if (!img_ir_decoder_compatible(priv, dec))
618 continue;
619 if (*ir_type & dec->type) {
620 *ir_type &= dec->type;
621 img_ir_set_decoder(priv, dec, *ir_type);
622 goto success;
625 return -EINVAL;
627 success:
629 * Only allow matching wakeup protocols for now, and only if filtering
630 * is supported.
632 wakeup_protocols = *ir_type;
633 if (!hw->decoder || !hw->decoder->filter)
634 wakeup_protocols = 0;
635 rc_set_allowed_wakeup_protocols(rdev, wakeup_protocols);
636 rc_set_enabled_wakeup_protocols(rdev, wakeup_protocols);
637 return 0;
640 /* Changes ir-core protocol device attribute */
641 static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto)
643 struct rc_dev *rdev = priv->hw.rdev;
645 spin_lock_irq(&rdev->rc_map.lock);
646 rdev->rc_map.rc_type = __ffs64(proto);
647 spin_unlock_irq(&rdev->rc_map.lock);
649 mutex_lock(&rdev->lock);
650 rc_set_enabled_protocols(rdev, proto);
651 rc_set_allowed_wakeup_protocols(rdev, proto);
652 rc_set_enabled_wakeup_protocols(rdev, proto);
653 mutex_unlock(&rdev->lock);
656 /* Set up IR decoders */
657 static void img_ir_init_decoders(void)
659 struct img_ir_decoder **decp;
661 spin_lock(&img_ir_decoders_lock);
662 if (!img_ir_decoders_preprocessed) {
663 for (decp = img_ir_decoders; *decp; ++decp)
664 img_ir_decoder_preprocess(*decp);
665 img_ir_decoders_preprocessed = true;
667 spin_unlock(&img_ir_decoders_lock);
670 #ifdef CONFIG_PM_SLEEP
672 * img_ir_enable_wake() - Switch to wake mode.
673 * @priv: IR private data.
675 * Returns: non-zero if the IR can wake the system.
677 static int img_ir_enable_wake(struct img_ir_priv *priv)
679 struct img_ir_priv_hw *hw = &priv->hw;
680 int ret = 0;
682 spin_lock_irq(&priv->lock);
683 if (hw->flags & IMG_IR_F_WAKE) {
684 /* interrupt only on a match */
685 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
686 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);
687 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]);
688 img_ir_write_timings(priv, &hw->reg_timings.timings,
689 RC_FILTER_WAKEUP);
690 hw->mode = IMG_IR_M_WAKE;
691 ret = 1;
693 spin_unlock_irq(&priv->lock);
694 return ret;
698 * img_ir_disable_wake() - Switch out of wake mode.
699 * @priv: IR private data
701 * Returns: 1 if the hardware should be allowed to wake from a sleep state.
702 * 0 otherwise.
704 static int img_ir_disable_wake(struct img_ir_priv *priv)
706 struct img_ir_priv_hw *hw = &priv->hw;
707 int ret = 0;
709 spin_lock_irq(&priv->lock);
710 if (hw->flags & IMG_IR_F_WAKE) {
711 /* restore normal filtering */
712 if (hw->flags & IMG_IR_F_FILTER) {
713 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
714 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
715 IMG_IR_IRQ_DATA_MATCH);
716 img_ir_write_filter(priv,
717 &hw->filters[RC_FILTER_NORMAL]);
718 } else {
719 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
720 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
721 IMG_IR_IRQ_DATA_VALID |
722 IMG_IR_IRQ_DATA2_VALID);
723 img_ir_write_filter(priv, NULL);
725 img_ir_write_timings(priv, &hw->reg_timings.timings,
726 RC_FILTER_NORMAL);
727 hw->mode = IMG_IR_M_NORMAL;
728 ret = 1;
730 spin_unlock_irq(&priv->lock);
731 return ret;
733 #endif /* CONFIG_PM_SLEEP */
735 /* lock must be held */
736 static void img_ir_begin_repeat(struct img_ir_priv *priv)
738 struct img_ir_priv_hw *hw = &priv->hw;
739 if (hw->mode == IMG_IR_M_NORMAL) {
740 /* switch to repeat timings */
741 img_ir_write(priv, IMG_IR_CONTROL, 0);
742 hw->mode = IMG_IR_M_REPEATING;
743 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
744 RC_FILTER_NORMAL);
745 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
749 /* lock must be held */
750 static void img_ir_end_repeat(struct img_ir_priv *priv)
752 struct img_ir_priv_hw *hw = &priv->hw;
753 if (hw->mode == IMG_IR_M_REPEATING) {
754 /* switch to normal timings */
755 img_ir_write(priv, IMG_IR_CONTROL, 0);
756 hw->mode = IMG_IR_M_NORMAL;
757 img_ir_write_timings(priv, &hw->reg_timings.timings,
758 RC_FILTER_NORMAL);
759 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
763 /* lock must be held */
764 static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw)
766 struct img_ir_priv_hw *hw = &priv->hw;
767 const struct img_ir_decoder *dec = hw->decoder;
768 int ret = IMG_IR_SCANCODE;
769 int scancode;
770 if (dec->scancode)
771 ret = dec->scancode(len, raw, &scancode, hw->enabled_protocols);
772 else if (len >= 32)
773 scancode = (u32)raw;
774 else if (len < 32)
775 scancode = (u32)raw & ((1 << len)-1);
776 dev_dbg(priv->dev, "data (%u bits) = %#llx\n",
777 len, (unsigned long long)raw);
778 if (ret == IMG_IR_SCANCODE) {
779 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode);
780 rc_keydown(hw->rdev, scancode, 0);
781 img_ir_end_repeat(priv);
782 } else if (ret == IMG_IR_REPEATCODE) {
783 if (hw->mode == IMG_IR_M_REPEATING) {
784 dev_dbg(priv->dev, "decoded repeat code\n");
785 rc_repeat(hw->rdev);
786 } else {
787 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n");
789 } else {
790 dev_dbg(priv->dev, "decode failed (%d)\n", ret);
791 return;
795 if (dec->repeat) {
796 unsigned long interval;
798 img_ir_begin_repeat(priv);
800 /* update timer, but allowing for 1/8th tolerance */
801 interval = dec->repeat + (dec->repeat >> 3);
802 mod_timer(&hw->end_timer,
803 jiffies + msecs_to_jiffies(interval));
807 /* timer function to end waiting for repeat. */
808 static void img_ir_end_timer(unsigned long arg)
810 struct img_ir_priv *priv = (struct img_ir_priv *)arg;
812 spin_lock_irq(&priv->lock);
813 img_ir_end_repeat(priv);
814 spin_unlock_irq(&priv->lock);
817 #ifdef CONFIG_COMMON_CLK
818 static void img_ir_change_frequency(struct img_ir_priv *priv,
819 struct clk_notifier_data *change)
821 struct img_ir_priv_hw *hw = &priv->hw;
823 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n",
824 change->old_rate, change->new_rate);
826 spin_lock_irq(&priv->lock);
827 if (hw->clk_hz == change->new_rate)
828 goto unlock;
829 hw->clk_hz = change->new_rate;
830 /* refresh current timings */
831 if (hw->decoder) {
832 img_ir_decoder_convert(hw->decoder, &hw->reg_timings,
833 hw->clk_hz);
834 switch (hw->mode) {
835 case IMG_IR_M_NORMAL:
836 img_ir_write_timings(priv, &hw->reg_timings.timings,
837 RC_FILTER_NORMAL);
838 break;
839 case IMG_IR_M_REPEATING:
840 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
841 RC_FILTER_NORMAL);
842 break;
843 #ifdef CONFIG_PM_SLEEP
844 case IMG_IR_M_WAKE:
845 img_ir_write_timings(priv, &hw->reg_timings.timings,
846 RC_FILTER_WAKEUP);
847 break;
848 #endif
851 unlock:
852 spin_unlock_irq(&priv->lock);
855 static int img_ir_clk_notify(struct notifier_block *self, unsigned long action,
856 void *data)
858 struct img_ir_priv *priv = container_of(self, struct img_ir_priv,
859 hw.clk_nb);
860 switch (action) {
861 case POST_RATE_CHANGE:
862 img_ir_change_frequency(priv, data);
863 break;
864 default:
865 break;
867 return NOTIFY_OK;
869 #endif /* CONFIG_COMMON_CLK */
871 /* called with priv->lock held */
872 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
874 struct img_ir_priv_hw *hw = &priv->hw;
875 u32 ir_status, len, lw, up;
876 unsigned int ct;
878 /* use the current decoder */
879 if (!hw->decoder)
880 return;
882 ir_status = img_ir_read(priv, IMG_IR_STATUS);
883 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)))
884 return;
885 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
886 img_ir_write(priv, IMG_IR_STATUS, ir_status);
888 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT;
889 /* some versions report wrong length for certain code types */
890 ct = hw->decoder->control.code_type;
891 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR)
892 ++len;
894 lw = img_ir_read(priv, IMG_IR_DATA_LW);
895 up = img_ir_read(priv, IMG_IR_DATA_UP);
896 img_ir_handle_data(priv, len, (u64)up << 32 | lw);
899 void img_ir_setup_hw(struct img_ir_priv *priv)
901 struct img_ir_decoder **decp;
903 if (!priv->hw.rdev)
904 return;
906 /* Use the first available decoder (or disable stuff if NULL) */
907 for (decp = img_ir_decoders; *decp; ++decp) {
908 const struct img_ir_decoder *dec = *decp;
909 if (img_ir_decoder_compatible(priv, dec)) {
910 img_ir_set_protocol(priv, dec->type);
911 img_ir_set_decoder(priv, dec, 0);
912 return;
915 img_ir_set_decoder(priv, NULL, 0);
919 * img_ir_probe_hw_caps() - Probe capabilities of the hardware.
920 * @priv: IR private data.
922 static void img_ir_probe_hw_caps(struct img_ir_priv *priv)
924 struct img_ir_priv_hw *hw = &priv->hw;
926 * When a version of the block becomes available without these quirks,
927 * they'll have to depend on the core revision.
929 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN]
930 |= IMG_IR_QUIRK_CODE_LEN_INCR;
931 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE]
932 |= IMG_IR_QUIRK_CODE_BROKEN;
933 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS]
934 |= IMG_IR_QUIRK_CODE_BROKEN;
937 int img_ir_probe_hw(struct img_ir_priv *priv)
939 struct img_ir_priv_hw *hw = &priv->hw;
940 struct rc_dev *rdev;
941 int error;
943 /* Ensure hardware decoders have been preprocessed */
944 img_ir_init_decoders();
946 /* Probe hardware capabilities */
947 img_ir_probe_hw_caps(priv);
949 /* Set up the end timer */
950 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv);
952 /* Register a clock notifier */
953 if (!IS_ERR(priv->clk)) {
954 hw->clk_hz = clk_get_rate(priv->clk);
955 #ifdef CONFIG_COMMON_CLK
956 hw->clk_nb.notifier_call = img_ir_clk_notify;
957 error = clk_notifier_register(priv->clk, &hw->clk_nb);
958 if (error)
959 dev_warn(priv->dev,
960 "failed to register clock notifier\n");
961 #endif
962 } else {
963 hw->clk_hz = 32768;
966 /* Allocate hardware decoder */
967 hw->rdev = rdev = rc_allocate_device();
968 if (!rdev) {
969 dev_err(priv->dev, "cannot allocate input device\n");
970 error = -ENOMEM;
971 goto err_alloc_rc;
973 rdev->priv = priv;
974 rdev->map_name = RC_MAP_EMPTY;
975 rc_set_allowed_protocols(rdev, img_ir_allowed_protos(priv));
976 rdev->input_name = "IMG Infrared Decoder";
977 rdev->s_filter = img_ir_set_filter;
979 /* Register hardware decoder */
980 error = rc_register_device(rdev);
981 if (error) {
982 dev_err(priv->dev, "failed to register IR input device\n");
983 goto err_register_rc;
987 * Set this after rc_register_device as no protocols have been
988 * registered yet.
990 rdev->change_protocol = img_ir_change_protocol;
992 device_init_wakeup(priv->dev, 1);
994 return 0;
996 err_register_rc:
997 img_ir_set_decoder(priv, NULL, 0);
998 hw->rdev = NULL;
999 rc_free_device(rdev);
1000 err_alloc_rc:
1001 #ifdef CONFIG_COMMON_CLK
1002 if (!IS_ERR(priv->clk))
1003 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1004 #endif
1005 return error;
1008 void img_ir_remove_hw(struct img_ir_priv *priv)
1010 struct img_ir_priv_hw *hw = &priv->hw;
1011 struct rc_dev *rdev = hw->rdev;
1012 if (!rdev)
1013 return;
1014 img_ir_set_decoder(priv, NULL, 0);
1015 hw->rdev = NULL;
1016 rc_unregister_device(rdev);
1017 #ifdef CONFIG_COMMON_CLK
1018 if (!IS_ERR(priv->clk))
1019 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1020 #endif
1023 #ifdef CONFIG_PM_SLEEP
1024 int img_ir_suspend(struct device *dev)
1026 struct img_ir_priv *priv = dev_get_drvdata(dev);
1028 if (device_may_wakeup(dev) && img_ir_enable_wake(priv))
1029 enable_irq_wake(priv->irq);
1030 return 0;
1033 int img_ir_resume(struct device *dev)
1035 struct img_ir_priv *priv = dev_get_drvdata(dev);
1037 if (device_may_wakeup(dev) && img_ir_disable_wake(priv))
1038 disable_irq_wake(priv->irq);
1039 return 0;
1041 #endif /* CONFIG_PM_SLEEP */