drivers/media/dvb/frontends/s5h1409.c

   1 /*
   2     Samsung S5H1409 VSB/QAM demodulator driver
   3
   4     Copyright (C) 2006 Steven Toth <stoth@hauppauge.com>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/delay.h>
  28 #include "dvb_frontend.h"
  29 #include "dvb-pll.h"
  30 #include "s5h1409.h"
  31
  32 struct s5h1409_state {
  33
  34         struct i2c_adapter* i2c;
  35
  36         /* configuration settings */
  37         const struct s5h1409_config* config;
  38
  39         struct dvb_frontend frontend;
  40
  41         /* previous uncorrected block counter */
  42         fe_modulation_t current_modulation;
  43
  44         u32 current_frequency;
  45         int if_freq;
  46
  47         u32 is_qam_locked;
  48         u32 qam_state;
  49 };
  50
  51 static int debug;
  52 #define dprintk if (debug) printk
  53
  54 /* Register values to initialise the demod, this will set VSB by default */
  55 static struct init_tab {
  56         u8      reg;
  57         u16     data;
  58 } init_tab[] = {
  59         { 0x00, 0x0071, },
  60         { 0x01, 0x3213, },
  61         { 0x09, 0x0025, },
  62         { 0x1c, 0x001d, },
  63         { 0x1f, 0x002d, },
  64         { 0x20, 0x001d, },
  65         { 0x22, 0x0022, },
  66         { 0x23, 0x0020, },
  67         { 0x29, 0x110f, },
  68         { 0x2a, 0x10b4, },
  69         { 0x2b, 0x10ae, },
  70         { 0x2c, 0x0031, },
  71         { 0x31, 0x010d, },
  72         { 0x32, 0x0100, },
  73         { 0x44, 0x0510, },
  74         { 0x54, 0x0104, },
  75         { 0x58, 0x2222, },
  76         { 0x59, 0x1162, },
  77         { 0x5a, 0x3211, },
  78         { 0x5d, 0x0370, },
  79         { 0x5e, 0x0296, },
  80         { 0x61, 0x0010, },
  81         { 0x63, 0x4a00, },
  82         { 0x65, 0x0800, },
  83         { 0x71, 0x0003, },
  84         { 0x72, 0x0470, },
  85         { 0x81, 0x0002, },
  86         { 0x82, 0x0600, },
  87         { 0x86, 0x0002, },
  88         { 0x8a, 0x2c38, },
  89         { 0x8b, 0x2a37, },
  90         { 0x92, 0x302f, },
  91         { 0x93, 0x3332, },
  92         { 0x96, 0x000c, },
  93         { 0x99, 0x0101, },
  94         { 0x9c, 0x2e37, },
  95         { 0x9d, 0x2c37, },
  96         { 0x9e, 0x2c37, },
  97         { 0xab, 0x0100, },
  98         { 0xac, 0x1003, },
  99         { 0xad, 0x103f, },
 100         { 0xe2, 0x0100, },
 101         { 0xe3, 0x1000, },
 102         { 0x28, 0x1010, },
 103         { 0xb1, 0x000e, },
 104 };
 105
 106 /* VSB SNR lookup table */
 107 static struct vsb_snr_tab {
 108         u16     val;
 109         u16     data;
 110 } vsb_snr_tab[] = {
 111         {  924, 300, },
 112         {  923, 300, },
 113         {  918, 295, },
 114         {  915, 290, },
 115         {  911, 285, },
 116         {  906, 280, },
 117         {  901, 275, },
 118         {  896, 270, },
 119         {  891, 265, },
 120         {  885, 260, },
 121         {  879, 255, },
 122         {  873, 250, },
 123         {  864, 245, },
 124         {  858, 240, },
 125         {  850, 235, },
 126         {  841, 230, },
 127         {  832, 225, },
 128         {  823, 220, },
 129         {  812, 215, },
 130         {  802, 210, },
 131         {  788, 205, },
 132         {  778, 200, },
 133         {  767, 195, },
 134         {  753, 190, },
 135         {  740, 185, },
 136         {  725, 180, },
 137         {  707, 175, },
 138         {  689, 170, },
 139         {  671, 165, },
 140         {  656, 160, },
 141         {  637, 155, },
 142         {  616, 150, },
 143         {  542, 145, },
 144         {  519, 140, },
 145         {  507, 135, },
 146         {  497, 130, },
 147         {  492, 125, },
 148         {  474, 120, },
 149         {  300, 111, },
 150         {    0,   0, },
 151 };
 152
 153 /* QAM64 SNR lookup table */
 154 static struct qam64_snr_tab {
 155         u16     val;
 156         u16     data;
 157 } qam64_snr_tab[] = {
 158         {    1,   0, },
 159         {   12, 300, },
 160         {   15, 290, },
 161         {   18, 280, },
 162         {   22, 270, },
 163         {   23, 268, },
 164         {   24, 266, },
 165         {   25, 264, },
 166         {   27, 262, },
 167         {   28, 260, },
 168         {   29, 258, },
 169         {   30, 256, },
 170         {   32, 254, },
 171         {   33, 252, },
 172         {   34, 250, },
 173         {   35, 249, },
 174         {   36, 248, },
 175         {   37, 247, },
 176         {   38, 246, },
 177         {   39, 245, },
 178         {   40, 244, },
 179         {   41, 243, },
 180         {   42, 241, },
 181         {   43, 240, },
 182         {   44, 239, },
 183         {   45, 238, },
 184         {   46, 237, },
 185         {   47, 236, },
 186         {   48, 235, },
 187         {   49, 234, },
 188         {   50, 233, },
 189         {   51, 232, },
 190         {   52, 231, },
 191         {   53, 230, },
 192         {   55, 229, },
 193         {   56, 228, },
 194         {   57, 227, },
 195         {   58, 226, },
 196         {   59, 225, },
 197         {   60, 224, },
 198         {   62, 223, },
 199         {   63, 222, },
 200         {   65, 221, },
 201         {   66, 220, },
 202         {   68, 219, },
 203         {   69, 218, },
 204         {   70, 217, },
 205         {   72, 216, },
 206         {   73, 215, },
 207         {   75, 214, },
 208         {   76, 213, },
 209         {   78, 212, },
 210         {   80, 211, },
 211         {   81, 210, },
 212         {   83, 209, },
 213         {   84, 208, },
 214         {   85, 207, },
 215         {   87, 206, },
 216         {   89, 205, },
 217         {   91, 204, },
 218         {   93, 203, },
 219         {   95, 202, },
 220         {   96, 201, },
 221         {  104, 200, },
 222         {  255,   0, },
 223 };
 224
 225 /* QAM256 SNR lookup table */
 226 static struct qam256_snr_tab {
 227         u16     val;
 228         u16     data;
 229 } qam256_snr_tab[] = {
 230         {    1,   0, },
 231         {   12, 400, },
 232         {   13, 390, },
 233         {   15, 380, },
 234         {   17, 360, },
 235         {   19, 350, },
 236         {   22, 348, },
 237         {   23, 346, },
 238         {   24, 344, },
 239         {   25, 342, },
 240         {   26, 340, },
 241         {   27, 336, },
 242         {   28, 334, },
 243         {   29, 332, },
 244         {   30, 330, },
 245         {   31, 328, },
 246         {   32, 326, },
 247         {   33, 325, },
 248         {   34, 322, },
 249         {   35, 320, },
 250         {   37, 318, },
 251         {   39, 316, },
 252         {   40, 314, },
 253         {   41, 312, },
 254         {   42, 310, },
 255         {   43, 308, },
 256         {   46, 306, },
 257         {   47, 304, },
 258         {   49, 302, },
 259         {   51, 300, },
 260         {   53, 298, },
 261         {   54, 297, },
 262         {   55, 296, },
 263         {   56, 295, },
 264         {   57, 294, },
 265         {   59, 293, },
 266         {   60, 292, },
 267         {   61, 291, },
 268         {   63, 290, },
 269         {   64, 289, },
 270         {   65, 288, },
 271         {   66, 287, },
 272         {   68, 286, },
 273         {   69, 285, },
 274         {   71, 284, },
 275         {   72, 283, },
 276         {   74, 282, },
 277         {   75, 281, },
 278         {   76, 280, },
 279         {   77, 279, },
 280         {   78, 278, },
 281         {   81, 277, },
 282         {   83, 276, },
 283         {   84, 275, },
 284         {   86, 274, },
 285         {   87, 273, },
 286         {   89, 272, },
 287         {   90, 271, },
 288         {   92, 270, },
 289         {   93, 269, },
 290         {   95, 268, },
 291         {   96, 267, },
 292         {   98, 266, },
 293         {  100, 265, },
 294         {  102, 264, },
 295         {  104, 263, },
 296         {  105, 262, },
 297         {  106, 261, },
 298         {  110, 260, },
 299         {  255,   0, },
 300 };
 301
 302 /* 8 bit registers, 16 bit values */
 303 static int s5h1409_writereg(struct s5h1409_state* state, u8 reg, u16 data)
 304 {
 305         int ret;
 306         u8 buf [] = { reg, data >> 8,  data & 0xff };
 307
 308         struct i2c_msg msg = { .addr = state->config->demod_address,
 309                                .flags = 0, .buf = buf, .len = 3 };
 310
 311         ret = i2c_transfer(state->i2c, &msg, 1);
 312
 313         if (ret != 1)
 314                 printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
 315                        "ret == %i)\n", __func__, reg, data, ret);
 316
 317         return (ret != 1) ? -1 : 0;
 318 }
 319
 320 static u16 s5h1409_readreg(struct s5h1409_state* state, u8 reg)
 321 {
 322         int ret;
 323         u8 b0 [] = { reg };
 324         u8 b1 [] = { 0, 0 };
 325
 326         struct i2c_msg msg [] = {
 327                 { .addr = state->config->demod_address, .flags = 0,
 328                   .buf = b0, .len = 1 },
 329                 { .addr = state->config->demod_address, .flags = I2C_M_RD,
 330                   .buf = b1, .len = 2 } };
 331
 332         ret = i2c_transfer(state->i2c, msg, 2);
 333
 334         if (ret != 2)
 335                 printk("%s: readreg error (ret == %i)\n", __func__, ret);
 336         return (b1[0] << 8) | b1[1];
 337 }
 338
 339 static int s5h1409_softreset(struct dvb_frontend* fe)
 340 {
 341         struct s5h1409_state* state = fe->demodulator_priv;
 342
 343         dprintk("%s()\n", __func__);
 344
 345         s5h1409_writereg(state, 0xf5, 0);
 346         s5h1409_writereg(state, 0xf5, 1);
 347         state->is_qam_locked = 0;
 348         state->qam_state = 0;
 349         return 0;
 350 }
 351
 352 #define S5H1409_VSB_IF_FREQ 5380
 353 #define S5H1409_QAM_IF_FREQ state->config->qam_if
 354
 355 static int s5h1409_set_if_freq(struct dvb_frontend* fe, int KHz)
 356 {
 357         struct s5h1409_state* state = fe->demodulator_priv;
 358
 359         dprintk("%s(%d KHz)\n", __func__, KHz);
 360
 361         switch (KHz) {
 362         case 4000:
 363                 s5h1409_writereg(state, 0x87, 0x014b);
 364                 s5h1409_writereg(state, 0x88, 0x0cb5);
 365                 s5h1409_writereg(state, 0x89, 0x03e2);
 366                 break;
 367         case 5380:
 368         case 44000:
 369         default:
 370                 s5h1409_writereg(state, 0x87, 0x01be);
 371                 s5h1409_writereg(state, 0x88, 0x0436);
 372                 s5h1409_writereg(state, 0x89, 0x054d);
 373                 break;
 374         }
 375         state->if_freq = KHz;
 376
 377         return 0;
 378 }
 379
 380 static int s5h1409_set_spectralinversion(struct dvb_frontend* fe, int inverted)
 381 {
 382         struct s5h1409_state* state = fe->demodulator_priv;
 383
 384         dprintk("%s(%d)\n", __func__, inverted);
 385
 386         if(inverted == 1)
 387                 return s5h1409_writereg(state, 0x1b, 0x1101); /* Inverted */
 388         else
 389                 return s5h1409_writereg(state, 0x1b, 0x0110); /* Normal */
 390 }
 391
 392 static int s5h1409_enable_modulation(struct dvb_frontend* fe,
 393                                      fe_modulation_t m)
 394 {
 395         struct s5h1409_state* state = fe->demodulator_priv;
 396
 397         dprintk("%s(0x%08x)\n", __func__, m);
 398
 399         switch(m) {
 400         case VSB_8:
 401                 dprintk("%s() VSB_8\n", __func__);
 402                 if (state->if_freq != S5H1409_VSB_IF_FREQ)
 403                         s5h1409_set_if_freq(fe, S5H1409_VSB_IF_FREQ);
 404                 s5h1409_writereg(state, 0xf4, 0);
 405                 break;
 406         case QAM_64:
 407         case QAM_256:
 408                 dprintk("%s() QAM_AUTO (64/256)\n", __func__);
 409                 if (state->if_freq != S5H1409_QAM_IF_FREQ)
 410                         s5h1409_set_if_freq(fe, S5H1409_QAM_IF_FREQ);
 411                 s5h1409_writereg(state, 0xf4, 1);
 412                 s5h1409_writereg(state, 0x85, 0x110);
 413                 break;
 414         default:
 415                 dprintk("%s() Invalid modulation\n", __func__);
 416                 return -EINVAL;
 417         }
 418
 419         state->current_modulation = m;
 420         s5h1409_softreset(fe);
 421
 422         return 0;
 423 }
 424
 425 static int s5h1409_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 426 {
 427         struct s5h1409_state* state = fe->demodulator_priv;
 428
 429         dprintk("%s(%d)\n", __func__, enable);
 430
 431         if (enable)
 432                 return s5h1409_writereg(state, 0xf3, 1);
 433         else
 434                 return s5h1409_writereg(state, 0xf3, 0);
 435 }
 436
 437 static int s5h1409_set_gpio(struct dvb_frontend* fe, int enable)
 438 {
 439         struct s5h1409_state* state = fe->demodulator_priv;
 440
 441         dprintk("%s(%d)\n", __func__, enable);
 442
 443         if (enable)
 444                 return s5h1409_writereg(state, 0xe3,
 445                         s5h1409_readreg(state, 0xe3) | 0x1100);
 446         else
 447                 return s5h1409_writereg(state, 0xe3,
 448                         s5h1409_readreg(state, 0xe3) & 0xfeff);
 449 }
 450
 451 static int s5h1409_sleep(struct dvb_frontend* fe, int enable)
 452 {
 453         struct s5h1409_state* state = fe->demodulator_priv;
 454
 455         dprintk("%s(%d)\n", __func__, enable);
 456
 457         return s5h1409_writereg(state, 0xf2, enable);
 458 }
 459
 460 static int s5h1409_register_reset(struct dvb_frontend* fe)
 461 {
 462         struct s5h1409_state* state = fe->demodulator_priv;
 463
 464         dprintk("%s()\n", __func__);
 465
 466         return s5h1409_writereg(state, 0xfa, 0);
 467 }
 468
 469 static void s5h1409_set_qam_amhum_mode(struct dvb_frontend *fe)
 470 {
 471         struct s5h1409_state *state = fe->demodulator_priv;
 472         u16 reg;
 473
 474         if (state->is_qam_locked)
 475                 return;
 476
 477         /* QAM EQ lock check */
 478         reg = s5h1409_readreg(state, 0xf0);
 479
 480         if ((reg >> 13) & 0x1) {
 481
 482                 state->is_qam_locked = 1;
 483                 reg &= 0xff;
 484
 485                 s5h1409_writereg(state, 0x96, 0x00c);
 486                 if ((reg < 0x38) || (reg > 0x68) ) {
 487                         s5h1409_writereg(state, 0x93, 0x3332);
 488                         s5h1409_writereg(state, 0x9e, 0x2c37);
 489                 } else {
 490                         s5h1409_writereg(state, 0x93, 0x3130);
 491                         s5h1409_writereg(state, 0x9e, 0x2836);
 492                 }
 493
 494         } else {
 495                 s5h1409_writereg(state, 0x96, 0x0008);
 496                 s5h1409_writereg(state, 0x93, 0x3332);
 497                 s5h1409_writereg(state, 0x9e, 0x2c37);
 498         }
 499 }
 500
 501 static void s5h1409_set_qam_interleave_mode(struct dvb_frontend *fe)
 502 {
 503         struct s5h1409_state *state = fe->demodulator_priv;
 504         u16 reg, reg1, reg2;
 505
 506         reg = s5h1409_readreg(state, 0xf1);
 507
 508         /* Master lock */
 509         if ((reg >> 15) & 0x1) {
 510                 if (state->qam_state != 2) {
 511                         state->qam_state = 2;
 512                         reg1 = s5h1409_readreg(state, 0xb2);
 513                         reg2 = s5h1409_readreg(state, 0xad);
 514
 515                         s5h1409_writereg(state, 0x96, 0x20);
 516                         s5h1409_writereg(state, 0xad,
 517                                 ( ((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)) );
 518                         s5h1409_writereg(state, 0xab,
 519                                 s5h1409_readreg(state, 0xab) & 0xeffe);
 520                 }
 521         } else {
 522                 if (state->qam_state != 1) {
 523                         state->qam_state = 1;
 524                         s5h1409_writereg(state, 0x96, 0x08);
 525                         s5h1409_writereg(state, 0xab,
 526                                 s5h1409_readreg(state, 0xab) | 0x1001);
 527                 }
 528         }
 529 }
 530
 531 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
 532 static int s5h1409_set_frontend (struct dvb_frontend* fe,
 533                                  struct dvb_frontend_parameters *p)
 534 {
 535         struct s5h1409_state* state = fe->demodulator_priv;
 536
 537         dprintk("%s(frequency=%d)\n", __func__, p->frequency);
 538
 539         s5h1409_softreset(fe);
 540
 541         state->current_frequency = p->frequency;
 542
 543         s5h1409_enable_modulation(fe, p->u.vsb.modulation);
 544
 545         /* Allow the demod to settle */
 546         msleep(100);
 547
 548         if (fe->ops.tuner_ops.set_params) {
 549                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1);
 550                 fe->ops.tuner_ops.set_params(fe, p);
 551                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 552         }
 553
 554         /* Optimize the demod for QAM */
 555         if (p->u.vsb.modulation != VSB_8) {
 556                 s5h1409_set_qam_amhum_mode(fe);
 557                 s5h1409_set_qam_interleave_mode(fe);
 558         }
 559
 560         return 0;
 561 }
 562
 563 static int s5h1409_set_mpeg_timing(struct dvb_frontend *fe, int mode)
 564 {
 565         struct s5h1409_state *state = fe->demodulator_priv;
 566         u16 val;
 567
 568         dprintk("%s(%d)\n", __func__, mode);
 569
 570         val = s5h1409_readreg(state, 0xac) & 0xcfff;
 571         switch (mode) {
 572         case S5H1409_MPEGTIMING_CONTINOUS_INVERTING_CLOCK:
 573                 val |= 0x0000;
 574                 break;
 575         case S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK:
 576                 dprintk("%s(%d) Mode1 or Defaulting\n", __func__, mode);
 577                 val |= 0x1000;
 578                 break;
 579         case S5H1409_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK:
 580                 val |= 0x2000;
 581                 break;
 582         case S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK:
 583                 val |= 0x3000;
 584                 break;
 585         default:
 586                 return -EINVAL;
 587         }
 588
 589         /* Configure MPEG Signal Timing charactistics */
 590         return s5h1409_writereg(state, 0xac, val);
 591 }
 592
 593 /* Reset the demod hardware and reset all of the configuration registers
 594    to a default state. */
 595 static int s5h1409_init (struct dvb_frontend* fe)
 596 {
 597         int i;
 598
 599         struct s5h1409_state* state = fe->demodulator_priv;
 600         dprintk("%s()\n", __func__);
 601
 602         s5h1409_sleep(fe, 0);
 603         s5h1409_register_reset(fe);
 604
 605         for (i=0; i < ARRAY_SIZE(init_tab); i++)
 606                 s5h1409_writereg(state, init_tab[i].reg, init_tab[i].data);
 607
 608         /* The datasheet says that after initialisation, VSB is default */
 609         state->current_modulation = VSB_8;
 610
 611         if (state->config->output_mode == S5H1409_SERIAL_OUTPUT)
 612                 s5h1409_writereg(state, 0xab,
 613                         s5h1409_readreg(state, 0xab) | 0x100); /* Serial */
 614         else
 615                 s5h1409_writereg(state, 0xab,
 616                         s5h1409_readreg(state, 0xab) & 0xfeff); /* Parallel */
 617
 618         s5h1409_set_spectralinversion(fe, state->config->inversion);
 619         s5h1409_set_if_freq(fe, state->if_freq);
 620         s5h1409_set_gpio(fe, state->config->gpio);
 621         s5h1409_set_mpeg_timing(fe, state->config->mpeg_timing);
 622         s5h1409_softreset(fe);
 623
 624         /* Note: Leaving the I2C gate closed. */
 625         s5h1409_i2c_gate_ctrl(fe, 0);
 626
 627         return 0;
 628 }
 629
 630 static int s5h1409_read_status(struct dvb_frontend* fe, fe_status_t* status)
 631 {
 632         struct s5h1409_state* state = fe->demodulator_priv;
 633         u16 reg;
 634         u32 tuner_status = 0;
 635
 636         *status = 0;
 637
 638         /* Get the demodulator status */
 639         reg = s5h1409_readreg(state, 0xf1);
 640         if(reg & 0x1000)
 641                 *status |= FE_HAS_VITERBI;
 642         if(reg & 0x8000)
 643                 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
 644
 645         switch(state->config->status_mode) {
 646         case S5H1409_DEMODLOCKING:
 647                 if (*status & FE_HAS_VITERBI)
 648                         *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
 649                 break;
 650         case S5H1409_TUNERLOCKING:
 651                 /* Get the tuner status */
 652                 if (fe->ops.tuner_ops.get_status) {
 653                         if (fe->ops.i2c_gate_ctrl)
 654                                 fe->ops.i2c_gate_ctrl(fe, 1);
 655
 656                         fe->ops.tuner_ops.get_status(fe, &tuner_status);
 657
 658                         if (fe->ops.i2c_gate_ctrl)
 659                                 fe->ops.i2c_gate_ctrl(fe, 0);
 660                 }
 661                 if (tuner_status)
 662                         *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
 663                 break;
 664         }
 665
 666         dprintk("%s() status 0x%08x\n", __func__, *status);
 667
 668         return 0;
 669 }
 670
 671 static int s5h1409_qam256_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
 672 {
 673         int i, ret = -EINVAL;
 674         dprintk("%s()\n", __func__);
 675
 676         for (i=0; i < ARRAY_SIZE(qam256_snr_tab); i++) {
 677                 if (v < qam256_snr_tab[i].val) {
 678                         *snr = qam256_snr_tab[i].data;
 679                         ret = 0;
 680                         break;
 681                 }
 682         }
 683         return ret;
 684 }
 685
 686 static int s5h1409_qam64_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
 687 {
 688         int i, ret = -EINVAL;
 689         dprintk("%s()\n", __func__);
 690
 691         for (i=0; i < ARRAY_SIZE(qam64_snr_tab); i++) {
 692                 if (v < qam64_snr_tab[i].val) {
 693                         *snr = qam64_snr_tab[i].data;
 694                         ret = 0;
 695                         break;
 696                 }
 697         }
 698         return ret;
 699 }
 700
 701 static int s5h1409_vsb_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v)
 702 {
 703         int i, ret = -EINVAL;
 704         dprintk("%s()\n", __func__);
 705
 706         for (i=0; i < ARRAY_SIZE(vsb_snr_tab); i++) {
 707                 if (v > vsb_snr_tab[i].val) {
 708                         *snr = vsb_snr_tab[i].data;
 709                         ret = 0;
 710                         break;
 711                 }
 712         }
 713         dprintk("%s() snr=%d\n", __func__, *snr);
 714         return ret;
 715 }
 716
 717 static int s5h1409_read_snr(struct dvb_frontend* fe, u16* snr)
 718 {
 719         struct s5h1409_state* state = fe->demodulator_priv;
 720         u16 reg;
 721         dprintk("%s()\n", __func__);
 722
 723         switch(state->current_modulation) {
 724         case QAM_64:
 725                 reg = s5h1409_readreg(state, 0xf0) & 0xff;
 726                 return s5h1409_qam64_lookup_snr(fe, snr, reg);
 727         case QAM_256:
 728                 reg = s5h1409_readreg(state, 0xf0) & 0xff;
 729                 return s5h1409_qam256_lookup_snr(fe, snr, reg);
 730         case VSB_8:
 731                 reg = s5h1409_readreg(state, 0xf1) & 0x3ff;
 732                 return s5h1409_vsb_lookup_snr(fe, snr, reg);
 733         default:
 734                 break;
 735         }
 736
 737         return -EINVAL;
 738 }
 739
 740 static int s5h1409_read_signal_strength(struct dvb_frontend* fe,
 741                                         u16* signal_strength)
 742 {
 743         return s5h1409_read_snr(fe, signal_strength);
 744 }
 745
 746 static int s5h1409_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 747 {
 748         struct s5h1409_state* state = fe->demodulator_priv;
 749
 750         *ucblocks = s5h1409_readreg(state, 0xb5);
 751
 752         return 0;
 753 }
 754
 755 static int s5h1409_read_ber(struct dvb_frontend* fe, u32* ber)
 756 {
 757         return s5h1409_read_ucblocks(fe, ber);
 758 }
 759
 760 static int s5h1409_get_frontend(struct dvb_frontend* fe,
 761                                 struct dvb_frontend_parameters *p)
 762 {
 763         struct s5h1409_state* state = fe->demodulator_priv;
 764
 765         p->frequency = state->current_frequency;
 766         p->u.vsb.modulation = state->current_modulation;
 767
 768         return 0;
 769 }
 770
 771 static int s5h1409_get_tune_settings(struct dvb_frontend* fe,
 772                                      struct dvb_frontend_tune_settings *tune)
 773 {
 774         tune->min_delay_ms = 1000;
 775         return 0;
 776 }
 777
 778 static void s5h1409_release(struct dvb_frontend* fe)
 779 {
 780         struct s5h1409_state* state = fe->demodulator_priv;
 781         kfree(state);
 782 }
 783
 784 static struct dvb_frontend_ops s5h1409_ops;
 785
 786 struct dvb_frontend* s5h1409_attach(const struct s5h1409_config* config,
 787                                     struct i2c_adapter* i2c)
 788 {
 789         struct s5h1409_state* state = NULL;
 790         u16 reg;
 791
 792         /* allocate memory for the internal state */
 793         state = kmalloc(sizeof(struct s5h1409_state), GFP_KERNEL);
 794         if (state == NULL)
 795                 goto error;
 796
 797         /* setup the state */
 798         state->config = config;
 799         state->i2c = i2c;
 800         state->current_modulation = 0;
 801         state->if_freq = S5H1409_VSB_IF_FREQ;
 802
 803         /* check if the demod exists */
 804         reg = s5h1409_readreg(state, 0x04);
 805         if ((reg != 0x0066) && (reg != 0x007f))
 806                 goto error;
 807
 808         /* create dvb_frontend */
 809         memcpy(&state->frontend.ops, &s5h1409_ops,
 810                sizeof(struct dvb_frontend_ops));
 811         state->frontend.demodulator_priv = state;
 812
 813         if (s5h1409_init(&state->frontend) != 0) {
 814                 printk(KERN_ERR "%s: Failed to initialize correctly\n",
 815                         __func__);
 816                 goto error;
 817         }
 818
 819         /* Note: Leaving the I2C gate open here. */
 820         s5h1409_i2c_gate_ctrl(&state->frontend, 1);
 821
 822         return &state->frontend;
 823
 824 error:
 825         kfree(state);
 826         return NULL;
 827 }
 828
 829 static struct dvb_frontend_ops s5h1409_ops = {
 830
 831         .info = {
 832                 .name                   = "Samsung S5H1409 QAM/8VSB Frontend",
 833                 .type                   = FE_ATSC,
 834                 .frequency_min          = 54000000,
 835                 .frequency_max          = 858000000,
 836                 .frequency_stepsize     = 62500,
 837                 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
 838         },
 839
 840         .init                 = s5h1409_init,
 841         .i2c_gate_ctrl        = s5h1409_i2c_gate_ctrl,
 842         .set_frontend         = s5h1409_set_frontend,
 843         .get_frontend         = s5h1409_get_frontend,
 844         .get_tune_settings    = s5h1409_get_tune_settings,
 845         .read_status          = s5h1409_read_status,
 846         .read_ber             = s5h1409_read_ber,
 847         .read_signal_strength = s5h1409_read_signal_strength,
 848         .read_snr             = s5h1409_read_snr,
 849         .read_ucblocks        = s5h1409_read_ucblocks,
 850         .release              = s5h1409_release,
 851 };
 852
 853 module_param(debug, int, 0644);
 854 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
 855
 856 MODULE_DESCRIPTION("Samsung S5H1409 QAM-B/ATSC Demodulator driver");
 857 MODULE_AUTHOR("Steven Toth");
 858 MODULE_LICENSE("GPL");
 859
 860 EXPORT_SYMBOL(s5h1409_attach);
 861
 862 /*
 863  * Local variables:
 864  * c-basic-offset: 8
 865  */