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x86, UV: Fix for nodes with memory and no cpus
[linux/fpc-iii.git] / drivers / infiniband / hw / mthca / mthca_main.c
blob52f60f4eea0070a2f763a2bcb8d3a5373f919963
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #include <linux/module.h>
36 #include <linux/init.h>
37 #include <linux/errno.h>
38 #include <linux/pci.h>
39 #include <linux/interrupt.h>
40
41 #include "mthca_dev.h"
42 #include "mthca_config_reg.h"
43 #include "mthca_cmd.h"
44 #include "mthca_profile.h"
45 #include "mthca_memfree.h"
46 #include "mthca_wqe.h"
47
48 MODULE_AUTHOR("Roland Dreier");
49 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
50 MODULE_LICENSE("Dual BSD/GPL");
51 MODULE_VERSION(DRV_VERSION);
52
53 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
54
55 int mthca_debug_level = 0;
56 module_param_named(debug_level, mthca_debug_level, int, 0644);
57 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
58
59 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
60
61 #ifdef CONFIG_PCI_MSI
62
63 static int msi_x = 1;
64 module_param(msi_x, int, 0444);
65 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
66
67 #else /* CONFIG_PCI_MSI */
68
69 #define msi_x (0)
70
71 #endif /* CONFIG_PCI_MSI */
72
73 static int tune_pci = 0;
74 module_param(tune_pci, int, 0444);
75 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
76
77 DEFINE_MUTEX(mthca_device_mutex);
78
79 #define MTHCA_DEFAULT_NUM_QP (1 << 16)
80 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
81 #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
82 #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
83 #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
84 #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
85 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
86 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
87 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
88
89 static struct mthca_profile hca_profile = {
90 .num_qp = MTHCA_DEFAULT_NUM_QP,
91 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
92 .num_cq = MTHCA_DEFAULT_NUM_CQ,
93 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
94 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
95 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
96 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
97 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
98 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
99 };
100
101 module_param_named(num_qp, hca_profile.num_qp, int, 0444);
102 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
103
104 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
105 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
106
107 module_param_named(num_cq, hca_profile.num_cq, int, 0444);
108 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
109
110 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
111 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
112
113 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
114 MODULE_PARM_DESC(num_mpt,
115 "maximum number of memory protection table entries per HCA");
116
117 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
118 MODULE_PARM_DESC(num_mtt,
119 "maximum number of memory translation table segments per HCA");
120
121 module_param_named(num_udav, hca_profile.num_udav, int, 0444);
122 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
123
124 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
125 MODULE_PARM_DESC(fmr_reserved_mtts,
126 "number of memory translation table segments reserved for FMR");
127
128 static char mthca_version[] __devinitdata =
129 DRV_NAME ": Mellanox InfiniBand HCA driver v"
130 DRV_VERSION " (" DRV_RELDATE ")\n";
131
132 static int mthca_tune_pci(struct mthca_dev *mdev)
133 {
134 if (!tune_pci)
135 return 0;
136
137 /* First try to max out Read Byte Count */
138 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) {
139 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) {
140 mthca_err(mdev, "Couldn't set PCI-X max read count, "
141 "aborting.\n");
142 return -ENODEV;
143 }
144 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
145 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
146
147 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) {
148 if (pcie_set_readrq(mdev->pdev, 4096)) {
149 mthca_err(mdev, "Couldn't write PCI Express read request, "
150 "aborting.\n");
151 return -ENODEV;
152 }
153 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
154 mthca_info(mdev, "No PCI Express capability, "
155 "not setting Max Read Request Size.\n");
156
157 return 0;
158 }
159
160 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
161 {
162 int err;
163 u8 status;
164
165 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
166 if (err) {
167 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
168 return err;
169 }
170 if (status) {
171 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
172 "aborting.\n", status);
173 return -EINVAL;
174 }
175 if (dev_lim->min_page_sz > PAGE_SIZE) {
176 mthca_err(mdev, "HCA minimum page size of %d bigger than "
177 "kernel PAGE_SIZE of %ld, aborting.\n",
178 dev_lim->min_page_sz, PAGE_SIZE);
179 return -ENODEV;
180 }
181 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
182 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
183 "aborting.\n",
184 dev_lim->num_ports, MTHCA_MAX_PORTS);
185 return -ENODEV;
186 }
187
188 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
189 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
190 "PCI resource 2 size of 0x%llx, aborting.\n",
191 dev_lim->uar_size,
192 (unsigned long long)pci_resource_len(mdev->pdev, 2));
193 return -ENODEV;
194 }
195
196 mdev->limits.num_ports = dev_lim->num_ports;
197 mdev->limits.vl_cap = dev_lim->max_vl;
198 mdev->limits.mtu_cap = dev_lim->max_mtu;
199 mdev->limits.gid_table_len = dev_lim->max_gids;
200 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
201 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
202 /*
203 * Need to allow for worst case send WQE overhead and check
204 * whether max_desc_sz imposes a lower limit than max_sg; UD
205 * send has the biggest overhead.
206 */
207 mdev->limits.max_sg = min_t(int, dev_lim->max_sg,
208 (dev_lim->max_desc_sz -
209 sizeof (struct mthca_next_seg) -
210 (mthca_is_memfree(mdev) ?
211 sizeof (struct mthca_arbel_ud_seg) :
212 sizeof (struct mthca_tavor_ud_seg))) /
213 sizeof (struct mthca_data_seg));
214 mdev->limits.max_wqes = dev_lim->max_qp_sz;
215 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
216 mdev->limits.reserved_qps = dev_lim->reserved_qps;
217 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
218 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
219 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
220 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
221 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
222 /*
223 * Subtract 1 from the limit because we need to allocate a
224 * spare CQE so the HCA HW can tell the difference between an
225 * empty CQ and a full CQ.
226 */
227 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
228 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
229 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
230 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
231 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
232 mdev->limits.reserved_uars = dev_lim->reserved_uars;
233 mdev->limits.reserved_pds = dev_lim->reserved_pds;
234 mdev->limits.port_width_cap = dev_lim->max_port_width;
235 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
236 mdev->limits.flags = dev_lim->flags;
237 /*
238 * For old FW that doesn't return static rate support, use a
239 * value of 0x3 (only static rate values of 0 or 1 are handled),
240 * except on Sinai, where even old FW can handle static rate
241 * values of 2 and 3.
242 */
243 if (dev_lim->stat_rate_support)
244 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
245 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
246 mdev->limits.stat_rate_support = 0xf;
247 else
248 mdev->limits.stat_rate_support = 0x3;
249
250 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
251 May be doable since hardware supports it for SRQ.
252
253 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
254
255 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
256 supported by driver. */
257 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
258 IB_DEVICE_PORT_ACTIVE_EVENT |
259 IB_DEVICE_SYS_IMAGE_GUID |
260 IB_DEVICE_RC_RNR_NAK_GEN;
261
262 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
263 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
264
265 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
266 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
267
268 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
269 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
270
271 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
272 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
273
274 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
275 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
276
277 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
278 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
279
280 if (mthca_is_memfree(mdev))
281 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM)
282 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
283
284 return 0;
285 }
286
287 static int mthca_init_tavor(struct mthca_dev *mdev)
288 {
289 s64 size;
290 u8 status;
291 int err;
292 struct mthca_dev_lim dev_lim;
293 struct mthca_profile profile;
294 struct mthca_init_hca_param init_hca;
295
296 err = mthca_SYS_EN(mdev, &status);
297 if (err) {
298 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
299 return err;
300 }
301 if (status) {
302 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
303 "aborting.\n", status);
304 return -EINVAL;
305 }
306
307 err = mthca_QUERY_FW(mdev, &status);
308 if (err) {
309 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
310 goto err_disable;
311 }
312 if (status) {
313 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
314 "aborting.\n", status);
315 err = -EINVAL;
316 goto err_disable;
317 }
318 err = mthca_QUERY_DDR(mdev, &status);
319 if (err) {
320 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
321 goto err_disable;
322 }
323 if (status) {
324 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
325 "aborting.\n", status);
326 err = -EINVAL;
327 goto err_disable;
328 }
329
330 err = mthca_dev_lim(mdev, &dev_lim);
331 if (err) {
332 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
333 goto err_disable;
334 }
335
336 profile = hca_profile;
337 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
338 profile.uarc_size = 0;
339 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
340 profile.num_srq = dev_lim.max_srqs;
341
342 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
343 if (size < 0) {
344 err = size;
345 goto err_disable;
346 }
347
348 err = mthca_INIT_HCA(mdev, &init_hca, &status);
349 if (err) {
350 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
351 goto err_disable;
352 }
353 if (status) {
354 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
355 "aborting.\n", status);
356 err = -EINVAL;
357 goto err_disable;
358 }
359
360 return 0;
361
362 err_disable:
363 mthca_SYS_DIS(mdev, &status);
364
365 return err;
366 }
367
368 static int mthca_load_fw(struct mthca_dev *mdev)
369 {
370 u8 status;
371 int err;
372
373 /* FIXME: use HCA-attached memory for FW if present */
374
375 mdev->fw.arbel.fw_icm =
376 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
377 GFP_HIGHUSER | __GFP_NOWARN, 0);
378 if (!mdev->fw.arbel.fw_icm) {
379 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
380 return -ENOMEM;
381 }
382
383 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
384 if (err) {
385 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
386 goto err_free;
387 }
388 if (status) {
389 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
390 err = -EINVAL;
391 goto err_free;
392 }
393 err = mthca_RUN_FW(mdev, &status);
394 if (err) {
395 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
396 goto err_unmap_fa;
397 }
398 if (status) {
399 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
400 err = -EINVAL;
401 goto err_unmap_fa;
402 }
403
404 return 0;
405
406 err_unmap_fa:
407 mthca_UNMAP_FA(mdev, &status);
408
409 err_free:
410 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
411 return err;
412 }
413
414 static int mthca_init_icm(struct mthca_dev *mdev,
415 struct mthca_dev_lim *dev_lim,
416 struct mthca_init_hca_param *init_hca,
417 u64 icm_size)
418 {
419 u64 aux_pages;
420 u8 status;
421 int err;
422
423 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
424 if (err) {
425 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
426 return err;
427 }
428 if (status) {
429 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
430 "aborting.\n", status);
431 return -EINVAL;
432 }
433
434 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
435 (unsigned long long) icm_size >> 10,
436 (unsigned long long) aux_pages << 2);
437
438 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
439 GFP_HIGHUSER | __GFP_NOWARN, 0);
440 if (!mdev->fw.arbel.aux_icm) {
441 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
442 return -ENOMEM;
443 }
444
445 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
446 if (err) {
447 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
448 goto err_free_aux;
449 }
450 if (status) {
451 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
452 err = -EINVAL;
453 goto err_free_aux;
454 }
455
456 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
457 if (err) {
458 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
459 goto err_unmap_aux;
460 }
461
462 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
463 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
464 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
465
466 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
467 MTHCA_MTT_SEG_SIZE,
468 mdev->limits.num_mtt_segs,
469 mdev->limits.reserved_mtts,
470 1, 0);
471 if (!mdev->mr_table.mtt_table) {
472 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
473 err = -ENOMEM;
474 goto err_unmap_eq;
475 }
476
477 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
478 dev_lim->mpt_entry_sz,
479 mdev->limits.num_mpts,
480 mdev->limits.reserved_mrws,
481 1, 1);
482 if (!mdev->mr_table.mpt_table) {
483 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
484 err = -ENOMEM;
485 goto err_unmap_mtt;
486 }
487
488 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
489 dev_lim->qpc_entry_sz,
490 mdev->limits.num_qps,
491 mdev->limits.reserved_qps,
492 0, 0);
493 if (!mdev->qp_table.qp_table) {
494 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
495 err = -ENOMEM;
496 goto err_unmap_mpt;
497 }
498
499 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
500 dev_lim->eqpc_entry_sz,
501 mdev->limits.num_qps,
502 mdev->limits.reserved_qps,
503 0, 0);
504 if (!mdev->qp_table.eqp_table) {
505 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
506 err = -ENOMEM;
507 goto err_unmap_qp;
508 }
509
510 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
511 MTHCA_RDB_ENTRY_SIZE,
512 mdev->limits.num_qps <<
513 mdev->qp_table.rdb_shift, 0,
514 0, 0);
515 if (!mdev->qp_table.rdb_table) {
516 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
517 err = -ENOMEM;
518 goto err_unmap_eqp;
519 }
520
521 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
522 dev_lim->cqc_entry_sz,
523 mdev->limits.num_cqs,
524 mdev->limits.reserved_cqs,
525 0, 0);
526 if (!mdev->cq_table.table) {
527 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
528 err = -ENOMEM;
529 goto err_unmap_rdb;
530 }
531
532 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
533 mdev->srq_table.table =
534 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
535 dev_lim->srq_entry_sz,
536 mdev->limits.num_srqs,
537 mdev->limits.reserved_srqs,
538 0, 0);
539 if (!mdev->srq_table.table) {
540 mthca_err(mdev, "Failed to map SRQ context memory, "
541 "aborting.\n");
542 err = -ENOMEM;
543 goto err_unmap_cq;
544 }
545 }
546
547 /*
548 * It's not strictly required, but for simplicity just map the
549 * whole multicast group table now. The table isn't very big
550 * and it's a lot easier than trying to track ref counts.
551 */
552 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
553 MTHCA_MGM_ENTRY_SIZE,
554 mdev->limits.num_mgms +
555 mdev->limits.num_amgms,
556 mdev->limits.num_mgms +
557 mdev->limits.num_amgms,
558 0, 0);
559 if (!mdev->mcg_table.table) {
560 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
561 err = -ENOMEM;
562 goto err_unmap_srq;
563 }
564
565 return 0;
566
567 err_unmap_srq:
568 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
569 mthca_free_icm_table(mdev, mdev->srq_table.table);
570
571 err_unmap_cq:
572 mthca_free_icm_table(mdev, mdev->cq_table.table);
573
574 err_unmap_rdb:
575 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
576
577 err_unmap_eqp:
578 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
579
580 err_unmap_qp:
581 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
582
583 err_unmap_mpt:
584 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
585
586 err_unmap_mtt:
587 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
588
589 err_unmap_eq:
590 mthca_unmap_eq_icm(mdev);
591
592 err_unmap_aux:
593 mthca_UNMAP_ICM_AUX(mdev, &status);
594
595 err_free_aux:
596 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
597
598 return err;
599 }
600
601 static void mthca_free_icms(struct mthca_dev *mdev)
602 {
603 u8 status;
604
605 mthca_free_icm_table(mdev, mdev->mcg_table.table);
606 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
607 mthca_free_icm_table(mdev, mdev->srq_table.table);
608 mthca_free_icm_table(mdev, mdev->cq_table.table);
609 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
610 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
611 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
612 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
613 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
614 mthca_unmap_eq_icm(mdev);
615
616 mthca_UNMAP_ICM_AUX(mdev, &status);
617 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
618 }
619
620 static int mthca_init_arbel(struct mthca_dev *mdev)
621 {
622 struct mthca_dev_lim dev_lim;
623 struct mthca_profile profile;
624 struct mthca_init_hca_param init_hca;
625 s64 icm_size;
626 u8 status;
627 int err;
628
629 err = mthca_QUERY_FW(mdev, &status);
630 if (err) {
631 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
632 return err;
633 }
634 if (status) {
635 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
636 "aborting.\n", status);
637 return -EINVAL;
638 }
639
640 err = mthca_ENABLE_LAM(mdev, &status);
641 if (err) {
642 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
643 return err;
644 }
645 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
646 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
647 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
648 } else if (status) {
649 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
650 "aborting.\n", status);
651 return -EINVAL;
652 }
653
654 err = mthca_load_fw(mdev);
655 if (err) {
656 mthca_err(mdev, "Failed to start FW, aborting.\n");
657 goto err_disable;
658 }
659
660 err = mthca_dev_lim(mdev, &dev_lim);
661 if (err) {
662 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
663 goto err_stop_fw;
664 }
665
666 profile = hca_profile;
667 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
668 profile.num_udav = 0;
669 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
670 profile.num_srq = dev_lim.max_srqs;
671
672 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
673 if (icm_size < 0) {
674 err = icm_size;
675 goto err_stop_fw;
676 }
677
678 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
679 if (err)
680 goto err_stop_fw;
681
682 err = mthca_INIT_HCA(mdev, &init_hca, &status);
683 if (err) {
684 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
685 goto err_free_icm;
686 }
687 if (status) {
688 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
689 "aborting.\n", status);
690 err = -EINVAL;
691 goto err_free_icm;
692 }
693
694 return 0;
695
696 err_free_icm:
697 mthca_free_icms(mdev);
698
699 err_stop_fw:
700 mthca_UNMAP_FA(mdev, &status);
701 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
702
703 err_disable:
704 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
705 mthca_DISABLE_LAM(mdev, &status);
706
707 return err;
708 }
709
710 static void mthca_close_hca(struct mthca_dev *mdev)
711 {
712 u8 status;
713
714 mthca_CLOSE_HCA(mdev, 0, &status);
715
716 if (mthca_is_memfree(mdev)) {
717 mthca_free_icms(mdev);
718
719 mthca_UNMAP_FA(mdev, &status);
720 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
721
722 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
723 mthca_DISABLE_LAM(mdev, &status);
724 } else
725 mthca_SYS_DIS(mdev, &status);
726 }
727
728 static int mthca_init_hca(struct mthca_dev *mdev)
729 {
730 u8 status;
731 int err;
732 struct mthca_adapter adapter;
733
734 if (mthca_is_memfree(mdev))
735 err = mthca_init_arbel(mdev);
736 else
737 err = mthca_init_tavor(mdev);
738
739 if (err)
740 return err;
741
742 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
743 if (err) {
744 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
745 goto err_close;
746 }
747 if (status) {
748 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
749 "aborting.\n", status);
750 err = -EINVAL;
751 goto err_close;
752 }
753
754 mdev->eq_table.inta_pin = adapter.inta_pin;
755 if (!mthca_is_memfree(mdev))
756 mdev->rev_id = adapter.revision_id;
757 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
758
759 return 0;
760
761 err_close:
762 mthca_close_hca(mdev);
763 return err;
764 }
765
766 static int mthca_setup_hca(struct mthca_dev *dev)
767 {
768 int err;
769 u8 status;
770
771 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
772
773 err = mthca_init_uar_table(dev);
774 if (err) {
775 mthca_err(dev, "Failed to initialize "
776 "user access region table, aborting.\n");
777 return err;
778 }
779
780 err = mthca_uar_alloc(dev, &dev->driver_uar);
781 if (err) {
782 mthca_err(dev, "Failed to allocate driver access region, "
783 "aborting.\n");
784 goto err_uar_table_free;
785 }
786
787 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
788 if (!dev->kar) {
789 mthca_err(dev, "Couldn't map kernel access region, "
790 "aborting.\n");
791 err = -ENOMEM;
792 goto err_uar_free;
793 }
794
795 err = mthca_init_pd_table(dev);
796 if (err) {
797 mthca_err(dev, "Failed to initialize "
798 "protection domain table, aborting.\n");
799 goto err_kar_unmap;
800 }
801
802 err = mthca_init_mr_table(dev);
803 if (err) {
804 mthca_err(dev, "Failed to initialize "
805 "memory region table, aborting.\n");
806 goto err_pd_table_free;
807 }
808
809 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
810 if (err) {
811 mthca_err(dev, "Failed to create driver PD, "
812 "aborting.\n");
813 goto err_mr_table_free;
814 }
815
816 err = mthca_init_eq_table(dev);
817 if (err) {
818 mthca_err(dev, "Failed to initialize "
819 "event queue table, aborting.\n");
820 goto err_pd_free;
821 }
822
823 err = mthca_cmd_use_events(dev);
824 if (err) {
825 mthca_err(dev, "Failed to switch to event-driven "
826 "firmware commands, aborting.\n");
827 goto err_eq_table_free;
828 }
829
830 err = mthca_NOP(dev, &status);
831 if (err || status) {
832 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) {
833 mthca_warn(dev, "NOP command failed to generate interrupt "
834 "(IRQ %d).\n",
835 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector);
836 mthca_warn(dev, "Trying again with MSI-X disabled.\n");
837 } else {
838 mthca_err(dev, "NOP command failed to generate interrupt "
839 "(IRQ %d), aborting.\n",
840 dev->pdev->irq);
841 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
842 }
843
844 goto err_cmd_poll;
845 }
846
847 mthca_dbg(dev, "NOP command IRQ test passed\n");
848
849 err = mthca_init_cq_table(dev);
850 if (err) {
851 mthca_err(dev, "Failed to initialize "
852 "completion queue table, aborting.\n");
853 goto err_cmd_poll;
854 }
855
856 err = mthca_init_srq_table(dev);
857 if (err) {
858 mthca_err(dev, "Failed to initialize "
859 "shared receive queue table, aborting.\n");
860 goto err_cq_table_free;
861 }
862
863 err = mthca_init_qp_table(dev);
864 if (err) {
865 mthca_err(dev, "Failed to initialize "
866 "queue pair table, aborting.\n");
867 goto err_srq_table_free;
868 }
869
870 err = mthca_init_av_table(dev);
871 if (err) {
872 mthca_err(dev, "Failed to initialize "
873 "address vector table, aborting.\n");
874 goto err_qp_table_free;
875 }
876
877 err = mthca_init_mcg_table(dev);
878 if (err) {
879 mthca_err(dev, "Failed to initialize "
880 "multicast group table, aborting.\n");
881 goto err_av_table_free;
882 }
883
884 return 0;
885
886 err_av_table_free:
887 mthca_cleanup_av_table(dev);
888
889 err_qp_table_free:
890 mthca_cleanup_qp_table(dev);
891
892 err_srq_table_free:
893 mthca_cleanup_srq_table(dev);
894
895 err_cq_table_free:
896 mthca_cleanup_cq_table(dev);
897
898 err_cmd_poll:
899 mthca_cmd_use_polling(dev);
900
901 err_eq_table_free:
902 mthca_cleanup_eq_table(dev);
903
904 err_pd_free:
905 mthca_pd_free(dev, &dev->driver_pd);
906
907 err_mr_table_free:
908 mthca_cleanup_mr_table(dev);
909
910 err_pd_table_free:
911 mthca_cleanup_pd_table(dev);
912
913 err_kar_unmap:
914 iounmap(dev->kar);
915
916 err_uar_free:
917 mthca_uar_free(dev, &dev->driver_uar);
918
919 err_uar_table_free:
920 mthca_cleanup_uar_table(dev);
921 return err;
922 }
923
924 static int mthca_enable_msi_x(struct mthca_dev *mdev)
925 {
926 struct msix_entry entries[3];
927 int err;
928
929 entries[0].entry = 0;
930 entries[1].entry = 1;
931 entries[2].entry = 2;
932
933 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
934 if (err) {
935 if (err > 0)
936 mthca_info(mdev, "Only %d MSI-X vectors available, "
937 "not using MSI-X\n", err);
938 return err;
939 }
940
941 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
942 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
943 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
944
945 return 0;
946 }
947
948 /* Types of supported HCA */
949 enum {
950 TAVOR, /* MT23108 */
951 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
952 ARBEL_NATIVE, /* MT25208 with extended features */
953 SINAI /* MT25204 */
954 };
955
956 #define MTHCA_FW_VER(major, minor, subminor) \
957 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
958
959 static struct {
960 u64 latest_fw;
961 u32 flags;
962 } mthca_hca_table[] = {
963 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
964 .flags = 0 },
965 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
966 .flags = MTHCA_FLAG_PCIE },
967 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0),
968 .flags = MTHCA_FLAG_MEMFREE |
969 MTHCA_FLAG_PCIE },
970 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
971 .flags = MTHCA_FLAG_MEMFREE |
972 MTHCA_FLAG_PCIE |
973 MTHCA_FLAG_SINAI_OPT }
974 };
975
976 static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
977 {
978 int ddr_hidden = 0;
979 int err;
980 struct mthca_dev *mdev;
981
982 printk(KERN_INFO PFX "Initializing %s\n",
983 pci_name(pdev));
984
985 err = pci_enable_device(pdev);
986 if (err) {
987 dev_err(&pdev->dev, "Cannot enable PCI device, "
988 "aborting.\n");
989 return err;
990 }
991
992 /*
993 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
994 * be present)
995 */
996 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
997 pci_resource_len(pdev, 0) != 1 << 20) {
998 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
999 err = -ENODEV;
1000 goto err_disable_pdev;
1001 }
1002 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1003 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1004 err = -ENODEV;
1005 goto err_disable_pdev;
1006 }
1007 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
1008 ddr_hidden = 1;
1009
1010 err = pci_request_regions(pdev, DRV_NAME);
1011 if (err) {
1012 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
1013 "aborting.\n");
1014 goto err_disable_pdev;
1015 }
1016
1017 pci_set_master(pdev);
1018
1019 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1020 if (err) {
1021 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1022 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1023 if (err) {
1024 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1025 goto err_free_res;
1026 }
1027 }
1028 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1029 if (err) {
1030 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1031 "consistent PCI DMA mask.\n");
1032 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1033 if (err) {
1034 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1035 "aborting.\n");
1036 goto err_free_res;
1037 }
1038 }
1039
1040 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1041 if (!mdev) {
1042 dev_err(&pdev->dev, "Device struct alloc failed, "
1043 "aborting.\n");
1044 err = -ENOMEM;
1045 goto err_free_res;
1046 }
1047
1048 mdev->pdev = pdev;
1049
1050 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
1051 if (ddr_hidden)
1052 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
1053
1054 /*
1055 * Now reset the HCA before we touch the PCI capabilities or
1056 * attempt a firmware command, since a boot ROM may have left
1057 * the HCA in an undefined state.
1058 */
1059 err = mthca_reset(mdev);
1060 if (err) {
1061 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1062 goto err_free_dev;
1063 }
1064
1065 if (mthca_cmd_init(mdev)) {
1066 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1067 goto err_free_dev;
1068 }
1069
1070 err = mthca_tune_pci(mdev);
1071 if (err)
1072 goto err_cmd;
1073
1074 err = mthca_init_hca(mdev);
1075 if (err)
1076 goto err_cmd;
1077
1078 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
1079 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n",
1080 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1081 (int) (mdev->fw_ver & 0xffff),
1082 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1083 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1084 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
1085 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1086 }
1087
1088 if (msi_x && !mthca_enable_msi_x(mdev))
1089 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1090
1091 err = mthca_setup_hca(mdev);
1092 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) {
1093 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1094 pci_disable_msix(pdev);
1095 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X;
1096
1097 err = mthca_setup_hca(mdev);
1098 }
1099
1100 if (err)
1101 goto err_close;
1102
1103 err = mthca_register_device(mdev);
1104 if (err)
1105 goto err_cleanup;
1106
1107 err = mthca_create_agents(mdev);
1108 if (err)
1109 goto err_unregister;
1110
1111 pci_set_drvdata(pdev, mdev);
1112 mdev->hca_type = hca_type;
1113
1114 return 0;
1115
1116 err_unregister:
1117 mthca_unregister_device(mdev);
1118
1119 err_cleanup:
1120 mthca_cleanup_mcg_table(mdev);
1121 mthca_cleanup_av_table(mdev);
1122 mthca_cleanup_qp_table(mdev);
1123 mthca_cleanup_srq_table(mdev);
1124 mthca_cleanup_cq_table(mdev);
1125 mthca_cmd_use_polling(mdev);
1126 mthca_cleanup_eq_table(mdev);
1127
1128 mthca_pd_free(mdev, &mdev->driver_pd);
1129
1130 mthca_cleanup_mr_table(mdev);
1131 mthca_cleanup_pd_table(mdev);
1132 mthca_cleanup_uar_table(mdev);
1133
1134 err_close:
1135 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1136 pci_disable_msix(pdev);
1137
1138 mthca_close_hca(mdev);
1139
1140 err_cmd:
1141 mthca_cmd_cleanup(mdev);
1142
1143 err_free_dev:
1144 ib_dealloc_device(&mdev->ib_dev);
1145
1146 err_free_res:
1147 pci_release_regions(pdev);
1148
1149 err_disable_pdev:
1150 pci_disable_device(pdev);
1151 pci_set_drvdata(pdev, NULL);
1152 return err;
1153 }
1154
1155 static void __mthca_remove_one(struct pci_dev *pdev)
1156 {
1157 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1158 u8 status;
1159 int p;
1160
1161 if (mdev) {
1162 mthca_free_agents(mdev);
1163 mthca_unregister_device(mdev);
1164
1165 for (p = 1; p <= mdev->limits.num_ports; ++p)
1166 mthca_CLOSE_IB(mdev, p, &status);
1167
1168 mthca_cleanup_mcg_table(mdev);
1169 mthca_cleanup_av_table(mdev);
1170 mthca_cleanup_qp_table(mdev);
1171 mthca_cleanup_srq_table(mdev);
1172 mthca_cleanup_cq_table(mdev);
1173 mthca_cmd_use_polling(mdev);
1174 mthca_cleanup_eq_table(mdev);
1175
1176 mthca_pd_free(mdev, &mdev->driver_pd);
1177
1178 mthca_cleanup_mr_table(mdev);
1179 mthca_cleanup_pd_table(mdev);
1180
1181 iounmap(mdev->kar);
1182 mthca_uar_free(mdev, &mdev->driver_uar);
1183 mthca_cleanup_uar_table(mdev);
1184 mthca_close_hca(mdev);
1185 mthca_cmd_cleanup(mdev);
1186
1187 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1188 pci_disable_msix(pdev);
1189
1190 ib_dealloc_device(&mdev->ib_dev);
1191 pci_release_regions(pdev);
1192 pci_disable_device(pdev);
1193 pci_set_drvdata(pdev, NULL);
1194 }
1195 }
1196
1197 int __mthca_restart_one(struct pci_dev *pdev)
1198 {
1199 struct mthca_dev *mdev;
1200 int hca_type;
1201
1202 mdev = pci_get_drvdata(pdev);
1203 if (!mdev)
1204 return -ENODEV;
1205 hca_type = mdev->hca_type;
1206 __mthca_remove_one(pdev);
1207 return __mthca_init_one(pdev, hca_type);
1208 }
1209
1210 static int __devinit mthca_init_one(struct pci_dev *pdev,
1211 const struct pci_device_id *id)
1212 {
1213 static int mthca_version_printed = 0;
1214 int ret;
1215
1216 mutex_lock(&mthca_device_mutex);
1217
1218 if (!mthca_version_printed) {
1219 printk(KERN_INFO "%s", mthca_version);
1220 ++mthca_version_printed;
1221 }
1222
1223 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1224 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
1225 pci_name(pdev), id->driver_data);
1226 mutex_unlock(&mthca_device_mutex);
1227 return -ENODEV;
1228 }
1229
1230 ret = __mthca_init_one(pdev, id->driver_data);
1231
1232 mutex_unlock(&mthca_device_mutex);
1233
1234 return ret;
1235 }
1236
1237 static void __devexit mthca_remove_one(struct pci_dev *pdev)
1238 {
1239 mutex_lock(&mthca_device_mutex);
1240 __mthca_remove_one(pdev);
1241 mutex_unlock(&mthca_device_mutex);
1242 }
1243
1244 static struct pci_device_id mthca_pci_table[] = {
1245 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1246 .driver_data = TAVOR },
1247 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1248 .driver_data = TAVOR },
1249 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1250 .driver_data = ARBEL_COMPAT },
1251 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1252 .driver_data = ARBEL_COMPAT },
1253 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1254 .driver_data = ARBEL_NATIVE },
1255 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1256 .driver_data = ARBEL_NATIVE },
1257 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1258 .driver_data = SINAI },
1259 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1260 .driver_data = SINAI },
1261 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1262 .driver_data = SINAI },
1263 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1264 .driver_data = SINAI },
1265 { 0, }
1266 };
1267
1268 MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1269
1270 static struct pci_driver mthca_driver = {
1271 .name = DRV_NAME,
1272 .id_table = mthca_pci_table,
1273 .probe = mthca_init_one,
1274 .remove = __devexit_p(mthca_remove_one)
1275 };
1276
1277 static void __init __mthca_check_profile_val(const char *name, int *pval,
1278 int pval_default)
1279 {
1280 /* value must be positive and power of 2 */
1281 int old_pval = *pval;
1282
1283 if (old_pval <= 0)
1284 *pval = pval_default;
1285 else
1286 *pval = roundup_pow_of_two(old_pval);
1287
1288 if (old_pval != *pval) {
1289 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1290 old_pval, name);
1291 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1292 }
1293 }
1294
1295 #define mthca_check_profile_val(name, default) \
1296 __mthca_check_profile_val(#name, &hca_profile.name, default)
1297
1298 static void __init mthca_validate_profile(void)
1299 {
1300 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1301 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1302 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1303 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1304 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1305 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1306 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1307 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1308
1309 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1310 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1311 hca_profile.fmr_reserved_mtts);
1312 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1313 hca_profile.num_mtt);
1314 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1315 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1316 hca_profile.fmr_reserved_mtts);
1317 }
1318 }
1319
1320 static int __init mthca_init(void)
1321 {
1322 int ret;
1323
1324 mthca_validate_profile();
1325
1326 ret = mthca_catas_init();
1327 if (ret)
1328 return ret;
1329
1330 ret = pci_register_driver(&mthca_driver);
1331 if (ret < 0) {
1332 mthca_catas_cleanup();
1333 return ret;
1334 }
1335
1336 return 0;
1337 }
1338
1339 static void __exit mthca_cleanup(void)
1340 {
1341 pci_unregister_driver(&mthca_driver);
1342 mthca_catas_cleanup();
1343 }
1344
1345 module_init(mthca_init);
1346 module_exit(mthca_cleanup);
Linux with added FPC-III support